William/LED-Face-Mask-Rough
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14b3f109b06f1f926799a4b179b1404330775e61
LED-Face-Mask-Rough/Debug/STM32F429I-DISC1_LEDFaceMask-Rough.list
William Miceli 14b3f109b0 Initial Commit
2020-08-22 20:02:11 -04:00

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358 KiB
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STM32F429I-DISC1_LEDFaceMask-Rough.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001ac 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 000038f0 080001ac 080001ac 000101ac 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000010 08003a9c 08003a9c 00013a9c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08003aac 08003aac 00020070 2**0
CONTENTS
4 .ARM 00000008 08003aac 08003aac 00013aac 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 08003ab4 08003ab4 00020070 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08003ab4 08003ab4 00013ab4 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 08003ab8 08003ab8 00013ab8 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 00000070 20000000 08003abc 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000003e4 20000070 08003b2c 00020070 2**2
ALLOC
10 ._user_heap_stack 00000604 20000454 08003b2c 00020454 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 00020070 2**0
CONTENTS, READONLY
12 .debug_info 0000c365 00000000 00000000 000200a0 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_abbrev 00001a29 00000000 00000000 0002c405 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_aranges 00000c08 00000000 00000000 0002de30 2**3
CONTENTS, READONLY, DEBUGGING
15 .debug_ranges 00000b30 00000000 00000000 0002ea38 2**3
CONTENTS, READONLY, DEBUGGING
16 .debug_macro 000236db 00000000 00000000 0002f568 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_line 0000943c 00000000 00000000 00052c43 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_str 000d850a 00000000 00000000 0005c07f 2**0
CONTENTS, READONLY, DEBUGGING
19 .comment 0000007b 00000000 00000000 00134589 2**0
CONTENTS, READONLY
20 .debug_frame 000033c0 00000000 00000000 00134604 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080001ac <__do_global_dtors_aux>:
80001ac: b510 push {r4, lr}
80001ae: 4c05 ldr r4, [pc, #20] ; (80001c4 <__do_global_dtors_aux+0x18>)
80001b0: 7823 ldrb r3, [r4, #0]
80001b2: b933 cbnz r3, 80001c2 <__do_global_dtors_aux+0x16>
80001b4: 4b04 ldr r3, [pc, #16] ; (80001c8 <__do_global_dtors_aux+0x1c>)
80001b6: b113 cbz r3, 80001be <__do_global_dtors_aux+0x12>
80001b8: 4804 ldr r0, [pc, #16] ; (80001cc <__do_global_dtors_aux+0x20>)
80001ba: f3af 8000 nop.w
80001be: 2301 movs r3, #1
80001c0: 7023 strb r3, [r4, #0]
80001c2: bd10 pop {r4, pc}
80001c4: 20000070 .word 0x20000070
80001c8: 00000000 .word 0x00000000
80001cc: 08003a84 .word 0x08003a84
080001d0 <frame_dummy>:
80001d0: b508 push {r3, lr}
80001d2: 4b03 ldr r3, [pc, #12] ; (80001e0 <frame_dummy+0x10>)
80001d4: b11b cbz r3, 80001de <frame_dummy+0xe>
80001d6: 4903 ldr r1, [pc, #12] ; (80001e4 <frame_dummy+0x14>)
80001d8: 4803 ldr r0, [pc, #12] ; (80001e8 <frame_dummy+0x18>)
80001da: f3af 8000 nop.w
80001de: bd08 pop {r3, pc}
80001e0: 00000000 .word 0x00000000
80001e4: 20000074 .word 0x20000074
80001e8: 08003a84 .word 0x08003a84
080001ec <__aeabi_uldivmod>:
80001ec: b953 cbnz r3, 8000204 <__aeabi_uldivmod+0x18>
80001ee: b94a cbnz r2, 8000204 <__aeabi_uldivmod+0x18>
80001f0: 2900 cmp r1, #0
80001f2: bf08 it eq
80001f4: 2800 cmpeq r0, #0
80001f6: bf1c itt ne
80001f8: f04f 31ff movne.w r1, #4294967295
80001fc: f04f 30ff movne.w r0, #4294967295
8000200: f000 b972 b.w 80004e8 <__aeabi_idiv0>
8000204: f1ad 0c08 sub.w ip, sp, #8
8000208: e96d ce04 strd ip, lr, [sp, #-16]!
800020c: f000 f806 bl 800021c <__udivmoddi4>
8000210: f8dd e004 ldr.w lr, [sp, #4]
8000214: e9dd 2302 ldrd r2, r3, [sp, #8]
8000218: b004 add sp, #16
800021a: 4770 bx lr
0800021c <__udivmoddi4>:
800021c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8000220: 9e08 ldr r6, [sp, #32]
8000222: 4604 mov r4, r0
8000224: 4688 mov r8, r1
8000226: 2b00 cmp r3, #0
8000228: d14b bne.n 80002c2 <__udivmoddi4+0xa6>
800022a: 428a cmp r2, r1
800022c: 4615 mov r5, r2
800022e: d967 bls.n 8000300 <__udivmoddi4+0xe4>
8000230: fab2 f282 clz r2, r2
8000234: b14a cbz r2, 800024a <__udivmoddi4+0x2e>
8000236: f1c2 0720 rsb r7, r2, #32
800023a: fa01 f302 lsl.w r3, r1, r2
800023e: fa20 f707 lsr.w r7, r0, r7
8000242: 4095 lsls r5, r2
8000244: ea47 0803 orr.w r8, r7, r3
8000248: 4094 lsls r4, r2
800024a: ea4f 4e15 mov.w lr, r5, lsr #16
800024e: 0c23 lsrs r3, r4, #16
8000250: fbb8 f7fe udiv r7, r8, lr
8000254: fa1f fc85 uxth.w ip, r5
8000258: fb0e 8817 mls r8, lr, r7, r8
800025c: ea43 4308 orr.w r3, r3, r8, lsl #16
8000260: fb07 f10c mul.w r1, r7, ip
8000264: 4299 cmp r1, r3
8000266: d909 bls.n 800027c <__udivmoddi4+0x60>
8000268: 18eb adds r3, r5, r3
800026a: f107 30ff add.w r0, r7, #4294967295
800026e: f080 811b bcs.w 80004a8 <__udivmoddi4+0x28c>
8000272: 4299 cmp r1, r3
8000274: f240 8118 bls.w 80004a8 <__udivmoddi4+0x28c>
8000278: 3f02 subs r7, #2
800027a: 442b add r3, r5
800027c: 1a5b subs r3, r3, r1
800027e: b2a4 uxth r4, r4
8000280: fbb3 f0fe udiv r0, r3, lr
8000284: fb0e 3310 mls r3, lr, r0, r3
8000288: ea44 4403 orr.w r4, r4, r3, lsl #16
800028c: fb00 fc0c mul.w ip, r0, ip
8000290: 45a4 cmp ip, r4
8000292: d909 bls.n 80002a8 <__udivmoddi4+0x8c>
8000294: 192c adds r4, r5, r4
8000296: f100 33ff add.w r3, r0, #4294967295
800029a: f080 8107 bcs.w 80004ac <__udivmoddi4+0x290>
800029e: 45a4 cmp ip, r4
80002a0: f240 8104 bls.w 80004ac <__udivmoddi4+0x290>
80002a4: 3802 subs r0, #2
80002a6: 442c add r4, r5
80002a8: ea40 4007 orr.w r0, r0, r7, lsl #16
80002ac: eba4 040c sub.w r4, r4, ip
80002b0: 2700 movs r7, #0
80002b2: b11e cbz r6, 80002bc <__udivmoddi4+0xa0>
80002b4: 40d4 lsrs r4, r2
80002b6: 2300 movs r3, #0
80002b8: e9c6 4300 strd r4, r3, [r6]
80002bc: 4639 mov r1, r7
80002be: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80002c2: 428b cmp r3, r1
80002c4: d909 bls.n 80002da <__udivmoddi4+0xbe>
80002c6: 2e00 cmp r6, #0
80002c8: f000 80eb beq.w 80004a2 <__udivmoddi4+0x286>
80002cc: 2700 movs r7, #0
80002ce: e9c6 0100 strd r0, r1, [r6]
80002d2: 4638 mov r0, r7
80002d4: 4639 mov r1, r7
80002d6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80002da: fab3 f783 clz r7, r3
80002de: 2f00 cmp r7, #0
80002e0: d147 bne.n 8000372 <__udivmoddi4+0x156>
80002e2: 428b cmp r3, r1
80002e4: d302 bcc.n 80002ec <__udivmoddi4+0xd0>
80002e6: 4282 cmp r2, r0
80002e8: f200 80fa bhi.w 80004e0 <__udivmoddi4+0x2c4>
80002ec: 1a84 subs r4, r0, r2
80002ee: eb61 0303 sbc.w r3, r1, r3
80002f2: 2001 movs r0, #1
80002f4: 4698 mov r8, r3
80002f6: 2e00 cmp r6, #0
80002f8: d0e0 beq.n 80002bc <__udivmoddi4+0xa0>
80002fa: e9c6 4800 strd r4, r8, [r6]
80002fe: e7dd b.n 80002bc <__udivmoddi4+0xa0>
8000300: b902 cbnz r2, 8000304 <__udivmoddi4+0xe8>
8000302: deff udf #255 ; 0xff
8000304: fab2 f282 clz r2, r2
8000308: 2a00 cmp r2, #0
800030a: f040 808f bne.w 800042c <__udivmoddi4+0x210>
800030e: 1b49 subs r1, r1, r5
8000310: ea4f 4e15 mov.w lr, r5, lsr #16
8000314: fa1f f885 uxth.w r8, r5
8000318: 2701 movs r7, #1
800031a: fbb1 fcfe udiv ip, r1, lr
800031e: 0c23 lsrs r3, r4, #16
8000320: fb0e 111c mls r1, lr, ip, r1
8000324: ea43 4301 orr.w r3, r3, r1, lsl #16
8000328: fb08 f10c mul.w r1, r8, ip
800032c: 4299 cmp r1, r3
800032e: d907 bls.n 8000340 <__udivmoddi4+0x124>
8000330: 18eb adds r3, r5, r3
8000332: f10c 30ff add.w r0, ip, #4294967295
8000336: d202 bcs.n 800033e <__udivmoddi4+0x122>
8000338: 4299 cmp r1, r3
800033a: f200 80cd bhi.w 80004d8 <__udivmoddi4+0x2bc>
800033e: 4684 mov ip, r0
8000340: 1a59 subs r1, r3, r1
8000342: b2a3 uxth r3, r4
8000344: fbb1 f0fe udiv r0, r1, lr
8000348: fb0e 1410 mls r4, lr, r0, r1
800034c: ea43 4404 orr.w r4, r3, r4, lsl #16
8000350: fb08 f800 mul.w r8, r8, r0
8000354: 45a0 cmp r8, r4
8000356: d907 bls.n 8000368 <__udivmoddi4+0x14c>
8000358: 192c adds r4, r5, r4
800035a: f100 33ff add.w r3, r0, #4294967295
800035e: d202 bcs.n 8000366 <__udivmoddi4+0x14a>
8000360: 45a0 cmp r8, r4
8000362: f200 80b6 bhi.w 80004d2 <__udivmoddi4+0x2b6>
8000366: 4618 mov r0, r3
8000368: eba4 0408 sub.w r4, r4, r8
800036c: ea40 400c orr.w r0, r0, ip, lsl #16
8000370: e79f b.n 80002b2 <__udivmoddi4+0x96>
8000372: f1c7 0c20 rsb ip, r7, #32
8000376: 40bb lsls r3, r7
8000378: fa22 fe0c lsr.w lr, r2, ip
800037c: ea4e 0e03 orr.w lr, lr, r3
8000380: fa01 f407 lsl.w r4, r1, r7
8000384: fa20 f50c lsr.w r5, r0, ip
8000388: fa21 f30c lsr.w r3, r1, ip
800038c: ea4f 481e mov.w r8, lr, lsr #16
8000390: 4325 orrs r5, r4
8000392: fbb3 f9f8 udiv r9, r3, r8
8000396: 0c2c lsrs r4, r5, #16
8000398: fb08 3319 mls r3, r8, r9, r3
800039c: fa1f fa8e uxth.w sl, lr
80003a0: ea44 4303 orr.w r3, r4, r3, lsl #16
80003a4: fb09 f40a mul.w r4, r9, sl
80003a8: 429c cmp r4, r3
80003aa: fa02 f207 lsl.w r2, r2, r7
80003ae: fa00 f107 lsl.w r1, r0, r7
80003b2: d90b bls.n 80003cc <__udivmoddi4+0x1b0>
80003b4: eb1e 0303 adds.w r3, lr, r3
80003b8: f109 30ff add.w r0, r9, #4294967295
80003bc: f080 8087 bcs.w 80004ce <__udivmoddi4+0x2b2>
80003c0: 429c cmp r4, r3
80003c2: f240 8084 bls.w 80004ce <__udivmoddi4+0x2b2>
80003c6: f1a9 0902 sub.w r9, r9, #2
80003ca: 4473 add r3, lr
80003cc: 1b1b subs r3, r3, r4
80003ce: b2ad uxth r5, r5
80003d0: fbb3 f0f8 udiv r0, r3, r8
80003d4: fb08 3310 mls r3, r8, r0, r3
80003d8: ea45 4403 orr.w r4, r5, r3, lsl #16
80003dc: fb00 fa0a mul.w sl, r0, sl
80003e0: 45a2 cmp sl, r4
80003e2: d908 bls.n 80003f6 <__udivmoddi4+0x1da>
80003e4: eb1e 0404 adds.w r4, lr, r4
80003e8: f100 33ff add.w r3, r0, #4294967295
80003ec: d26b bcs.n 80004c6 <__udivmoddi4+0x2aa>
80003ee: 45a2 cmp sl, r4
80003f0: d969 bls.n 80004c6 <__udivmoddi4+0x2aa>
80003f2: 3802 subs r0, #2
80003f4: 4474 add r4, lr
80003f6: ea40 4009 orr.w r0, r0, r9, lsl #16
80003fa: fba0 8902 umull r8, r9, r0, r2
80003fe: eba4 040a sub.w r4, r4, sl
8000402: 454c cmp r4, r9
8000404: 46c2 mov sl, r8
8000406: 464b mov r3, r9
8000408: d354 bcc.n 80004b4 <__udivmoddi4+0x298>
800040a: d051 beq.n 80004b0 <__udivmoddi4+0x294>
800040c: 2e00 cmp r6, #0
800040e: d069 beq.n 80004e4 <__udivmoddi4+0x2c8>
8000410: ebb1 050a subs.w r5, r1, sl
8000414: eb64 0403 sbc.w r4, r4, r3
8000418: fa04 fc0c lsl.w ip, r4, ip
800041c: 40fd lsrs r5, r7
800041e: 40fc lsrs r4, r7
8000420: ea4c 0505 orr.w r5, ip, r5
8000424: e9c6 5400 strd r5, r4, [r6]
8000428: 2700 movs r7, #0
800042a: e747 b.n 80002bc <__udivmoddi4+0xa0>
800042c: f1c2 0320 rsb r3, r2, #32
8000430: fa20 f703 lsr.w r7, r0, r3
8000434: 4095 lsls r5, r2
8000436: fa01 f002 lsl.w r0, r1, r2
800043a: fa21 f303 lsr.w r3, r1, r3
800043e: ea4f 4e15 mov.w lr, r5, lsr #16
8000442: 4338 orrs r0, r7
8000444: 0c01 lsrs r1, r0, #16
8000446: fbb3 f7fe udiv r7, r3, lr
800044a: fa1f f885 uxth.w r8, r5
800044e: fb0e 3317 mls r3, lr, r7, r3
8000452: ea41 4103 orr.w r1, r1, r3, lsl #16
8000456: fb07 f308 mul.w r3, r7, r8
800045a: 428b cmp r3, r1
800045c: fa04 f402 lsl.w r4, r4, r2
8000460: d907 bls.n 8000472 <__udivmoddi4+0x256>
8000462: 1869 adds r1, r5, r1
8000464: f107 3cff add.w ip, r7, #4294967295
8000468: d22f bcs.n 80004ca <__udivmoddi4+0x2ae>
800046a: 428b cmp r3, r1
800046c: d92d bls.n 80004ca <__udivmoddi4+0x2ae>
800046e: 3f02 subs r7, #2
8000470: 4429 add r1, r5
8000472: 1acb subs r3, r1, r3
8000474: b281 uxth r1, r0
8000476: fbb3 f0fe udiv r0, r3, lr
800047a: fb0e 3310 mls r3, lr, r0, r3
800047e: ea41 4103 orr.w r1, r1, r3, lsl #16
8000482: fb00 f308 mul.w r3, r0, r8
8000486: 428b cmp r3, r1
8000488: d907 bls.n 800049a <__udivmoddi4+0x27e>
800048a: 1869 adds r1, r5, r1
800048c: f100 3cff add.w ip, r0, #4294967295
8000490: d217 bcs.n 80004c2 <__udivmoddi4+0x2a6>
8000492: 428b cmp r3, r1
8000494: d915 bls.n 80004c2 <__udivmoddi4+0x2a6>
8000496: 3802 subs r0, #2
8000498: 4429 add r1, r5
800049a: 1ac9 subs r1, r1, r3
800049c: ea40 4707 orr.w r7, r0, r7, lsl #16
80004a0: e73b b.n 800031a <__udivmoddi4+0xfe>
80004a2: 4637 mov r7, r6
80004a4: 4630 mov r0, r6
80004a6: e709 b.n 80002bc <__udivmoddi4+0xa0>
80004a8: 4607 mov r7, r0
80004aa: e6e7 b.n 800027c <__udivmoddi4+0x60>
80004ac: 4618 mov r0, r3
80004ae: e6fb b.n 80002a8 <__udivmoddi4+0x8c>
80004b0: 4541 cmp r1, r8
80004b2: d2ab bcs.n 800040c <__udivmoddi4+0x1f0>
80004b4: ebb8 0a02 subs.w sl, r8, r2
80004b8: eb69 020e sbc.w r2, r9, lr
80004bc: 3801 subs r0, #1
80004be: 4613 mov r3, r2
80004c0: e7a4 b.n 800040c <__udivmoddi4+0x1f0>
80004c2: 4660 mov r0, ip
80004c4: e7e9 b.n 800049a <__udivmoddi4+0x27e>
80004c6: 4618 mov r0, r3
80004c8: e795 b.n 80003f6 <__udivmoddi4+0x1da>
80004ca: 4667 mov r7, ip
80004cc: e7d1 b.n 8000472 <__udivmoddi4+0x256>
80004ce: 4681 mov r9, r0
80004d0: e77c b.n 80003cc <__udivmoddi4+0x1b0>
80004d2: 3802 subs r0, #2
80004d4: 442c add r4, r5
80004d6: e747 b.n 8000368 <__udivmoddi4+0x14c>
80004d8: f1ac 0c02 sub.w ip, ip, #2
80004dc: 442b add r3, r5
80004de: e72f b.n 8000340 <__udivmoddi4+0x124>
80004e0: 4638 mov r0, r7
80004e2: e708 b.n 80002f6 <__udivmoddi4+0xda>
80004e4: 4637 mov r7, r6
80004e6: e6e9 b.n 80002bc <__udivmoddi4+0xa0>
080004e8 <__aeabi_idiv0>:
80004e8: 4770 bx lr
80004ea: bf00 nop
080004ec <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
80004ec: b580 push {r7, lr}
80004ee: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
80004f0: f001 fbae bl 8001c50 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
80004f4: f000 f84c bl 8000590 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
80004f8: f000 f92a bl 8000750 <MX_GPIO_Init>
MX_SPI4_Init();
80004fc: f000 f8b2 bl 8000664 <MX_SPI4_Init>
MX_TIM6_Init();
8000500: f000 f8e6 bl 80006d0 <MX_TIM6_Init>
/* USER CODE BEGIN 2 */
updateWS2812BData();
8000504: f000 fbb0 bl 8000c68 <updateWS2812BData>
HAL_SPI_Transmit_IT(&hspi4, (uint8_t*) &LEDData, (uint16_t) 66 * 3 * 3);
8000508: f240 2252 movw r2, #594 ; 0x252
800050c: 491c ldr r1, [pc, #112] ; (8000580 <main+0x94>)
800050e: 481d ldr r0, [pc, #116] ; (8000584 <main+0x98>)
8000510: f002 fbe0 bl 8002cd4 <HAL_SPI_Transmit_IT>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
if(LEDDesign_PendingChange){
8000514: 4b1c ldr r3, [pc, #112] ; (8000588 <main+0x9c>)
8000516: 781b ldrb r3, [r3, #0]
8000518: 2b00 cmp r3, #0
800051a: d002 beq.n 8000522 <main+0x36>
LEDDesign_Off();
800051c: f000 fd44 bl 8000fa8 <LEDDesign_Off>
8000520: e02b b.n 800057a <main+0x8e>
}else{
switch (LEDMode) {
8000522: 4b1a ldr r3, [pc, #104] ; (800058c <main+0xa0>)
8000524: 781b ldrb r3, [r3, #0]
8000526: 2b06 cmp r3, #6
8000528: d825 bhi.n 8000576 <main+0x8a>
800052a: a201 add r2, pc, #4 ; (adr r2, 8000530 <main+0x44>)
800052c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000530: 0800054d .word 0x0800054d
8000534: 08000553 .word 0x08000553
8000538: 08000559 .word 0x08000559
800053c: 0800055f .word 0x0800055f
8000540: 08000565 .word 0x08000565
8000544: 0800056b .word 0x0800056b
8000548: 08000571 .word 0x08000571
case 0:
LEDDesign_Smile();
800054c: f000 fe7c bl 8001248 <LEDDesign_Smile>
break;
8000550: e013 b.n 800057a <main+0x8e>
case 1:
LEDDesign_Crazy();
8000552: f000 fe39 bl 80011c8 <LEDDesign_Crazy>
break;
8000556: e010 b.n 800057a <main+0x8e>
case 2:
LEDDesign_SuperCrazy();
8000558: f001 f964 bl 8001824 <LEDDesign_SuperCrazy>
break;
800055c: e00d b.n 800057a <main+0x8e>
case 3:
LEDDesign_ColorWhite();
800055e: f000 fd4b bl 8000ff8 <LEDDesign_ColorWhite>
break;
8000562: e00a b.n 800057a <main+0x8e>
case 4:
LEDDesign_ColorRed();
8000564: f000 fdf0 bl 8001148 <LEDDesign_ColorRed>
break;
8000568: e007 b.n 800057a <main+0x8e>
case 5:
LEDDesign_ColorGreen();
800056a: f000 fdad bl 80010c8 <LEDDesign_ColorGreen>
break;
800056e: e004 b.n 800057a <main+0x8e>
case 6:
LEDDesign_ColorBlue();
8000570: f000 fd6a bl 8001048 <LEDDesign_ColorBlue>
break;
8000574: e001 b.n 800057a <main+0x8e>
default:
LEDDesign_Off();
8000576: f000 fd17 bl 8000fa8 <LEDDesign_Off>
}
}
updateWS2812BData();
800057a: f000 fb75 bl 8000c68 <updateWS2812BData>
if(LEDDesign_PendingChange){
800057e: e7c9 b.n 8000514 <main+0x28>
8000580: 20000090 .word 0x20000090
8000584: 200003b4 .word 0x200003b4
8000588: 2000008d .word 0x2000008d
800058c: 2000008c .word 0x2000008c
08000590 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000590: b580 push {r7, lr}
8000592: b094 sub sp, #80 ; 0x50
8000594: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000596: f107 0320 add.w r3, r7, #32
800059a: 2230 movs r2, #48 ; 0x30
800059c: 2100 movs r1, #0
800059e: 4618 mov r0, r3
80005a0: f003 f9c0 bl 8003924 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80005a4: f107 030c add.w r3, r7, #12
80005a8: 2200 movs r2, #0
80005aa: 601a str r2, [r3, #0]
80005ac: 605a str r2, [r3, #4]
80005ae: 609a str r2, [r3, #8]
80005b0: 60da str r2, [r3, #12]
80005b2: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
80005b4: 2300 movs r3, #0
80005b6: 60bb str r3, [r7, #8]
80005b8: 4b28 ldr r3, [pc, #160] ; (800065c <SystemClock_Config+0xcc>)
80005ba: 6c1b ldr r3, [r3, #64] ; 0x40
80005bc: 4a27 ldr r2, [pc, #156] ; (800065c <SystemClock_Config+0xcc>)
80005be: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
80005c2: 6413 str r3, [r2, #64] ; 0x40
80005c4: 4b25 ldr r3, [pc, #148] ; (800065c <SystemClock_Config+0xcc>)
80005c6: 6c1b ldr r3, [r3, #64] ; 0x40
80005c8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80005cc: 60bb str r3, [r7, #8]
80005ce: 68bb ldr r3, [r7, #8]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
80005d0: 2300 movs r3, #0
80005d2: 607b str r3, [r7, #4]
80005d4: 4b22 ldr r3, [pc, #136] ; (8000660 <SystemClock_Config+0xd0>)
80005d6: 681b ldr r3, [r3, #0]
80005d8: 4a21 ldr r2, [pc, #132] ; (8000660 <SystemClock_Config+0xd0>)
80005da: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80005de: 6013 str r3, [r2, #0]
80005e0: 4b1f ldr r3, [pc, #124] ; (8000660 <SystemClock_Config+0xd0>)
80005e2: 681b ldr r3, [r3, #0]
80005e4: f403 4340 and.w r3, r3, #49152 ; 0xc000
80005e8: 607b str r3, [r7, #4]
80005ea: 687b ldr r3, [r7, #4]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80005ec: 2301 movs r3, #1
80005ee: 623b str r3, [r7, #32]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80005f0: f44f 3380 mov.w r3, #65536 ; 0x10000
80005f4: 627b str r3, [r7, #36] ; 0x24
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80005f6: 2302 movs r3, #2
80005f8: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80005fa: f44f 0380 mov.w r3, #4194304 ; 0x400000
80005fe: 63fb str r3, [r7, #60] ; 0x3c
RCC_OscInitStruct.PLL.PLLM = 4;
8000600: 2304 movs r3, #4
8000602: 643b str r3, [r7, #64] ; 0x40
RCC_OscInitStruct.PLL.PLLN = 160;
8000604: 23a0 movs r3, #160 ; 0xa0
8000606: 647b str r3, [r7, #68] ; 0x44
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
8000608: 2302 movs r3, #2
800060a: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.PLL.PLLQ = 7;
800060c: 2307 movs r3, #7
800060e: 64fb str r3, [r7, #76] ; 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8000610: f107 0320 add.w r3, r7, #32
8000614: 4618 mov r0, r3
8000616: f001 fecb bl 80023b0 <HAL_RCC_OscConfig>
800061a: 4603 mov r3, r0
800061c: 2b00 cmp r3, #0
800061e: d001 beq.n 8000624 <SystemClock_Config+0x94>
{
Error_Handler();
8000620: f001 f982 bl 8001928 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000624: 230f movs r3, #15
8000626: 60fb str r3, [r7, #12]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000628: 2302 movs r3, #2
800062a: 613b str r3, [r7, #16]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
800062c: 2300 movs r3, #0
800062e: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
8000630: f44f 53a0 mov.w r3, #5120 ; 0x1400
8000634: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
8000636: f44f 5380 mov.w r3, #4096 ; 0x1000
800063a: 61fb str r3, [r7, #28]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
800063c: f107 030c add.w r3, r7, #12
8000640: 2105 movs r1, #5
8000642: 4618 mov r0, r3
8000644: f002 f924 bl 8002890 <HAL_RCC_ClockConfig>
8000648: 4603 mov r3, r0
800064a: 2b00 cmp r3, #0
800064c: d001 beq.n 8000652 <SystemClock_Config+0xc2>
{
Error_Handler();
800064e: f001 f96b bl 8001928 <Error_Handler>
}
}
8000652: bf00 nop
8000654: 3750 adds r7, #80 ; 0x50
8000656: 46bd mov sp, r7
8000658: bd80 pop {r7, pc}
800065a: bf00 nop
800065c: 40023800 .word 0x40023800
8000660: 40007000 .word 0x40007000
08000664 <MX_SPI4_Init>:
* @brief SPI4 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI4_Init(void)
{
8000664: b580 push {r7, lr}
8000666: af00 add r7, sp, #0
/* USER CODE BEGIN SPI4_Init 1 */
/* USER CODE END SPI4_Init 1 */
/* SPI4 parameter configuration*/
hspi4.Instance = SPI4;
8000668: 4b17 ldr r3, [pc, #92] ; (80006c8 <MX_SPI4_Init+0x64>)
800066a: 4a18 ldr r2, [pc, #96] ; (80006cc <MX_SPI4_Init+0x68>)
800066c: 601a str r2, [r3, #0]
hspi4.Init.Mode = SPI_MODE_MASTER;
800066e: 4b16 ldr r3, [pc, #88] ; (80006c8 <MX_SPI4_Init+0x64>)
8000670: f44f 7282 mov.w r2, #260 ; 0x104
8000674: 605a str r2, [r3, #4]
hspi4.Init.Direction = SPI_DIRECTION_2LINES;
8000676: 4b14 ldr r3, [pc, #80] ; (80006c8 <MX_SPI4_Init+0x64>)
8000678: 2200 movs r2, #0
800067a: 609a str r2, [r3, #8]
hspi4.Init.DataSize = SPI_DATASIZE_8BIT;
800067c: 4b12 ldr r3, [pc, #72] ; (80006c8 <MX_SPI4_Init+0x64>)
800067e: 2200 movs r2, #0
8000680: 60da str r2, [r3, #12]
hspi4.Init.CLKPolarity = SPI_POLARITY_LOW;
8000682: 4b11 ldr r3, [pc, #68] ; (80006c8 <MX_SPI4_Init+0x64>)
8000684: 2200 movs r2, #0
8000686: 611a str r2, [r3, #16]
hspi4.Init.CLKPhase = SPI_PHASE_1EDGE;
8000688: 4b0f ldr r3, [pc, #60] ; (80006c8 <MX_SPI4_Init+0x64>)
800068a: 2200 movs r2, #0
800068c: 615a str r2, [r3, #20]
hspi4.Init.NSS = SPI_NSS_SOFT;
800068e: 4b0e ldr r3, [pc, #56] ; (80006c8 <MX_SPI4_Init+0x64>)
8000690: f44f 7200 mov.w r2, #512 ; 0x200
8000694: 619a str r2, [r3, #24]
hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
8000696: 4b0c ldr r3, [pc, #48] ; (80006c8 <MX_SPI4_Init+0x64>)
8000698: 2220 movs r2, #32
800069a: 61da str r2, [r3, #28]
hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB;
800069c: 4b0a ldr r3, [pc, #40] ; (80006c8 <MX_SPI4_Init+0x64>)
800069e: 2200 movs r2, #0
80006a0: 621a str r2, [r3, #32]
hspi4.Init.TIMode = SPI_TIMODE_DISABLE;
80006a2: 4b09 ldr r3, [pc, #36] ; (80006c8 <MX_SPI4_Init+0x64>)
80006a4: 2200 movs r2, #0
80006a6: 625a str r2, [r3, #36] ; 0x24
hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
80006a8: 4b07 ldr r3, [pc, #28] ; (80006c8 <MX_SPI4_Init+0x64>)
80006aa: 2200 movs r2, #0
80006ac: 629a str r2, [r3, #40] ; 0x28
hspi4.Init.CRCPolynomial = 10;
80006ae: 4b06 ldr r3, [pc, #24] ; (80006c8 <MX_SPI4_Init+0x64>)
80006b0: 220a movs r2, #10
80006b2: 62da str r2, [r3, #44] ; 0x2c
if (HAL_SPI_Init(&hspi4) != HAL_OK)
80006b4: 4804 ldr r0, [pc, #16] ; (80006c8 <MX_SPI4_Init+0x64>)
80006b6: f002 faa9 bl 8002c0c <HAL_SPI_Init>
80006ba: 4603 mov r3, r0
80006bc: 2b00 cmp r3, #0
80006be: d001 beq.n 80006c4 <MX_SPI4_Init+0x60>
{
Error_Handler();
80006c0: f001 f932 bl 8001928 <Error_Handler>
}
/* USER CODE BEGIN SPI4_Init 2 */
/* USER CODE END SPI4_Init 2 */
}
80006c4: bf00 nop
80006c6: bd80 pop {r7, pc}
80006c8: 200003b4 .word 0x200003b4
80006cc: 40013400 .word 0x40013400
080006d0 <MX_TIM6_Init>:
* @brief TIM6 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM6_Init(void)
{
80006d0: b580 push {r7, lr}
80006d2: b082 sub sp, #8
80006d4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
80006d6: 463b mov r3, r7
80006d8: 2200 movs r2, #0
80006da: 601a str r2, [r3, #0]
80006dc: 605a str r2, [r3, #4]
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
80006de: 4b1a ldr r3, [pc, #104] ; (8000748 <MX_TIM6_Init+0x78>)
80006e0: 4a1a ldr r2, [pc, #104] ; (800074c <MX_TIM6_Init+0x7c>)
80006e2: 601a str r2, [r3, #0]
htim6.Init.Prescaler = 4000;
80006e4: 4b18 ldr r3, [pc, #96] ; (8000748 <MX_TIM6_Init+0x78>)
80006e6: f44f 627a mov.w r2, #4000 ; 0xfa0
80006ea: 605a str r2, [r3, #4]
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
80006ec: 4b16 ldr r3, [pc, #88] ; (8000748 <MX_TIM6_Init+0x78>)
80006ee: 2200 movs r2, #0
80006f0: 609a str r2, [r3, #8]
htim6.Init.Period = 10000;
80006f2: 4b15 ldr r3, [pc, #84] ; (8000748 <MX_TIM6_Init+0x78>)
80006f4: f242 7210 movw r2, #10000 ; 0x2710
80006f8: 60da str r2, [r3, #12]
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
80006fa: 4b13 ldr r3, [pc, #76] ; (8000748 <MX_TIM6_Init+0x78>)
80006fc: 2280 movs r2, #128 ; 0x80
80006fe: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
8000700: 4811 ldr r0, [pc, #68] ; (8000748 <MX_TIM6_Init+0x78>)
8000702: f002 fde5 bl 80032d0 <HAL_TIM_Base_Init>
8000706: 4603 mov r3, r0
8000708: 2b00 cmp r3, #0
800070a: d001 beq.n 8000710 <MX_TIM6_Init+0x40>
{
Error_Handler();
800070c: f001 f90c bl 8001928 <Error_Handler>
}
if (HAL_TIM_OnePulse_Init(&htim6, TIM_OPMODE_SINGLE) != HAL_OK)
8000710: 2108 movs r1, #8
8000712: 480d ldr r0, [pc, #52] ; (8000748 <MX_TIM6_Init+0x78>)
8000714: f002 fe2b bl 800336e <HAL_TIM_OnePulse_Init>
8000718: 4603 mov r3, r0
800071a: 2b00 cmp r3, #0
800071c: d001 beq.n 8000722 <MX_TIM6_Init+0x52>
{
Error_Handler();
800071e: f001 f903 bl 8001928 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000722: 2300 movs r3, #0
8000724: 603b str r3, [r7, #0]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000726: 2300 movs r3, #0
8000728: 607b str r3, [r7, #4]
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
800072a: 463b mov r3, r7
800072c: 4619 mov r1, r3
800072e: 4806 ldr r0, [pc, #24] ; (8000748 <MX_TIM6_Init+0x78>)
8000730: f003 f83e bl 80037b0 <HAL_TIMEx_MasterConfigSynchronization>
8000734: 4603 mov r3, r0
8000736: 2b00 cmp r3, #0
8000738: d001 beq.n 800073e <MX_TIM6_Init+0x6e>
{
Error_Handler();
800073a: f001 f8f5 bl 8001928 <Error_Handler>
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
800073e: bf00 nop
8000740: 3708 adds r7, #8
8000742: 46bd mov sp, r7
8000744: bd80 pop {r7, pc}
8000746: bf00 nop
8000748: 2000040c .word 0x2000040c
800074c: 40001000 .word 0x40001000
08000750 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000750: b580 push {r7, lr}
8000752: b08e sub sp, #56 ; 0x38
8000754: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000756: f107 0324 add.w r3, r7, #36 ; 0x24
800075a: 2200 movs r2, #0
800075c: 601a str r2, [r3, #0]
800075e: 605a str r2, [r3, #4]
8000760: 609a str r2, [r3, #8]
8000762: 60da str r2, [r3, #12]
8000764: 611a str r2, [r3, #16]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
8000766: 2300 movs r3, #0
8000768: 623b str r3, [r7, #32]
800076a: 4bb0 ldr r3, [pc, #704] ; (8000a2c <MX_GPIO_Init+0x2dc>)
800076c: 6b1b ldr r3, [r3, #48] ; 0x30
800076e: 4aaf ldr r2, [pc, #700] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000770: f043 0310 orr.w r3, r3, #16
8000774: 6313 str r3, [r2, #48] ; 0x30
8000776: 4bad ldr r3, [pc, #692] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000778: 6b1b ldr r3, [r3, #48] ; 0x30
800077a: f003 0310 and.w r3, r3, #16
800077e: 623b str r3, [r7, #32]
8000780: 6a3b ldr r3, [r7, #32]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000782: 2300 movs r3, #0
8000784: 61fb str r3, [r7, #28]
8000786: 4ba9 ldr r3, [pc, #676] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000788: 6b1b ldr r3, [r3, #48] ; 0x30
800078a: 4aa8 ldr r2, [pc, #672] ; (8000a2c <MX_GPIO_Init+0x2dc>)
800078c: f043 0304 orr.w r3, r3, #4
8000790: 6313 str r3, [r2, #48] ; 0x30
8000792: 4ba6 ldr r3, [pc, #664] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000794: 6b1b ldr r3, [r3, #48] ; 0x30
8000796: f003 0304 and.w r3, r3, #4
800079a: 61fb str r3, [r7, #28]
800079c: 69fb ldr r3, [r7, #28]
__HAL_RCC_GPIOF_CLK_ENABLE();
800079e: 2300 movs r3, #0
80007a0: 61bb str r3, [r7, #24]
80007a2: 4ba2 ldr r3, [pc, #648] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007a4: 6b1b ldr r3, [r3, #48] ; 0x30
80007a6: 4aa1 ldr r2, [pc, #644] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007a8: f043 0320 orr.w r3, r3, #32
80007ac: 6313 str r3, [r2, #48] ; 0x30
80007ae: 4b9f ldr r3, [pc, #636] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007b0: 6b1b ldr r3, [r3, #48] ; 0x30
80007b2: f003 0320 and.w r3, r3, #32
80007b6: 61bb str r3, [r7, #24]
80007b8: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOH_CLK_ENABLE();
80007ba: 2300 movs r3, #0
80007bc: 617b str r3, [r7, #20]
80007be: 4b9b ldr r3, [pc, #620] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007c0: 6b1b ldr r3, [r3, #48] ; 0x30
80007c2: 4a9a ldr r2, [pc, #616] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007c4: f043 0380 orr.w r3, r3, #128 ; 0x80
80007c8: 6313 str r3, [r2, #48] ; 0x30
80007ca: 4b98 ldr r3, [pc, #608] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007cc: 6b1b ldr r3, [r3, #48] ; 0x30
80007ce: f003 0380 and.w r3, r3, #128 ; 0x80
80007d2: 617b str r3, [r7, #20]
80007d4: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
80007d6: 2300 movs r3, #0
80007d8: 613b str r3, [r7, #16]
80007da: 4b94 ldr r3, [pc, #592] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007dc: 6b1b ldr r3, [r3, #48] ; 0x30
80007de: 4a93 ldr r2, [pc, #588] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007e0: f043 0301 orr.w r3, r3, #1
80007e4: 6313 str r3, [r2, #48] ; 0x30
80007e6: 4b91 ldr r3, [pc, #580] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007e8: 6b1b ldr r3, [r3, #48] ; 0x30
80007ea: f003 0301 and.w r3, r3, #1
80007ee: 613b str r3, [r7, #16]
80007f0: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
80007f2: 2300 movs r3, #0
80007f4: 60fb str r3, [r7, #12]
80007f6: 4b8d ldr r3, [pc, #564] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007f8: 6b1b ldr r3, [r3, #48] ; 0x30
80007fa: 4a8c ldr r2, [pc, #560] ; (8000a2c <MX_GPIO_Init+0x2dc>)
80007fc: f043 0302 orr.w r3, r3, #2
8000800: 6313 str r3, [r2, #48] ; 0x30
8000802: 4b8a ldr r3, [pc, #552] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000804: 6b1b ldr r3, [r3, #48] ; 0x30
8000806: f003 0302 and.w r3, r3, #2
800080a: 60fb str r3, [r7, #12]
800080c: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOG_CLK_ENABLE();
800080e: 2300 movs r3, #0
8000810: 60bb str r3, [r7, #8]
8000812: 4b86 ldr r3, [pc, #536] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000814: 6b1b ldr r3, [r3, #48] ; 0x30
8000816: 4a85 ldr r2, [pc, #532] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000818: f043 0340 orr.w r3, r3, #64 ; 0x40
800081c: 6313 str r3, [r2, #48] ; 0x30
800081e: 4b83 ldr r3, [pc, #524] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000820: 6b1b ldr r3, [r3, #48] ; 0x30
8000822: f003 0340 and.w r3, r3, #64 ; 0x40
8000826: 60bb str r3, [r7, #8]
8000828: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOD_CLK_ENABLE();
800082a: 2300 movs r3, #0
800082c: 607b str r3, [r7, #4]
800082e: 4b7f ldr r3, [pc, #508] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000830: 6b1b ldr r3, [r3, #48] ; 0x30
8000832: 4a7e ldr r2, [pc, #504] ; (8000a2c <MX_GPIO_Init+0x2dc>)
8000834: f043 0308 orr.w r3, r3, #8
8000838: 6313 str r3, [r2, #48] ; 0x30
800083a: 4b7c ldr r3, [pc, #496] ; (8000a2c <MX_GPIO_Init+0x2dc>)
800083c: 6b1b ldr r3, [r3, #48] ; 0x30
800083e: f003 0308 and.w r3, r3, #8
8000842: 607b str r3, [r7, #4]
8000844: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
8000846: 2200 movs r2, #0
8000848: 2116 movs r1, #22
800084a: 4879 ldr r0, [pc, #484] ; (8000a30 <MX_GPIO_Init+0x2e0>)
800084c: f001 fd72 bl 8002334 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
8000850: 2200 movs r2, #0
8000852: 2180 movs r1, #128 ; 0x80
8000854: 4877 ldr r0, [pc, #476] ; (8000a34 <MX_GPIO_Init+0x2e4>)
8000856: f001 fd6d bl 8002334 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
800085a: 2200 movs r2, #0
800085c: f44f 5140 mov.w r1, #12288 ; 0x3000
8000860: 4875 ldr r0, [pc, #468] ; (8000a38 <MX_GPIO_Init+0x2e8>)
8000862: f001 fd67 bl 8002334 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
8000866: 2200 movs r2, #0
8000868: f44f 41c0 mov.w r1, #24576 ; 0x6000
800086c: 4873 ldr r0, [pc, #460] ; (8000a3c <MX_GPIO_Init+0x2ec>)
800086e: f001 fd61 bl 8002334 <HAL_GPIO_WritePin>
/*Configure GPIO pins : A0_Pin A1_Pin A2_Pin A3_Pin
A4_Pin A5_Pin SDNRAS_Pin A6_Pin
A7_Pin A8_Pin A9_Pin */
GPIO_InitStruct.Pin = A0_Pin|A1_Pin|A2_Pin|A3_Pin
8000872: f64f 033f movw r3, #63551 ; 0xf83f
8000876: 627b str r3, [r7, #36] ; 0x24
|A4_Pin|A5_Pin|SDNRAS_Pin|A6_Pin
|A7_Pin|A8_Pin|A9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000878: 2302 movs r3, #2
800087a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800087c: 2300 movs r3, #0
800087e: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000880: 2303 movs r3, #3
8000882: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000884: 230c movs r3, #12
8000886: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8000888: f107 0324 add.w r3, r7, #36 ; 0x24
800088c: 4619 mov r1, r3
800088e: 486c ldr r0, [pc, #432] ; (8000a40 <MX_GPIO_Init+0x2f0>)
8000890: f001 fba6 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : PF6 */
GPIO_InitStruct.Pin = GPIO_PIN_6;
8000894: 2340 movs r3, #64 ; 0x40
8000896: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8000898: 2303 movs r3, #3
800089a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800089c: 2300 movs r3, #0
800089e: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
80008a0: f107 0324 add.w r3, r7, #36 ; 0x24
80008a4: 4619 mov r1, r3
80008a6: 4866 ldr r0, [pc, #408] ; (8000a40 <MX_GPIO_Init+0x2f0>)
80008a8: f001 fb9a bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : SPI5_SCK_Pin SPI5_MISO_Pin SPI5_MOSI_Pin */
GPIO_InitStruct.Pin = SPI5_SCK_Pin|SPI5_MISO_Pin|SPI5_MOSI_Pin;
80008ac: f44f 7360 mov.w r3, #896 ; 0x380
80008b0: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80008b2: 2302 movs r3, #2
80008b4: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80008b6: 2300 movs r3, #0
80008b8: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80008ba: 2300 movs r3, #0
80008bc: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
80008be: 2305 movs r3, #5
80008c0: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
80008c2: f107 0324 add.w r3, r7, #36 ; 0x24
80008c6: 4619 mov r1, r3
80008c8: 485d ldr r0, [pc, #372] ; (8000a40 <MX_GPIO_Init+0x2f0>)
80008ca: f001 fb89 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : ENABLE_Pin */
GPIO_InitStruct.Pin = ENABLE_Pin;
80008ce: f44f 6380 mov.w r3, #1024 ; 0x400
80008d2: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80008d4: 2302 movs r3, #2
80008d6: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80008d8: 2300 movs r3, #0
80008da: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80008dc: 2300 movs r3, #0
80008de: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
80008e0: 230e movs r3, #14
80008e2: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(ENABLE_GPIO_Port, &GPIO_InitStruct);
80008e4: f107 0324 add.w r3, r7, #36 ; 0x24
80008e8: 4619 mov r1, r3
80008ea: 4855 ldr r0, [pc, #340] ; (8000a40 <MX_GPIO_Init+0x2f0>)
80008ec: f001 fb78 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : SDNWE_Pin */
GPIO_InitStruct.Pin = SDNWE_Pin;
80008f0: 2301 movs r3, #1
80008f2: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80008f4: 2302 movs r3, #2
80008f6: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80008f8: 2300 movs r3, #0
80008fa: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80008fc: 2303 movs r3, #3
80008fe: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000900: 230c movs r3, #12
8000902: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(SDNWE_GPIO_Port, &GPIO_InitStruct);
8000904: f107 0324 add.w r3, r7, #36 ; 0x24
8000908: 4619 mov r1, r3
800090a: 4849 ldr r0, [pc, #292] ; (8000a30 <MX_GPIO_Init+0x2e0>)
800090c: f001 fb68 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
8000910: 2316 movs r3, #22
8000912: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000914: 2301 movs r3, #1
8000916: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000918: 2300 movs r3, #0
800091a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800091c: 2300 movs r3, #0
800091e: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000920: f107 0324 add.w r3, r7, #36 ; 0x24
8000924: 4619 mov r1, r3
8000926: 4842 ldr r0, [pc, #264] ; (8000a30 <MX_GPIO_Init+0x2e0>)
8000928: f001 fb5a bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : B1_Pin */
GPIO_InitStruct.Pin = B1_Pin;
800092c: 2301 movs r3, #1
800092e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
8000930: 4b44 ldr r3, [pc, #272] ; (8000a44 <MX_GPIO_Init+0x2f4>)
8000932: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000934: 2300 movs r3, #0
8000936: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
8000938: f107 0324 add.w r3, r7, #36 ; 0x24
800093c: 4619 mov r1, r3
800093e: 483d ldr r0, [pc, #244] ; (8000a34 <MX_GPIO_Init+0x2e4>)
8000940: f001 fb4e bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
GPIO_InitStruct.Pin = MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
8000944: f248 0306 movw r3, #32774 ; 0x8006
8000948: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
800094a: 4b3f ldr r3, [pc, #252] ; (8000a48 <MX_GPIO_Init+0x2f8>)
800094c: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800094e: 2300 movs r3, #0
8000950: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000952: f107 0324 add.w r3, r7, #36 ; 0x24
8000956: 4619 mov r1, r3
8000958: 4836 ldr r0, [pc, #216] ; (8000a34 <MX_GPIO_Init+0x2e4>)
800095a: f001 fb41 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : B5_Pin VSYNC_Pin G2_Pin R4_Pin
R5_Pin */
GPIO_InitStruct.Pin = B5_Pin|VSYNC_Pin|G2_Pin|R4_Pin
800095e: f641 0358 movw r3, #6232 ; 0x1858
8000962: 627b str r3, [r7, #36] ; 0x24
|R5_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000964: 2302 movs r3, #2
8000966: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000968: 2300 movs r3, #0
800096a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800096c: 2300 movs r3, #0
800096e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000970: 230e movs r3, #14
8000972: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000974: f107 0324 add.w r3, r7, #36 ; 0x24
8000978: 4619 mov r1, r3
800097a: 482e ldr r0, [pc, #184] ; (8000a34 <MX_GPIO_Init+0x2e4>)
800097c: f001 fb30 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : ACP_RST_Pin */
GPIO_InitStruct.Pin = ACP_RST_Pin;
8000980: 2380 movs r3, #128 ; 0x80
8000982: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000984: 2301 movs r3, #1
8000986: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000988: 2300 movs r3, #0
800098a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800098c: 2300 movs r3, #0
800098e: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
8000990: f107 0324 add.w r3, r7, #36 ; 0x24
8000994: 4619 mov r1, r3
8000996: 4827 ldr r0, [pc, #156] ; (8000a34 <MX_GPIO_Init+0x2e4>)
8000998: f001 fb22 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : OTG_FS_OC_Pin */
GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
800099c: 2320 movs r3, #32
800099e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
80009a0: 4b29 ldr r3, [pc, #164] ; (8000a48 <MX_GPIO_Init+0x2f8>)
80009a2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80009a4: 2300 movs r3, #0
80009a6: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
80009a8: f107 0324 add.w r3, r7, #36 ; 0x24
80009ac: 4619 mov r1, r3
80009ae: 4820 ldr r0, [pc, #128] ; (8000a30 <MX_GPIO_Init+0x2e0>)
80009b0: f001 fb16 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : R3_Pin R6_Pin */
GPIO_InitStruct.Pin = R3_Pin|R6_Pin;
80009b4: 2303 movs r3, #3
80009b6: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80009b8: 2302 movs r3, #2
80009ba: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80009bc: 2300 movs r3, #0
80009be: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80009c0: 2300 movs r3, #0
80009c2: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
80009c4: 2309 movs r3, #9
80009c6: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80009c8: f107 0324 add.w r3, r7, #36 ; 0x24
80009cc: 4619 mov r1, r3
80009ce: 481f ldr r0, [pc, #124] ; (8000a4c <MX_GPIO_Init+0x2fc>)
80009d0: f001 fb06 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : BOOT1_Pin */
GPIO_InitStruct.Pin = BOOT1_Pin;
80009d4: 2304 movs r3, #4
80009d6: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80009d8: 2300 movs r3, #0
80009da: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80009dc: 2300 movs r3, #0
80009de: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
80009e0: f107 0324 add.w r3, r7, #36 ; 0x24
80009e4: 4619 mov r1, r3
80009e6: 4819 ldr r0, [pc, #100] ; (8000a4c <MX_GPIO_Init+0x2fc>)
80009e8: f001 fafa bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : A10_Pin A11_Pin BA0_Pin BA1_Pin
SDCLK_Pin SDNCAS_Pin */
GPIO_InitStruct.Pin = A10_Pin|A11_Pin|BA0_Pin|BA1_Pin
80009ec: f248 1333 movw r3, #33075 ; 0x8133
80009f0: 627b str r3, [r7, #36] ; 0x24
|SDCLK_Pin|SDNCAS_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80009f2: 2302 movs r3, #2
80009f4: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80009f6: 2300 movs r3, #0
80009f8: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80009fa: 2303 movs r3, #3
80009fc: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
80009fe: 230c movs r3, #12
8000a00: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000a02: f107 0324 add.w r3, r7, #36 ; 0x24
8000a06: 4619 mov r1, r3
8000a08: 480c ldr r0, [pc, #48] ; (8000a3c <MX_GPIO_Init+0x2ec>)
8000a0a: f001 fae9 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : D4_Pin D5_Pin D6_Pin D7_Pin
D8_Pin D9_Pin D10_Pin D11_Pin
D12_Pin NBL0_Pin NBL1_Pin */
GPIO_InitStruct.Pin = D4_Pin|D5_Pin|D6_Pin|D7_Pin
8000a0e: f64f 7383 movw r3, #65411 ; 0xff83
8000a12: 627b str r3, [r7, #36] ; 0x24
|D8_Pin|D9_Pin|D10_Pin|D11_Pin
|D12_Pin|NBL0_Pin|NBL1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000a14: 2302 movs r3, #2
8000a16: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a18: 2300 movs r3, #0
8000a1a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000a1c: 2303 movs r3, #3
8000a1e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000a20: 230c movs r3, #12
8000a22: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8000a24: f107 0324 add.w r3, r7, #36 ; 0x24
8000a28: 4619 mov r1, r3
8000a2a: e011 b.n 8000a50 <MX_GPIO_Init+0x300>
8000a2c: 40023800 .word 0x40023800
8000a30: 40020800 .word 0x40020800
8000a34: 40020000 .word 0x40020000
8000a38: 40020c00 .word 0x40020c00
8000a3c: 40021800 .word 0x40021800
8000a40: 40021400 .word 0x40021400
8000a44: 10110000 .word 0x10110000
8000a48: 10120000 .word 0x10120000
8000a4c: 40020400 .word 0x40020400
8000a50: 487f ldr r0, [pc, #508] ; (8000c50 <MX_GPIO_Init+0x500>)
8000a52: f001 fac5 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : G4_Pin G5_Pin B6_Pin B7_Pin */
GPIO_InitStruct.Pin = G4_Pin|G5_Pin|B6_Pin|B7_Pin;
8000a56: f44f 6370 mov.w r3, #3840 ; 0xf00
8000a5a: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000a5c: 2302 movs r3, #2
8000a5e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a60: 2300 movs r3, #0
8000a62: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000a64: 2300 movs r3, #0
8000a66: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000a68: 230e movs r3, #14
8000a6a: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000a6c: f107 0324 add.w r3, r7, #36 ; 0x24
8000a70: 4619 mov r1, r3
8000a72: 4878 ldr r0, [pc, #480] ; (8000c54 <MX_GPIO_Init+0x504>)
8000a74: f001 fab4 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : OTG_HS_ID_Pin OTG_HS_DM_Pin OTG_HS_DP_Pin */
GPIO_InitStruct.Pin = OTG_HS_ID_Pin|OTG_HS_DM_Pin|OTG_HS_DP_Pin;
8000a78: f44f 4350 mov.w r3, #53248 ; 0xd000
8000a7c: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000a7e: 2302 movs r3, #2
8000a80: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a82: 2300 movs r3, #0
8000a84: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000a86: 2300 movs r3, #0
8000a88: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
8000a8a: 230c movs r3, #12
8000a8c: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000a8e: f107 0324 add.w r3, r7, #36 ; 0x24
8000a92: 4619 mov r1, r3
8000a94: 486f ldr r0, [pc, #444] ; (8000c54 <MX_GPIO_Init+0x504>)
8000a96: f001 faa3 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : VBUS_HS_Pin */
GPIO_InitStruct.Pin = VBUS_HS_Pin;
8000a9a: f44f 5300 mov.w r3, #8192 ; 0x2000
8000a9e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000aa0: 2300 movs r3, #0
8000aa2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000aa4: 2300 movs r3, #0
8000aa6: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(VBUS_HS_GPIO_Port, &GPIO_InitStruct);
8000aa8: f107 0324 add.w r3, r7, #36 ; 0x24
8000aac: 4619 mov r1, r3
8000aae: 4869 ldr r0, [pc, #420] ; (8000c54 <MX_GPIO_Init+0x504>)
8000ab0: f001 fa96 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : D13_Pin D14_Pin D15_Pin D0_Pin
D1_Pin D2_Pin D3_Pin */
GPIO_InitStruct.Pin = D13_Pin|D14_Pin|D15_Pin|D0_Pin
8000ab4: f24c 7303 movw r3, #50947 ; 0xc703
8000ab8: 627b str r3, [r7, #36] ; 0x24
|D1_Pin|D2_Pin|D3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000aba: 2302 movs r3, #2
8000abc: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000abe: 2300 movs r3, #0
8000ac0: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000ac2: 2303 movs r3, #3
8000ac4: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000ac6: 230c movs r3, #12
8000ac8: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000aca: f107 0324 add.w r3, r7, #36 ; 0x24
8000ace: 4619 mov r1, r3
8000ad0: 4861 ldr r0, [pc, #388] ; (8000c58 <MX_GPIO_Init+0x508>)
8000ad2: f001 fa85 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : TE_Pin */
GPIO_InitStruct.Pin = TE_Pin;
8000ad6: f44f 6300 mov.w r3, #2048 ; 0x800
8000ada: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000adc: 2300 movs r3, #0
8000ade: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ae0: 2300 movs r3, #0
8000ae2: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
8000ae4: f107 0324 add.w r3, r7, #36 ; 0x24
8000ae8: 4619 mov r1, r3
8000aea: 485b ldr r0, [pc, #364] ; (8000c58 <MX_GPIO_Init+0x508>)
8000aec: f001 fa78 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
8000af0: f44f 5340 mov.w r3, #12288 ; 0x3000
8000af4: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000af6: 2301 movs r3, #1
8000af8: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000afa: 2300 movs r3, #0
8000afc: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000afe: 2300 movs r3, #0
8000b00: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000b02: f107 0324 add.w r3, r7, #36 ; 0x24
8000b06: 4619 mov r1, r3
8000b08: 4853 ldr r0, [pc, #332] ; (8000c58 <MX_GPIO_Init+0x508>)
8000b0a: f001 fa69 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : R7_Pin DOTCLK_Pin B3_Pin */
GPIO_InitStruct.Pin = R7_Pin|DOTCLK_Pin|B3_Pin;
8000b0e: f44f 630c mov.w r3, #2240 ; 0x8c0
8000b12: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b14: 2302 movs r3, #2
8000b16: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b18: 2300 movs r3, #0
8000b1a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b1c: 2300 movs r3, #0
8000b1e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000b20: 230e movs r3, #14
8000b22: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000b24: f107 0324 add.w r3, r7, #36 ; 0x24
8000b28: 4619 mov r1, r3
8000b2a: 484c ldr r0, [pc, #304] ; (8000c5c <MX_GPIO_Init+0x50c>)
8000b2c: f001 fa58 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : HSYNC_Pin G6_Pin R2_Pin */
GPIO_InitStruct.Pin = HSYNC_Pin|G6_Pin|R2_Pin;
8000b30: f44f 6398 mov.w r3, #1216 ; 0x4c0
8000b34: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b36: 2302 movs r3, #2
8000b38: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b3a: 2300 movs r3, #0
8000b3c: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b3e: 2300 movs r3, #0
8000b40: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000b42: 230e movs r3, #14
8000b44: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000b46: f107 0324 add.w r3, r7, #36 ; 0x24
8000b4a: 4619 mov r1, r3
8000b4c: 4844 ldr r0, [pc, #272] ; (8000c60 <MX_GPIO_Init+0x510>)
8000b4e: f001 fa47 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : I2C3_SDA_Pin */
GPIO_InitStruct.Pin = I2C3_SDA_Pin;
8000b52: f44f 7300 mov.w r3, #512 ; 0x200
8000b56: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000b58: 2312 movs r3, #18
8000b5a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_PULLUP;
8000b5c: 2301 movs r3, #1
8000b5e: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b60: 2300 movs r3, #0
8000b62: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
8000b64: 2304 movs r3, #4
8000b66: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2C3_SDA_GPIO_Port, &GPIO_InitStruct);
8000b68: f107 0324 add.w r3, r7, #36 ; 0x24
8000b6c: 4619 mov r1, r3
8000b6e: 483c ldr r0, [pc, #240] ; (8000c60 <MX_GPIO_Init+0x510>)
8000b70: f001 fa36 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pin : I2C3_SCL_Pin */
GPIO_InitStruct.Pin = I2C3_SCL_Pin;
8000b74: f44f 7380 mov.w r3, #256 ; 0x100
8000b78: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000b7a: 2312 movs r3, #18
8000b7c: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_PULLUP;
8000b7e: 2301 movs r3, #1
8000b80: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b82: 2300 movs r3, #0
8000b84: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
8000b86: 2304 movs r3, #4
8000b88: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2C3_SCL_GPIO_Port, &GPIO_InitStruct);
8000b8a: f107 0324 add.w r3, r7, #36 ; 0x24
8000b8e: 4619 mov r1, r3
8000b90: 4834 ldr r0, [pc, #208] ; (8000c64 <MX_GPIO_Init+0x514>)
8000b92: f001 fa25 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : STLINK_RX_Pin STLINK_TX_Pin */
GPIO_InitStruct.Pin = STLINK_RX_Pin|STLINK_TX_Pin;
8000b96: f44f 63c0 mov.w r3, #1536 ; 0x600
8000b9a: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b9c: 2302 movs r3, #2
8000b9e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ba0: 2300 movs r3, #0
8000ba2: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000ba4: 2303 movs r3, #3
8000ba6: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
8000ba8: 2307 movs r3, #7
8000baa: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000bac: f107 0324 add.w r3, r7, #36 ; 0x24
8000bb0: 4619 mov r1, r3
8000bb2: 482c ldr r0, [pc, #176] ; (8000c64 <MX_GPIO_Init+0x514>)
8000bb4: f001 fa14 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : G7_Pin B2_Pin */
GPIO_InitStruct.Pin = G7_Pin|B2_Pin;
8000bb8: 2348 movs r3, #72 ; 0x48
8000bba: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000bbc: 2302 movs r3, #2
8000bbe: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000bc0: 2300 movs r3, #0
8000bc2: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000bc4: 2300 movs r3, #0
8000bc6: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000bc8: 230e movs r3, #14
8000bca: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000bcc: f107 0324 add.w r3, r7, #36 ; 0x24
8000bd0: 4619 mov r1, r3
8000bd2: 4821 ldr r0, [pc, #132] ; (8000c58 <MX_GPIO_Init+0x508>)
8000bd4: f001 fa04 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : G3_Pin B4_Pin */
GPIO_InitStruct.Pin = G3_Pin|B4_Pin;
8000bd8: f44f 53a0 mov.w r3, #5120 ; 0x1400
8000bdc: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000bde: 2302 movs r3, #2
8000be0: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000be2: 2300 movs r3, #0
8000be4: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000be6: 2300 movs r3, #0
8000be8: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
8000bea: 2309 movs r3, #9
8000bec: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000bee: f107 0324 add.w r3, r7, #36 ; 0x24
8000bf2: 4619 mov r1, r3
8000bf4: 4819 ldr r0, [pc, #100] ; (8000c5c <MX_GPIO_Init+0x50c>)
8000bf6: f001 f9f3 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : LD3_Pin LD4_Pin */
GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
8000bfa: f44f 43c0 mov.w r3, #24576 ; 0x6000
8000bfe: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000c00: 2301 movs r3, #1
8000c02: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c04: 2300 movs r3, #0
8000c06: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c08: 2300 movs r3, #0
8000c0a: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000c0c: f107 0324 add.w r3, r7, #36 ; 0x24
8000c10: 4619 mov r1, r3
8000c12: 4812 ldr r0, [pc, #72] ; (8000c5c <MX_GPIO_Init+0x50c>)
8000c14: f001 f9e4 bl 8001fe0 <HAL_GPIO_Init>
/*Configure GPIO pins : SDCKE1_Pin SDNE1_Pin */
GPIO_InitStruct.Pin = SDCKE1_Pin|SDNE1_Pin;
8000c18: 2360 movs r3, #96 ; 0x60
8000c1a: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c1c: 2302 movs r3, #2
8000c1e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c20: 2300 movs r3, #0
8000c22: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000c24: 2303 movs r3, #3
8000c26: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000c28: 230c movs r3, #12
8000c2a: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000c2c: f107 0324 add.w r3, r7, #36 ; 0x24
8000c30: 4619 mov r1, r3
8000c32: 4808 ldr r0, [pc, #32] ; (8000c54 <MX_GPIO_Init+0x504>)
8000c34: f001 f9d4 bl 8001fe0 <HAL_GPIO_Init>
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);
8000c38: 2200 movs r2, #0
8000c3a: 2100 movs r1, #0
8000c3c: 2006 movs r0, #6
8000c3e: f001 f976 bl 8001f2e <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
8000c42: 2006 movs r0, #6
8000c44: f001 f98f bl 8001f66 <HAL_NVIC_EnableIRQ>
}
8000c48: bf00 nop
8000c4a: 3738 adds r7, #56 ; 0x38
8000c4c: 46bd mov sp, r7
8000c4e: bd80 pop {r7, pc}
8000c50: 40021000 .word 0x40021000
8000c54: 40020400 .word 0x40020400
8000c58: 40020c00 .word 0x40020c00
8000c5c: 40021800 .word 0x40021800
8000c60: 40020800 .word 0x40020800
8000c64: 40020000 .word 0x40020000
08000c68 <updateWS2812BData>:
/* USER CODE BEGIN 4 */
void updateWS2812BData(void){
8000c68: b490 push {r4, r7}
8000c6a: b082 sub sp, #8
8000c6c: af00 add r7, sp, #0
uint8_t byteToConvert;
for (uint8_t i = 0; i < 64; ++i) {
8000c6e: 2300 movs r3, #0
8000c70: 71fb strb r3, [r7, #7]
8000c72: e18b b.n 8000f8c <updateWS2812BData+0x324>
for (uint8_t j = 0; j < 3; ++j) {
8000c74: 2300 movs r3, #0
8000c76: 71bb strb r3, [r7, #6]
8000c78: e181 b.n 8000f7e <updateWS2812BData+0x316>
byteToConvert = LEDData[i][j];
8000c7a: 79fa ldrb r2, [r7, #7]
8000c7c: 79b9 ldrb r1, [r7, #6]
8000c7e: 488e ldr r0, [pc, #568] ; (8000eb8 <updateWS2812BData+0x250>)
8000c80: 4613 mov r3, r2
8000c82: 005b lsls r3, r3, #1
8000c84: 4413 add r3, r2
8000c86: 4403 add r3, r0
8000c88: 440b add r3, r1
8000c8a: 781b ldrb r3, [r3, #0]
8000c8c: 717b strb r3, [r7, #5]
switch((byteToConvert & 0xF0) >> 4){
8000c8e: 797b ldrb r3, [r7, #5]
8000c90: 091b lsrs r3, r3, #4
8000c92: b2db uxtb r3, r3
8000c94: 2b0e cmp r3, #14
8000c96: d85d bhi.n 8000d54 <updateWS2812BData+0xec>
8000c98: a201 add r2, pc, #4 ; (adr r2, 8000ca0 <updateWS2812BData+0x38>)
8000c9a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000c9e: bf00 nop
8000ca0: 08000cdd .word 0x08000cdd
8000ca4: 08000ce5 .word 0x08000ce5
8000ca8: 08000ced .word 0x08000ced
8000cac: 08000cf5 .word 0x08000cf5
8000cb0: 08000cfd .word 0x08000cfd
8000cb4: 08000d05 .word 0x08000d05
8000cb8: 08000d0d .word 0x08000d0d
8000cbc: 08000d15 .word 0x08000d15
8000cc0: 08000d1d .word 0x08000d1d
8000cc4: 08000d25 .word 0x08000d25
8000cc8: 08000d2d .word 0x08000d2d
8000ccc: 08000d35 .word 0x08000d35
8000cd0: 08000d3d .word 0x08000d3d
8000cd4: 08000d45 .word 0x08000d45
8000cd8: 08000d4d .word 0x08000d4d
case 0x00:
WS2812BConvertedData = 0x00924000;
8000cdc: 4b77 ldr r3, [pc, #476] ; (8000ebc <updateWS2812BData+0x254>)
8000cde: 4a78 ldr r2, [pc, #480] ; (8000ec0 <updateWS2812BData+0x258>)
8000ce0: 601a str r2, [r3, #0]
break;
8000ce2: e03a b.n 8000d5a <updateWS2812BData+0xf2>
case 0x01:
WS2812BConvertedData = 0x00926000;
8000ce4: 4b75 ldr r3, [pc, #468] ; (8000ebc <updateWS2812BData+0x254>)
8000ce6: 4a77 ldr r2, [pc, #476] ; (8000ec4 <updateWS2812BData+0x25c>)
8000ce8: 601a str r2, [r3, #0]
break;
8000cea: e036 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x02:
WS2812BConvertedData = 0x00934000;
8000cec: 4b73 ldr r3, [pc, #460] ; (8000ebc <updateWS2812BData+0x254>)
8000cee: 4a76 ldr r2, [pc, #472] ; (8000ec8 <updateWS2812BData+0x260>)
8000cf0: 601a str r2, [r3, #0]
break;
8000cf2: e032 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x03:
WS2812BConvertedData = 0x00936000;
8000cf4: 4b71 ldr r3, [pc, #452] ; (8000ebc <updateWS2812BData+0x254>)
8000cf6: 4a75 ldr r2, [pc, #468] ; (8000ecc <updateWS2812BData+0x264>)
8000cf8: 601a str r2, [r3, #0]
break;
8000cfa: e02e b.n 8000d5a <updateWS2812BData+0xf2>
case 0x04:
WS2812BConvertedData = 0x009A4000;
8000cfc: 4b6f ldr r3, [pc, #444] ; (8000ebc <updateWS2812BData+0x254>)
8000cfe: 4a74 ldr r2, [pc, #464] ; (8000ed0 <updateWS2812BData+0x268>)
8000d00: 601a str r2, [r3, #0]
break;
8000d02: e02a b.n 8000d5a <updateWS2812BData+0xf2>
case 0x05:
WS2812BConvertedData = 0x009A6000;
8000d04: 4b6d ldr r3, [pc, #436] ; (8000ebc <updateWS2812BData+0x254>)
8000d06: 4a73 ldr r2, [pc, #460] ; (8000ed4 <updateWS2812BData+0x26c>)
8000d08: 601a str r2, [r3, #0]
break;
8000d0a: e026 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x06:
WS2812BConvertedData = 0x009B4000;
8000d0c: 4b6b ldr r3, [pc, #428] ; (8000ebc <updateWS2812BData+0x254>)
8000d0e: 4a72 ldr r2, [pc, #456] ; (8000ed8 <updateWS2812BData+0x270>)
8000d10: 601a str r2, [r3, #0]
break;
8000d12: e022 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x07:
WS2812BConvertedData = 0x009B6000;
8000d14: 4b69 ldr r3, [pc, #420] ; (8000ebc <updateWS2812BData+0x254>)
8000d16: 4a71 ldr r2, [pc, #452] ; (8000edc <updateWS2812BData+0x274>)
8000d18: 601a str r2, [r3, #0]
break;
8000d1a: e01e b.n 8000d5a <updateWS2812BData+0xf2>
case 0x08:
WS2812BConvertedData = 0x00D24000;
8000d1c: 4b67 ldr r3, [pc, #412] ; (8000ebc <updateWS2812BData+0x254>)
8000d1e: 4a70 ldr r2, [pc, #448] ; (8000ee0 <updateWS2812BData+0x278>)
8000d20: 601a str r2, [r3, #0]
break;
8000d22: e01a b.n 8000d5a <updateWS2812BData+0xf2>
case 0x09:
WS2812BConvertedData = 0x00D26000;
8000d24: 4b65 ldr r3, [pc, #404] ; (8000ebc <updateWS2812BData+0x254>)
8000d26: 4a6f ldr r2, [pc, #444] ; (8000ee4 <updateWS2812BData+0x27c>)
8000d28: 601a str r2, [r3, #0]
break;
8000d2a: e016 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x0A:
WS2812BConvertedData = 0x00D34000;
8000d2c: 4b63 ldr r3, [pc, #396] ; (8000ebc <updateWS2812BData+0x254>)
8000d2e: 4a6e ldr r2, [pc, #440] ; (8000ee8 <updateWS2812BData+0x280>)
8000d30: 601a str r2, [r3, #0]
break;
8000d32: e012 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x0B:
WS2812BConvertedData = 0x00D36000;
8000d34: 4b61 ldr r3, [pc, #388] ; (8000ebc <updateWS2812BData+0x254>)
8000d36: 4a6d ldr r2, [pc, #436] ; (8000eec <updateWS2812BData+0x284>)
8000d38: 601a str r2, [r3, #0]
break;
8000d3a: e00e b.n 8000d5a <updateWS2812BData+0xf2>
case 0x0C:
WS2812BConvertedData = 0x00DA4000;
8000d3c: 4b5f ldr r3, [pc, #380] ; (8000ebc <updateWS2812BData+0x254>)
8000d3e: 4a6c ldr r2, [pc, #432] ; (8000ef0 <updateWS2812BData+0x288>)
8000d40: 601a str r2, [r3, #0]
break;
8000d42: e00a b.n 8000d5a <updateWS2812BData+0xf2>
case 0x0D:
WS2812BConvertedData = 0x00DA6000;
8000d44: 4b5d ldr r3, [pc, #372] ; (8000ebc <updateWS2812BData+0x254>)
8000d46: 4a6b ldr r2, [pc, #428] ; (8000ef4 <updateWS2812BData+0x28c>)
8000d48: 601a str r2, [r3, #0]
break;
8000d4a: e006 b.n 8000d5a <updateWS2812BData+0xf2>
case 0x0E:
WS2812BConvertedData = 0x00DB4000;
8000d4c: 4b5b ldr r3, [pc, #364] ; (8000ebc <updateWS2812BData+0x254>)
8000d4e: 4a6a ldr r2, [pc, #424] ; (8000ef8 <updateWS2812BData+0x290>)
8000d50: 601a str r2, [r3, #0]
break;
8000d52: e002 b.n 8000d5a <updateWS2812BData+0xf2>
default: // 0x0F
WS2812BConvertedData = 0x00DB6000;
8000d54: 4b59 ldr r3, [pc, #356] ; (8000ebc <updateWS2812BData+0x254>)
8000d56: 4a69 ldr r2, [pc, #420] ; (8000efc <updateWS2812BData+0x294>)
8000d58: 601a str r2, [r3, #0]
}
switch(byteToConvert & 0x0F){
8000d5a: 797b ldrb r3, [r7, #5]
8000d5c: f003 030f and.w r3, r3, #15
8000d60: 2b0e cmp r3, #14
8000d62: f200 80cd bhi.w 8000f00 <updateWS2812BData+0x298>
8000d66: a201 add r2, pc, #4 ; (adr r2, 8000d6c <updateWS2812BData+0x104>)
8000d68: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000d6c: 08000da9 .word 0x08000da9
8000d70: 08000dbb .word 0x08000dbb
8000d74: 08000dcd .word 0x08000dcd
8000d78: 08000ddf .word 0x08000ddf
8000d7c: 08000df1 .word 0x08000df1
8000d80: 08000e03 .word 0x08000e03
8000d84: 08000e15 .word 0x08000e15
8000d88: 08000e27 .word 0x08000e27
8000d8c: 08000e39 .word 0x08000e39
8000d90: 08000e4b .word 0x08000e4b
8000d94: 08000e5d .word 0x08000e5d
8000d98: 08000e6f .word 0x08000e6f
8000d9c: 08000e81 .word 0x08000e81
8000da0: 08000e93 .word 0x08000e93
8000da4: 08000ea5 .word 0x08000ea5
case 0x00:
WS2812BConvertedData |= 0x00000924;
8000da8: 4b44 ldr r3, [pc, #272] ; (8000ebc <updateWS2812BData+0x254>)
8000daa: 681b ldr r3, [r3, #0]
8000dac: f443 6312 orr.w r3, r3, #2336 ; 0x920
8000db0: f043 0304 orr.w r3, r3, #4
8000db4: 4a41 ldr r2, [pc, #260] ; (8000ebc <updateWS2812BData+0x254>)
8000db6: 6013 str r3, [r2, #0]
break;
8000db8: e0aa b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x01:
WS2812BConvertedData |= 0x00000926;
8000dba: 4b40 ldr r3, [pc, #256] ; (8000ebc <updateWS2812BData+0x254>)
8000dbc: 681b ldr r3, [r3, #0]
8000dbe: f443 6312 orr.w r3, r3, #2336 ; 0x920
8000dc2: f043 0306 orr.w r3, r3, #6
8000dc6: 4a3d ldr r2, [pc, #244] ; (8000ebc <updateWS2812BData+0x254>)
8000dc8: 6013 str r3, [r2, #0]
break;
8000dca: e0a1 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x02:
WS2812BConvertedData |= 0x00000934;
8000dcc: 4b3b ldr r3, [pc, #236] ; (8000ebc <updateWS2812BData+0x254>)
8000dce: 681b ldr r3, [r3, #0]
8000dd0: f443 6313 orr.w r3, r3, #2352 ; 0x930
8000dd4: f043 0304 orr.w r3, r3, #4
8000dd8: 4a38 ldr r2, [pc, #224] ; (8000ebc <updateWS2812BData+0x254>)
8000dda: 6013 str r3, [r2, #0]
break;
8000ddc: e098 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x03:
WS2812BConvertedData |= 0x00000936;
8000dde: 4b37 ldr r3, [pc, #220] ; (8000ebc <updateWS2812BData+0x254>)
8000de0: 681b ldr r3, [r3, #0]
8000de2: f443 6313 orr.w r3, r3, #2352 ; 0x930
8000de6: f043 0306 orr.w r3, r3, #6
8000dea: 4a34 ldr r2, [pc, #208] ; (8000ebc <updateWS2812BData+0x254>)
8000dec: 6013 str r3, [r2, #0]
break;
8000dee: e08f b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x04:
WS2812BConvertedData |= 0x000009A4;
8000df0: 4b32 ldr r3, [pc, #200] ; (8000ebc <updateWS2812BData+0x254>)
8000df2: 681b ldr r3, [r3, #0]
8000df4: f443 631a orr.w r3, r3, #2464 ; 0x9a0
8000df8: f043 0304 orr.w r3, r3, #4
8000dfc: 4a2f ldr r2, [pc, #188] ; (8000ebc <updateWS2812BData+0x254>)
8000dfe: 6013 str r3, [r2, #0]
break;
8000e00: e086 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x05:
WS2812BConvertedData |= 0x000009A6;
8000e02: 4b2e ldr r3, [pc, #184] ; (8000ebc <updateWS2812BData+0x254>)
8000e04: 681b ldr r3, [r3, #0]
8000e06: f443 631a orr.w r3, r3, #2464 ; 0x9a0
8000e0a: f043 0306 orr.w r3, r3, #6
8000e0e: 4a2b ldr r2, [pc, #172] ; (8000ebc <updateWS2812BData+0x254>)
8000e10: 6013 str r3, [r2, #0]
break;
8000e12: e07d b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x06:
WS2812BConvertedData |= 0x000009B4;
8000e14: 4b29 ldr r3, [pc, #164] ; (8000ebc <updateWS2812BData+0x254>)
8000e16: 681b ldr r3, [r3, #0]
8000e18: f443 631b orr.w r3, r3, #2480 ; 0x9b0
8000e1c: f043 0304 orr.w r3, r3, #4
8000e20: 4a26 ldr r2, [pc, #152] ; (8000ebc <updateWS2812BData+0x254>)
8000e22: 6013 str r3, [r2, #0]
break;
8000e24: e074 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x07:
WS2812BConvertedData |= 0x000009B6;
8000e26: 4b25 ldr r3, [pc, #148] ; (8000ebc <updateWS2812BData+0x254>)
8000e28: 681b ldr r3, [r3, #0]
8000e2a: f443 631b orr.w r3, r3, #2480 ; 0x9b0
8000e2e: f043 0306 orr.w r3, r3, #6
8000e32: 4a22 ldr r2, [pc, #136] ; (8000ebc <updateWS2812BData+0x254>)
8000e34: 6013 str r3, [r2, #0]
break;
8000e36: e06b b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x08:
WS2812BConvertedData |= 0x00000D24;
8000e38: 4b20 ldr r3, [pc, #128] ; (8000ebc <updateWS2812BData+0x254>)
8000e3a: 681b ldr r3, [r3, #0]
8000e3c: f443 6352 orr.w r3, r3, #3360 ; 0xd20
8000e40: f043 0304 orr.w r3, r3, #4
8000e44: 4a1d ldr r2, [pc, #116] ; (8000ebc <updateWS2812BData+0x254>)
8000e46: 6013 str r3, [r2, #0]
break;
8000e48: e062 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x09:
WS2812BConvertedData |= 0x00000D26;
8000e4a: 4b1c ldr r3, [pc, #112] ; (8000ebc <updateWS2812BData+0x254>)
8000e4c: 681b ldr r3, [r3, #0]
8000e4e: f443 6352 orr.w r3, r3, #3360 ; 0xd20
8000e52: f043 0306 orr.w r3, r3, #6
8000e56: 4a19 ldr r2, [pc, #100] ; (8000ebc <updateWS2812BData+0x254>)
8000e58: 6013 str r3, [r2, #0]
break;
8000e5a: e059 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x0A:
WS2812BConvertedData |= 0x00000D34;
8000e5c: 4b17 ldr r3, [pc, #92] ; (8000ebc <updateWS2812BData+0x254>)
8000e5e: 681b ldr r3, [r3, #0]
8000e60: f443 6353 orr.w r3, r3, #3376 ; 0xd30
8000e64: f043 0304 orr.w r3, r3, #4
8000e68: 4a14 ldr r2, [pc, #80] ; (8000ebc <updateWS2812BData+0x254>)
8000e6a: 6013 str r3, [r2, #0]
break;
8000e6c: e050 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x0B:
WS2812BConvertedData |= 0x00000D36;
8000e6e: 4b13 ldr r3, [pc, #76] ; (8000ebc <updateWS2812BData+0x254>)
8000e70: 681b ldr r3, [r3, #0]
8000e72: f443 6353 orr.w r3, r3, #3376 ; 0xd30
8000e76: f043 0306 orr.w r3, r3, #6
8000e7a: 4a10 ldr r2, [pc, #64] ; (8000ebc <updateWS2812BData+0x254>)
8000e7c: 6013 str r3, [r2, #0]
break;
8000e7e: e047 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x0C:
WS2812BConvertedData |= 0x00000DA4;
8000e80: 4b0e ldr r3, [pc, #56] ; (8000ebc <updateWS2812BData+0x254>)
8000e82: 681b ldr r3, [r3, #0]
8000e84: f443 635a orr.w r3, r3, #3488 ; 0xda0
8000e88: f043 0304 orr.w r3, r3, #4
8000e8c: 4a0b ldr r2, [pc, #44] ; (8000ebc <updateWS2812BData+0x254>)
8000e8e: 6013 str r3, [r2, #0]
break;
8000e90: e03e b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x0D:
WS2812BConvertedData |= 0x00000DA6;
8000e92: 4b0a ldr r3, [pc, #40] ; (8000ebc <updateWS2812BData+0x254>)
8000e94: 681b ldr r3, [r3, #0]
8000e96: f443 635a orr.w r3, r3, #3488 ; 0xda0
8000e9a: f043 0306 orr.w r3, r3, #6
8000e9e: 4a07 ldr r2, [pc, #28] ; (8000ebc <updateWS2812BData+0x254>)
8000ea0: 6013 str r3, [r2, #0]
break;
8000ea2: e035 b.n 8000f10 <updateWS2812BData+0x2a8>
case 0x0E:
WS2812BConvertedData |= 0x00000DB4;
8000ea4: 4b05 ldr r3, [pc, #20] ; (8000ebc <updateWS2812BData+0x254>)
8000ea6: 681b ldr r3, [r3, #0]
8000ea8: f443 635b orr.w r3, r3, #3504 ; 0xdb0
8000eac: f043 0304 orr.w r3, r3, #4
8000eb0: 4a02 ldr r2, [pc, #8] ; (8000ebc <updateWS2812BData+0x254>)
8000eb2: 6013 str r3, [r2, #0]
break;
8000eb4: e02c b.n 8000f10 <updateWS2812BData+0x2a8>
8000eb6: bf00 nop
8000eb8: 20000090 .word 0x20000090
8000ebc: 200003a4 .word 0x200003a4
8000ec0: 00924000 .word 0x00924000
8000ec4: 00926000 .word 0x00926000
8000ec8: 00934000 .word 0x00934000
8000ecc: 00936000 .word 0x00936000
8000ed0: 009a4000 .word 0x009a4000
8000ed4: 009a6000 .word 0x009a6000
8000ed8: 009b4000 .word 0x009b4000
8000edc: 009b6000 .word 0x009b6000
8000ee0: 00d24000 .word 0x00d24000
8000ee4: 00d26000 .word 0x00d26000
8000ee8: 00d34000 .word 0x00d34000
8000eec: 00d36000 .word 0x00d36000
8000ef0: 00da4000 .word 0x00da4000
8000ef4: 00da6000 .word 0x00da6000
8000ef8: 00db4000 .word 0x00db4000
8000efc: 00db6000 .word 0x00db6000
default: // 0x0F
WS2812BConvertedData |= 0x00000DB6;
8000f00: 4b27 ldr r3, [pc, #156] ; (8000fa0 <updateWS2812BData+0x338>)
8000f02: 681b ldr r3, [r3, #0]
8000f04: f443 635b orr.w r3, r3, #3504 ; 0xdb0
8000f08: f043 0306 orr.w r3, r3, #6
8000f0c: 4a24 ldr r2, [pc, #144] ; (8000fa0 <updateWS2812BData+0x338>)
8000f0e: 6013 str r3, [r2, #0]
}
LEDData_WS2812B[i][j][0] = (WS2812BConvertedData & 0x00FF0000) >> 16;
8000f10: 4b23 ldr r3, [pc, #140] ; (8000fa0 <updateWS2812BData+0x338>)
8000f12: 681b ldr r3, [r3, #0]
8000f14: 0c1a lsrs r2, r3, #16
8000f16: 79f9 ldrb r1, [r7, #7]
8000f18: 79bb ldrb r3, [r7, #6]
8000f1a: b2d4 uxtb r4, r2
8000f1c: 4821 ldr r0, [pc, #132] ; (8000fa4 <updateWS2812BData+0x33c>)
8000f1e: 461a mov r2, r3
8000f20: 0052 lsls r2, r2, #1
8000f22: 441a add r2, r3
8000f24: 460b mov r3, r1
8000f26: 00db lsls r3, r3, #3
8000f28: 440b add r3, r1
8000f2a: 4413 add r3, r2
8000f2c: 4403 add r3, r0
8000f2e: 4622 mov r2, r4
8000f30: 701a strb r2, [r3, #0]
LEDData_WS2812B[i][j][1] = (WS2812BConvertedData & 0x0000FF00) >> 8;
8000f32: 4b1b ldr r3, [pc, #108] ; (8000fa0 <updateWS2812BData+0x338>)
8000f34: 681b ldr r3, [r3, #0]
8000f36: 0a1a lsrs r2, r3, #8
8000f38: 79f9 ldrb r1, [r7, #7]
8000f3a: 79bb ldrb r3, [r7, #6]
8000f3c: b2d4 uxtb r4, r2
8000f3e: 4819 ldr r0, [pc, #100] ; (8000fa4 <updateWS2812BData+0x33c>)
8000f40: 461a mov r2, r3
8000f42: 0052 lsls r2, r2, #1
8000f44: 441a add r2, r3
8000f46: 460b mov r3, r1
8000f48: 00db lsls r3, r3, #3
8000f4a: 440b add r3, r1
8000f4c: 4413 add r3, r2
8000f4e: 4403 add r3, r0
8000f50: 3301 adds r3, #1
8000f52: 4622 mov r2, r4
8000f54: 701a strb r2, [r3, #0]
LEDData_WS2812B[i][j][2] = WS2812BConvertedData & 0x000000FF;
8000f56: 4b12 ldr r3, [pc, #72] ; (8000fa0 <updateWS2812BData+0x338>)
8000f58: 681a ldr r2, [r3, #0]
8000f5a: 79f9 ldrb r1, [r7, #7]
8000f5c: 79bb ldrb r3, [r7, #6]
8000f5e: b2d4 uxtb r4, r2
8000f60: 4810 ldr r0, [pc, #64] ; (8000fa4 <updateWS2812BData+0x33c>)
8000f62: 461a mov r2, r3
8000f64: 0052 lsls r2, r2, #1
8000f66: 441a add r2, r3
8000f68: 460b mov r3, r1
8000f6a: 00db lsls r3, r3, #3
8000f6c: 440b add r3, r1
8000f6e: 4413 add r3, r2
8000f70: 4403 add r3, r0
8000f72: 3302 adds r3, #2
8000f74: 4622 mov r2, r4
8000f76: 701a strb r2, [r3, #0]
for (uint8_t j = 0; j < 3; ++j) {
8000f78: 79bb ldrb r3, [r7, #6]
8000f7a: 3301 adds r3, #1
8000f7c: 71bb strb r3, [r7, #6]
8000f7e: 79bb ldrb r3, [r7, #6]
8000f80: 2b02 cmp r3, #2
8000f82: f67f ae7a bls.w 8000c7a <updateWS2812BData+0x12>
for (uint8_t i = 0; i < 64; ++i) {
8000f86: 79fb ldrb r3, [r7, #7]
8000f88: 3301 adds r3, #1
8000f8a: 71fb strb r3, [r7, #7]
8000f8c: 79fb ldrb r3, [r7, #7]
8000f8e: 2b3f cmp r3, #63 ; 0x3f
8000f90: f67f ae70 bls.w 8000c74 <updateWS2812BData+0xc>
}
}
}
8000f94: bf00 nop
8000f96: 3708 adds r7, #8
8000f98: 46bd mov sp, r7
8000f9a: bc90 pop {r4, r7}
8000f9c: 4770 bx lr
8000f9e: bf00 nop
8000fa0: 200003a4 .word 0x200003a4
8000fa4: 20000150 .word 0x20000150
08000fa8 <LEDDesign_Off>:
void LEDDesign_Off(void){
8000fa8: b480 push {r7}
8000faa: b083 sub sp, #12
8000fac: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
8000fae: 2300 movs r3, #0
8000fb0: 71fb strb r3, [r7, #7]
8000fb2: e015 b.n 8000fe0 <LEDDesign_Off+0x38>
for(uint8_t j = 0; j < 3; ++j){
8000fb4: 2300 movs r3, #0
8000fb6: 71bb strb r3, [r7, #6]
8000fb8: e00c b.n 8000fd4 <LEDDesign_Off+0x2c>
LEDData[i][j] = 0x00;
8000fba: 79fa ldrb r2, [r7, #7]
8000fbc: 79b9 ldrb r1, [r7, #6]
8000fbe: 480d ldr r0, [pc, #52] ; (8000ff4 <LEDDesign_Off+0x4c>)
8000fc0: 4613 mov r3, r2
8000fc2: 005b lsls r3, r3, #1
8000fc4: 4413 add r3, r2
8000fc6: 4403 add r3, r0
8000fc8: 440b add r3, r1
8000fca: 2200 movs r2, #0
8000fcc: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
8000fce: 79bb ldrb r3, [r7, #6]
8000fd0: 3301 adds r3, #1
8000fd2: 71bb strb r3, [r7, #6]
8000fd4: 79bb ldrb r3, [r7, #6]
8000fd6: 2b02 cmp r3, #2
8000fd8: d9ef bls.n 8000fba <LEDDesign_Off+0x12>
for(uint8_t i = 0; i < 64; ++i){
8000fda: 79fb ldrb r3, [r7, #7]
8000fdc: 3301 adds r3, #1
8000fde: 71fb strb r3, [r7, #7]
8000fe0: 79fb ldrb r3, [r7, #7]
8000fe2: 2b3f cmp r3, #63 ; 0x3f
8000fe4: d9e6 bls.n 8000fb4 <LEDDesign_Off+0xc>
}
}
}
8000fe6: bf00 nop
8000fe8: 370c adds r7, #12
8000fea: 46bd mov sp, r7
8000fec: f85d 7b04 ldr.w r7, [sp], #4
8000ff0: 4770 bx lr
8000ff2: bf00 nop
8000ff4: 20000090 .word 0x20000090
08000ff8 <LEDDesign_ColorWhite>:
void LEDDesign_ColorWhite(void){
8000ff8: b480 push {r7}
8000ffa: b083 sub sp, #12
8000ffc: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
8000ffe: 2300 movs r3, #0
8001000: 71fb strb r3, [r7, #7]
8001002: e015 b.n 8001030 <LEDDesign_ColorWhite+0x38>
for(uint8_t j = 0; j < 3; ++j){
8001004: 2300 movs r3, #0
8001006: 71bb strb r3, [r7, #6]
8001008: e00c b.n 8001024 <LEDDesign_ColorWhite+0x2c>
LEDData[i][j] = 0xFF;
800100a: 79fa ldrb r2, [r7, #7]
800100c: 79b9 ldrb r1, [r7, #6]
800100e: 480d ldr r0, [pc, #52] ; (8001044 <LEDDesign_ColorWhite+0x4c>)
8001010: 4613 mov r3, r2
8001012: 005b lsls r3, r3, #1
8001014: 4413 add r3, r2
8001016: 4403 add r3, r0
8001018: 440b add r3, r1
800101a: 22ff movs r2, #255 ; 0xff
800101c: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
800101e: 79bb ldrb r3, [r7, #6]
8001020: 3301 adds r3, #1
8001022: 71bb strb r3, [r7, #6]
8001024: 79bb ldrb r3, [r7, #6]
8001026: 2b02 cmp r3, #2
8001028: d9ef bls.n 800100a <LEDDesign_ColorWhite+0x12>
for(uint8_t i = 0; i < 64; ++i){
800102a: 79fb ldrb r3, [r7, #7]
800102c: 3301 adds r3, #1
800102e: 71fb strb r3, [r7, #7]
8001030: 79fb ldrb r3, [r7, #7]
8001032: 2b3f cmp r3, #63 ; 0x3f
8001034: d9e6 bls.n 8001004 <LEDDesign_ColorWhite+0xc>
}
}
}
8001036: bf00 nop
8001038: 370c adds r7, #12
800103a: 46bd mov sp, r7
800103c: f85d 7b04 ldr.w r7, [sp], #4
8001040: 4770 bx lr
8001042: bf00 nop
8001044: 20000090 .word 0x20000090
08001048 <LEDDesign_ColorBlue>:
void LEDDesign_ColorBlue(void){
8001048: b480 push {r7}
800104a: b083 sub sp, #12
800104c: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
800104e: 2300 movs r3, #0
8001050: 71fb strb r3, [r7, #7]
8001052: e00a b.n 800106a <LEDDesign_ColorBlue+0x22>
LEDData[i][0] = 0x00;
8001054: 79fa ldrb r2, [r7, #7]
8001056: 491b ldr r1, [pc, #108] ; (80010c4 <LEDDesign_ColorBlue+0x7c>)
8001058: 4613 mov r3, r2
800105a: 005b lsls r3, r3, #1
800105c: 4413 add r3, r2
800105e: 440b add r3, r1
8001060: 2200 movs r2, #0
8001062: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001064: 79fb ldrb r3, [r7, #7]
8001066: 3301 adds r3, #1
8001068: 71fb strb r3, [r7, #7]
800106a: 79fb ldrb r3, [r7, #7]
800106c: 2b3f cmp r3, #63 ; 0x3f
800106e: d9f1 bls.n 8001054 <LEDDesign_ColorBlue+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
8001070: 2300 movs r3, #0
8001072: 71bb strb r3, [r7, #6]
8001074: e00b b.n 800108e <LEDDesign_ColorBlue+0x46>
LEDData[i][1] = 0x00;
8001076: 79ba ldrb r2, [r7, #6]
8001078: 4912 ldr r1, [pc, #72] ; (80010c4 <LEDDesign_ColorBlue+0x7c>)
800107a: 4613 mov r3, r2
800107c: 005b lsls r3, r3, #1
800107e: 4413 add r3, r2
8001080: 440b add r3, r1
8001082: 3301 adds r3, #1
8001084: 2200 movs r2, #0
8001086: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001088: 79bb ldrb r3, [r7, #6]
800108a: 3301 adds r3, #1
800108c: 71bb strb r3, [r7, #6]
800108e: 79bb ldrb r3, [r7, #6]
8001090: 2b3f cmp r3, #63 ; 0x3f
8001092: d9f0 bls.n 8001076 <LEDDesign_ColorBlue+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
8001094: 2300 movs r3, #0
8001096: 717b strb r3, [r7, #5]
8001098: e00b b.n 80010b2 <LEDDesign_ColorBlue+0x6a>
LEDData[i][2] = 0xFF;
800109a: 797a ldrb r2, [r7, #5]
800109c: 4909 ldr r1, [pc, #36] ; (80010c4 <LEDDesign_ColorBlue+0x7c>)
800109e: 4613 mov r3, r2
80010a0: 005b lsls r3, r3, #1
80010a2: 4413 add r3, r2
80010a4: 440b add r3, r1
80010a6: 3302 adds r3, #2
80010a8: 22ff movs r2, #255 ; 0xff
80010aa: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80010ac: 797b ldrb r3, [r7, #5]
80010ae: 3301 adds r3, #1
80010b0: 717b strb r3, [r7, #5]
80010b2: 797b ldrb r3, [r7, #5]
80010b4: 2b3f cmp r3, #63 ; 0x3f
80010b6: d9f0 bls.n 800109a <LEDDesign_ColorBlue+0x52>
}
}
80010b8: bf00 nop
80010ba: 370c adds r7, #12
80010bc: 46bd mov sp, r7
80010be: f85d 7b04 ldr.w r7, [sp], #4
80010c2: 4770 bx lr
80010c4: 20000090 .word 0x20000090
080010c8 <LEDDesign_ColorGreen>:
void LEDDesign_ColorGreen(void){
80010c8: b480 push {r7}
80010ca: b083 sub sp, #12
80010cc: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
80010ce: 2300 movs r3, #0
80010d0: 71fb strb r3, [r7, #7]
80010d2: e00a b.n 80010ea <LEDDesign_ColorGreen+0x22>
LEDData[i][0] = 0xFF;
80010d4: 79fa ldrb r2, [r7, #7]
80010d6: 491b ldr r1, [pc, #108] ; (8001144 <LEDDesign_ColorGreen+0x7c>)
80010d8: 4613 mov r3, r2
80010da: 005b lsls r3, r3, #1
80010dc: 4413 add r3, r2
80010de: 440b add r3, r1
80010e0: 22ff movs r2, #255 ; 0xff
80010e2: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80010e4: 79fb ldrb r3, [r7, #7]
80010e6: 3301 adds r3, #1
80010e8: 71fb strb r3, [r7, #7]
80010ea: 79fb ldrb r3, [r7, #7]
80010ec: 2b3f cmp r3, #63 ; 0x3f
80010ee: d9f1 bls.n 80010d4 <LEDDesign_ColorGreen+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
80010f0: 2300 movs r3, #0
80010f2: 71bb strb r3, [r7, #6]
80010f4: e00b b.n 800110e <LEDDesign_ColorGreen+0x46>
LEDData[i][1] = 0x00;
80010f6: 79ba ldrb r2, [r7, #6]
80010f8: 4912 ldr r1, [pc, #72] ; (8001144 <LEDDesign_ColorGreen+0x7c>)
80010fa: 4613 mov r3, r2
80010fc: 005b lsls r3, r3, #1
80010fe: 4413 add r3, r2
8001100: 440b add r3, r1
8001102: 3301 adds r3, #1
8001104: 2200 movs r2, #0
8001106: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001108: 79bb ldrb r3, [r7, #6]
800110a: 3301 adds r3, #1
800110c: 71bb strb r3, [r7, #6]
800110e: 79bb ldrb r3, [r7, #6]
8001110: 2b3f cmp r3, #63 ; 0x3f
8001112: d9f0 bls.n 80010f6 <LEDDesign_ColorGreen+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
8001114: 2300 movs r3, #0
8001116: 717b strb r3, [r7, #5]
8001118: e00b b.n 8001132 <LEDDesign_ColorGreen+0x6a>
LEDData[i][2] = 0x00;
800111a: 797a ldrb r2, [r7, #5]
800111c: 4909 ldr r1, [pc, #36] ; (8001144 <LEDDesign_ColorGreen+0x7c>)
800111e: 4613 mov r3, r2
8001120: 005b lsls r3, r3, #1
8001122: 4413 add r3, r2
8001124: 440b add r3, r1
8001126: 3302 adds r3, #2
8001128: 2200 movs r2, #0
800112a: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
800112c: 797b ldrb r3, [r7, #5]
800112e: 3301 adds r3, #1
8001130: 717b strb r3, [r7, #5]
8001132: 797b ldrb r3, [r7, #5]
8001134: 2b3f cmp r3, #63 ; 0x3f
8001136: d9f0 bls.n 800111a <LEDDesign_ColorGreen+0x52>
}
}
8001138: bf00 nop
800113a: 370c adds r7, #12
800113c: 46bd mov sp, r7
800113e: f85d 7b04 ldr.w r7, [sp], #4
8001142: 4770 bx lr
8001144: 20000090 .word 0x20000090
08001148 <LEDDesign_ColorRed>:
void LEDDesign_ColorRed(void){
8001148: b480 push {r7}
800114a: b083 sub sp, #12
800114c: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
800114e: 2300 movs r3, #0
8001150: 71fb strb r3, [r7, #7]
8001152: e00a b.n 800116a <LEDDesign_ColorRed+0x22>
LEDData[i][0] = 0x00;
8001154: 79fa ldrb r2, [r7, #7]
8001156: 491b ldr r1, [pc, #108] ; (80011c4 <LEDDesign_ColorRed+0x7c>)
8001158: 4613 mov r3, r2
800115a: 005b lsls r3, r3, #1
800115c: 4413 add r3, r2
800115e: 440b add r3, r1
8001160: 2200 movs r2, #0
8001162: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001164: 79fb ldrb r3, [r7, #7]
8001166: 3301 adds r3, #1
8001168: 71fb strb r3, [r7, #7]
800116a: 79fb ldrb r3, [r7, #7]
800116c: 2b3f cmp r3, #63 ; 0x3f
800116e: d9f1 bls.n 8001154 <LEDDesign_ColorRed+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
8001170: 2300 movs r3, #0
8001172: 71bb strb r3, [r7, #6]
8001174: e00b b.n 800118e <LEDDesign_ColorRed+0x46>
LEDData[i][1] = 0xFF;
8001176: 79ba ldrb r2, [r7, #6]
8001178: 4912 ldr r1, [pc, #72] ; (80011c4 <LEDDesign_ColorRed+0x7c>)
800117a: 4613 mov r3, r2
800117c: 005b lsls r3, r3, #1
800117e: 4413 add r3, r2
8001180: 440b add r3, r1
8001182: 3301 adds r3, #1
8001184: 22ff movs r2, #255 ; 0xff
8001186: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001188: 79bb ldrb r3, [r7, #6]
800118a: 3301 adds r3, #1
800118c: 71bb strb r3, [r7, #6]
800118e: 79bb ldrb r3, [r7, #6]
8001190: 2b3f cmp r3, #63 ; 0x3f
8001192: d9f0 bls.n 8001176 <LEDDesign_ColorRed+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
8001194: 2300 movs r3, #0
8001196: 717b strb r3, [r7, #5]
8001198: e00b b.n 80011b2 <LEDDesign_ColorRed+0x6a>
LEDData[i][2] = 0x00;
800119a: 797a ldrb r2, [r7, #5]
800119c: 4909 ldr r1, [pc, #36] ; (80011c4 <LEDDesign_ColorRed+0x7c>)
800119e: 4613 mov r3, r2
80011a0: 005b lsls r3, r3, #1
80011a2: 4413 add r3, r2
80011a4: 440b add r3, r1
80011a6: 3302 adds r3, #2
80011a8: 2200 movs r2, #0
80011aa: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80011ac: 797b ldrb r3, [r7, #5]
80011ae: 3301 adds r3, #1
80011b0: 717b strb r3, [r7, #5]
80011b2: 797b ldrb r3, [r7, #5]
80011b4: 2b3f cmp r3, #63 ; 0x3f
80011b6: d9f0 bls.n 800119a <LEDDesign_ColorRed+0x52>
}
}
80011b8: bf00 nop
80011ba: 370c adds r7, #12
80011bc: 46bd mov sp, r7
80011be: f85d 7b04 ldr.w r7, [sp], #4
80011c2: 4770 bx lr
80011c4: 20000090 .word 0x20000090
080011c8 <LEDDesign_Crazy>:
void LEDDesign_Crazy(void){
80011c8: b590 push {r4, r7, lr}
80011ca: b085 sub sp, #20
80011cc: af00 add r7, sp, #0
HAL_Delay(50);
80011ce: 2032 movs r0, #50 ; 0x32
80011d0: f000 fdb0 bl 8001d34 <HAL_Delay>
for(uint8_t i = 0; i < 64; ++i){
80011d4: 2300 movs r3, #0
80011d6: 73fb strb r3, [r7, #15]
80011d8: e029 b.n 800122e <LEDDesign_Crazy+0x66>
for(uint8_t j = 0; j < 3; ++j){
80011da: 2300 movs r3, #0
80011dc: 73bb strb r3, [r7, #14]
80011de: e020 b.n 8001222 <LEDDesign_Crazy+0x5a>
LEDData[i][j] = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
80011e0: f002 fba8 bl 8003934 <rand>
80011e4: ee07 0a90 vmov s15, r0
80011e8: eeb8 7ae7 vcvt.f32.s32 s14, s15
80011ec: eddf 6a13 vldr s13, [pc, #76] ; 800123c <LEDDesign_Crazy+0x74>
80011f0: eec7 7a26 vdiv.f32 s15, s14, s13
80011f4: ed9f 7a12 vldr s14, [pc, #72] ; 8001240 <LEDDesign_Crazy+0x78>
80011f8: ee67 7a87 vmul.f32 s15, s15, s14
80011fc: 7bfa ldrb r2, [r7, #15]
80011fe: 7bb9 ldrb r1, [r7, #14]
8001200: eefc 7ae7 vcvt.u32.f32 s15, s15
8001204: edc7 7a01 vstr s15, [r7, #4]
8001208: 793b ldrb r3, [r7, #4]
800120a: b2dc uxtb r4, r3
800120c: 480d ldr r0, [pc, #52] ; (8001244 <LEDDesign_Crazy+0x7c>)
800120e: 4613 mov r3, r2
8001210: 005b lsls r3, r3, #1
8001212: 4413 add r3, r2
8001214: 4403 add r3, r0
8001216: 440b add r3, r1
8001218: 4622 mov r2, r4
800121a: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
800121c: 7bbb ldrb r3, [r7, #14]
800121e: 3301 adds r3, #1
8001220: 73bb strb r3, [r7, #14]
8001222: 7bbb ldrb r3, [r7, #14]
8001224: 2b02 cmp r3, #2
8001226: d9db bls.n 80011e0 <LEDDesign_Crazy+0x18>
for(uint8_t i = 0; i < 64; ++i){
8001228: 7bfb ldrb r3, [r7, #15]
800122a: 3301 adds r3, #1
800122c: 73fb strb r3, [r7, #15]
800122e: 7bfb ldrb r3, [r7, #15]
8001230: 2b3f cmp r3, #63 ; 0x3f
8001232: d9d2 bls.n 80011da <LEDDesign_Crazy+0x12>
}
}
}
8001234: bf00 nop
8001236: 3714 adds r7, #20
8001238: 46bd mov sp, r7
800123a: bd90 pop {r4, r7, pc}
800123c: 4f000000 .word 0x4f000000
8001240: 437f0000 .word 0x437f0000
8001244: 20000090 .word 0x20000090
08001248 <LEDDesign_Smile>:
void LEDDesign_Smile(void){
8001248: b480 push {r7}
800124a: af00 add r7, sp, #0
LEDData[0][0] = 0x00;
800124c: 4bc8 ldr r3, [pc, #800] ; (8001570 <LEDDesign_Smile+0x328>)
800124e: 2200 movs r2, #0
8001250: 701a strb r2, [r3, #0]
LEDData[0][1] = 0x00;
8001252: 4bc7 ldr r3, [pc, #796] ; (8001570 <LEDDesign_Smile+0x328>)
8001254: 2200 movs r2, #0
8001256: 705a strb r2, [r3, #1]
LEDData[0][2] = 0x00;
8001258: 4bc5 ldr r3, [pc, #788] ; (8001570 <LEDDesign_Smile+0x328>)
800125a: 2200 movs r2, #0
800125c: 709a strb r2, [r3, #2]
LEDData[1][0] = 0x00;
800125e: 4bc4 ldr r3, [pc, #784] ; (8001570 <LEDDesign_Smile+0x328>)
8001260: 2200 movs r2, #0
8001262: 70da strb r2, [r3, #3]
LEDData[1][1] = 0x00;
8001264: 4bc2 ldr r3, [pc, #776] ; (8001570 <LEDDesign_Smile+0x328>)
8001266: 2200 movs r2, #0
8001268: 711a strb r2, [r3, #4]
LEDData[1][2] = 0x00;
800126a: 4bc1 ldr r3, [pc, #772] ; (8001570 <LEDDesign_Smile+0x328>)
800126c: 2200 movs r2, #0
800126e: 715a strb r2, [r3, #5]
LEDData[2][0] = 0x00;
8001270: 4bbf ldr r3, [pc, #764] ; (8001570 <LEDDesign_Smile+0x328>)
8001272: 2200 movs r2, #0
8001274: 719a strb r2, [r3, #6]
LEDData[2][1] = 0x00;
8001276: 4bbe ldr r3, [pc, #760] ; (8001570 <LEDDesign_Smile+0x328>)
8001278: 2200 movs r2, #0
800127a: 71da strb r2, [r3, #7]
LEDData[2][2] = 0x00;
800127c: 4bbc ldr r3, [pc, #752] ; (8001570 <LEDDesign_Smile+0x328>)
800127e: 2200 movs r2, #0
8001280: 721a strb r2, [r3, #8]
LEDData[3][0] = 0x00;
8001282: 4bbb ldr r3, [pc, #748] ; (8001570 <LEDDesign_Smile+0x328>)
8001284: 2200 movs r2, #0
8001286: 725a strb r2, [r3, #9]
LEDData[3][1] = 0x00;
8001288: 4bb9 ldr r3, [pc, #740] ; (8001570 <LEDDesign_Smile+0x328>)
800128a: 2200 movs r2, #0
800128c: 729a strb r2, [r3, #10]
LEDData[3][2] = 0x00;
800128e: 4bb8 ldr r3, [pc, #736] ; (8001570 <LEDDesign_Smile+0x328>)
8001290: 2200 movs r2, #0
8001292: 72da strb r2, [r3, #11]
LEDData[4][0] = 0x00;
8001294: 4bb6 ldr r3, [pc, #728] ; (8001570 <LEDDesign_Smile+0x328>)
8001296: 2200 movs r2, #0
8001298: 731a strb r2, [r3, #12]
LEDData[4][1] = 0x00;
800129a: 4bb5 ldr r3, [pc, #724] ; (8001570 <LEDDesign_Smile+0x328>)
800129c: 2200 movs r2, #0
800129e: 735a strb r2, [r3, #13]
LEDData[4][2] = 0x7F;
80012a0: 4bb3 ldr r3, [pc, #716] ; (8001570 <LEDDesign_Smile+0x328>)
80012a2: 227f movs r2, #127 ; 0x7f
80012a4: 739a strb r2, [r3, #14]
LEDData[5][0] = 0x00;
80012a6: 4bb2 ldr r3, [pc, #712] ; (8001570 <LEDDesign_Smile+0x328>)
80012a8: 2200 movs r2, #0
80012aa: 73da strb r2, [r3, #15]
LEDData[5][1] = 0x00;
80012ac: 4bb0 ldr r3, [pc, #704] ; (8001570 <LEDDesign_Smile+0x328>)
80012ae: 2200 movs r2, #0
80012b0: 741a strb r2, [r3, #16]
LEDData[5][2] = 0x00;
80012b2: 4baf ldr r3, [pc, #700] ; (8001570 <LEDDesign_Smile+0x328>)
80012b4: 2200 movs r2, #0
80012b6: 745a strb r2, [r3, #17]
LEDData[6][0] = 0x00;
80012b8: 4bad ldr r3, [pc, #692] ; (8001570 <LEDDesign_Smile+0x328>)
80012ba: 2200 movs r2, #0
80012bc: 749a strb r2, [r3, #18]
LEDData[6][1] = 0x00;
80012be: 4bac ldr r3, [pc, #688] ; (8001570 <LEDDesign_Smile+0x328>)
80012c0: 2200 movs r2, #0
80012c2: 74da strb r2, [r3, #19]
LEDData[6][2] = 0x00;
80012c4: 4baa ldr r3, [pc, #680] ; (8001570 <LEDDesign_Smile+0x328>)
80012c6: 2200 movs r2, #0
80012c8: 751a strb r2, [r3, #20]
LEDData[7][0] = 0x00;
80012ca: 4ba9 ldr r3, [pc, #676] ; (8001570 <LEDDesign_Smile+0x328>)
80012cc: 2200 movs r2, #0
80012ce: 755a strb r2, [r3, #21]
LEDData[7][1] = 0x00;
80012d0: 4ba7 ldr r3, [pc, #668] ; (8001570 <LEDDesign_Smile+0x328>)
80012d2: 2200 movs r2, #0
80012d4: 759a strb r2, [r3, #22]
LEDData[7][2] = 0x00;
80012d6: 4ba6 ldr r3, [pc, #664] ; (8001570 <LEDDesign_Smile+0x328>)
80012d8: 2200 movs r2, #0
80012da: 75da strb r2, [r3, #23]
LEDData[8][0] = 0x00;
80012dc: 4ba4 ldr r3, [pc, #656] ; (8001570 <LEDDesign_Smile+0x328>)
80012de: 2200 movs r2, #0
80012e0: 761a strb r2, [r3, #24]
LEDData[8][1] = 0x00;
80012e2: 4ba3 ldr r3, [pc, #652] ; (8001570 <LEDDesign_Smile+0x328>)
80012e4: 2200 movs r2, #0
80012e6: 765a strb r2, [r3, #25]
LEDData[8][2] = 0x00;
80012e8: 4ba1 ldr r3, [pc, #644] ; (8001570 <LEDDesign_Smile+0x328>)
80012ea: 2200 movs r2, #0
80012ec: 769a strb r2, [r3, #26]
LEDData[9][0] = 0x00;
80012ee: 4ba0 ldr r3, [pc, #640] ; (8001570 <LEDDesign_Smile+0x328>)
80012f0: 2200 movs r2, #0
80012f2: 76da strb r2, [r3, #27]
LEDData[9][1] = 0x00;
80012f4: 4b9e ldr r3, [pc, #632] ; (8001570 <LEDDesign_Smile+0x328>)
80012f6: 2200 movs r2, #0
80012f8: 771a strb r2, [r3, #28]
LEDData[9][2] = 0x00;
80012fa: 4b9d ldr r3, [pc, #628] ; (8001570 <LEDDesign_Smile+0x328>)
80012fc: 2200 movs r2, #0
80012fe: 775a strb r2, [r3, #29]
LEDData[10][0] = 0x00;
8001300: 4b9b ldr r3, [pc, #620] ; (8001570 <LEDDesign_Smile+0x328>)
8001302: 2200 movs r2, #0
8001304: 779a strb r2, [r3, #30]
LEDData[10][1] = 0x00;
8001306: 4b9a ldr r3, [pc, #616] ; (8001570 <LEDDesign_Smile+0x328>)
8001308: 2200 movs r2, #0
800130a: 77da strb r2, [r3, #31]
LEDData[10][2] = 0x7F;
800130c: 4b98 ldr r3, [pc, #608] ; (8001570 <LEDDesign_Smile+0x328>)
800130e: 227f movs r2, #127 ; 0x7f
8001310: f883 2020 strb.w r2, [r3, #32]
LEDData[11][0] = 0x00;
8001314: 4b96 ldr r3, [pc, #600] ; (8001570 <LEDDesign_Smile+0x328>)
8001316: 2200 movs r2, #0
8001318: f883 2021 strb.w r2, [r3, #33] ; 0x21
LEDData[11][1] = 0x00;
800131c: 4b94 ldr r3, [pc, #592] ; (8001570 <LEDDesign_Smile+0x328>)
800131e: 2200 movs r2, #0
8001320: f883 2022 strb.w r2, [r3, #34] ; 0x22
LEDData[11][2] = 0x00;
8001324: 4b92 ldr r3, [pc, #584] ; (8001570 <LEDDesign_Smile+0x328>)
8001326: 2200 movs r2, #0
8001328: f883 2023 strb.w r2, [r3, #35] ; 0x23
LEDData[12][0] = 0x00;
800132c: 4b90 ldr r3, [pc, #576] ; (8001570 <LEDDesign_Smile+0x328>)
800132e: 2200 movs r2, #0
8001330: f883 2024 strb.w r2, [r3, #36] ; 0x24
LEDData[12][1] = 0x00;
8001334: 4b8e ldr r3, [pc, #568] ; (8001570 <LEDDesign_Smile+0x328>)
8001336: 2200 movs r2, #0
8001338: f883 2025 strb.w r2, [r3, #37] ; 0x25
LEDData[12][2] = 0x00;
800133c: 4b8c ldr r3, [pc, #560] ; (8001570 <LEDDesign_Smile+0x328>)
800133e: 2200 movs r2, #0
8001340: f883 2026 strb.w r2, [r3, #38] ; 0x26
LEDData[13][0] = 0x00;
8001344: 4b8a ldr r3, [pc, #552] ; (8001570 <LEDDesign_Smile+0x328>)
8001346: 2200 movs r2, #0
8001348: f883 2027 strb.w r2, [r3, #39] ; 0x27
LEDData[13][1] = 0x00;
800134c: 4b88 ldr r3, [pc, #544] ; (8001570 <LEDDesign_Smile+0x328>)
800134e: 2200 movs r2, #0
8001350: f883 2028 strb.w r2, [r3, #40] ; 0x28
LEDData[13][2] = 0x00;
8001354: 4b86 ldr r3, [pc, #536] ; (8001570 <LEDDesign_Smile+0x328>)
8001356: 2200 movs r2, #0
8001358: f883 2029 strb.w r2, [r3, #41] ; 0x29
LEDData[14][0] = 0x00;
800135c: 4b84 ldr r3, [pc, #528] ; (8001570 <LEDDesign_Smile+0x328>)
800135e: 2200 movs r2, #0
8001360: f883 202a strb.w r2, [r3, #42] ; 0x2a
LEDData[14][1] = 0x00;
8001364: 4b82 ldr r3, [pc, #520] ; (8001570 <LEDDesign_Smile+0x328>)
8001366: 2200 movs r2, #0
8001368: f883 202b strb.w r2, [r3, #43] ; 0x2b
LEDData[14][2] = 0x00;
800136c: 4b80 ldr r3, [pc, #512] ; (8001570 <LEDDesign_Smile+0x328>)
800136e: 2200 movs r2, #0
8001370: f883 202c strb.w r2, [r3, #44] ; 0x2c
LEDData[15][0] = 0x00;
8001374: 4b7e ldr r3, [pc, #504] ; (8001570 <LEDDesign_Smile+0x328>)
8001376: 2200 movs r2, #0
8001378: f883 202d strb.w r2, [r3, #45] ; 0x2d
LEDData[15][1] = 0x00;
800137c: 4b7c ldr r3, [pc, #496] ; (8001570 <LEDDesign_Smile+0x328>)
800137e: 2200 movs r2, #0
8001380: f883 202e strb.w r2, [r3, #46] ; 0x2e
LEDData[15][2] = 0x00;
8001384: 4b7a ldr r3, [pc, #488] ; (8001570 <LEDDesign_Smile+0x328>)
8001386: 2200 movs r2, #0
8001388: f883 202f strb.w r2, [r3, #47] ; 0x2f
LEDData[16][0] = 0x00;
800138c: 4b78 ldr r3, [pc, #480] ; (8001570 <LEDDesign_Smile+0x328>)
800138e: 2200 movs r2, #0
8001390: f883 2030 strb.w r2, [r3, #48] ; 0x30
LEDData[16][1] = 0x00;
8001394: 4b76 ldr r3, [pc, #472] ; (8001570 <LEDDesign_Smile+0x328>)
8001396: 2200 movs r2, #0
8001398: f883 2031 strb.w r2, [r3, #49] ; 0x31
LEDData[16][2] = 0x00;
800139c: 4b74 ldr r3, [pc, #464] ; (8001570 <LEDDesign_Smile+0x328>)
800139e: 2200 movs r2, #0
80013a0: f883 2032 strb.w r2, [r3, #50] ; 0x32
LEDData[17][0] = 0x00;
80013a4: 4b72 ldr r3, [pc, #456] ; (8001570 <LEDDesign_Smile+0x328>)
80013a6: 2200 movs r2, #0
80013a8: f883 2033 strb.w r2, [r3, #51] ; 0x33
LEDData[17][1] = 0x00;
80013ac: 4b70 ldr r3, [pc, #448] ; (8001570 <LEDDesign_Smile+0x328>)
80013ae: 2200 movs r2, #0
80013b0: f883 2034 strb.w r2, [r3, #52] ; 0x34
LEDData[17][2] = 0x00;
80013b4: 4b6e ldr r3, [pc, #440] ; (8001570 <LEDDesign_Smile+0x328>)
80013b6: 2200 movs r2, #0
80013b8: f883 2035 strb.w r2, [r3, #53] ; 0x35
LEDData[18][0] = 0x00;
80013bc: 4b6c ldr r3, [pc, #432] ; (8001570 <LEDDesign_Smile+0x328>)
80013be: 2200 movs r2, #0
80013c0: f883 2036 strb.w r2, [r3, #54] ; 0x36
LEDData[18][1] = 0x00;
80013c4: 4b6a ldr r3, [pc, #424] ; (8001570 <LEDDesign_Smile+0x328>)
80013c6: 2200 movs r2, #0
80013c8: f883 2037 strb.w r2, [r3, #55] ; 0x37
LEDData[18][2] = 0x00;
80013cc: 4b68 ldr r3, [pc, #416] ; (8001570 <LEDDesign_Smile+0x328>)
80013ce: 2200 movs r2, #0
80013d0: f883 2038 strb.w r2, [r3, #56] ; 0x38
LEDData[19][0] = 0x00;
80013d4: 4b66 ldr r3, [pc, #408] ; (8001570 <LEDDesign_Smile+0x328>)
80013d6: 2200 movs r2, #0
80013d8: f883 2039 strb.w r2, [r3, #57] ; 0x39
LEDData[19][1] = 0x00;
80013dc: 4b64 ldr r3, [pc, #400] ; (8001570 <LEDDesign_Smile+0x328>)
80013de: 2200 movs r2, #0
80013e0: f883 203a strb.w r2, [r3, #58] ; 0x3a
LEDData[19][2] = 0x00;
80013e4: 4b62 ldr r3, [pc, #392] ; (8001570 <LEDDesign_Smile+0x328>)
80013e6: 2200 movs r2, #0
80013e8: f883 203b strb.w r2, [r3, #59] ; 0x3b
LEDData[20][0] = 0x00;
80013ec: 4b60 ldr r3, [pc, #384] ; (8001570 <LEDDesign_Smile+0x328>)
80013ee: 2200 movs r2, #0
80013f0: f883 203c strb.w r2, [r3, #60] ; 0x3c
LEDData[20][1] = 0x00;
80013f4: 4b5e ldr r3, [pc, #376] ; (8001570 <LEDDesign_Smile+0x328>)
80013f6: 2200 movs r2, #0
80013f8: f883 203d strb.w r2, [r3, #61] ; 0x3d
LEDData[20][2] = 0x00;
80013fc: 4b5c ldr r3, [pc, #368] ; (8001570 <LEDDesign_Smile+0x328>)
80013fe: 2200 movs r2, #0
8001400: f883 203e strb.w r2, [r3, #62] ; 0x3e
LEDData[21][0] = 0x00;
8001404: 4b5a ldr r3, [pc, #360] ; (8001570 <LEDDesign_Smile+0x328>)
8001406: 2200 movs r2, #0
8001408: f883 203f strb.w r2, [r3, #63] ; 0x3f
LEDData[21][1] = 0x00;
800140c: 4b58 ldr r3, [pc, #352] ; (8001570 <LEDDesign_Smile+0x328>)
800140e: 2200 movs r2, #0
8001410: f883 2040 strb.w r2, [r3, #64] ; 0x40
LEDData[21][2] = 0x7F;
8001414: 4b56 ldr r3, [pc, #344] ; (8001570 <LEDDesign_Smile+0x328>)
8001416: 227f movs r2, #127 ; 0x7f
8001418: f883 2041 strb.w r2, [r3, #65] ; 0x41
LEDData[22][0] = 0x00;
800141c: 4b54 ldr r3, [pc, #336] ; (8001570 <LEDDesign_Smile+0x328>)
800141e: 2200 movs r2, #0
8001420: f883 2042 strb.w r2, [r3, #66] ; 0x42
LEDData[22][1] = 0x00;
8001424: 4b52 ldr r3, [pc, #328] ; (8001570 <LEDDesign_Smile+0x328>)
8001426: 2200 movs r2, #0
8001428: f883 2043 strb.w r2, [r3, #67] ; 0x43
LEDData[22][2] = 0x00;
800142c: 4b50 ldr r3, [pc, #320] ; (8001570 <LEDDesign_Smile+0x328>)
800142e: 2200 movs r2, #0
8001430: f883 2044 strb.w r2, [r3, #68] ; 0x44
LEDData[23][0] = 0x00;
8001434: 4b4e ldr r3, [pc, #312] ; (8001570 <LEDDesign_Smile+0x328>)
8001436: 2200 movs r2, #0
8001438: f883 2045 strb.w r2, [r3, #69] ; 0x45
LEDData[23][1] = 0x00;
800143c: 4b4c ldr r3, [pc, #304] ; (8001570 <LEDDesign_Smile+0x328>)
800143e: 2200 movs r2, #0
8001440: f883 2046 strb.w r2, [r3, #70] ; 0x46
LEDData[23][2] = 0x00;
8001444: 4b4a ldr r3, [pc, #296] ; (8001570 <LEDDesign_Smile+0x328>)
8001446: 2200 movs r2, #0
8001448: f883 2047 strb.w r2, [r3, #71] ; 0x47
LEDData[24][0] = 0x00;
800144c: 4b48 ldr r3, [pc, #288] ; (8001570 <LEDDesign_Smile+0x328>)
800144e: 2200 movs r2, #0
8001450: f883 2048 strb.w r2, [r3, #72] ; 0x48
LEDData[24][1] = 0x00;
8001454: 4b46 ldr r3, [pc, #280] ; (8001570 <LEDDesign_Smile+0x328>)
8001456: 2200 movs r2, #0
8001458: f883 2049 strb.w r2, [r3, #73] ; 0x49
LEDData[24][2] = 0x00;
800145c: 4b44 ldr r3, [pc, #272] ; (8001570 <LEDDesign_Smile+0x328>)
800145e: 2200 movs r2, #0
8001460: f883 204a strb.w r2, [r3, #74] ; 0x4a
LEDData[25][0] = 0x00;
8001464: 4b42 ldr r3, [pc, #264] ; (8001570 <LEDDesign_Smile+0x328>)
8001466: 2200 movs r2, #0
8001468: f883 204b strb.w r2, [r3, #75] ; 0x4b
LEDData[25][1] = 0x00;
800146c: 4b40 ldr r3, [pc, #256] ; (8001570 <LEDDesign_Smile+0x328>)
800146e: 2200 movs r2, #0
8001470: f883 204c strb.w r2, [r3, #76] ; 0x4c
LEDData[25][2] = 0x00;
8001474: 4b3e ldr r3, [pc, #248] ; (8001570 <LEDDesign_Smile+0x328>)
8001476: 2200 movs r2, #0
8001478: f883 204d strb.w r2, [r3, #77] ; 0x4d
LEDData[26][0] = 0x00;
800147c: 4b3c ldr r3, [pc, #240] ; (8001570 <LEDDesign_Smile+0x328>)
800147e: 2200 movs r2, #0
8001480: f883 204e strb.w r2, [r3, #78] ; 0x4e
LEDData[26][1] = 0x00;
8001484: 4b3a ldr r3, [pc, #232] ; (8001570 <LEDDesign_Smile+0x328>)
8001486: 2200 movs r2, #0
8001488: f883 204f strb.w r2, [r3, #79] ; 0x4f
LEDData[26][2] = 0x7F;
800148c: 4b38 ldr r3, [pc, #224] ; (8001570 <LEDDesign_Smile+0x328>)
800148e: 227f movs r2, #127 ; 0x7f
8001490: f883 2050 strb.w r2, [r3, #80] ; 0x50
LEDData[27][0] = 0x00;
8001494: 4b36 ldr r3, [pc, #216] ; (8001570 <LEDDesign_Smile+0x328>)
8001496: 2200 movs r2, #0
8001498: f883 2051 strb.w r2, [r3, #81] ; 0x51
LEDData[27][1] = 0x00;
800149c: 4b34 ldr r3, [pc, #208] ; (8001570 <LEDDesign_Smile+0x328>)
800149e: 2200 movs r2, #0
80014a0: f883 2052 strb.w r2, [r3, #82] ; 0x52
LEDData[27][2] = 0x00;
80014a4: 4b32 ldr r3, [pc, #200] ; (8001570 <LEDDesign_Smile+0x328>)
80014a6: 2200 movs r2, #0
80014a8: f883 2053 strb.w r2, [r3, #83] ; 0x53
LEDData[28][0] = 0x00;
80014ac: 4b30 ldr r3, [pc, #192] ; (8001570 <LEDDesign_Smile+0x328>)
80014ae: 2200 movs r2, #0
80014b0: f883 2054 strb.w r2, [r3, #84] ; 0x54
LEDData[28][1] = 0x00;
80014b4: 4b2e ldr r3, [pc, #184] ; (8001570 <LEDDesign_Smile+0x328>)
80014b6: 2200 movs r2, #0
80014b8: f883 2055 strb.w r2, [r3, #85] ; 0x55
LEDData[28][2] = 0x00;
80014bc: 4b2c ldr r3, [pc, #176] ; (8001570 <LEDDesign_Smile+0x328>)
80014be: 2200 movs r2, #0
80014c0: f883 2056 strb.w r2, [r3, #86] ; 0x56
LEDData[29][0] = 0x00;
80014c4: 4b2a ldr r3, [pc, #168] ; (8001570 <LEDDesign_Smile+0x328>)
80014c6: 2200 movs r2, #0
80014c8: f883 2057 strb.w r2, [r3, #87] ; 0x57
LEDData[29][1] = 0x00;
80014cc: 4b28 ldr r3, [pc, #160] ; (8001570 <LEDDesign_Smile+0x328>)
80014ce: 2200 movs r2, #0
80014d0: f883 2058 strb.w r2, [r3, #88] ; 0x58
LEDData[29][2] = 0x00;
80014d4: 4b26 ldr r3, [pc, #152] ; (8001570 <LEDDesign_Smile+0x328>)
80014d6: 2200 movs r2, #0
80014d8: f883 2059 strb.w r2, [r3, #89] ; 0x59
LEDData[30][0] = 0x00;
80014dc: 4b24 ldr r3, [pc, #144] ; (8001570 <LEDDesign_Smile+0x328>)
80014de: 2200 movs r2, #0
80014e0: f883 205a strb.w r2, [r3, #90] ; 0x5a
LEDData[30][1] = 0x00;
80014e4: 4b22 ldr r3, [pc, #136] ; (8001570 <LEDDesign_Smile+0x328>)
80014e6: 2200 movs r2, #0
80014e8: f883 205b strb.w r2, [r3, #91] ; 0x5b
LEDData[30][2] = 0x00;
80014ec: 4b20 ldr r3, [pc, #128] ; (8001570 <LEDDesign_Smile+0x328>)
80014ee: 2200 movs r2, #0
80014f0: f883 205c strb.w r2, [r3, #92] ; 0x5c
LEDData[31][0] = 0x00;
80014f4: 4b1e ldr r3, [pc, #120] ; (8001570 <LEDDesign_Smile+0x328>)
80014f6: 2200 movs r2, #0
80014f8: f883 205d strb.w r2, [r3, #93] ; 0x5d
LEDData[31][1] = 0x00;
80014fc: 4b1c ldr r3, [pc, #112] ; (8001570 <LEDDesign_Smile+0x328>)
80014fe: 2200 movs r2, #0
8001500: f883 205e strb.w r2, [r3, #94] ; 0x5e
LEDData[31][2] = 0x00;
8001504: 4b1a ldr r3, [pc, #104] ; (8001570 <LEDDesign_Smile+0x328>)
8001506: 2200 movs r2, #0
8001508: f883 205f strb.w r2, [r3, #95] ; 0x5f
LEDData[32][0] = 0x00;
800150c: 4b18 ldr r3, [pc, #96] ; (8001570 <LEDDesign_Smile+0x328>)
800150e: 2200 movs r2, #0
8001510: f883 2060 strb.w r2, [r3, #96] ; 0x60
LEDData[32][1] = 0x00;
8001514: 4b16 ldr r3, [pc, #88] ; (8001570 <LEDDesign_Smile+0x328>)
8001516: 2200 movs r2, #0
8001518: f883 2061 strb.w r2, [r3, #97] ; 0x61
LEDData[32][2] = 0x00;
800151c: 4b14 ldr r3, [pc, #80] ; (8001570 <LEDDesign_Smile+0x328>)
800151e: 2200 movs r2, #0
8001520: f883 2062 strb.w r2, [r3, #98] ; 0x62
LEDData[33][0] = 0x00;
8001524: 4b12 ldr r3, [pc, #72] ; (8001570 <LEDDesign_Smile+0x328>)
8001526: 2200 movs r2, #0
8001528: f883 2063 strb.w r2, [r3, #99] ; 0x63
LEDData[33][1] = 0x00;
800152c: 4b10 ldr r3, [pc, #64] ; (8001570 <LEDDesign_Smile+0x328>)
800152e: 2200 movs r2, #0
8001530: f883 2064 strb.w r2, [r3, #100] ; 0x64
LEDData[33][2] = 0x00;
8001534: 4b0e ldr r3, [pc, #56] ; (8001570 <LEDDesign_Smile+0x328>)
8001536: 2200 movs r2, #0
8001538: f883 2065 strb.w r2, [r3, #101] ; 0x65
LEDData[34][0] = 0x00;
800153c: 4b0c ldr r3, [pc, #48] ; (8001570 <LEDDesign_Smile+0x328>)
800153e: 2200 movs r2, #0
8001540: f883 2066 strb.w r2, [r3, #102] ; 0x66
LEDData[34][1] = 0x00;
8001544: 4b0a ldr r3, [pc, #40] ; (8001570 <LEDDesign_Smile+0x328>)
8001546: 2200 movs r2, #0
8001548: f883 2067 strb.w r2, [r3, #103] ; 0x67
LEDData[34][2] = 0x00;
800154c: 4b08 ldr r3, [pc, #32] ; (8001570 <LEDDesign_Smile+0x328>)
800154e: 2200 movs r2, #0
8001550: f883 2068 strb.w r2, [r3, #104] ; 0x68
LEDData[35][0] = 0x00;
8001554: 4b06 ldr r3, [pc, #24] ; (8001570 <LEDDesign_Smile+0x328>)
8001556: 2200 movs r2, #0
8001558: f883 2069 strb.w r2, [r3, #105] ; 0x69
LEDData[35][1] = 0x00;
800155c: 4b04 ldr r3, [pc, #16] ; (8001570 <LEDDesign_Smile+0x328>)
800155e: 2200 movs r2, #0
8001560: f883 206a strb.w r2, [r3, #106] ; 0x6a
LEDData[35][2] = 0x00;
8001564: 4b02 ldr r3, [pc, #8] ; (8001570 <LEDDesign_Smile+0x328>)
8001566: 2200 movs r2, #0
8001568: f883 206b strb.w r2, [r3, #107] ; 0x6b
800156c: e002 b.n 8001574 <LEDDesign_Smile+0x32c>
800156e: bf00 nop
8001570: 20000090 .word 0x20000090
LEDData[36][0] = 0x00;
8001574: 4baa ldr r3, [pc, #680] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001576: 2200 movs r2, #0
8001578: f883 206c strb.w r2, [r3, #108] ; 0x6c
LEDData[36][1] = 0x00;
800157c: 4ba8 ldr r3, [pc, #672] ; (8001820 <LEDDesign_Smile+0x5d8>)
800157e: 2200 movs r2, #0
8001580: f883 206d strb.w r2, [r3, #109] ; 0x6d
LEDData[36][2] = 0x00;
8001584: 4ba6 ldr r3, [pc, #664] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001586: 2200 movs r2, #0
8001588: f883 206e strb.w r2, [r3, #110] ; 0x6e
LEDData[37][0] = 0x00;
800158c: 4ba4 ldr r3, [pc, #656] ; (8001820 <LEDDesign_Smile+0x5d8>)
800158e: 2200 movs r2, #0
8001590: f883 206f strb.w r2, [r3, #111] ; 0x6f
LEDData[37][1] = 0x00;
8001594: 4ba2 ldr r3, [pc, #648] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001596: 2200 movs r2, #0
8001598: f883 2070 strb.w r2, [r3, #112] ; 0x70
LEDData[37][2] = 0x7F;
800159c: 4ba0 ldr r3, [pc, #640] ; (8001820 <LEDDesign_Smile+0x5d8>)
800159e: 227f movs r2, #127 ; 0x7f
80015a0: f883 2071 strb.w r2, [r3, #113] ; 0x71
LEDData[38][0] = 0x00;
80015a4: 4b9e ldr r3, [pc, #632] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015a6: 2200 movs r2, #0
80015a8: f883 2072 strb.w r2, [r3, #114] ; 0x72
LEDData[38][1] = 0x00;
80015ac: 4b9c ldr r3, [pc, #624] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015ae: 2200 movs r2, #0
80015b0: f883 2073 strb.w r2, [r3, #115] ; 0x73
LEDData[38][2] = 0x00;
80015b4: 4b9a ldr r3, [pc, #616] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015b6: 2200 movs r2, #0
80015b8: f883 2074 strb.w r2, [r3, #116] ; 0x74
LEDData[39][0] = 0x00;
80015bc: 4b98 ldr r3, [pc, #608] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015be: 2200 movs r2, #0
80015c0: f883 2075 strb.w r2, [r3, #117] ; 0x75
LEDData[39][1] = 0x00;
80015c4: 4b96 ldr r3, [pc, #600] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015c6: 2200 movs r2, #0
80015c8: f883 2076 strb.w r2, [r3, #118] ; 0x76
LEDData[39][2] = 0x00;
80015cc: 4b94 ldr r3, [pc, #592] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015ce: 2200 movs r2, #0
80015d0: f883 2077 strb.w r2, [r3, #119] ; 0x77
LEDData[40][0] = 0x00;
80015d4: 4b92 ldr r3, [pc, #584] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015d6: 2200 movs r2, #0
80015d8: f883 2078 strb.w r2, [r3, #120] ; 0x78
LEDData[40][1] = 0x00;
80015dc: 4b90 ldr r3, [pc, #576] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015de: 2200 movs r2, #0
80015e0: f883 2079 strb.w r2, [r3, #121] ; 0x79
LEDData[40][2] = 0x00;
80015e4: 4b8e ldr r3, [pc, #568] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015e6: 2200 movs r2, #0
80015e8: f883 207a strb.w r2, [r3, #122] ; 0x7a
LEDData[41][0] = 0x00;
80015ec: 4b8c ldr r3, [pc, #560] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015ee: 2200 movs r2, #0
80015f0: f883 207b strb.w r2, [r3, #123] ; 0x7b
LEDData[41][1] = 0x00;
80015f4: 4b8a ldr r3, [pc, #552] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015f6: 2200 movs r2, #0
80015f8: f883 207c strb.w r2, [r3, #124] ; 0x7c
LEDData[41][2] = 0x00;
80015fc: 4b88 ldr r3, [pc, #544] ; (8001820 <LEDDesign_Smile+0x5d8>)
80015fe: 2200 movs r2, #0
8001600: f883 207d strb.w r2, [r3, #125] ; 0x7d
LEDData[42][0] = 0x00;
8001604: 4b86 ldr r3, [pc, #536] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001606: 2200 movs r2, #0
8001608: f883 207e strb.w r2, [r3, #126] ; 0x7e
LEDData[42][1] = 0x00;
800160c: 4b84 ldr r3, [pc, #528] ; (8001820 <LEDDesign_Smile+0x5d8>)
800160e: 2200 movs r2, #0
8001610: f883 207f strb.w r2, [r3, #127] ; 0x7f
LEDData[42][2] = 0x7F;
8001614: 4b82 ldr r3, [pc, #520] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001616: 227f movs r2, #127 ; 0x7f
8001618: f883 2080 strb.w r2, [r3, #128] ; 0x80
LEDData[43][0] = 0x00;
800161c: 4b80 ldr r3, [pc, #512] ; (8001820 <LEDDesign_Smile+0x5d8>)
800161e: 2200 movs r2, #0
8001620: f883 2081 strb.w r2, [r3, #129] ; 0x81
LEDData[43][1] = 0x00;
8001624: 4b7e ldr r3, [pc, #504] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001626: 2200 movs r2, #0
8001628: f883 2082 strb.w r2, [r3, #130] ; 0x82
LEDData[43][2] = 0x00;
800162c: 4b7c ldr r3, [pc, #496] ; (8001820 <LEDDesign_Smile+0x5d8>)
800162e: 2200 movs r2, #0
8001630: f883 2083 strb.w r2, [r3, #131] ; 0x83
LEDData[44][0] = 0x00;
8001634: 4b7a ldr r3, [pc, #488] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001636: 2200 movs r2, #0
8001638: f883 2084 strb.w r2, [r3, #132] ; 0x84
LEDData[44][1] = 0x00;
800163c: 4b78 ldr r3, [pc, #480] ; (8001820 <LEDDesign_Smile+0x5d8>)
800163e: 2200 movs r2, #0
8001640: f883 2085 strb.w r2, [r3, #133] ; 0x85
LEDData[44][2] = 0x00;
8001644: 4b76 ldr r3, [pc, #472] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001646: 2200 movs r2, #0
8001648: f883 2086 strb.w r2, [r3, #134] ; 0x86
LEDData[45][0] = 0x00;
800164c: 4b74 ldr r3, [pc, #464] ; (8001820 <LEDDesign_Smile+0x5d8>)
800164e: 2200 movs r2, #0
8001650: f883 2087 strb.w r2, [r3, #135] ; 0x87
LEDData[45][1] = 0x00;
8001654: 4b72 ldr r3, [pc, #456] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001656: 2200 movs r2, #0
8001658: f883 2088 strb.w r2, [r3, #136] ; 0x88
LEDData[45][2] = 0x00;
800165c: 4b70 ldr r3, [pc, #448] ; (8001820 <LEDDesign_Smile+0x5d8>)
800165e: 2200 movs r2, #0
8001660: f883 2089 strb.w r2, [r3, #137] ; 0x89
LEDData[46][0] = 0x00;
8001664: 4b6e ldr r3, [pc, #440] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001666: 2200 movs r2, #0
8001668: f883 208a strb.w r2, [r3, #138] ; 0x8a
LEDData[46][1] = 0x00;
800166c: 4b6c ldr r3, [pc, #432] ; (8001820 <LEDDesign_Smile+0x5d8>)
800166e: 2200 movs r2, #0
8001670: f883 208b strb.w r2, [r3, #139] ; 0x8b
LEDData[46][2] = 0x00;
8001674: 4b6a ldr r3, [pc, #424] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001676: 2200 movs r2, #0
8001678: f883 208c strb.w r2, [r3, #140] ; 0x8c
LEDData[47][0] = 0x00;
800167c: 4b68 ldr r3, [pc, #416] ; (8001820 <LEDDesign_Smile+0x5d8>)
800167e: 2200 movs r2, #0
8001680: f883 208d strb.w r2, [r3, #141] ; 0x8d
LEDData[47][1] = 0x00;
8001684: 4b66 ldr r3, [pc, #408] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001686: 2200 movs r2, #0
8001688: f883 208e strb.w r2, [r3, #142] ; 0x8e
LEDData[47][2] = 0x00;
800168c: 4b64 ldr r3, [pc, #400] ; (8001820 <LEDDesign_Smile+0x5d8>)
800168e: 2200 movs r2, #0
8001690: f883 208f strb.w r2, [r3, #143] ; 0x8f
LEDData[48][0] = 0x00;
8001694: 4b62 ldr r3, [pc, #392] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001696: 2200 movs r2, #0
8001698: f883 2090 strb.w r2, [r3, #144] ; 0x90
LEDData[48][1] = 0x00;
800169c: 4b60 ldr r3, [pc, #384] ; (8001820 <LEDDesign_Smile+0x5d8>)
800169e: 2200 movs r2, #0
80016a0: f883 2091 strb.w r2, [r3, #145] ; 0x91
LEDData[48][2] = 0x00;
80016a4: 4b5e ldr r3, [pc, #376] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016a6: 2200 movs r2, #0
80016a8: f883 2092 strb.w r2, [r3, #146] ; 0x92
LEDData[49][0] = 0x00;
80016ac: 4b5c ldr r3, [pc, #368] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016ae: 2200 movs r2, #0
80016b0: f883 2093 strb.w r2, [r3, #147] ; 0x93
LEDData[49][1] = 0x00;
80016b4: 4b5a ldr r3, [pc, #360] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016b6: 2200 movs r2, #0
80016b8: f883 2094 strb.w r2, [r3, #148] ; 0x94
LEDData[49][2] = 0x00;
80016bc: 4b58 ldr r3, [pc, #352] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016be: 2200 movs r2, #0
80016c0: f883 2095 strb.w r2, [r3, #149] ; 0x95
LEDData[50][0] = 0x00;
80016c4: 4b56 ldr r3, [pc, #344] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016c6: 2200 movs r2, #0
80016c8: f883 2096 strb.w r2, [r3, #150] ; 0x96
LEDData[50][1] = 0x00;
80016cc: 4b54 ldr r3, [pc, #336] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016ce: 2200 movs r2, #0
80016d0: f883 2097 strb.w r2, [r3, #151] ; 0x97
LEDData[50][2] = 0x00;
80016d4: 4b52 ldr r3, [pc, #328] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016d6: 2200 movs r2, #0
80016d8: f883 2098 strb.w r2, [r3, #152] ; 0x98
LEDData[51][0] = 0x00;
80016dc: 4b50 ldr r3, [pc, #320] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016de: 2200 movs r2, #0
80016e0: f883 2099 strb.w r2, [r3, #153] ; 0x99
LEDData[51][1] = 0x00;
80016e4: 4b4e ldr r3, [pc, #312] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016e6: 2200 movs r2, #0
80016e8: f883 209a strb.w r2, [r3, #154] ; 0x9a
LEDData[51][2] = 0x00;
80016ec: 4b4c ldr r3, [pc, #304] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016ee: 2200 movs r2, #0
80016f0: f883 209b strb.w r2, [r3, #155] ; 0x9b
LEDData[52][0] = 0x00;
80016f4: 4b4a ldr r3, [pc, #296] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016f6: 2200 movs r2, #0
80016f8: f883 209c strb.w r2, [r3, #156] ; 0x9c
LEDData[52][1] = 0x00;
80016fc: 4b48 ldr r3, [pc, #288] ; (8001820 <LEDDesign_Smile+0x5d8>)
80016fe: 2200 movs r2, #0
8001700: f883 209d strb.w r2, [r3, #157] ; 0x9d
LEDData[52][2] = 0x00;
8001704: 4b46 ldr r3, [pc, #280] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001706: 2200 movs r2, #0
8001708: f883 209e strb.w r2, [r3, #158] ; 0x9e
LEDData[53][0] = 0x00;
800170c: 4b44 ldr r3, [pc, #272] ; (8001820 <LEDDesign_Smile+0x5d8>)
800170e: 2200 movs r2, #0
8001710: f883 209f strb.w r2, [r3, #159] ; 0x9f
LEDData[53][1] = 0x00;
8001714: 4b42 ldr r3, [pc, #264] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001716: 2200 movs r2, #0
8001718: f883 20a0 strb.w r2, [r3, #160] ; 0xa0
LEDData[53][2] = 0x7F;
800171c: 4b40 ldr r3, [pc, #256] ; (8001820 <LEDDesign_Smile+0x5d8>)
800171e: 227f movs r2, #127 ; 0x7f
8001720: f883 20a1 strb.w r2, [r3, #161] ; 0xa1
LEDData[54][0] = 0x00;
8001724: 4b3e ldr r3, [pc, #248] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001726: 2200 movs r2, #0
8001728: f883 20a2 strb.w r2, [r3, #162] ; 0xa2
LEDData[54][1] = 0x00;
800172c: 4b3c ldr r3, [pc, #240] ; (8001820 <LEDDesign_Smile+0x5d8>)
800172e: 2200 movs r2, #0
8001730: f883 20a3 strb.w r2, [r3, #163] ; 0xa3
LEDData[54][2] = 0x00;
8001734: 4b3a ldr r3, [pc, #232] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001736: 2200 movs r2, #0
8001738: f883 20a4 strb.w r2, [r3, #164] ; 0xa4
LEDData[55][0] = 0x00;
800173c: 4b38 ldr r3, [pc, #224] ; (8001820 <LEDDesign_Smile+0x5d8>)
800173e: 2200 movs r2, #0
8001740: f883 20a5 strb.w r2, [r3, #165] ; 0xa5
LEDData[55][1] = 0x00;
8001744: 4b36 ldr r3, [pc, #216] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001746: 2200 movs r2, #0
8001748: f883 20a6 strb.w r2, [r3, #166] ; 0xa6
LEDData[55][2] = 0x00;
800174c: 4b34 ldr r3, [pc, #208] ; (8001820 <LEDDesign_Smile+0x5d8>)
800174e: 2200 movs r2, #0
8001750: f883 20a7 strb.w r2, [r3, #167] ; 0xa7
LEDData[56][0] = 0x00;
8001754: 4b32 ldr r3, [pc, #200] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001756: 2200 movs r2, #0
8001758: f883 20a8 strb.w r2, [r3, #168] ; 0xa8
LEDData[56][1] = 0x00;
800175c: 4b30 ldr r3, [pc, #192] ; (8001820 <LEDDesign_Smile+0x5d8>)
800175e: 2200 movs r2, #0
8001760: f883 20a9 strb.w r2, [r3, #169] ; 0xa9
LEDData[56][2] = 0x00;
8001764: 4b2e ldr r3, [pc, #184] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001766: 2200 movs r2, #0
8001768: f883 20aa strb.w r2, [r3, #170] ; 0xaa
LEDData[57][0] = 0x00;
800176c: 4b2c ldr r3, [pc, #176] ; (8001820 <LEDDesign_Smile+0x5d8>)
800176e: 2200 movs r2, #0
8001770: f883 20ab strb.w r2, [r3, #171] ; 0xab
LEDData[57][1] = 0x00;
8001774: 4b2a ldr r3, [pc, #168] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001776: 2200 movs r2, #0
8001778: f883 20ac strb.w r2, [r3, #172] ; 0xac
LEDData[57][2] = 0x00;
800177c: 4b28 ldr r3, [pc, #160] ; (8001820 <LEDDesign_Smile+0x5d8>)
800177e: 2200 movs r2, #0
8001780: f883 20ad strb.w r2, [r3, #173] ; 0xad
LEDData[58][0] = 0x00;
8001784: 4b26 ldr r3, [pc, #152] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001786: 2200 movs r2, #0
8001788: f883 20ae strb.w r2, [r3, #174] ; 0xae
LEDData[58][1] = 0x00;
800178c: 4b24 ldr r3, [pc, #144] ; (8001820 <LEDDesign_Smile+0x5d8>)
800178e: 2200 movs r2, #0
8001790: f883 20af strb.w r2, [r3, #175] ; 0xaf
LEDData[58][2] = 0x00;
8001794: 4b22 ldr r3, [pc, #136] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001796: 2200 movs r2, #0
8001798: f883 20b0 strb.w r2, [r3, #176] ; 0xb0
LEDData[59][0] = 0x00;
800179c: 4b20 ldr r3, [pc, #128] ; (8001820 <LEDDesign_Smile+0x5d8>)
800179e: 2200 movs r2, #0
80017a0: f883 20b1 strb.w r2, [r3, #177] ; 0xb1
LEDData[59][1] = 0x00;
80017a4: 4b1e ldr r3, [pc, #120] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017a6: 2200 movs r2, #0
80017a8: f883 20b2 strb.w r2, [r3, #178] ; 0xb2
LEDData[59][2] = 0x7F;
80017ac: 4b1c ldr r3, [pc, #112] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017ae: 227f movs r2, #127 ; 0x7f
80017b0: f883 20b3 strb.w r2, [r3, #179] ; 0xb3
LEDData[60][0] = 0x00;
80017b4: 4b1a ldr r3, [pc, #104] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017b6: 2200 movs r2, #0
80017b8: f883 20b4 strb.w r2, [r3, #180] ; 0xb4
LEDData[60][1] = 0x00;
80017bc: 4b18 ldr r3, [pc, #96] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017be: 2200 movs r2, #0
80017c0: f883 20b5 strb.w r2, [r3, #181] ; 0xb5
LEDData[60][2] = 0x00;
80017c4: 4b16 ldr r3, [pc, #88] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017c6: 2200 movs r2, #0
80017c8: f883 20b6 strb.w r2, [r3, #182] ; 0xb6
LEDData[61][0] = 0x00;
80017cc: 4b14 ldr r3, [pc, #80] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017ce: 2200 movs r2, #0
80017d0: f883 20b7 strb.w r2, [r3, #183] ; 0xb7
LEDData[61][1] = 0x00;
80017d4: 4b12 ldr r3, [pc, #72] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017d6: 2200 movs r2, #0
80017d8: f883 20b8 strb.w r2, [r3, #184] ; 0xb8
LEDData[61][2] = 0x00;
80017dc: 4b10 ldr r3, [pc, #64] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017de: 2200 movs r2, #0
80017e0: f883 20b9 strb.w r2, [r3, #185] ; 0xb9
LEDData[62][0] = 0x00;
80017e4: 4b0e ldr r3, [pc, #56] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017e6: 2200 movs r2, #0
80017e8: f883 20ba strb.w r2, [r3, #186] ; 0xba
LEDData[62][1] = 0x00;
80017ec: 4b0c ldr r3, [pc, #48] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017ee: 2200 movs r2, #0
80017f0: f883 20bb strb.w r2, [r3, #187] ; 0xbb
LEDData[62][2] = 0x00;
80017f4: 4b0a ldr r3, [pc, #40] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017f6: 2200 movs r2, #0
80017f8: f883 20bc strb.w r2, [r3, #188] ; 0xbc
LEDData[63][0] = 0x00;
80017fc: 4b08 ldr r3, [pc, #32] ; (8001820 <LEDDesign_Smile+0x5d8>)
80017fe: 2200 movs r2, #0
8001800: f883 20bd strb.w r2, [r3, #189] ; 0xbd
LEDData[63][1] = 0x00;
8001804: 4b06 ldr r3, [pc, #24] ; (8001820 <LEDDesign_Smile+0x5d8>)
8001806: 2200 movs r2, #0
8001808: f883 20be strb.w r2, [r3, #190] ; 0xbe
LEDData[63][2] = 0x00;
800180c: 4b04 ldr r3, [pc, #16] ; (8001820 <LEDDesign_Smile+0x5d8>)
800180e: 2200 movs r2, #0
8001810: f883 20bf strb.w r2, [r3, #191] ; 0xbf
}
8001814: bf00 nop
8001816: 46bd mov sp, r7
8001818: f85d 7b04 ldr.w r7, [sp], #4
800181c: 4770 bx lr
800181e: bf00 nop
8001820: 20000090 .word 0x20000090
08001824 <LEDDesign_SuperCrazy>:
void LEDDesign_SuperCrazy(void){
8001824: b580 push {r7, lr}
8001826: b084 sub sp, #16
8001828: af00 add r7, sp, #0
HAL_Delay(50);
800182a: 2032 movs r0, #50 ; 0x32
800182c: f000 fa82 bl 8001d34 <HAL_Delay>
uint8_t randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
8001830: f002 f880 bl 8003934 <rand>
8001834: ee07 0a90 vmov s15, r0
8001838: eeb8 7ae7 vcvt.f32.s32 s14, s15
800183c: eddf 6a37 vldr s13, [pc, #220] ; 800191c <LEDDesign_SuperCrazy+0xf8>
8001840: eec7 7a26 vdiv.f32 s15, s14, s13
8001844: ed9f 7a36 vldr s14, [pc, #216] ; 8001920 <LEDDesign_SuperCrazy+0xfc>
8001848: ee67 7a87 vmul.f32 s15, s15, s14
800184c: eefc 7ae7 vcvt.u32.f32 s15, s15
8001850: edc7 7a01 vstr s15, [r7, #4]
8001854: 793b ldrb r3, [r7, #4]
8001856: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
8001858: 2300 movs r3, #0
800185a: 73fb strb r3, [r7, #15]
800185c: e00a b.n 8001874 <LEDDesign_SuperCrazy+0x50>
LEDData[i][0] = randomByte;
800185e: 7bfa ldrb r2, [r7, #15]
8001860: 4930 ldr r1, [pc, #192] ; (8001924 <LEDDesign_SuperCrazy+0x100>)
8001862: 4613 mov r3, r2
8001864: 005b lsls r3, r3, #1
8001866: 4413 add r3, r2
8001868: 440b add r3, r1
800186a: 7b3a ldrb r2, [r7, #12]
800186c: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
800186e: 7bfb ldrb r3, [r7, #15]
8001870: 3301 adds r3, #1
8001872: 73fb strb r3, [r7, #15]
8001874: 7bfb ldrb r3, [r7, #15]
8001876: 2b3f cmp r3, #63 ; 0x3f
8001878: d9f1 bls.n 800185e <LEDDesign_SuperCrazy+0x3a>
}
randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
800187a: f002 f85b bl 8003934 <rand>
800187e: ee07 0a90 vmov s15, r0
8001882: eeb8 7ae7 vcvt.f32.s32 s14, s15
8001886: eddf 6a25 vldr s13, [pc, #148] ; 800191c <LEDDesign_SuperCrazy+0xf8>
800188a: eec7 7a26 vdiv.f32 s15, s14, s13
800188e: ed9f 7a24 vldr s14, [pc, #144] ; 8001920 <LEDDesign_SuperCrazy+0xfc>
8001892: ee67 7a87 vmul.f32 s15, s15, s14
8001896: eefc 7ae7 vcvt.u32.f32 s15, s15
800189a: edc7 7a01 vstr s15, [r7, #4]
800189e: 793b ldrb r3, [r7, #4]
80018a0: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
80018a2: 2300 movs r3, #0
80018a4: 73bb strb r3, [r7, #14]
80018a6: e00b b.n 80018c0 <LEDDesign_SuperCrazy+0x9c>
LEDData[i][1] = randomByte;
80018a8: 7bba ldrb r2, [r7, #14]
80018aa: 491e ldr r1, [pc, #120] ; (8001924 <LEDDesign_SuperCrazy+0x100>)
80018ac: 4613 mov r3, r2
80018ae: 005b lsls r3, r3, #1
80018b0: 4413 add r3, r2
80018b2: 440b add r3, r1
80018b4: 3301 adds r3, #1
80018b6: 7b3a ldrb r2, [r7, #12]
80018b8: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80018ba: 7bbb ldrb r3, [r7, #14]
80018bc: 3301 adds r3, #1
80018be: 73bb strb r3, [r7, #14]
80018c0: 7bbb ldrb r3, [r7, #14]
80018c2: 2b3f cmp r3, #63 ; 0x3f
80018c4: d9f0 bls.n 80018a8 <LEDDesign_SuperCrazy+0x84>
}
randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
80018c6: f002 f835 bl 8003934 <rand>
80018ca: ee07 0a90 vmov s15, r0
80018ce: eeb8 7ae7 vcvt.f32.s32 s14, s15
80018d2: eddf 6a12 vldr s13, [pc, #72] ; 800191c <LEDDesign_SuperCrazy+0xf8>
80018d6: eec7 7a26 vdiv.f32 s15, s14, s13
80018da: ed9f 7a11 vldr s14, [pc, #68] ; 8001920 <LEDDesign_SuperCrazy+0xfc>
80018de: ee67 7a87 vmul.f32 s15, s15, s14
80018e2: eefc 7ae7 vcvt.u32.f32 s15, s15
80018e6: edc7 7a01 vstr s15, [r7, #4]
80018ea: 793b ldrb r3, [r7, #4]
80018ec: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
80018ee: 2300 movs r3, #0
80018f0: 737b strb r3, [r7, #13]
80018f2: e00b b.n 800190c <LEDDesign_SuperCrazy+0xe8>
LEDData[i][2] = randomByte;
80018f4: 7b7a ldrb r2, [r7, #13]
80018f6: 490b ldr r1, [pc, #44] ; (8001924 <LEDDesign_SuperCrazy+0x100>)
80018f8: 4613 mov r3, r2
80018fa: 005b lsls r3, r3, #1
80018fc: 4413 add r3, r2
80018fe: 440b add r3, r1
8001900: 3302 adds r3, #2
8001902: 7b3a ldrb r2, [r7, #12]
8001904: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001906: 7b7b ldrb r3, [r7, #13]
8001908: 3301 adds r3, #1
800190a: 737b strb r3, [r7, #13]
800190c: 7b7b ldrb r3, [r7, #13]
800190e: 2b3f cmp r3, #63 ; 0x3f
8001910: d9f0 bls.n 80018f4 <LEDDesign_SuperCrazy+0xd0>
}
}
8001912: bf00 nop
8001914: 3710 adds r7, #16
8001916: 46bd mov sp, r7
8001918: bd80 pop {r7, pc}
800191a: bf00 nop
800191c: 4f000000 .word 0x4f000000
8001920: 437f0000 .word 0x437f0000
8001924: 20000090 .word 0x20000090
08001928 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8001928: b480 push {r7}
800192a: af00 add r7, sp, #0
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
800192c: bf00 nop
800192e: 46bd mov sp, r7
8001930: f85d 7b04 ldr.w r7, [sp], #4
8001934: 4770 bx lr
...
08001938 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8001938: b580 push {r7, lr}
800193a: b082 sub sp, #8
800193c: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
800193e: 2300 movs r3, #0
8001940: 607b str r3, [r7, #4]
8001942: 4b10 ldr r3, [pc, #64] ; (8001984 <HAL_MspInit+0x4c>)
8001944: 6c5b ldr r3, [r3, #68] ; 0x44
8001946: 4a0f ldr r2, [pc, #60] ; (8001984 <HAL_MspInit+0x4c>)
8001948: f443 4380 orr.w r3, r3, #16384 ; 0x4000
800194c: 6453 str r3, [r2, #68] ; 0x44
800194e: 4b0d ldr r3, [pc, #52] ; (8001984 <HAL_MspInit+0x4c>)
8001950: 6c5b ldr r3, [r3, #68] ; 0x44
8001952: f403 4380 and.w r3, r3, #16384 ; 0x4000
8001956: 607b str r3, [r7, #4]
8001958: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
800195a: 2300 movs r3, #0
800195c: 603b str r3, [r7, #0]
800195e: 4b09 ldr r3, [pc, #36] ; (8001984 <HAL_MspInit+0x4c>)
8001960: 6c1b ldr r3, [r3, #64] ; 0x40
8001962: 4a08 ldr r2, [pc, #32] ; (8001984 <HAL_MspInit+0x4c>)
8001964: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8001968: 6413 str r3, [r2, #64] ; 0x40
800196a: 4b06 ldr r3, [pc, #24] ; (8001984 <HAL_MspInit+0x4c>)
800196c: 6c1b ldr r3, [r3, #64] ; 0x40
800196e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8001972: 603b str r3, [r7, #0]
8001974: 683b ldr r3, [r7, #0]
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
8001976: 2007 movs r0, #7
8001978: f000 face bl 8001f18 <HAL_NVIC_SetPriorityGrouping>
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
800197c: bf00 nop
800197e: 3708 adds r7, #8
8001980: 46bd mov sp, r7
8001982: bd80 pop {r7, pc}
8001984: 40023800 .word 0x40023800
08001988 <HAL_SPI_MspInit>:
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
8001988: b580 push {r7, lr}
800198a: b08a sub sp, #40 ; 0x28
800198c: af00 add r7, sp, #0
800198e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001990: f107 0314 add.w r3, r7, #20
8001994: 2200 movs r2, #0
8001996: 601a str r2, [r3, #0]
8001998: 605a str r2, [r3, #4]
800199a: 609a str r2, [r3, #8]
800199c: 60da str r2, [r3, #12]
800199e: 611a str r2, [r3, #16]
if(hspi->Instance==SPI4)
80019a0: 687b ldr r3, [r7, #4]
80019a2: 681b ldr r3, [r3, #0]
80019a4: 4a1d ldr r2, [pc, #116] ; (8001a1c <HAL_SPI_MspInit+0x94>)
80019a6: 4293 cmp r3, r2
80019a8: d133 bne.n 8001a12 <HAL_SPI_MspInit+0x8a>
{
/* USER CODE BEGIN SPI4_MspInit 0 */
/* USER CODE END SPI4_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI4_CLK_ENABLE();
80019aa: 2300 movs r3, #0
80019ac: 613b str r3, [r7, #16]
80019ae: 4b1c ldr r3, [pc, #112] ; (8001a20 <HAL_SPI_MspInit+0x98>)
80019b0: 6c5b ldr r3, [r3, #68] ; 0x44
80019b2: 4a1b ldr r2, [pc, #108] ; (8001a20 <HAL_SPI_MspInit+0x98>)
80019b4: f443 5300 orr.w r3, r3, #8192 ; 0x2000
80019b8: 6453 str r3, [r2, #68] ; 0x44
80019ba: 4b19 ldr r3, [pc, #100] ; (8001a20 <HAL_SPI_MspInit+0x98>)
80019bc: 6c5b ldr r3, [r3, #68] ; 0x44
80019be: f403 5300 and.w r3, r3, #8192 ; 0x2000
80019c2: 613b str r3, [r7, #16]
80019c4: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOE_CLK_ENABLE();
80019c6: 2300 movs r3, #0
80019c8: 60fb str r3, [r7, #12]
80019ca: 4b15 ldr r3, [pc, #84] ; (8001a20 <HAL_SPI_MspInit+0x98>)
80019cc: 6b1b ldr r3, [r3, #48] ; 0x30
80019ce: 4a14 ldr r2, [pc, #80] ; (8001a20 <HAL_SPI_MspInit+0x98>)
80019d0: f043 0310 orr.w r3, r3, #16
80019d4: 6313 str r3, [r2, #48] ; 0x30
80019d6: 4b12 ldr r3, [pc, #72] ; (8001a20 <HAL_SPI_MspInit+0x98>)
80019d8: 6b1b ldr r3, [r3, #48] ; 0x30
80019da: f003 0310 and.w r3, r3, #16
80019de: 60fb str r3, [r7, #12]
80019e0: 68fb ldr r3, [r7, #12]
/**SPI4 GPIO Configuration
PE2 ------> SPI4_SCK
PE6 ------> SPI4_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_6;
80019e2: 2344 movs r3, #68 ; 0x44
80019e4: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80019e6: 2302 movs r3, #2
80019e8: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80019ea: 2300 movs r3, #0
80019ec: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80019ee: 2303 movs r3, #3
80019f0: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
80019f2: 2305 movs r3, #5
80019f4: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
80019f6: f107 0314 add.w r3, r7, #20
80019fa: 4619 mov r1, r3
80019fc: 4809 ldr r0, [pc, #36] ; (8001a24 <HAL_SPI_MspInit+0x9c>)
80019fe: f000 faef bl 8001fe0 <HAL_GPIO_Init>
/* SPI4 interrupt Init */
HAL_NVIC_SetPriority(SPI4_IRQn, 0, 0);
8001a02: 2200 movs r2, #0
8001a04: 2100 movs r1, #0
8001a06: 2054 movs r0, #84 ; 0x54
8001a08: f000 fa91 bl 8001f2e <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(SPI4_IRQn);
8001a0c: 2054 movs r0, #84 ; 0x54
8001a0e: f000 faaa bl 8001f66 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN SPI4_MspInit 1 */
/* USER CODE END SPI4_MspInit 1 */
}
}
8001a12: bf00 nop
8001a14: 3728 adds r7, #40 ; 0x28
8001a16: 46bd mov sp, r7
8001a18: bd80 pop {r7, pc}
8001a1a: bf00 nop
8001a1c: 40013400 .word 0x40013400
8001a20: 40023800 .word 0x40023800
8001a24: 40021000 .word 0x40021000
08001a28 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8001a28: b580 push {r7, lr}
8001a2a: b084 sub sp, #16
8001a2c: af00 add r7, sp, #0
8001a2e: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM6)
8001a30: 687b ldr r3, [r7, #4]
8001a32: 681b ldr r3, [r3, #0]
8001a34: 4a0e ldr r2, [pc, #56] ; (8001a70 <HAL_TIM_Base_MspInit+0x48>)
8001a36: 4293 cmp r3, r2
8001a38: d115 bne.n 8001a66 <HAL_TIM_Base_MspInit+0x3e>
{
/* USER CODE BEGIN TIM6_MspInit 0 */
/* USER CODE END TIM6_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM6_CLK_ENABLE();
8001a3a: 2300 movs r3, #0
8001a3c: 60fb str r3, [r7, #12]
8001a3e: 4b0d ldr r3, [pc, #52] ; (8001a74 <HAL_TIM_Base_MspInit+0x4c>)
8001a40: 6c1b ldr r3, [r3, #64] ; 0x40
8001a42: 4a0c ldr r2, [pc, #48] ; (8001a74 <HAL_TIM_Base_MspInit+0x4c>)
8001a44: f043 0310 orr.w r3, r3, #16
8001a48: 6413 str r3, [r2, #64] ; 0x40
8001a4a: 4b0a ldr r3, [pc, #40] ; (8001a74 <HAL_TIM_Base_MspInit+0x4c>)
8001a4c: 6c1b ldr r3, [r3, #64] ; 0x40
8001a4e: f003 0310 and.w r3, r3, #16
8001a52: 60fb str r3, [r7, #12]
8001a54: 68fb ldr r3, [r7, #12]
/* TIM6 interrupt Init */
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
8001a56: 2200 movs r2, #0
8001a58: 2100 movs r1, #0
8001a5a: 2036 movs r0, #54 ; 0x36
8001a5c: f000 fa67 bl 8001f2e <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
8001a60: 2036 movs r0, #54 ; 0x36
8001a62: f000 fa80 bl 8001f66 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN TIM6_MspInit 1 */
/* USER CODE END TIM6_MspInit 1 */
}
}
8001a66: bf00 nop
8001a68: 3710 adds r7, #16
8001a6a: 46bd mov sp, r7
8001a6c: bd80 pop {r7, pc}
8001a6e: bf00 nop
8001a70: 40001000 .word 0x40001000
8001a74: 40023800 .word 0x40023800
08001a78 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8001a78: b480 push {r7}
8001a7a: af00 add r7, sp, #0
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
8001a7c: bf00 nop
8001a7e: 46bd mov sp, r7
8001a80: f85d 7b04 ldr.w r7, [sp], #4
8001a84: 4770 bx lr
08001a86 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8001a86: b480 push {r7}
8001a88: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8001a8a: e7fe b.n 8001a8a <HardFault_Handler+0x4>
08001a8c <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8001a8c: b480 push {r7}
8001a8e: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8001a90: e7fe b.n 8001a90 <MemManage_Handler+0x4>
08001a92 <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8001a92: b480 push {r7}
8001a94: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8001a96: e7fe b.n 8001a96 <BusFault_Handler+0x4>
08001a98 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8001a98: b480 push {r7}
8001a9a: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8001a9c: e7fe b.n 8001a9c <UsageFault_Handler+0x4>
08001a9e <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8001a9e: b480 push {r7}
8001aa0: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8001aa2: bf00 nop
8001aa4: 46bd mov sp, r7
8001aa6: f85d 7b04 ldr.w r7, [sp], #4
8001aaa: 4770 bx lr
08001aac <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8001aac: b480 push {r7}
8001aae: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8001ab0: bf00 nop
8001ab2: 46bd mov sp, r7
8001ab4: f85d 7b04 ldr.w r7, [sp], #4
8001ab8: 4770 bx lr
08001aba <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8001aba: b480 push {r7}
8001abc: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8001abe: bf00 nop
8001ac0: 46bd mov sp, r7
8001ac2: f85d 7b04 ldr.w r7, [sp], #4
8001ac6: 4770 bx lr
08001ac8 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8001ac8: b580 push {r7, lr}
8001aca: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8001acc: f000 f912 bl 8001cf4 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8001ad0: bf00 nop
8001ad2: bd80 pop {r7, pc}
08001ad4 <EXTI0_IRQHandler>:
/**
* @brief This function handles EXTI line0 interrupt.
*/
void EXTI0_IRQHandler(void)
{
8001ad4: b580 push {r7, lr}
8001ad6: af00 add r7, sp, #0
/* USER CODE BEGIN EXTI0_IRQn 0 */
/* USER CODE END EXTI0_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
8001ad8: 2001 movs r0, #1
8001ada: f000 fc45 bl 8002368 <HAL_GPIO_EXTI_IRQHandler>
/* USER CODE BEGIN EXTI0_IRQn 1 */
HAL_TIM_Base_Start_IT(&htim6);
8001ade: 4804 ldr r0, [pc, #16] ; (8001af0 <EXTI0_IRQHandler+0x1c>)
8001ae0: f001 fc21 bl 8003326 <HAL_TIM_Base_Start_IT>
LEDDesign_PendingChange = true;
8001ae4: 4b03 ldr r3, [pc, #12] ; (8001af4 <EXTI0_IRQHandler+0x20>)
8001ae6: 2201 movs r2, #1
8001ae8: 701a strb r2, [r3, #0]
/* USER CODE END EXTI0_IRQn 1 */
}
8001aea: bf00 nop
8001aec: bd80 pop {r7, pc}
8001aee: bf00 nop
8001af0: 2000040c .word 0x2000040c
8001af4: 2000008d .word 0x2000008d
08001af8 <TIM6_DAC_IRQHandler>:
/**
* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
*/
void TIM6_DAC_IRQHandler(void)
{
8001af8: b580 push {r7, lr}
8001afa: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM6_DAC_IRQn 0 */
HAL_TIM_IRQHandler(&htim6);
8001afc: 480c ldr r0, [pc, #48] ; (8001b30 <TIM6_DAC_IRQHandler+0x38>)
8001afe: f001 fc7c bl 80033fa <HAL_TIM_IRQHandler>
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
LEDMode = (LEDMode + 1) % 7;
8001b02: 4b0c ldr r3, [pc, #48] ; (8001b34 <TIM6_DAC_IRQHandler+0x3c>)
8001b04: 781b ldrb r3, [r3, #0]
8001b06: 1c5a adds r2, r3, #1
8001b08: 4b0b ldr r3, [pc, #44] ; (8001b38 <TIM6_DAC_IRQHandler+0x40>)
8001b0a: fb83 1302 smull r1, r3, r3, r2
8001b0e: 4413 add r3, r2
8001b10: 1099 asrs r1, r3, #2
8001b12: 17d3 asrs r3, r2, #31
8001b14: 1ac9 subs r1, r1, r3
8001b16: 460b mov r3, r1
8001b18: 00db lsls r3, r3, #3
8001b1a: 1a5b subs r3, r3, r1
8001b1c: 1ad1 subs r1, r2, r3
8001b1e: b2ca uxtb r2, r1
8001b20: 4b04 ldr r3, [pc, #16] ; (8001b34 <TIM6_DAC_IRQHandler+0x3c>)
8001b22: 701a strb r2, [r3, #0]
LEDDesign_PendingChange = false;
8001b24: 4b05 ldr r3, [pc, #20] ; (8001b3c <TIM6_DAC_IRQHandler+0x44>)
8001b26: 2200 movs r2, #0
8001b28: 701a strb r2, [r3, #0]
/* USER CODE END TIM6_DAC_IRQn 1 */
}
8001b2a: bf00 nop
8001b2c: bd80 pop {r7, pc}
8001b2e: bf00 nop
8001b30: 2000040c .word 0x2000040c
8001b34: 2000008c .word 0x2000008c
8001b38: 92492493 .word 0x92492493
8001b3c: 2000008d .word 0x2000008d
08001b40 <SPI4_IRQHandler>:
/**
* @brief This function handles SPI4 global interrupt.
*/
void SPI4_IRQHandler(void)
{
8001b40: b580 push {r7, lr}
8001b42: af00 add r7, sp, #0
/* USER CODE BEGIN SPI4_IRQn 0 */
/* USER CODE END SPI4_IRQn 0 */
HAL_SPI_IRQHandler(&hspi4);
8001b44: 4805 ldr r0, [pc, #20] ; (8001b5c <SPI4_IRQHandler+0x1c>)
8001b46: f001 f947 bl 8002dd8 <HAL_SPI_IRQHandler>
/* USER CODE BEGIN SPI4_IRQn 1 */
HAL_SPI_Transmit_IT(&hspi4, (uint8_t *) &LEDData_WS2812B, (uint16_t) 66 * 3 * 3);
8001b4a: f240 2252 movw r2, #594 ; 0x252
8001b4e: 4904 ldr r1, [pc, #16] ; (8001b60 <SPI4_IRQHandler+0x20>)
8001b50: 4802 ldr r0, [pc, #8] ; (8001b5c <SPI4_IRQHandler+0x1c>)
8001b52: f001 f8bf bl 8002cd4 <HAL_SPI_Transmit_IT>
/* USER CODE END SPI4_IRQn 1 */
}
8001b56: bf00 nop
8001b58: bd80 pop {r7, pc}
8001b5a: bf00 nop
8001b5c: 200003b4 .word 0x200003b4
8001b60: 20000150 .word 0x20000150
08001b64 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8001b64: b580 push {r7, lr}
8001b66: b086 sub sp, #24
8001b68: af00 add r7, sp, #0
8001b6a: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8001b6c: 4a14 ldr r2, [pc, #80] ; (8001bc0 <_sbrk+0x5c>)
8001b6e: 4b15 ldr r3, [pc, #84] ; (8001bc4 <_sbrk+0x60>)
8001b70: 1ad3 subs r3, r2, r3
8001b72: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8001b74: 697b ldr r3, [r7, #20]
8001b76: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initalize heap end at first call */
if (NULL == __sbrk_heap_end)
8001b78: 4b13 ldr r3, [pc, #76] ; (8001bc8 <_sbrk+0x64>)
8001b7a: 681b ldr r3, [r3, #0]
8001b7c: 2b00 cmp r3, #0
8001b7e: d102 bne.n 8001b86 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8001b80: 4b11 ldr r3, [pc, #68] ; (8001bc8 <_sbrk+0x64>)
8001b82: 4a12 ldr r2, [pc, #72] ; (8001bcc <_sbrk+0x68>)
8001b84: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8001b86: 4b10 ldr r3, [pc, #64] ; (8001bc8 <_sbrk+0x64>)
8001b88: 681a ldr r2, [r3, #0]
8001b8a: 687b ldr r3, [r7, #4]
8001b8c: 4413 add r3, r2
8001b8e: 693a ldr r2, [r7, #16]
8001b90: 429a cmp r2, r3
8001b92: d207 bcs.n 8001ba4 <_sbrk+0x40>
{
errno = ENOMEM;
8001b94: f001 fe9c bl 80038d0 <__errno>
8001b98: 4602 mov r2, r0
8001b9a: 230c movs r3, #12
8001b9c: 6013 str r3, [r2, #0]
return (void *)-1;
8001b9e: f04f 33ff mov.w r3, #4294967295
8001ba2: e009 b.n 8001bb8 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8001ba4: 4b08 ldr r3, [pc, #32] ; (8001bc8 <_sbrk+0x64>)
8001ba6: 681b ldr r3, [r3, #0]
8001ba8: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8001baa: 4b07 ldr r3, [pc, #28] ; (8001bc8 <_sbrk+0x64>)
8001bac: 681a ldr r2, [r3, #0]
8001bae: 687b ldr r3, [r7, #4]
8001bb0: 4413 add r3, r2
8001bb2: 4a05 ldr r2, [pc, #20] ; (8001bc8 <_sbrk+0x64>)
8001bb4: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8001bb6: 68fb ldr r3, [r7, #12]
}
8001bb8: 4618 mov r0, r3
8001bba: 3718 adds r7, #24
8001bbc: 46bd mov sp, r7
8001bbe: bd80 pop {r7, pc}
8001bc0: 20030000 .word 0x20030000
8001bc4: 00000400 .word 0x00000400
8001bc8: 200003a8 .word 0x200003a8
8001bcc: 20000458 .word 0x20000458
08001bd0 <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
8001bd0: b480 push {r7}
8001bd2: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
8001bd4: 4b08 ldr r3, [pc, #32] ; (8001bf8 <SystemInit+0x28>)
8001bd6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
8001bda: 4a07 ldr r2, [pc, #28] ; (8001bf8 <SystemInit+0x28>)
8001bdc: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
8001be0: f8c2 3088 str.w r3, [r2, #136] ; 0x88
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
8001be4: 4b04 ldr r3, [pc, #16] ; (8001bf8 <SystemInit+0x28>)
8001be6: f04f 6200 mov.w r2, #134217728 ; 0x8000000
8001bea: 609a str r2, [r3, #8]
#endif
}
8001bec: bf00 nop
8001bee: 46bd mov sp, r7
8001bf0: f85d 7b04 ldr.w r7, [sp], #4
8001bf4: 4770 bx lr
8001bf6: bf00 nop
8001bf8: e000ed00 .word 0xe000ed00
08001bfc <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
8001bfc: f8df d034 ldr.w sp, [pc, #52] ; 8001c34 <LoopFillZerobss+0x14>
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
8001c00: 2100 movs r1, #0
b LoopCopyDataInit
8001c02: e003 b.n 8001c0c <LoopCopyDataInit>
08001c04 <CopyDataInit>:
CopyDataInit:
ldr r3, =_sidata
8001c04: 4b0c ldr r3, [pc, #48] ; (8001c38 <LoopFillZerobss+0x18>)
ldr r3, [r3, r1]
8001c06: 585b ldr r3, [r3, r1]
str r3, [r0, r1]
8001c08: 5043 str r3, [r0, r1]
adds r1, r1, #4
8001c0a: 3104 adds r1, #4
08001c0c <LoopCopyDataInit>:
LoopCopyDataInit:
ldr r0, =_sdata
8001c0c: 480b ldr r0, [pc, #44] ; (8001c3c <LoopFillZerobss+0x1c>)
ldr r3, =_edata
8001c0e: 4b0c ldr r3, [pc, #48] ; (8001c40 <LoopFillZerobss+0x20>)
adds r2, r0, r1
8001c10: 1842 adds r2, r0, r1
cmp r2, r3
8001c12: 429a cmp r2, r3
bcc CopyDataInit
8001c14: d3f6 bcc.n 8001c04 <CopyDataInit>
ldr r2, =_sbss
8001c16: 4a0b ldr r2, [pc, #44] ; (8001c44 <LoopFillZerobss+0x24>)
b LoopFillZerobss
8001c18: e002 b.n 8001c20 <LoopFillZerobss>
08001c1a <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
8001c1a: 2300 movs r3, #0
str r3, [r2], #4
8001c1c: f842 3b04 str.w r3, [r2], #4
08001c20 <LoopFillZerobss>:
LoopFillZerobss:
ldr r3, = _ebss
8001c20: 4b09 ldr r3, [pc, #36] ; (8001c48 <LoopFillZerobss+0x28>)
cmp r2, r3
8001c22: 429a cmp r2, r3
bcc FillZerobss
8001c24: d3f9 bcc.n 8001c1a <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8001c26: f7ff ffd3 bl 8001bd0 <SystemInit>
/* Call static constructors */
bl __libc_init_array
8001c2a: f001 fe57 bl 80038dc <__libc_init_array>
/* Call the application's entry point.*/
bl main
8001c2e: f7fe fc5d bl 80004ec <main>
bx lr
8001c32: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
8001c34: 20030000 .word 0x20030000
ldr r3, =_sidata
8001c38: 08003abc .word 0x08003abc
ldr r0, =_sdata
8001c3c: 20000000 .word 0x20000000
ldr r3, =_edata
8001c40: 20000070 .word 0x20000070
ldr r2, =_sbss
8001c44: 20000070 .word 0x20000070
ldr r3, = _ebss
8001c48: 20000454 .word 0x20000454
08001c4c <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8001c4c: e7fe b.n 8001c4c <ADC_IRQHandler>
...
08001c50 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8001c50: b580 push {r7, lr}
8001c52: af00 add r7, sp, #0
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
8001c54: 4b0e ldr r3, [pc, #56] ; (8001c90 <HAL_Init+0x40>)
8001c56: 681b ldr r3, [r3, #0]
8001c58: 4a0d ldr r2, [pc, #52] ; (8001c90 <HAL_Init+0x40>)
8001c5a: f443 7300 orr.w r3, r3, #512 ; 0x200
8001c5e: 6013 str r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
8001c60: 4b0b ldr r3, [pc, #44] ; (8001c90 <HAL_Init+0x40>)
8001c62: 681b ldr r3, [r3, #0]
8001c64: 4a0a ldr r2, [pc, #40] ; (8001c90 <HAL_Init+0x40>)
8001c66: f443 6380 orr.w r3, r3, #1024 ; 0x400
8001c6a: 6013 str r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8001c6c: 4b08 ldr r3, [pc, #32] ; (8001c90 <HAL_Init+0x40>)
8001c6e: 681b ldr r3, [r3, #0]
8001c70: 4a07 ldr r2, [pc, #28] ; (8001c90 <HAL_Init+0x40>)
8001c72: f443 7380 orr.w r3, r3, #256 ; 0x100
8001c76: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8001c78: 2003 movs r0, #3
8001c7a: f000 f94d bl 8001f18 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8001c7e: 2000 movs r0, #0
8001c80: f000 f808 bl 8001c94 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8001c84: f7ff fe58 bl 8001938 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8001c88: 2300 movs r3, #0
}
8001c8a: 4618 mov r0, r3
8001c8c: bd80 pop {r7, pc}
8001c8e: bf00 nop
8001c90: 40023c00 .word 0x40023c00
08001c94 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8001c94: b580 push {r7, lr}
8001c96: b082 sub sp, #8
8001c98: af00 add r7, sp, #0
8001c9a: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8001c9c: 4b12 ldr r3, [pc, #72] ; (8001ce8 <HAL_InitTick+0x54>)
8001c9e: 681a ldr r2, [r3, #0]
8001ca0: 4b12 ldr r3, [pc, #72] ; (8001cec <HAL_InitTick+0x58>)
8001ca2: 781b ldrb r3, [r3, #0]
8001ca4: 4619 mov r1, r3
8001ca6: f44f 737a mov.w r3, #1000 ; 0x3e8
8001caa: fbb3 f3f1 udiv r3, r3, r1
8001cae: fbb2 f3f3 udiv r3, r2, r3
8001cb2: 4618 mov r0, r3
8001cb4: f000 f965 bl 8001f82 <HAL_SYSTICK_Config>
8001cb8: 4603 mov r3, r0
8001cba: 2b00 cmp r3, #0
8001cbc: d001 beq.n 8001cc2 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8001cbe: 2301 movs r3, #1
8001cc0: e00e b.n 8001ce0 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001cc2: 687b ldr r3, [r7, #4]
8001cc4: 2b0f cmp r3, #15
8001cc6: d80a bhi.n 8001cde <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8001cc8: 2200 movs r2, #0
8001cca: 6879 ldr r1, [r7, #4]
8001ccc: f04f 30ff mov.w r0, #4294967295
8001cd0: f000 f92d bl 8001f2e <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001cd4: 4a06 ldr r2, [pc, #24] ; (8001cf0 <HAL_InitTick+0x5c>)
8001cd6: 687b ldr r3, [r7, #4]
8001cd8: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8001cda: 2300 movs r3, #0
8001cdc: e000 b.n 8001ce0 <HAL_InitTick+0x4c>
return HAL_ERROR;
8001cde: 2301 movs r3, #1
}
8001ce0: 4618 mov r0, r3
8001ce2: 3708 adds r7, #8
8001ce4: 46bd mov sp, r7
8001ce6: bd80 pop {r7, pc}
8001ce8: 20000000 .word 0x20000000
8001cec: 20000008 .word 0x20000008
8001cf0: 20000004 .word 0x20000004
08001cf4 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001cf4: b480 push {r7}
8001cf6: af00 add r7, sp, #0
uwTick += uwTickFreq;
8001cf8: 4b06 ldr r3, [pc, #24] ; (8001d14 <HAL_IncTick+0x20>)
8001cfa: 781b ldrb r3, [r3, #0]
8001cfc: 461a mov r2, r3
8001cfe: 4b06 ldr r3, [pc, #24] ; (8001d18 <HAL_IncTick+0x24>)
8001d00: 681b ldr r3, [r3, #0]
8001d02: 4413 add r3, r2
8001d04: 4a04 ldr r2, [pc, #16] ; (8001d18 <HAL_IncTick+0x24>)
8001d06: 6013 str r3, [r2, #0]
}
8001d08: bf00 nop
8001d0a: 46bd mov sp, r7
8001d0c: f85d 7b04 ldr.w r7, [sp], #4
8001d10: 4770 bx lr
8001d12: bf00 nop
8001d14: 20000008 .word 0x20000008
8001d18: 2000044c .word 0x2000044c
08001d1c <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8001d1c: b480 push {r7}
8001d1e: af00 add r7, sp, #0
return uwTick;
8001d20: 4b03 ldr r3, [pc, #12] ; (8001d30 <HAL_GetTick+0x14>)
8001d22: 681b ldr r3, [r3, #0]
}
8001d24: 4618 mov r0, r3
8001d26: 46bd mov sp, r7
8001d28: f85d 7b04 ldr.w r7, [sp], #4
8001d2c: 4770 bx lr
8001d2e: bf00 nop
8001d30: 2000044c .word 0x2000044c
08001d34 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
8001d34: b580 push {r7, lr}
8001d36: b084 sub sp, #16
8001d38: af00 add r7, sp, #0
8001d3a: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8001d3c: f7ff ffee bl 8001d1c <HAL_GetTick>
8001d40: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
8001d42: 687b ldr r3, [r7, #4]
8001d44: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
8001d46: 68fb ldr r3, [r7, #12]
8001d48: f1b3 3fff cmp.w r3, #4294967295
8001d4c: d005 beq.n 8001d5a <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
8001d4e: 4b09 ldr r3, [pc, #36] ; (8001d74 <HAL_Delay+0x40>)
8001d50: 781b ldrb r3, [r3, #0]
8001d52: 461a mov r2, r3
8001d54: 68fb ldr r3, [r7, #12]
8001d56: 4413 add r3, r2
8001d58: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
8001d5a: bf00 nop
8001d5c: f7ff ffde bl 8001d1c <HAL_GetTick>
8001d60: 4602 mov r2, r0
8001d62: 68bb ldr r3, [r7, #8]
8001d64: 1ad3 subs r3, r2, r3
8001d66: 68fa ldr r2, [r7, #12]
8001d68: 429a cmp r2, r3
8001d6a: d8f7 bhi.n 8001d5c <HAL_Delay+0x28>
{
}
}
8001d6c: bf00 nop
8001d6e: 3710 adds r7, #16
8001d70: 46bd mov sp, r7
8001d72: bd80 pop {r7, pc}
8001d74: 20000008 .word 0x20000008
08001d78 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8001d78: b480 push {r7}
8001d7a: b085 sub sp, #20
8001d7c: af00 add r7, sp, #0
8001d7e: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001d80: 687b ldr r3, [r7, #4]
8001d82: f003 0307 and.w r3, r3, #7
8001d86: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8001d88: 4b0c ldr r3, [pc, #48] ; (8001dbc <__NVIC_SetPriorityGrouping+0x44>)
8001d8a: 68db ldr r3, [r3, #12]
8001d8c: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8001d8e: 68ba ldr r2, [r7, #8]
8001d90: f64f 03ff movw r3, #63743 ; 0xf8ff
8001d94: 4013 ands r3, r2
8001d96: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8001d98: 68fb ldr r3, [r7, #12]
8001d9a: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8001d9c: 68bb ldr r3, [r7, #8]
8001d9e: 4313 orrs r3, r2
reg_value = (reg_value |
8001da0: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
8001da4: f443 3300 orr.w r3, r3, #131072 ; 0x20000
8001da8: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8001daa: 4a04 ldr r2, [pc, #16] ; (8001dbc <__NVIC_SetPriorityGrouping+0x44>)
8001dac: 68bb ldr r3, [r7, #8]
8001dae: 60d3 str r3, [r2, #12]
}
8001db0: bf00 nop
8001db2: 3714 adds r7, #20
8001db4: 46bd mov sp, r7
8001db6: f85d 7b04 ldr.w r7, [sp], #4
8001dba: 4770 bx lr
8001dbc: e000ed00 .word 0xe000ed00
08001dc0 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8001dc0: b480 push {r7}
8001dc2: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8001dc4: 4b04 ldr r3, [pc, #16] ; (8001dd8 <__NVIC_GetPriorityGrouping+0x18>)
8001dc6: 68db ldr r3, [r3, #12]
8001dc8: 0a1b lsrs r3, r3, #8
8001dca: f003 0307 and.w r3, r3, #7
}
8001dce: 4618 mov r0, r3
8001dd0: 46bd mov sp, r7
8001dd2: f85d 7b04 ldr.w r7, [sp], #4
8001dd6: 4770 bx lr
8001dd8: e000ed00 .word 0xe000ed00
08001ddc <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001ddc: b480 push {r7}
8001dde: b083 sub sp, #12
8001de0: af00 add r7, sp, #0
8001de2: 4603 mov r3, r0
8001de4: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001de6: f997 3007 ldrsb.w r3, [r7, #7]
8001dea: 2b00 cmp r3, #0
8001dec: db0b blt.n 8001e06 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8001dee: 79fb ldrb r3, [r7, #7]
8001df0: f003 021f and.w r2, r3, #31
8001df4: 4907 ldr r1, [pc, #28] ; (8001e14 <__NVIC_EnableIRQ+0x38>)
8001df6: f997 3007 ldrsb.w r3, [r7, #7]
8001dfa: 095b lsrs r3, r3, #5
8001dfc: 2001 movs r0, #1
8001dfe: fa00 f202 lsl.w r2, r0, r2
8001e02: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8001e06: bf00 nop
8001e08: 370c adds r7, #12
8001e0a: 46bd mov sp, r7
8001e0c: f85d 7b04 ldr.w r7, [sp], #4
8001e10: 4770 bx lr
8001e12: bf00 nop
8001e14: e000e100 .word 0xe000e100
08001e18 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8001e18: b480 push {r7}
8001e1a: b083 sub sp, #12
8001e1c: af00 add r7, sp, #0
8001e1e: 4603 mov r3, r0
8001e20: 6039 str r1, [r7, #0]
8001e22: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001e24: f997 3007 ldrsb.w r3, [r7, #7]
8001e28: 2b00 cmp r3, #0
8001e2a: db0a blt.n 8001e42 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8001e2c: 683b ldr r3, [r7, #0]
8001e2e: b2da uxtb r2, r3
8001e30: 490c ldr r1, [pc, #48] ; (8001e64 <__NVIC_SetPriority+0x4c>)
8001e32: f997 3007 ldrsb.w r3, [r7, #7]
8001e36: 0112 lsls r2, r2, #4
8001e38: b2d2 uxtb r2, r2
8001e3a: 440b add r3, r1
8001e3c: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8001e40: e00a b.n 8001e58 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8001e42: 683b ldr r3, [r7, #0]
8001e44: b2da uxtb r2, r3
8001e46: 4908 ldr r1, [pc, #32] ; (8001e68 <__NVIC_SetPriority+0x50>)
8001e48: 79fb ldrb r3, [r7, #7]
8001e4a: f003 030f and.w r3, r3, #15
8001e4e: 3b04 subs r3, #4
8001e50: 0112 lsls r2, r2, #4
8001e52: b2d2 uxtb r2, r2
8001e54: 440b add r3, r1
8001e56: 761a strb r2, [r3, #24]
}
8001e58: bf00 nop
8001e5a: 370c adds r7, #12
8001e5c: 46bd mov sp, r7
8001e5e: f85d 7b04 ldr.w r7, [sp], #4
8001e62: 4770 bx lr
8001e64: e000e100 .word 0xe000e100
8001e68: e000ed00 .word 0xe000ed00
08001e6c <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8001e6c: b480 push {r7}
8001e6e: b089 sub sp, #36 ; 0x24
8001e70: af00 add r7, sp, #0
8001e72: 60f8 str r0, [r7, #12]
8001e74: 60b9 str r1, [r7, #8]
8001e76: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001e78: 68fb ldr r3, [r7, #12]
8001e7a: f003 0307 and.w r3, r3, #7
8001e7e: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8001e80: 69fb ldr r3, [r7, #28]
8001e82: f1c3 0307 rsb r3, r3, #7
8001e86: 2b04 cmp r3, #4
8001e88: bf28 it cs
8001e8a: 2304 movcs r3, #4
8001e8c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8001e8e: 69fb ldr r3, [r7, #28]
8001e90: 3304 adds r3, #4
8001e92: 2b06 cmp r3, #6
8001e94: d902 bls.n 8001e9c <NVIC_EncodePriority+0x30>
8001e96: 69fb ldr r3, [r7, #28]
8001e98: 3b03 subs r3, #3
8001e9a: e000 b.n 8001e9e <NVIC_EncodePriority+0x32>
8001e9c: 2300 movs r3, #0
8001e9e: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001ea0: f04f 32ff mov.w r2, #4294967295
8001ea4: 69bb ldr r3, [r7, #24]
8001ea6: fa02 f303 lsl.w r3, r2, r3
8001eaa: 43da mvns r2, r3
8001eac: 68bb ldr r3, [r7, #8]
8001eae: 401a ands r2, r3
8001eb0: 697b ldr r3, [r7, #20]
8001eb2: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8001eb4: f04f 31ff mov.w r1, #4294967295
8001eb8: 697b ldr r3, [r7, #20]
8001eba: fa01 f303 lsl.w r3, r1, r3
8001ebe: 43d9 mvns r1, r3
8001ec0: 687b ldr r3, [r7, #4]
8001ec2: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001ec4: 4313 orrs r3, r2
);
}
8001ec6: 4618 mov r0, r3
8001ec8: 3724 adds r7, #36 ; 0x24
8001eca: 46bd mov sp, r7
8001ecc: f85d 7b04 ldr.w r7, [sp], #4
8001ed0: 4770 bx lr
...
08001ed4 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8001ed4: b580 push {r7, lr}
8001ed6: b082 sub sp, #8
8001ed8: af00 add r7, sp, #0
8001eda: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8001edc: 687b ldr r3, [r7, #4]
8001ede: 3b01 subs r3, #1
8001ee0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
8001ee4: d301 bcc.n 8001eea <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8001ee6: 2301 movs r3, #1
8001ee8: e00f b.n 8001f0a <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8001eea: 4a0a ldr r2, [pc, #40] ; (8001f14 <SysTick_Config+0x40>)
8001eec: 687b ldr r3, [r7, #4]
8001eee: 3b01 subs r3, #1
8001ef0: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8001ef2: 210f movs r1, #15
8001ef4: f04f 30ff mov.w r0, #4294967295
8001ef8: f7ff ff8e bl 8001e18 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8001efc: 4b05 ldr r3, [pc, #20] ; (8001f14 <SysTick_Config+0x40>)
8001efe: 2200 movs r2, #0
8001f00: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8001f02: 4b04 ldr r3, [pc, #16] ; (8001f14 <SysTick_Config+0x40>)
8001f04: 2207 movs r2, #7
8001f06: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8001f08: 2300 movs r3, #0
}
8001f0a: 4618 mov r0, r3
8001f0c: 3708 adds r7, #8
8001f0e: 46bd mov sp, r7
8001f10: bd80 pop {r7, pc}
8001f12: bf00 nop
8001f14: e000e010 .word 0xe000e010
08001f18 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8001f18: b580 push {r7, lr}
8001f1a: b082 sub sp, #8
8001f1c: af00 add r7, sp, #0
8001f1e: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8001f20: 6878 ldr r0, [r7, #4]
8001f22: f7ff ff29 bl 8001d78 <__NVIC_SetPriorityGrouping>
}
8001f26: bf00 nop
8001f28: 3708 adds r7, #8
8001f2a: 46bd mov sp, r7
8001f2c: bd80 pop {r7, pc}
08001f2e <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8001f2e: b580 push {r7, lr}
8001f30: b086 sub sp, #24
8001f32: af00 add r7, sp, #0
8001f34: 4603 mov r3, r0
8001f36: 60b9 str r1, [r7, #8]
8001f38: 607a str r2, [r7, #4]
8001f3a: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8001f3c: 2300 movs r3, #0
8001f3e: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8001f40: f7ff ff3e bl 8001dc0 <__NVIC_GetPriorityGrouping>
8001f44: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8001f46: 687a ldr r2, [r7, #4]
8001f48: 68b9 ldr r1, [r7, #8]
8001f4a: 6978 ldr r0, [r7, #20]
8001f4c: f7ff ff8e bl 8001e6c <NVIC_EncodePriority>
8001f50: 4602 mov r2, r0
8001f52: f997 300f ldrsb.w r3, [r7, #15]
8001f56: 4611 mov r1, r2
8001f58: 4618 mov r0, r3
8001f5a: f7ff ff5d bl 8001e18 <__NVIC_SetPriority>
}
8001f5e: bf00 nop
8001f60: 3718 adds r7, #24
8001f62: 46bd mov sp, r7
8001f64: bd80 pop {r7, pc}
08001f66 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001f66: b580 push {r7, lr}
8001f68: b082 sub sp, #8
8001f6a: af00 add r7, sp, #0
8001f6c: 4603 mov r3, r0
8001f6e: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8001f70: f997 3007 ldrsb.w r3, [r7, #7]
8001f74: 4618 mov r0, r3
8001f76: f7ff ff31 bl 8001ddc <__NVIC_EnableIRQ>
}
8001f7a: bf00 nop
8001f7c: 3708 adds r7, #8
8001f7e: 46bd mov sp, r7
8001f80: bd80 pop {r7, pc}
08001f82 <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8001f82: b580 push {r7, lr}
8001f84: b082 sub sp, #8
8001f86: af00 add r7, sp, #0
8001f88: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8001f8a: 6878 ldr r0, [r7, #4]
8001f8c: f7ff ffa2 bl 8001ed4 <SysTick_Config>
8001f90: 4603 mov r3, r0
}
8001f92: 4618 mov r0, r3
8001f94: 3708 adds r7, #8
8001f96: 46bd mov sp, r7
8001f98: bd80 pop {r7, pc}
08001f9a <HAL_DMA_Abort_IT>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
8001f9a: b480 push {r7}
8001f9c: b083 sub sp, #12
8001f9e: af00 add r7, sp, #0
8001fa0: 6078 str r0, [r7, #4]
if(hdma->State != HAL_DMA_STATE_BUSY)
8001fa2: 687b ldr r3, [r7, #4]
8001fa4: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
8001fa8: b2db uxtb r3, r3
8001faa: 2b02 cmp r3, #2
8001fac: d004 beq.n 8001fb8 <HAL_DMA_Abort_IT+0x1e>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
8001fae: 687b ldr r3, [r7, #4]
8001fb0: 2280 movs r2, #128 ; 0x80
8001fb2: 655a str r2, [r3, #84] ; 0x54
return HAL_ERROR;
8001fb4: 2301 movs r3, #1
8001fb6: e00c b.n 8001fd2 <HAL_DMA_Abort_IT+0x38>
}
else
{
/* Set Abort State */
hdma->State = HAL_DMA_STATE_ABORT;
8001fb8: 687b ldr r3, [r7, #4]
8001fba: 2205 movs r2, #5
8001fbc: f883 2035 strb.w r2, [r3, #53] ; 0x35
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
8001fc0: 687b ldr r3, [r7, #4]
8001fc2: 681b ldr r3, [r3, #0]
8001fc4: 681a ldr r2, [r3, #0]
8001fc6: 687b ldr r3, [r7, #4]
8001fc8: 681b ldr r3, [r3, #0]
8001fca: f022 0201 bic.w r2, r2, #1
8001fce: 601a str r2, [r3, #0]
}
return HAL_OK;
8001fd0: 2300 movs r3, #0
}
8001fd2: 4618 mov r0, r3
8001fd4: 370c adds r7, #12
8001fd6: 46bd mov sp, r7
8001fd8: f85d 7b04 ldr.w r7, [sp], #4
8001fdc: 4770 bx lr
...
08001fe0 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8001fe0: b480 push {r7}
8001fe2: b089 sub sp, #36 ; 0x24
8001fe4: af00 add r7, sp, #0
8001fe6: 6078 str r0, [r7, #4]
8001fe8: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
8001fea: 2300 movs r3, #0
8001fec: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
8001fee: 2300 movs r3, #0
8001ff0: 613b str r3, [r7, #16]
uint32_t temp = 0x00U;
8001ff2: 2300 movs r3, #0
8001ff4: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
8001ff6: 2300 movs r3, #0
8001ff8: 61fb str r3, [r7, #28]
8001ffa: e177 b.n 80022ec <HAL_GPIO_Init+0x30c>
{
/* Get the IO position */
ioposition = 0x01U << position;
8001ffc: 2201 movs r2, #1
8001ffe: 69fb ldr r3, [r7, #28]
8002000: fa02 f303 lsl.w r3, r2, r3
8002004: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8002006: 683b ldr r3, [r7, #0]
8002008: 681b ldr r3, [r3, #0]
800200a: 697a ldr r2, [r7, #20]
800200c: 4013 ands r3, r2
800200e: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
8002010: 693a ldr r2, [r7, #16]
8002012: 697b ldr r3, [r7, #20]
8002014: 429a cmp r2, r3
8002016: f040 8166 bne.w 80022e6 <HAL_GPIO_Init+0x306>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
800201a: 683b ldr r3, [r7, #0]
800201c: 685b ldr r3, [r3, #4]
800201e: 2b01 cmp r3, #1
8002020: d00b beq.n 800203a <HAL_GPIO_Init+0x5a>
8002022: 683b ldr r3, [r7, #0]
8002024: 685b ldr r3, [r3, #4]
8002026: 2b02 cmp r3, #2
8002028: d007 beq.n 800203a <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800202a: 683b ldr r3, [r7, #0]
800202c: 685b ldr r3, [r3, #4]
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
800202e: 2b11 cmp r3, #17
8002030: d003 beq.n 800203a <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
8002032: 683b ldr r3, [r7, #0]
8002034: 685b ldr r3, [r3, #4]
8002036: 2b12 cmp r3, #18
8002038: d130 bne.n 800209c <HAL_GPIO_Init+0xbc>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
800203a: 687b ldr r3, [r7, #4]
800203c: 689b ldr r3, [r3, #8]
800203e: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
8002040: 69fb ldr r3, [r7, #28]
8002042: 005b lsls r3, r3, #1
8002044: 2203 movs r2, #3
8002046: fa02 f303 lsl.w r3, r2, r3
800204a: 43db mvns r3, r3
800204c: 69ba ldr r2, [r7, #24]
800204e: 4013 ands r3, r2
8002050: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
8002052: 683b ldr r3, [r7, #0]
8002054: 68da ldr r2, [r3, #12]
8002056: 69fb ldr r3, [r7, #28]
8002058: 005b lsls r3, r3, #1
800205a: fa02 f303 lsl.w r3, r2, r3
800205e: 69ba ldr r2, [r7, #24]
8002060: 4313 orrs r3, r2
8002062: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
8002064: 687b ldr r3, [r7, #4]
8002066: 69ba ldr r2, [r7, #24]
8002068: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
800206a: 687b ldr r3, [r7, #4]
800206c: 685b ldr r3, [r3, #4]
800206e: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
8002070: 2201 movs r2, #1
8002072: 69fb ldr r3, [r7, #28]
8002074: fa02 f303 lsl.w r3, r2, r3
8002078: 43db mvns r3, r3
800207a: 69ba ldr r2, [r7, #24]
800207c: 4013 ands r3, r2
800207e: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
8002080: 683b ldr r3, [r7, #0]
8002082: 685b ldr r3, [r3, #4]
8002084: 091b lsrs r3, r3, #4
8002086: f003 0201 and.w r2, r3, #1
800208a: 69fb ldr r3, [r7, #28]
800208c: fa02 f303 lsl.w r3, r2, r3
8002090: 69ba ldr r2, [r7, #24]
8002092: 4313 orrs r3, r2
8002094: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
8002096: 687b ldr r3, [r7, #4]
8002098: 69ba ldr r2, [r7, #24]
800209a: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
800209c: 687b ldr r3, [r7, #4]
800209e: 68db ldr r3, [r3, #12]
80020a0: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
80020a2: 69fb ldr r3, [r7, #28]
80020a4: 005b lsls r3, r3, #1
80020a6: 2203 movs r2, #3
80020a8: fa02 f303 lsl.w r3, r2, r3
80020ac: 43db mvns r3, r3
80020ae: 69ba ldr r2, [r7, #24]
80020b0: 4013 ands r3, r2
80020b2: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
80020b4: 683b ldr r3, [r7, #0]
80020b6: 689a ldr r2, [r3, #8]
80020b8: 69fb ldr r3, [r7, #28]
80020ba: 005b lsls r3, r3, #1
80020bc: fa02 f303 lsl.w r3, r2, r3
80020c0: 69ba ldr r2, [r7, #24]
80020c2: 4313 orrs r3, r2
80020c4: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
80020c6: 687b ldr r3, [r7, #4]
80020c8: 69ba ldr r2, [r7, #24]
80020ca: 60da str r2, [r3, #12]
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
80020cc: 683b ldr r3, [r7, #0]
80020ce: 685b ldr r3, [r3, #4]
80020d0: 2b02 cmp r3, #2
80020d2: d003 beq.n 80020dc <HAL_GPIO_Init+0xfc>
80020d4: 683b ldr r3, [r7, #0]
80020d6: 685b ldr r3, [r3, #4]
80020d8: 2b12 cmp r3, #18
80020da: d123 bne.n 8002124 <HAL_GPIO_Init+0x144>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
80020dc: 69fb ldr r3, [r7, #28]
80020de: 08da lsrs r2, r3, #3
80020e0: 687b ldr r3, [r7, #4]
80020e2: 3208 adds r2, #8
80020e4: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80020e8: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
80020ea: 69fb ldr r3, [r7, #28]
80020ec: f003 0307 and.w r3, r3, #7
80020f0: 009b lsls r3, r3, #2
80020f2: 220f movs r2, #15
80020f4: fa02 f303 lsl.w r3, r2, r3
80020f8: 43db mvns r3, r3
80020fa: 69ba ldr r2, [r7, #24]
80020fc: 4013 ands r3, r2
80020fe: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
8002100: 683b ldr r3, [r7, #0]
8002102: 691a ldr r2, [r3, #16]
8002104: 69fb ldr r3, [r7, #28]
8002106: f003 0307 and.w r3, r3, #7
800210a: 009b lsls r3, r3, #2
800210c: fa02 f303 lsl.w r3, r2, r3
8002110: 69ba ldr r2, [r7, #24]
8002112: 4313 orrs r3, r2
8002114: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
8002116: 69fb ldr r3, [r7, #28]
8002118: 08da lsrs r2, r3, #3
800211a: 687b ldr r3, [r7, #4]
800211c: 3208 adds r2, #8
800211e: 69b9 ldr r1, [r7, #24]
8002120: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8002124: 687b ldr r3, [r7, #4]
8002126: 681b ldr r3, [r3, #0]
8002128: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
800212a: 69fb ldr r3, [r7, #28]
800212c: 005b lsls r3, r3, #1
800212e: 2203 movs r2, #3
8002130: fa02 f303 lsl.w r3, r2, r3
8002134: 43db mvns r3, r3
8002136: 69ba ldr r2, [r7, #24]
8002138: 4013 ands r3, r2
800213a: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
800213c: 683b ldr r3, [r7, #0]
800213e: 685b ldr r3, [r3, #4]
8002140: f003 0203 and.w r2, r3, #3
8002144: 69fb ldr r3, [r7, #28]
8002146: 005b lsls r3, r3, #1
8002148: fa02 f303 lsl.w r3, r2, r3
800214c: 69ba ldr r2, [r7, #24]
800214e: 4313 orrs r3, r2
8002150: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
8002152: 687b ldr r3, [r7, #4]
8002154: 69ba ldr r2, [r7, #24]
8002156: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8002158: 683b ldr r3, [r7, #0]
800215a: 685b ldr r3, [r3, #4]
800215c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002160: 2b00 cmp r3, #0
8002162: f000 80c0 beq.w 80022e6 <HAL_GPIO_Init+0x306>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8002166: 2300 movs r3, #0
8002168: 60fb str r3, [r7, #12]
800216a: 4b65 ldr r3, [pc, #404] ; (8002300 <HAL_GPIO_Init+0x320>)
800216c: 6c5b ldr r3, [r3, #68] ; 0x44
800216e: 4a64 ldr r2, [pc, #400] ; (8002300 <HAL_GPIO_Init+0x320>)
8002170: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8002174: 6453 str r3, [r2, #68] ; 0x44
8002176: 4b62 ldr r3, [pc, #392] ; (8002300 <HAL_GPIO_Init+0x320>)
8002178: 6c5b ldr r3, [r3, #68] ; 0x44
800217a: f403 4380 and.w r3, r3, #16384 ; 0x4000
800217e: 60fb str r3, [r7, #12]
8002180: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
8002182: 4a60 ldr r2, [pc, #384] ; (8002304 <HAL_GPIO_Init+0x324>)
8002184: 69fb ldr r3, [r7, #28]
8002186: 089b lsrs r3, r3, #2
8002188: 3302 adds r3, #2
800218a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800218e: 61bb str r3, [r7, #24]
temp &= ~(0x0FU << (4U * (position & 0x03U)));
8002190: 69fb ldr r3, [r7, #28]
8002192: f003 0303 and.w r3, r3, #3
8002196: 009b lsls r3, r3, #2
8002198: 220f movs r2, #15
800219a: fa02 f303 lsl.w r3, r2, r3
800219e: 43db mvns r3, r3
80021a0: 69ba ldr r2, [r7, #24]
80021a2: 4013 ands r3, r2
80021a4: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
80021a6: 687b ldr r3, [r7, #4]
80021a8: 4a57 ldr r2, [pc, #348] ; (8002308 <HAL_GPIO_Init+0x328>)
80021aa: 4293 cmp r3, r2
80021ac: d037 beq.n 800221e <HAL_GPIO_Init+0x23e>
80021ae: 687b ldr r3, [r7, #4]
80021b0: 4a56 ldr r2, [pc, #344] ; (800230c <HAL_GPIO_Init+0x32c>)
80021b2: 4293 cmp r3, r2
80021b4: d031 beq.n 800221a <HAL_GPIO_Init+0x23a>
80021b6: 687b ldr r3, [r7, #4]
80021b8: 4a55 ldr r2, [pc, #340] ; (8002310 <HAL_GPIO_Init+0x330>)
80021ba: 4293 cmp r3, r2
80021bc: d02b beq.n 8002216 <HAL_GPIO_Init+0x236>
80021be: 687b ldr r3, [r7, #4]
80021c0: 4a54 ldr r2, [pc, #336] ; (8002314 <HAL_GPIO_Init+0x334>)
80021c2: 4293 cmp r3, r2
80021c4: d025 beq.n 8002212 <HAL_GPIO_Init+0x232>
80021c6: 687b ldr r3, [r7, #4]
80021c8: 4a53 ldr r2, [pc, #332] ; (8002318 <HAL_GPIO_Init+0x338>)
80021ca: 4293 cmp r3, r2
80021cc: d01f beq.n 800220e <HAL_GPIO_Init+0x22e>
80021ce: 687b ldr r3, [r7, #4]
80021d0: 4a52 ldr r2, [pc, #328] ; (800231c <HAL_GPIO_Init+0x33c>)
80021d2: 4293 cmp r3, r2
80021d4: d019 beq.n 800220a <HAL_GPIO_Init+0x22a>
80021d6: 687b ldr r3, [r7, #4]
80021d8: 4a51 ldr r2, [pc, #324] ; (8002320 <HAL_GPIO_Init+0x340>)
80021da: 4293 cmp r3, r2
80021dc: d013 beq.n 8002206 <HAL_GPIO_Init+0x226>
80021de: 687b ldr r3, [r7, #4]
80021e0: 4a50 ldr r2, [pc, #320] ; (8002324 <HAL_GPIO_Init+0x344>)
80021e2: 4293 cmp r3, r2
80021e4: d00d beq.n 8002202 <HAL_GPIO_Init+0x222>
80021e6: 687b ldr r3, [r7, #4]
80021e8: 4a4f ldr r2, [pc, #316] ; (8002328 <HAL_GPIO_Init+0x348>)
80021ea: 4293 cmp r3, r2
80021ec: d007 beq.n 80021fe <HAL_GPIO_Init+0x21e>
80021ee: 687b ldr r3, [r7, #4]
80021f0: 4a4e ldr r2, [pc, #312] ; (800232c <HAL_GPIO_Init+0x34c>)
80021f2: 4293 cmp r3, r2
80021f4: d101 bne.n 80021fa <HAL_GPIO_Init+0x21a>
80021f6: 2309 movs r3, #9
80021f8: e012 b.n 8002220 <HAL_GPIO_Init+0x240>
80021fa: 230a movs r3, #10
80021fc: e010 b.n 8002220 <HAL_GPIO_Init+0x240>
80021fe: 2308 movs r3, #8
8002200: e00e b.n 8002220 <HAL_GPIO_Init+0x240>
8002202: 2307 movs r3, #7
8002204: e00c b.n 8002220 <HAL_GPIO_Init+0x240>
8002206: 2306 movs r3, #6
8002208: e00a b.n 8002220 <HAL_GPIO_Init+0x240>
800220a: 2305 movs r3, #5
800220c: e008 b.n 8002220 <HAL_GPIO_Init+0x240>
800220e: 2304 movs r3, #4
8002210: e006 b.n 8002220 <HAL_GPIO_Init+0x240>
8002212: 2303 movs r3, #3
8002214: e004 b.n 8002220 <HAL_GPIO_Init+0x240>
8002216: 2302 movs r3, #2
8002218: e002 b.n 8002220 <HAL_GPIO_Init+0x240>
800221a: 2301 movs r3, #1
800221c: e000 b.n 8002220 <HAL_GPIO_Init+0x240>
800221e: 2300 movs r3, #0
8002220: 69fa ldr r2, [r7, #28]
8002222: f002 0203 and.w r2, r2, #3
8002226: 0092 lsls r2, r2, #2
8002228: 4093 lsls r3, r2
800222a: 69ba ldr r2, [r7, #24]
800222c: 4313 orrs r3, r2
800222e: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
8002230: 4934 ldr r1, [pc, #208] ; (8002304 <HAL_GPIO_Init+0x324>)
8002232: 69fb ldr r3, [r7, #28]
8002234: 089b lsrs r3, r3, #2
8002236: 3302 adds r3, #2
8002238: 69ba ldr r2, [r7, #24]
800223a: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
800223e: 4b3c ldr r3, [pc, #240] ; (8002330 <HAL_GPIO_Init+0x350>)
8002240: 681b ldr r3, [r3, #0]
8002242: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002244: 693b ldr r3, [r7, #16]
8002246: 43db mvns r3, r3
8002248: 69ba ldr r2, [r7, #24]
800224a: 4013 ands r3, r2
800224c: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
800224e: 683b ldr r3, [r7, #0]
8002250: 685b ldr r3, [r3, #4]
8002252: f403 3380 and.w r3, r3, #65536 ; 0x10000
8002256: 2b00 cmp r3, #0
8002258: d003 beq.n 8002262 <HAL_GPIO_Init+0x282>
{
temp |= iocurrent;
800225a: 69ba ldr r2, [r7, #24]
800225c: 693b ldr r3, [r7, #16]
800225e: 4313 orrs r3, r2
8002260: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
8002262: 4a33 ldr r2, [pc, #204] ; (8002330 <HAL_GPIO_Init+0x350>)
8002264: 69bb ldr r3, [r7, #24]
8002266: 6013 str r3, [r2, #0]
temp = EXTI->EMR;
8002268: 4b31 ldr r3, [pc, #196] ; (8002330 <HAL_GPIO_Init+0x350>)
800226a: 685b ldr r3, [r3, #4]
800226c: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
800226e: 693b ldr r3, [r7, #16]
8002270: 43db mvns r3, r3
8002272: 69ba ldr r2, [r7, #24]
8002274: 4013 ands r3, r2
8002276: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8002278: 683b ldr r3, [r7, #0]
800227a: 685b ldr r3, [r3, #4]
800227c: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002280: 2b00 cmp r3, #0
8002282: d003 beq.n 800228c <HAL_GPIO_Init+0x2ac>
{
temp |= iocurrent;
8002284: 69ba ldr r2, [r7, #24]
8002286: 693b ldr r3, [r7, #16]
8002288: 4313 orrs r3, r2
800228a: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
800228c: 4a28 ldr r2, [pc, #160] ; (8002330 <HAL_GPIO_Init+0x350>)
800228e: 69bb ldr r3, [r7, #24]
8002290: 6053 str r3, [r2, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
8002292: 4b27 ldr r3, [pc, #156] ; (8002330 <HAL_GPIO_Init+0x350>)
8002294: 689b ldr r3, [r3, #8]
8002296: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002298: 693b ldr r3, [r7, #16]
800229a: 43db mvns r3, r3
800229c: 69ba ldr r2, [r7, #24]
800229e: 4013 ands r3, r2
80022a0: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
80022a2: 683b ldr r3, [r7, #0]
80022a4: 685b ldr r3, [r3, #4]
80022a6: f403 1380 and.w r3, r3, #1048576 ; 0x100000
80022aa: 2b00 cmp r3, #0
80022ac: d003 beq.n 80022b6 <HAL_GPIO_Init+0x2d6>
{
temp |= iocurrent;
80022ae: 69ba ldr r2, [r7, #24]
80022b0: 693b ldr r3, [r7, #16]
80022b2: 4313 orrs r3, r2
80022b4: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
80022b6: 4a1e ldr r2, [pc, #120] ; (8002330 <HAL_GPIO_Init+0x350>)
80022b8: 69bb ldr r3, [r7, #24]
80022ba: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
80022bc: 4b1c ldr r3, [pc, #112] ; (8002330 <HAL_GPIO_Init+0x350>)
80022be: 68db ldr r3, [r3, #12]
80022c0: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
80022c2: 693b ldr r3, [r7, #16]
80022c4: 43db mvns r3, r3
80022c6: 69ba ldr r2, [r7, #24]
80022c8: 4013 ands r3, r2
80022ca: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
80022cc: 683b ldr r3, [r7, #0]
80022ce: 685b ldr r3, [r3, #4]
80022d0: f403 1300 and.w r3, r3, #2097152 ; 0x200000
80022d4: 2b00 cmp r3, #0
80022d6: d003 beq.n 80022e0 <HAL_GPIO_Init+0x300>
{
temp |= iocurrent;
80022d8: 69ba ldr r2, [r7, #24]
80022da: 693b ldr r3, [r7, #16]
80022dc: 4313 orrs r3, r2
80022de: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
80022e0: 4a13 ldr r2, [pc, #76] ; (8002330 <HAL_GPIO_Init+0x350>)
80022e2: 69bb ldr r3, [r7, #24]
80022e4: 60d3 str r3, [r2, #12]
for(position = 0U; position < GPIO_NUMBER; position++)
80022e6: 69fb ldr r3, [r7, #28]
80022e8: 3301 adds r3, #1
80022ea: 61fb str r3, [r7, #28]
80022ec: 69fb ldr r3, [r7, #28]
80022ee: 2b0f cmp r3, #15
80022f0: f67f ae84 bls.w 8001ffc <HAL_GPIO_Init+0x1c>
}
}
}
}
80022f4: bf00 nop
80022f6: 3724 adds r7, #36 ; 0x24
80022f8: 46bd mov sp, r7
80022fa: f85d 7b04 ldr.w r7, [sp], #4
80022fe: 4770 bx lr
8002300: 40023800 .word 0x40023800
8002304: 40013800 .word 0x40013800
8002308: 40020000 .word 0x40020000
800230c: 40020400 .word 0x40020400
8002310: 40020800 .word 0x40020800
8002314: 40020c00 .word 0x40020c00
8002318: 40021000 .word 0x40021000
800231c: 40021400 .word 0x40021400
8002320: 40021800 .word 0x40021800
8002324: 40021c00 .word 0x40021c00
8002328: 40022000 .word 0x40022000
800232c: 40022400 .word 0x40022400
8002330: 40013c00 .word 0x40013c00
08002334 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8002334: b480 push {r7}
8002336: b083 sub sp, #12
8002338: af00 add r7, sp, #0
800233a: 6078 str r0, [r7, #4]
800233c: 460b mov r3, r1
800233e: 807b strh r3, [r7, #2]
8002340: 4613 mov r3, r2
8002342: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
8002344: 787b ldrb r3, [r7, #1]
8002346: 2b00 cmp r3, #0
8002348: d003 beq.n 8002352 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
800234a: 887a ldrh r2, [r7, #2]
800234c: 687b ldr r3, [r7, #4]
800234e: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
8002350: e003 b.n 800235a <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
8002352: 887b ldrh r3, [r7, #2]
8002354: 041a lsls r2, r3, #16
8002356: 687b ldr r3, [r7, #4]
8002358: 619a str r2, [r3, #24]
}
800235a: bf00 nop
800235c: 370c adds r7, #12
800235e: 46bd mov sp, r7
8002360: f85d 7b04 ldr.w r7, [sp], #4
8002364: 4770 bx lr
...
08002368 <HAL_GPIO_EXTI_IRQHandler>:
* @brief This function handles EXTI interrupt request.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
{
8002368: b580 push {r7, lr}
800236a: b082 sub sp, #8
800236c: af00 add r7, sp, #0
800236e: 4603 mov r3, r0
8002370: 80fb strh r3, [r7, #6]
/* EXTI line interrupt detected */
if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
8002372: 4b08 ldr r3, [pc, #32] ; (8002394 <HAL_GPIO_EXTI_IRQHandler+0x2c>)
8002374: 695a ldr r2, [r3, #20]
8002376: 88fb ldrh r3, [r7, #6]
8002378: 4013 ands r3, r2
800237a: 2b00 cmp r3, #0
800237c: d006 beq.n 800238c <HAL_GPIO_EXTI_IRQHandler+0x24>
{
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
800237e: 4a05 ldr r2, [pc, #20] ; (8002394 <HAL_GPIO_EXTI_IRQHandler+0x2c>)
8002380: 88fb ldrh r3, [r7, #6]
8002382: 6153 str r3, [r2, #20]
HAL_GPIO_EXTI_Callback(GPIO_Pin);
8002384: 88fb ldrh r3, [r7, #6]
8002386: 4618 mov r0, r3
8002388: f000 f806 bl 8002398 <HAL_GPIO_EXTI_Callback>
}
}
800238c: bf00 nop
800238e: 3708 adds r7, #8
8002390: 46bd mov sp, r7
8002392: bd80 pop {r7, pc}
8002394: 40013c00 .word 0x40013c00
08002398 <HAL_GPIO_EXTI_Callback>:
* @brief EXTI line detection callbacks.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
8002398: b480 push {r7}
800239a: b083 sub sp, #12
800239c: af00 add r7, sp, #0
800239e: 4603 mov r3, r0
80023a0: 80fb strh r3, [r7, #6]
/* Prevent unused argument(s) compilation warning */
UNUSED(GPIO_Pin);
/* NOTE: This function Should not be modified, when the callback is needed,
the HAL_GPIO_EXTI_Callback could be implemented in the user file
*/
}
80023a2: bf00 nop
80023a4: 370c adds r7, #12
80023a6: 46bd mov sp, r7
80023a8: f85d 7b04 ldr.w r7, [sp], #4
80023ac: 4770 bx lr
...
080023b0 <HAL_RCC_OscConfig>:
* supported by this API. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
80023b0: b580 push {r7, lr}
80023b2: b086 sub sp, #24
80023b4: af00 add r7, sp, #0
80023b6: 6078 str r0, [r7, #4]
uint32_t tickstart, pll_config;
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
80023b8: 687b ldr r3, [r7, #4]
80023ba: 2b00 cmp r3, #0
80023bc: d101 bne.n 80023c2 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
80023be: 2301 movs r3, #1
80023c0: e25b b.n 800287a <HAL_RCC_OscConfig+0x4ca>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80023c2: 687b ldr r3, [r7, #4]
80023c4: 681b ldr r3, [r3, #0]
80023c6: f003 0301 and.w r3, r3, #1
80023ca: 2b00 cmp r3, #0
80023cc: d075 beq.n 80024ba <HAL_RCC_OscConfig+0x10a>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
80023ce: 4ba3 ldr r3, [pc, #652] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80023d0: 689b ldr r3, [r3, #8]
80023d2: f003 030c and.w r3, r3, #12
80023d6: 2b04 cmp r3, #4
80023d8: d00c beq.n 80023f4 <HAL_RCC_OscConfig+0x44>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
80023da: 4ba0 ldr r3, [pc, #640] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80023dc: 689b ldr r3, [r3, #8]
80023de: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
80023e2: 2b08 cmp r3, #8
80023e4: d112 bne.n 800240c <HAL_RCC_OscConfig+0x5c>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
80023e6: 4b9d ldr r3, [pc, #628] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80023e8: 685b ldr r3, [r3, #4]
80023ea: f403 0380 and.w r3, r3, #4194304 ; 0x400000
80023ee: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
80023f2: d10b bne.n 800240c <HAL_RCC_OscConfig+0x5c>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80023f4: 4b99 ldr r3, [pc, #612] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80023f6: 681b ldr r3, [r3, #0]
80023f8: f403 3300 and.w r3, r3, #131072 ; 0x20000
80023fc: 2b00 cmp r3, #0
80023fe: d05b beq.n 80024b8 <HAL_RCC_OscConfig+0x108>
8002400: 687b ldr r3, [r7, #4]
8002402: 685b ldr r3, [r3, #4]
8002404: 2b00 cmp r3, #0
8002406: d157 bne.n 80024b8 <HAL_RCC_OscConfig+0x108>
{
return HAL_ERROR;
8002408: 2301 movs r3, #1
800240a: e236 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800240c: 687b ldr r3, [r7, #4]
800240e: 685b ldr r3, [r3, #4]
8002410: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8002414: d106 bne.n 8002424 <HAL_RCC_OscConfig+0x74>
8002416: 4b91 ldr r3, [pc, #580] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002418: 681b ldr r3, [r3, #0]
800241a: 4a90 ldr r2, [pc, #576] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800241c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002420: 6013 str r3, [r2, #0]
8002422: e01d b.n 8002460 <HAL_RCC_OscConfig+0xb0>
8002424: 687b ldr r3, [r7, #4]
8002426: 685b ldr r3, [r3, #4]
8002428: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
800242c: d10c bne.n 8002448 <HAL_RCC_OscConfig+0x98>
800242e: 4b8b ldr r3, [pc, #556] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002430: 681b ldr r3, [r3, #0]
8002432: 4a8a ldr r2, [pc, #552] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002434: f443 2380 orr.w r3, r3, #262144 ; 0x40000
8002438: 6013 str r3, [r2, #0]
800243a: 4b88 ldr r3, [pc, #544] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800243c: 681b ldr r3, [r3, #0]
800243e: 4a87 ldr r2, [pc, #540] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002440: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002444: 6013 str r3, [r2, #0]
8002446: e00b b.n 8002460 <HAL_RCC_OscConfig+0xb0>
8002448: 4b84 ldr r3, [pc, #528] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800244a: 681b ldr r3, [r3, #0]
800244c: 4a83 ldr r2, [pc, #524] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800244e: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8002452: 6013 str r3, [r2, #0]
8002454: 4b81 ldr r3, [pc, #516] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002456: 681b ldr r3, [r3, #0]
8002458: 4a80 ldr r2, [pc, #512] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800245a: f423 2380 bic.w r3, r3, #262144 ; 0x40000
800245e: 6013 str r3, [r2, #0]
/* Check the HSE State */
if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
8002460: 687b ldr r3, [r7, #4]
8002462: 685b ldr r3, [r3, #4]
8002464: 2b00 cmp r3, #0
8002466: d013 beq.n 8002490 <HAL_RCC_OscConfig+0xe0>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002468: f7ff fc58 bl 8001d1c <HAL_GetTick>
800246c: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800246e: e008 b.n 8002482 <HAL_RCC_OscConfig+0xd2>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8002470: f7ff fc54 bl 8001d1c <HAL_GetTick>
8002474: 4602 mov r2, r0
8002476: 693b ldr r3, [r7, #16]
8002478: 1ad3 subs r3, r2, r3
800247a: 2b64 cmp r3, #100 ; 0x64
800247c: d901 bls.n 8002482 <HAL_RCC_OscConfig+0xd2>
{
return HAL_TIMEOUT;
800247e: 2303 movs r3, #3
8002480: e1fb b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002482: 4b76 ldr r3, [pc, #472] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002484: 681b ldr r3, [r3, #0]
8002486: f403 3300 and.w r3, r3, #131072 ; 0x20000
800248a: 2b00 cmp r3, #0
800248c: d0f0 beq.n 8002470 <HAL_RCC_OscConfig+0xc0>
800248e: e014 b.n 80024ba <HAL_RCC_OscConfig+0x10a>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002490: f7ff fc44 bl 8001d1c <HAL_GetTick>
8002494: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002496: e008 b.n 80024aa <HAL_RCC_OscConfig+0xfa>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8002498: f7ff fc40 bl 8001d1c <HAL_GetTick>
800249c: 4602 mov r2, r0
800249e: 693b ldr r3, [r7, #16]
80024a0: 1ad3 subs r3, r2, r3
80024a2: 2b64 cmp r3, #100 ; 0x64
80024a4: d901 bls.n 80024aa <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
80024a6: 2303 movs r3, #3
80024a8: e1e7 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80024aa: 4b6c ldr r3, [pc, #432] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80024ac: 681b ldr r3, [r3, #0]
80024ae: f403 3300 and.w r3, r3, #131072 ; 0x20000
80024b2: 2b00 cmp r3, #0
80024b4: d1f0 bne.n 8002498 <HAL_RCC_OscConfig+0xe8>
80024b6: e000 b.n 80024ba <HAL_RCC_OscConfig+0x10a>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80024b8: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80024ba: 687b ldr r3, [r7, #4]
80024bc: 681b ldr r3, [r3, #0]
80024be: f003 0302 and.w r3, r3, #2
80024c2: 2b00 cmp r3, #0
80024c4: d063 beq.n 800258e <HAL_RCC_OscConfig+0x1de>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
80024c6: 4b65 ldr r3, [pc, #404] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80024c8: 689b ldr r3, [r3, #8]
80024ca: f003 030c and.w r3, r3, #12
80024ce: 2b00 cmp r3, #0
80024d0: d00b beq.n 80024ea <HAL_RCC_OscConfig+0x13a>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
80024d2: 4b62 ldr r3, [pc, #392] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80024d4: 689b ldr r3, [r3, #8]
80024d6: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
80024da: 2b08 cmp r3, #8
80024dc: d11c bne.n 8002518 <HAL_RCC_OscConfig+0x168>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
80024de: 4b5f ldr r3, [pc, #380] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80024e0: 685b ldr r3, [r3, #4]
80024e2: f403 0380 and.w r3, r3, #4194304 ; 0x400000
80024e6: 2b00 cmp r3, #0
80024e8: d116 bne.n 8002518 <HAL_RCC_OscConfig+0x168>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80024ea: 4b5c ldr r3, [pc, #368] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80024ec: 681b ldr r3, [r3, #0]
80024ee: f003 0302 and.w r3, r3, #2
80024f2: 2b00 cmp r3, #0
80024f4: d005 beq.n 8002502 <HAL_RCC_OscConfig+0x152>
80024f6: 687b ldr r3, [r7, #4]
80024f8: 68db ldr r3, [r3, #12]
80024fa: 2b01 cmp r3, #1
80024fc: d001 beq.n 8002502 <HAL_RCC_OscConfig+0x152>
{
return HAL_ERROR;
80024fe: 2301 movs r3, #1
8002500: e1bb b.n 800287a <HAL_RCC_OscConfig+0x4ca>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002502: 4b56 ldr r3, [pc, #344] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002504: 681b ldr r3, [r3, #0]
8002506: f023 02f8 bic.w r2, r3, #248 ; 0xf8
800250a: 687b ldr r3, [r7, #4]
800250c: 691b ldr r3, [r3, #16]
800250e: 00db lsls r3, r3, #3
8002510: 4952 ldr r1, [pc, #328] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002512: 4313 orrs r3, r2
8002514: 600b str r3, [r1, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002516: e03a b.n 800258e <HAL_RCC_OscConfig+0x1de>
}
}
else
{
/* Check the HSI State */
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
8002518: 687b ldr r3, [r7, #4]
800251a: 68db ldr r3, [r3, #12]
800251c: 2b00 cmp r3, #0
800251e: d020 beq.n 8002562 <HAL_RCC_OscConfig+0x1b2>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8002520: 4b4f ldr r3, [pc, #316] ; (8002660 <HAL_RCC_OscConfig+0x2b0>)
8002522: 2201 movs r2, #1
8002524: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8002526: f7ff fbf9 bl 8001d1c <HAL_GetTick>
800252a: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800252c: e008 b.n 8002540 <HAL_RCC_OscConfig+0x190>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
800252e: f7ff fbf5 bl 8001d1c <HAL_GetTick>
8002532: 4602 mov r2, r0
8002534: 693b ldr r3, [r7, #16]
8002536: 1ad3 subs r3, r2, r3
8002538: 2b02 cmp r3, #2
800253a: d901 bls.n 8002540 <HAL_RCC_OscConfig+0x190>
{
return HAL_TIMEOUT;
800253c: 2303 movs r3, #3
800253e: e19c b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002540: 4b46 ldr r3, [pc, #280] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002542: 681b ldr r3, [r3, #0]
8002544: f003 0302 and.w r3, r3, #2
8002548: 2b00 cmp r3, #0
800254a: d0f0 beq.n 800252e <HAL_RCC_OscConfig+0x17e>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800254c: 4b43 ldr r3, [pc, #268] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800254e: 681b ldr r3, [r3, #0]
8002550: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8002554: 687b ldr r3, [r7, #4]
8002556: 691b ldr r3, [r3, #16]
8002558: 00db lsls r3, r3, #3
800255a: 4940 ldr r1, [pc, #256] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800255c: 4313 orrs r3, r2
800255e: 600b str r3, [r1, #0]
8002560: e015 b.n 800258e <HAL_RCC_OscConfig+0x1de>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8002562: 4b3f ldr r3, [pc, #252] ; (8002660 <HAL_RCC_OscConfig+0x2b0>)
8002564: 2200 movs r2, #0
8002566: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8002568: f7ff fbd8 bl 8001d1c <HAL_GetTick>
800256c: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800256e: e008 b.n 8002582 <HAL_RCC_OscConfig+0x1d2>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8002570: f7ff fbd4 bl 8001d1c <HAL_GetTick>
8002574: 4602 mov r2, r0
8002576: 693b ldr r3, [r7, #16]
8002578: 1ad3 subs r3, r2, r3
800257a: 2b02 cmp r3, #2
800257c: d901 bls.n 8002582 <HAL_RCC_OscConfig+0x1d2>
{
return HAL_TIMEOUT;
800257e: 2303 movs r3, #3
8002580: e17b b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002582: 4b36 ldr r3, [pc, #216] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002584: 681b ldr r3, [r3, #0]
8002586: f003 0302 and.w r3, r3, #2
800258a: 2b00 cmp r3, #0
800258c: d1f0 bne.n 8002570 <HAL_RCC_OscConfig+0x1c0>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
800258e: 687b ldr r3, [r7, #4]
8002590: 681b ldr r3, [r3, #0]
8002592: f003 0308 and.w r3, r3, #8
8002596: 2b00 cmp r3, #0
8002598: d030 beq.n 80025fc <HAL_RCC_OscConfig+0x24c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
800259a: 687b ldr r3, [r7, #4]
800259c: 695b ldr r3, [r3, #20]
800259e: 2b00 cmp r3, #0
80025a0: d016 beq.n 80025d0 <HAL_RCC_OscConfig+0x220>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80025a2: 4b30 ldr r3, [pc, #192] ; (8002664 <HAL_RCC_OscConfig+0x2b4>)
80025a4: 2201 movs r2, #1
80025a6: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
80025a8: f7ff fbb8 bl 8001d1c <HAL_GetTick>
80025ac: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80025ae: e008 b.n 80025c2 <HAL_RCC_OscConfig+0x212>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
80025b0: f7ff fbb4 bl 8001d1c <HAL_GetTick>
80025b4: 4602 mov r2, r0
80025b6: 693b ldr r3, [r7, #16]
80025b8: 1ad3 subs r3, r2, r3
80025ba: 2b02 cmp r3, #2
80025bc: d901 bls.n 80025c2 <HAL_RCC_OscConfig+0x212>
{
return HAL_TIMEOUT;
80025be: 2303 movs r3, #3
80025c0: e15b b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80025c2: 4b26 ldr r3, [pc, #152] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80025c4: 6f5b ldr r3, [r3, #116] ; 0x74
80025c6: f003 0302 and.w r3, r3, #2
80025ca: 2b00 cmp r3, #0
80025cc: d0f0 beq.n 80025b0 <HAL_RCC_OscConfig+0x200>
80025ce: e015 b.n 80025fc <HAL_RCC_OscConfig+0x24c>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
80025d0: 4b24 ldr r3, [pc, #144] ; (8002664 <HAL_RCC_OscConfig+0x2b4>)
80025d2: 2200 movs r2, #0
80025d4: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80025d6: f7ff fba1 bl 8001d1c <HAL_GetTick>
80025da: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80025dc: e008 b.n 80025f0 <HAL_RCC_OscConfig+0x240>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
80025de: f7ff fb9d bl 8001d1c <HAL_GetTick>
80025e2: 4602 mov r2, r0
80025e4: 693b ldr r3, [r7, #16]
80025e6: 1ad3 subs r3, r2, r3
80025e8: 2b02 cmp r3, #2
80025ea: d901 bls.n 80025f0 <HAL_RCC_OscConfig+0x240>
{
return HAL_TIMEOUT;
80025ec: 2303 movs r3, #3
80025ee: e144 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80025f0: 4b1a ldr r3, [pc, #104] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
80025f2: 6f5b ldr r3, [r3, #116] ; 0x74
80025f4: f003 0302 and.w r3, r3, #2
80025f8: 2b00 cmp r3, #0
80025fa: d1f0 bne.n 80025de <HAL_RCC_OscConfig+0x22e>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
80025fc: 687b ldr r3, [r7, #4]
80025fe: 681b ldr r3, [r3, #0]
8002600: f003 0304 and.w r3, r3, #4
8002604: 2b00 cmp r3, #0
8002606: f000 80a0 beq.w 800274a <HAL_RCC_OscConfig+0x39a>
{
FlagStatus pwrclkchanged = RESET;
800260a: 2300 movs r3, #0
800260c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
800260e: 4b13 ldr r3, [pc, #76] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002610: 6c1b ldr r3, [r3, #64] ; 0x40
8002612: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002616: 2b00 cmp r3, #0
8002618: d10f bne.n 800263a <HAL_RCC_OscConfig+0x28a>
{
__HAL_RCC_PWR_CLK_ENABLE();
800261a: 2300 movs r3, #0
800261c: 60bb str r3, [r7, #8]
800261e: 4b0f ldr r3, [pc, #60] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002620: 6c1b ldr r3, [r3, #64] ; 0x40
8002622: 4a0e ldr r2, [pc, #56] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
8002624: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8002628: 6413 str r3, [r2, #64] ; 0x40
800262a: 4b0c ldr r3, [pc, #48] ; (800265c <HAL_RCC_OscConfig+0x2ac>)
800262c: 6c1b ldr r3, [r3, #64] ; 0x40
800262e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002632: 60bb str r3, [r7, #8]
8002634: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8002636: 2301 movs r3, #1
8002638: 75fb strb r3, [r7, #23]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800263a: 4b0b ldr r3, [pc, #44] ; (8002668 <HAL_RCC_OscConfig+0x2b8>)
800263c: 681b ldr r3, [r3, #0]
800263e: f403 7380 and.w r3, r3, #256 ; 0x100
8002642: 2b00 cmp r3, #0
8002644: d121 bne.n 800268a <HAL_RCC_OscConfig+0x2da>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8002646: 4b08 ldr r3, [pc, #32] ; (8002668 <HAL_RCC_OscConfig+0x2b8>)
8002648: 681b ldr r3, [r3, #0]
800264a: 4a07 ldr r2, [pc, #28] ; (8002668 <HAL_RCC_OscConfig+0x2b8>)
800264c: f443 7380 orr.w r3, r3, #256 ; 0x100
8002650: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8002652: f7ff fb63 bl 8001d1c <HAL_GetTick>
8002656: 6138 str r0, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002658: e011 b.n 800267e <HAL_RCC_OscConfig+0x2ce>
800265a: bf00 nop
800265c: 40023800 .word 0x40023800
8002660: 42470000 .word 0x42470000
8002664: 42470e80 .word 0x42470e80
8002668: 40007000 .word 0x40007000
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800266c: f7ff fb56 bl 8001d1c <HAL_GetTick>
8002670: 4602 mov r2, r0
8002672: 693b ldr r3, [r7, #16]
8002674: 1ad3 subs r3, r2, r3
8002676: 2b02 cmp r3, #2
8002678: d901 bls.n 800267e <HAL_RCC_OscConfig+0x2ce>
{
return HAL_TIMEOUT;
800267a: 2303 movs r3, #3
800267c: e0fd b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800267e: 4b81 ldr r3, [pc, #516] ; (8002884 <HAL_RCC_OscConfig+0x4d4>)
8002680: 681b ldr r3, [r3, #0]
8002682: f403 7380 and.w r3, r3, #256 ; 0x100
8002686: 2b00 cmp r3, #0
8002688: d0f0 beq.n 800266c <HAL_RCC_OscConfig+0x2bc>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
800268a: 687b ldr r3, [r7, #4]
800268c: 689b ldr r3, [r3, #8]
800268e: 2b01 cmp r3, #1
8002690: d106 bne.n 80026a0 <HAL_RCC_OscConfig+0x2f0>
8002692: 4b7d ldr r3, [pc, #500] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002694: 6f1b ldr r3, [r3, #112] ; 0x70
8002696: 4a7c ldr r2, [pc, #496] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002698: f043 0301 orr.w r3, r3, #1
800269c: 6713 str r3, [r2, #112] ; 0x70
800269e: e01c b.n 80026da <HAL_RCC_OscConfig+0x32a>
80026a0: 687b ldr r3, [r7, #4]
80026a2: 689b ldr r3, [r3, #8]
80026a4: 2b05 cmp r3, #5
80026a6: d10c bne.n 80026c2 <HAL_RCC_OscConfig+0x312>
80026a8: 4b77 ldr r3, [pc, #476] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026aa: 6f1b ldr r3, [r3, #112] ; 0x70
80026ac: 4a76 ldr r2, [pc, #472] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026ae: f043 0304 orr.w r3, r3, #4
80026b2: 6713 str r3, [r2, #112] ; 0x70
80026b4: 4b74 ldr r3, [pc, #464] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026b6: 6f1b ldr r3, [r3, #112] ; 0x70
80026b8: 4a73 ldr r2, [pc, #460] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026ba: f043 0301 orr.w r3, r3, #1
80026be: 6713 str r3, [r2, #112] ; 0x70
80026c0: e00b b.n 80026da <HAL_RCC_OscConfig+0x32a>
80026c2: 4b71 ldr r3, [pc, #452] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026c4: 6f1b ldr r3, [r3, #112] ; 0x70
80026c6: 4a70 ldr r2, [pc, #448] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026c8: f023 0301 bic.w r3, r3, #1
80026cc: 6713 str r3, [r2, #112] ; 0x70
80026ce: 4b6e ldr r3, [pc, #440] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026d0: 6f1b ldr r3, [r3, #112] ; 0x70
80026d2: 4a6d ldr r2, [pc, #436] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80026d4: f023 0304 bic.w r3, r3, #4
80026d8: 6713 str r3, [r2, #112] ; 0x70
/* Check the LSE State */
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
80026da: 687b ldr r3, [r7, #4]
80026dc: 689b ldr r3, [r3, #8]
80026de: 2b00 cmp r3, #0
80026e0: d015 beq.n 800270e <HAL_RCC_OscConfig+0x35e>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
80026e2: f7ff fb1b bl 8001d1c <HAL_GetTick>
80026e6: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80026e8: e00a b.n 8002700 <HAL_RCC_OscConfig+0x350>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
80026ea: f7ff fb17 bl 8001d1c <HAL_GetTick>
80026ee: 4602 mov r2, r0
80026f0: 693b ldr r3, [r7, #16]
80026f2: 1ad3 subs r3, r2, r3
80026f4: f241 3288 movw r2, #5000 ; 0x1388
80026f8: 4293 cmp r3, r2
80026fa: d901 bls.n 8002700 <HAL_RCC_OscConfig+0x350>
{
return HAL_TIMEOUT;
80026fc: 2303 movs r3, #3
80026fe: e0bc b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8002700: 4b61 ldr r3, [pc, #388] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002702: 6f1b ldr r3, [r3, #112] ; 0x70
8002704: f003 0302 and.w r3, r3, #2
8002708: 2b00 cmp r3, #0
800270a: d0ee beq.n 80026ea <HAL_RCC_OscConfig+0x33a>
800270c: e014 b.n 8002738 <HAL_RCC_OscConfig+0x388>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800270e: f7ff fb05 bl 8001d1c <HAL_GetTick>
8002712: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002714: e00a b.n 800272c <HAL_RCC_OscConfig+0x37c>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8002716: f7ff fb01 bl 8001d1c <HAL_GetTick>
800271a: 4602 mov r2, r0
800271c: 693b ldr r3, [r7, #16]
800271e: 1ad3 subs r3, r2, r3
8002720: f241 3288 movw r2, #5000 ; 0x1388
8002724: 4293 cmp r3, r2
8002726: d901 bls.n 800272c <HAL_RCC_OscConfig+0x37c>
{
return HAL_TIMEOUT;
8002728: 2303 movs r3, #3
800272a: e0a6 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
800272c: 4b56 ldr r3, [pc, #344] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
800272e: 6f1b ldr r3, [r3, #112] ; 0x70
8002730: f003 0302 and.w r3, r3, #2
8002734: 2b00 cmp r3, #0
8002736: d1ee bne.n 8002716 <HAL_RCC_OscConfig+0x366>
}
}
}
/* Restore clock configuration if changed */
if(pwrclkchanged == SET)
8002738: 7dfb ldrb r3, [r7, #23]
800273a: 2b01 cmp r3, #1
800273c: d105 bne.n 800274a <HAL_RCC_OscConfig+0x39a>
{
__HAL_RCC_PWR_CLK_DISABLE();
800273e: 4b52 ldr r3, [pc, #328] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002740: 6c1b ldr r3, [r3, #64] ; 0x40
8002742: 4a51 ldr r2, [pc, #324] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002744: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8002748: 6413 str r3, [r2, #64] ; 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800274a: 687b ldr r3, [r7, #4]
800274c: 699b ldr r3, [r3, #24]
800274e: 2b00 cmp r3, #0
8002750: f000 8092 beq.w 8002878 <HAL_RCC_OscConfig+0x4c8>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
8002754: 4b4c ldr r3, [pc, #304] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002756: 689b ldr r3, [r3, #8]
8002758: f003 030c and.w r3, r3, #12
800275c: 2b08 cmp r3, #8
800275e: d05c beq.n 800281a <HAL_RCC_OscConfig+0x46a>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8002760: 687b ldr r3, [r7, #4]
8002762: 699b ldr r3, [r3, #24]
8002764: 2b02 cmp r3, #2
8002766: d141 bne.n 80027ec <HAL_RCC_OscConfig+0x43c>
assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8002768: 4b48 ldr r3, [pc, #288] ; (800288c <HAL_RCC_OscConfig+0x4dc>)
800276a: 2200 movs r2, #0
800276c: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800276e: f7ff fad5 bl 8001d1c <HAL_GetTick>
8002772: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002774: e008 b.n 8002788 <HAL_RCC_OscConfig+0x3d8>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8002776: f7ff fad1 bl 8001d1c <HAL_GetTick>
800277a: 4602 mov r2, r0
800277c: 693b ldr r3, [r7, #16]
800277e: 1ad3 subs r3, r2, r3
8002780: 2b02 cmp r3, #2
8002782: d901 bls.n 8002788 <HAL_RCC_OscConfig+0x3d8>
{
return HAL_TIMEOUT;
8002784: 2303 movs r3, #3
8002786: e078 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002788: 4b3f ldr r3, [pc, #252] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
800278a: 681b ldr r3, [r3, #0]
800278c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8002790: 2b00 cmp r3, #0
8002792: d1f0 bne.n 8002776 <HAL_RCC_OscConfig+0x3c6>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
8002794: 687b ldr r3, [r7, #4]
8002796: 69da ldr r2, [r3, #28]
8002798: 687b ldr r3, [r7, #4]
800279a: 6a1b ldr r3, [r3, #32]
800279c: 431a orrs r2, r3
800279e: 687b ldr r3, [r7, #4]
80027a0: 6a5b ldr r3, [r3, #36] ; 0x24
80027a2: 019b lsls r3, r3, #6
80027a4: 431a orrs r2, r3
80027a6: 687b ldr r3, [r7, #4]
80027a8: 6a9b ldr r3, [r3, #40] ; 0x28
80027aa: 085b lsrs r3, r3, #1
80027ac: 3b01 subs r3, #1
80027ae: 041b lsls r3, r3, #16
80027b0: 431a orrs r2, r3
80027b2: 687b ldr r3, [r7, #4]
80027b4: 6adb ldr r3, [r3, #44] ; 0x2c
80027b6: 061b lsls r3, r3, #24
80027b8: 4933 ldr r1, [pc, #204] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80027ba: 4313 orrs r3, r2
80027bc: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLM | \
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80027be: 4b33 ldr r3, [pc, #204] ; (800288c <HAL_RCC_OscConfig+0x4dc>)
80027c0: 2201 movs r2, #1
80027c2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80027c4: f7ff faaa bl 8001d1c <HAL_GetTick>
80027c8: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80027ca: e008 b.n 80027de <HAL_RCC_OscConfig+0x42e>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80027cc: f7ff faa6 bl 8001d1c <HAL_GetTick>
80027d0: 4602 mov r2, r0
80027d2: 693b ldr r3, [r7, #16]
80027d4: 1ad3 subs r3, r2, r3
80027d6: 2b02 cmp r3, #2
80027d8: d901 bls.n 80027de <HAL_RCC_OscConfig+0x42e>
{
return HAL_TIMEOUT;
80027da: 2303 movs r3, #3
80027dc: e04d b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80027de: 4b2a ldr r3, [pc, #168] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
80027e0: 681b ldr r3, [r3, #0]
80027e2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
80027e6: 2b00 cmp r3, #0
80027e8: d0f0 beq.n 80027cc <HAL_RCC_OscConfig+0x41c>
80027ea: e045 b.n 8002878 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80027ec: 4b27 ldr r3, [pc, #156] ; (800288c <HAL_RCC_OscConfig+0x4dc>)
80027ee: 2200 movs r2, #0
80027f0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80027f2: f7ff fa93 bl 8001d1c <HAL_GetTick>
80027f6: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80027f8: e008 b.n 800280c <HAL_RCC_OscConfig+0x45c>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80027fa: f7ff fa8f bl 8001d1c <HAL_GetTick>
80027fe: 4602 mov r2, r0
8002800: 693b ldr r3, [r7, #16]
8002802: 1ad3 subs r3, r2, r3
8002804: 2b02 cmp r3, #2
8002806: d901 bls.n 800280c <HAL_RCC_OscConfig+0x45c>
{
return HAL_TIMEOUT;
8002808: 2303 movs r3, #3
800280a: e036 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800280c: 4b1e ldr r3, [pc, #120] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
800280e: 681b ldr r3, [r3, #0]
8002810: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8002814: 2b00 cmp r3, #0
8002816: d1f0 bne.n 80027fa <HAL_RCC_OscConfig+0x44a>
8002818: e02e b.n 8002878 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
800281a: 687b ldr r3, [r7, #4]
800281c: 699b ldr r3, [r3, #24]
800281e: 2b01 cmp r3, #1
8002820: d101 bne.n 8002826 <HAL_RCC_OscConfig+0x476>
{
return HAL_ERROR;
8002822: 2301 movs r3, #1
8002824: e029 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->PLLCFGR;
8002826: 4b18 ldr r3, [pc, #96] ; (8002888 <HAL_RCC_OscConfig+0x4d8>)
8002828: 685b ldr r3, [r3, #4]
800282a: 60fb str r3, [r7, #12]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800282c: 68fb ldr r3, [r7, #12]
800282e: f403 0280 and.w r2, r3, #4194304 ; 0x400000
8002832: 687b ldr r3, [r7, #4]
8002834: 69db ldr r3, [r3, #28]
8002836: 429a cmp r2, r3
8002838: d11c bne.n 8002874 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
800283a: 68fb ldr r3, [r7, #12]
800283c: f003 023f and.w r2, r3, #63 ; 0x3f
8002840: 687b ldr r3, [r7, #4]
8002842: 6a1b ldr r3, [r3, #32]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8002844: 429a cmp r2, r3
8002846: d115 bne.n 8002874 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
8002848: 68fa ldr r2, [r7, #12]
800284a: f647 73c0 movw r3, #32704 ; 0x7fc0
800284e: 4013 ands r3, r2
8002850: 687a ldr r2, [r7, #4]
8002852: 6a52 ldr r2, [r2, #36] ; 0x24
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
8002854: 4293 cmp r3, r2
8002856: d10d bne.n 8002874 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8002858: 68fb ldr r3, [r7, #12]
800285a: f403 3240 and.w r2, r3, #196608 ; 0x30000
800285e: 687b ldr r3, [r7, #4]
8002860: 6a9b ldr r3, [r3, #40] ; 0x28
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
8002862: 429a cmp r2, r3
8002864: d106 bne.n 8002874 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
8002866: 68fb ldr r3, [r7, #12]
8002868: f003 6270 and.w r2, r3, #251658240 ; 0xf000000
800286c: 687b ldr r3, [r7, #4]
800286e: 6adb ldr r3, [r3, #44] ; 0x2c
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8002870: 429a cmp r2, r3
8002872: d001 beq.n 8002878 <HAL_RCC_OscConfig+0x4c8>
{
return HAL_ERROR;
8002874: 2301 movs r3, #1
8002876: e000 b.n 800287a <HAL_RCC_OscConfig+0x4ca>
}
}
}
}
return HAL_OK;
8002878: 2300 movs r3, #0
}
800287a: 4618 mov r0, r3
800287c: 3718 adds r7, #24
800287e: 46bd mov sp, r7
8002880: bd80 pop {r7, pc}
8002882: bf00 nop
8002884: 40007000 .word 0x40007000
8002888: 40023800 .word 0x40023800
800288c: 42470060 .word 0x42470060
08002890 <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8002890: b580 push {r7, lr}
8002892: b084 sub sp, #16
8002894: af00 add r7, sp, #0
8002896: 6078 str r0, [r7, #4]
8002898: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
800289a: 687b ldr r3, [r7, #4]
800289c: 2b00 cmp r3, #0
800289e: d101 bne.n 80028a4 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80028a0: 2301 movs r3, #1
80028a2: e0cc b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
80028a4: 4b68 ldr r3, [pc, #416] ; (8002a48 <HAL_RCC_ClockConfig+0x1b8>)
80028a6: 681b ldr r3, [r3, #0]
80028a8: f003 030f and.w r3, r3, #15
80028ac: 683a ldr r2, [r7, #0]
80028ae: 429a cmp r2, r3
80028b0: d90c bls.n 80028cc <HAL_RCC_ClockConfig+0x3c>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80028b2: 4b65 ldr r3, [pc, #404] ; (8002a48 <HAL_RCC_ClockConfig+0x1b8>)
80028b4: 683a ldr r2, [r7, #0]
80028b6: b2d2 uxtb r2, r2
80028b8: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80028ba: 4b63 ldr r3, [pc, #396] ; (8002a48 <HAL_RCC_ClockConfig+0x1b8>)
80028bc: 681b ldr r3, [r3, #0]
80028be: f003 030f and.w r3, r3, #15
80028c2: 683a ldr r2, [r7, #0]
80028c4: 429a cmp r2, r3
80028c6: d001 beq.n 80028cc <HAL_RCC_ClockConfig+0x3c>
{
return HAL_ERROR;
80028c8: 2301 movs r3, #1
80028ca: e0b8 b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80028cc: 687b ldr r3, [r7, #4]
80028ce: 681b ldr r3, [r3, #0]
80028d0: f003 0302 and.w r3, r3, #2
80028d4: 2b00 cmp r3, #0
80028d6: d020 beq.n 800291a <HAL_RCC_ClockConfig+0x8a>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80028d8: 687b ldr r3, [r7, #4]
80028da: 681b ldr r3, [r3, #0]
80028dc: f003 0304 and.w r3, r3, #4
80028e0: 2b00 cmp r3, #0
80028e2: d005 beq.n 80028f0 <HAL_RCC_ClockConfig+0x60>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
80028e4: 4b59 ldr r3, [pc, #356] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
80028e6: 689b ldr r3, [r3, #8]
80028e8: 4a58 ldr r2, [pc, #352] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
80028ea: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
80028ee: 6093 str r3, [r2, #8]
}
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80028f0: 687b ldr r3, [r7, #4]
80028f2: 681b ldr r3, [r3, #0]
80028f4: f003 0308 and.w r3, r3, #8
80028f8: 2b00 cmp r3, #0
80028fa: d005 beq.n 8002908 <HAL_RCC_ClockConfig+0x78>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
80028fc: 4b53 ldr r3, [pc, #332] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
80028fe: 689b ldr r3, [r3, #8]
8002900: 4a52 ldr r2, [pc, #328] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002902: f443 4360 orr.w r3, r3, #57344 ; 0xe000
8002906: 6093 str r3, [r2, #8]
}
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8002908: 4b50 ldr r3, [pc, #320] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
800290a: 689b ldr r3, [r3, #8]
800290c: f023 02f0 bic.w r2, r3, #240 ; 0xf0
8002910: 687b ldr r3, [r7, #4]
8002912: 689b ldr r3, [r3, #8]
8002914: 494d ldr r1, [pc, #308] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002916: 4313 orrs r3, r2
8002918: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800291a: 687b ldr r3, [r7, #4]
800291c: 681b ldr r3, [r3, #0]
800291e: f003 0301 and.w r3, r3, #1
8002922: 2b00 cmp r3, #0
8002924: d044 beq.n 80029b0 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8002926: 687b ldr r3, [r7, #4]
8002928: 685b ldr r3, [r3, #4]
800292a: 2b01 cmp r3, #1
800292c: d107 bne.n 800293e <HAL_RCC_ClockConfig+0xae>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800292e: 4b47 ldr r3, [pc, #284] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002930: 681b ldr r3, [r3, #0]
8002932: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002936: 2b00 cmp r3, #0
8002938: d119 bne.n 800296e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800293a: 2301 movs r3, #1
800293c: e07f b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
}
}
/* PLL is selected as System Clock Source */
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
800293e: 687b ldr r3, [r7, #4]
8002940: 685b ldr r3, [r3, #4]
8002942: 2b02 cmp r3, #2
8002944: d003 beq.n 800294e <HAL_RCC_ClockConfig+0xbe>
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
8002946: 687b ldr r3, [r7, #4]
8002948: 685b ldr r3, [r3, #4]
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
800294a: 2b03 cmp r3, #3
800294c: d107 bne.n 800295e <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800294e: 4b3f ldr r3, [pc, #252] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002950: 681b ldr r3, [r3, #0]
8002952: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8002956: 2b00 cmp r3, #0
8002958: d109 bne.n 800296e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800295a: 2301 movs r3, #1
800295c: e06f b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800295e: 4b3b ldr r3, [pc, #236] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002960: 681b ldr r3, [r3, #0]
8002962: f003 0302 and.w r3, r3, #2
8002966: 2b00 cmp r3, #0
8002968: d101 bne.n 800296e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800296a: 2301 movs r3, #1
800296c: e067 b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800296e: 4b37 ldr r3, [pc, #220] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002970: 689b ldr r3, [r3, #8]
8002972: f023 0203 bic.w r2, r3, #3
8002976: 687b ldr r3, [r7, #4]
8002978: 685b ldr r3, [r3, #4]
800297a: 4934 ldr r1, [pc, #208] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
800297c: 4313 orrs r3, r2
800297e: 608b str r3, [r1, #8]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002980: f7ff f9cc bl 8001d1c <HAL_GetTick>
8002984: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8002986: e00a b.n 800299e <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8002988: f7ff f9c8 bl 8001d1c <HAL_GetTick>
800298c: 4602 mov r2, r0
800298e: 68fb ldr r3, [r7, #12]
8002990: 1ad3 subs r3, r2, r3
8002992: f241 3288 movw r2, #5000 ; 0x1388
8002996: 4293 cmp r3, r2
8002998: d901 bls.n 800299e <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
800299a: 2303 movs r3, #3
800299c: e04f b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800299e: 4b2b ldr r3, [pc, #172] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
80029a0: 689b ldr r3, [r3, #8]
80029a2: f003 020c and.w r2, r3, #12
80029a6: 687b ldr r3, [r7, #4]
80029a8: 685b ldr r3, [r3, #4]
80029aa: 009b lsls r3, r3, #2
80029ac: 429a cmp r2, r3
80029ae: d1eb bne.n 8002988 <HAL_RCC_ClockConfig+0xf8>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
80029b0: 4b25 ldr r3, [pc, #148] ; (8002a48 <HAL_RCC_ClockConfig+0x1b8>)
80029b2: 681b ldr r3, [r3, #0]
80029b4: f003 030f and.w r3, r3, #15
80029b8: 683a ldr r2, [r7, #0]
80029ba: 429a cmp r2, r3
80029bc: d20c bcs.n 80029d8 <HAL_RCC_ClockConfig+0x148>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80029be: 4b22 ldr r3, [pc, #136] ; (8002a48 <HAL_RCC_ClockConfig+0x1b8>)
80029c0: 683a ldr r2, [r7, #0]
80029c2: b2d2 uxtb r2, r2
80029c4: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80029c6: 4b20 ldr r3, [pc, #128] ; (8002a48 <HAL_RCC_ClockConfig+0x1b8>)
80029c8: 681b ldr r3, [r3, #0]
80029ca: f003 030f and.w r3, r3, #15
80029ce: 683a ldr r2, [r7, #0]
80029d0: 429a cmp r2, r3
80029d2: d001 beq.n 80029d8 <HAL_RCC_ClockConfig+0x148>
{
return HAL_ERROR;
80029d4: 2301 movs r3, #1
80029d6: e032 b.n 8002a3e <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80029d8: 687b ldr r3, [r7, #4]
80029da: 681b ldr r3, [r3, #0]
80029dc: f003 0304 and.w r3, r3, #4
80029e0: 2b00 cmp r3, #0
80029e2: d008 beq.n 80029f6 <HAL_RCC_ClockConfig+0x166>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80029e4: 4b19 ldr r3, [pc, #100] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
80029e6: 689b ldr r3, [r3, #8]
80029e8: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
80029ec: 687b ldr r3, [r7, #4]
80029ee: 68db ldr r3, [r3, #12]
80029f0: 4916 ldr r1, [pc, #88] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
80029f2: 4313 orrs r3, r2
80029f4: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80029f6: 687b ldr r3, [r7, #4]
80029f8: 681b ldr r3, [r3, #0]
80029fa: f003 0308 and.w r3, r3, #8
80029fe: 2b00 cmp r3, #0
8002a00: d009 beq.n 8002a16 <HAL_RCC_ClockConfig+0x186>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
8002a02: 4b12 ldr r3, [pc, #72] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002a04: 689b ldr r3, [r3, #8]
8002a06: f423 4260 bic.w r2, r3, #57344 ; 0xe000
8002a0a: 687b ldr r3, [r7, #4]
8002a0c: 691b ldr r3, [r3, #16]
8002a0e: 00db lsls r3, r3, #3
8002a10: 490e ldr r1, [pc, #56] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002a12: 4313 orrs r3, r2
8002a14: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
8002a16: f000 f821 bl 8002a5c <HAL_RCC_GetSysClockFreq>
8002a1a: 4601 mov r1, r0
8002a1c: 4b0b ldr r3, [pc, #44] ; (8002a4c <HAL_RCC_ClockConfig+0x1bc>)
8002a1e: 689b ldr r3, [r3, #8]
8002a20: 091b lsrs r3, r3, #4
8002a22: f003 030f and.w r3, r3, #15
8002a26: 4a0a ldr r2, [pc, #40] ; (8002a50 <HAL_RCC_ClockConfig+0x1c0>)
8002a28: 5cd3 ldrb r3, [r2, r3]
8002a2a: fa21 f303 lsr.w r3, r1, r3
8002a2e: 4a09 ldr r2, [pc, #36] ; (8002a54 <HAL_RCC_ClockConfig+0x1c4>)
8002a30: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings */
HAL_InitTick (uwTickPrio);
8002a32: 4b09 ldr r3, [pc, #36] ; (8002a58 <HAL_RCC_ClockConfig+0x1c8>)
8002a34: 681b ldr r3, [r3, #0]
8002a36: 4618 mov r0, r3
8002a38: f7ff f92c bl 8001c94 <HAL_InitTick>
return HAL_OK;
8002a3c: 2300 movs r3, #0
}
8002a3e: 4618 mov r0, r3
8002a40: 3710 adds r7, #16
8002a42: 46bd mov sp, r7
8002a44: bd80 pop {r7, pc}
8002a46: bf00 nop
8002a48: 40023c00 .word 0x40023c00
8002a4c: 40023800 .word 0x40023800
8002a50: 08003a9c .word 0x08003a9c
8002a54: 20000000 .word 0x20000000
8002a58: 20000004 .word 0x20000004
08002a5c <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
{
8002a5c: b5f0 push {r4, r5, r6, r7, lr}
8002a5e: b085 sub sp, #20
8002a60: af00 add r7, sp, #0
uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
8002a62: 2300 movs r3, #0
8002a64: 607b str r3, [r7, #4]
8002a66: 2300 movs r3, #0
8002a68: 60fb str r3, [r7, #12]
8002a6a: 2300 movs r3, #0
8002a6c: 603b str r3, [r7, #0]
uint32_t sysclockfreq = 0U;
8002a6e: 2300 movs r3, #0
8002a70: 60bb str r3, [r7, #8]
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
8002a72: 4b63 ldr r3, [pc, #396] ; (8002c00 <HAL_RCC_GetSysClockFreq+0x1a4>)
8002a74: 689b ldr r3, [r3, #8]
8002a76: f003 030c and.w r3, r3, #12
8002a7a: 2b04 cmp r3, #4
8002a7c: d007 beq.n 8002a8e <HAL_RCC_GetSysClockFreq+0x32>
8002a7e: 2b08 cmp r3, #8
8002a80: d008 beq.n 8002a94 <HAL_RCC_GetSysClockFreq+0x38>
8002a82: 2b00 cmp r3, #0
8002a84: f040 80b4 bne.w 8002bf0 <HAL_RCC_GetSysClockFreq+0x194>
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
8002a88: 4b5e ldr r3, [pc, #376] ; (8002c04 <HAL_RCC_GetSysClockFreq+0x1a8>)
8002a8a: 60bb str r3, [r7, #8]
break;
8002a8c: e0b3 b.n 8002bf6 <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
8002a8e: 4b5e ldr r3, [pc, #376] ; (8002c08 <HAL_RCC_GetSysClockFreq+0x1ac>)
8002a90: 60bb str r3, [r7, #8]
break;
8002a92: e0b0 b.n 8002bf6 <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
8002a94: 4b5a ldr r3, [pc, #360] ; (8002c00 <HAL_RCC_GetSysClockFreq+0x1a4>)
8002a96: 685b ldr r3, [r3, #4]
8002a98: f003 033f and.w r3, r3, #63 ; 0x3f
8002a9c: 607b str r3, [r7, #4]
if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
8002a9e: 4b58 ldr r3, [pc, #352] ; (8002c00 <HAL_RCC_GetSysClockFreq+0x1a4>)
8002aa0: 685b ldr r3, [r3, #4]
8002aa2: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8002aa6: 2b00 cmp r3, #0
8002aa8: d04a beq.n 8002b40 <HAL_RCC_GetSysClockFreq+0xe4>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8002aaa: 4b55 ldr r3, [pc, #340] ; (8002c00 <HAL_RCC_GetSysClockFreq+0x1a4>)
8002aac: 685b ldr r3, [r3, #4]
8002aae: 099b lsrs r3, r3, #6
8002ab0: f04f 0400 mov.w r4, #0
8002ab4: f240 11ff movw r1, #511 ; 0x1ff
8002ab8: f04f 0200 mov.w r2, #0
8002abc: ea03 0501 and.w r5, r3, r1
8002ac0: ea04 0602 and.w r6, r4, r2
8002ac4: 4629 mov r1, r5
8002ac6: 4632 mov r2, r6
8002ac8: f04f 0300 mov.w r3, #0
8002acc: f04f 0400 mov.w r4, #0
8002ad0: 0154 lsls r4, r2, #5
8002ad2: ea44 64d1 orr.w r4, r4, r1, lsr #27
8002ad6: 014b lsls r3, r1, #5
8002ad8: 4619 mov r1, r3
8002ada: 4622 mov r2, r4
8002adc: 1b49 subs r1, r1, r5
8002ade: eb62 0206 sbc.w r2, r2, r6
8002ae2: f04f 0300 mov.w r3, #0
8002ae6: f04f 0400 mov.w r4, #0
8002aea: 0194 lsls r4, r2, #6
8002aec: ea44 6491 orr.w r4, r4, r1, lsr #26
8002af0: 018b lsls r3, r1, #6
8002af2: 1a5b subs r3, r3, r1
8002af4: eb64 0402 sbc.w r4, r4, r2
8002af8: f04f 0100 mov.w r1, #0
8002afc: f04f 0200 mov.w r2, #0
8002b00: 00e2 lsls r2, r4, #3
8002b02: ea42 7253 orr.w r2, r2, r3, lsr #29
8002b06: 00d9 lsls r1, r3, #3
8002b08: 460b mov r3, r1
8002b0a: 4614 mov r4, r2
8002b0c: 195b adds r3, r3, r5
8002b0e: eb44 0406 adc.w r4, r4, r6
8002b12: f04f 0100 mov.w r1, #0
8002b16: f04f 0200 mov.w r2, #0
8002b1a: 0262 lsls r2, r4, #9
8002b1c: ea42 52d3 orr.w r2, r2, r3, lsr #23
8002b20: 0259 lsls r1, r3, #9
8002b22: 460b mov r3, r1
8002b24: 4614 mov r4, r2
8002b26: 4618 mov r0, r3
8002b28: 4621 mov r1, r4
8002b2a: 687b ldr r3, [r7, #4]
8002b2c: f04f 0400 mov.w r4, #0
8002b30: 461a mov r2, r3
8002b32: 4623 mov r3, r4
8002b34: f7fd fb5a bl 80001ec <__aeabi_uldivmod>
8002b38: 4603 mov r3, r0
8002b3a: 460c mov r4, r1
8002b3c: 60fb str r3, [r7, #12]
8002b3e: e049 b.n 8002bd4 <HAL_RCC_GetSysClockFreq+0x178>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8002b40: 4b2f ldr r3, [pc, #188] ; (8002c00 <HAL_RCC_GetSysClockFreq+0x1a4>)
8002b42: 685b ldr r3, [r3, #4]
8002b44: 099b lsrs r3, r3, #6
8002b46: f04f 0400 mov.w r4, #0
8002b4a: f240 11ff movw r1, #511 ; 0x1ff
8002b4e: f04f 0200 mov.w r2, #0
8002b52: ea03 0501 and.w r5, r3, r1
8002b56: ea04 0602 and.w r6, r4, r2
8002b5a: 4629 mov r1, r5
8002b5c: 4632 mov r2, r6
8002b5e: f04f 0300 mov.w r3, #0
8002b62: f04f 0400 mov.w r4, #0
8002b66: 0154 lsls r4, r2, #5
8002b68: ea44 64d1 orr.w r4, r4, r1, lsr #27
8002b6c: 014b lsls r3, r1, #5
8002b6e: 4619 mov r1, r3
8002b70: 4622 mov r2, r4
8002b72: 1b49 subs r1, r1, r5
8002b74: eb62 0206 sbc.w r2, r2, r6
8002b78: f04f 0300 mov.w r3, #0
8002b7c: f04f 0400 mov.w r4, #0
8002b80: 0194 lsls r4, r2, #6
8002b82: ea44 6491 orr.w r4, r4, r1, lsr #26
8002b86: 018b lsls r3, r1, #6
8002b88: 1a5b subs r3, r3, r1
8002b8a: eb64 0402 sbc.w r4, r4, r2
8002b8e: f04f 0100 mov.w r1, #0
8002b92: f04f 0200 mov.w r2, #0
8002b96: 00e2 lsls r2, r4, #3
8002b98: ea42 7253 orr.w r2, r2, r3, lsr #29
8002b9c: 00d9 lsls r1, r3, #3
8002b9e: 460b mov r3, r1
8002ba0: 4614 mov r4, r2
8002ba2: 195b adds r3, r3, r5
8002ba4: eb44 0406 adc.w r4, r4, r6
8002ba8: f04f 0100 mov.w r1, #0
8002bac: f04f 0200 mov.w r2, #0
8002bb0: 02a2 lsls r2, r4, #10
8002bb2: ea42 5293 orr.w r2, r2, r3, lsr #22
8002bb6: 0299 lsls r1, r3, #10
8002bb8: 460b mov r3, r1
8002bba: 4614 mov r4, r2
8002bbc: 4618 mov r0, r3
8002bbe: 4621 mov r1, r4
8002bc0: 687b ldr r3, [r7, #4]
8002bc2: f04f 0400 mov.w r4, #0
8002bc6: 461a mov r2, r3
8002bc8: 4623 mov r3, r4
8002bca: f7fd fb0f bl 80001ec <__aeabi_uldivmod>
8002bce: 4603 mov r3, r0
8002bd0: 460c mov r4, r1
8002bd2: 60fb str r3, [r7, #12]
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
8002bd4: 4b0a ldr r3, [pc, #40] ; (8002c00 <HAL_RCC_GetSysClockFreq+0x1a4>)
8002bd6: 685b ldr r3, [r3, #4]
8002bd8: 0c1b lsrs r3, r3, #16
8002bda: f003 0303 and.w r3, r3, #3
8002bde: 3301 adds r3, #1
8002be0: 005b lsls r3, r3, #1
8002be2: 603b str r3, [r7, #0]
sysclockfreq = pllvco/pllp;
8002be4: 68fa ldr r2, [r7, #12]
8002be6: 683b ldr r3, [r7, #0]
8002be8: fbb2 f3f3 udiv r3, r2, r3
8002bec: 60bb str r3, [r7, #8]
break;
8002bee: e002 b.n 8002bf6 <HAL_RCC_GetSysClockFreq+0x19a>
}
default:
{
sysclockfreq = HSI_VALUE;
8002bf0: 4b04 ldr r3, [pc, #16] ; (8002c04 <HAL_RCC_GetSysClockFreq+0x1a8>)
8002bf2: 60bb str r3, [r7, #8]
break;
8002bf4: bf00 nop
}
}
return sysclockfreq;
8002bf6: 68bb ldr r3, [r7, #8]
}
8002bf8: 4618 mov r0, r3
8002bfa: 3714 adds r7, #20
8002bfc: 46bd mov sp, r7
8002bfe: bdf0 pop {r4, r5, r6, r7, pc}
8002c00: 40023800 .word 0x40023800
8002c04: 00f42400 .word 0x00f42400
8002c08: 007a1200 .word 0x007a1200
08002c0c <HAL_SPI_Init>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
8002c0c: b580 push {r7, lr}
8002c0e: b082 sub sp, #8
8002c10: af00 add r7, sp, #0
8002c12: 6078 str r0, [r7, #4]
/* Check the SPI handle allocation */
if (hspi == NULL)
8002c14: 687b ldr r3, [r7, #4]
8002c16: 2b00 cmp r3, #0
8002c18: d101 bne.n 8002c1e <HAL_SPI_Init+0x12>
{
return HAL_ERROR;
8002c1a: 2301 movs r3, #1
8002c1c: e056 b.n 8002ccc <HAL_SPI_Init+0xc0>
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
}
#else
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
8002c1e: 687b ldr r3, [r7, #4]
8002c20: 2200 movs r2, #0
8002c22: 629a str r2, [r3, #40] ; 0x28
#endif /* USE_SPI_CRC */
if (hspi->State == HAL_SPI_STATE_RESET)
8002c24: 687b ldr r3, [r7, #4]
8002c26: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
8002c2a: b2db uxtb r3, r3
8002c2c: 2b00 cmp r3, #0
8002c2e: d106 bne.n 8002c3e <HAL_SPI_Init+0x32>
{
/* Allocate lock resource and initialize it */
hspi->Lock = HAL_UNLOCKED;
8002c30: 687b ldr r3, [r7, #4]
8002c32: 2200 movs r2, #0
8002c34: f883 2050 strb.w r2, [r3, #80] ; 0x50
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
hspi->MspInitCallback(hspi);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
8002c38: 6878 ldr r0, [r7, #4]
8002c3a: f7fe fea5 bl 8001988 <HAL_SPI_MspInit>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
hspi->State = HAL_SPI_STATE_BUSY;
8002c3e: 687b ldr r3, [r7, #4]
8002c40: 2202 movs r2, #2
8002c42: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the selected SPI peripheral */
__HAL_SPI_DISABLE(hspi);
8002c46: 687b ldr r3, [r7, #4]
8002c48: 681b ldr r3, [r3, #0]
8002c4a: 681a ldr r2, [r3, #0]
8002c4c: 687b ldr r3, [r7, #4]
8002c4e: 681b ldr r3, [r3, #0]
8002c50: f022 0240 bic.w r2, r2, #64 ; 0x40
8002c54: 601a str r2, [r3, #0]
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
Communication speed, First bit and CRC calculation state */
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
8002c56: 687b ldr r3, [r7, #4]
8002c58: 685a ldr r2, [r3, #4]
8002c5a: 687b ldr r3, [r7, #4]
8002c5c: 689b ldr r3, [r3, #8]
8002c5e: 431a orrs r2, r3
8002c60: 687b ldr r3, [r7, #4]
8002c62: 68db ldr r3, [r3, #12]
8002c64: 431a orrs r2, r3
8002c66: 687b ldr r3, [r7, #4]
8002c68: 691b ldr r3, [r3, #16]
8002c6a: 431a orrs r2, r3
8002c6c: 687b ldr r3, [r7, #4]
8002c6e: 695b ldr r3, [r3, #20]
8002c70: 431a orrs r2, r3
8002c72: 687b ldr r3, [r7, #4]
8002c74: 699b ldr r3, [r3, #24]
8002c76: f403 7300 and.w r3, r3, #512 ; 0x200
8002c7a: 431a orrs r2, r3
8002c7c: 687b ldr r3, [r7, #4]
8002c7e: 69db ldr r3, [r3, #28]
8002c80: 431a orrs r2, r3
8002c82: 687b ldr r3, [r7, #4]
8002c84: 6a1b ldr r3, [r3, #32]
8002c86: ea42 0103 orr.w r1, r2, r3
8002c8a: 687b ldr r3, [r7, #4]
8002c8c: 6a9a ldr r2, [r3, #40] ; 0x28
8002c8e: 687b ldr r3, [r7, #4]
8002c90: 681b ldr r3, [r3, #0]
8002c92: 430a orrs r2, r1
8002c94: 601a str r2, [r3, #0]
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation));
/* Configure : NSS management, TI Mode */
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
8002c96: 687b ldr r3, [r7, #4]
8002c98: 699b ldr r3, [r3, #24]
8002c9a: 0c1b lsrs r3, r3, #16
8002c9c: f003 0104 and.w r1, r3, #4
8002ca0: 687b ldr r3, [r7, #4]
8002ca2: 6a5a ldr r2, [r3, #36] ; 0x24
8002ca4: 687b ldr r3, [r7, #4]
8002ca6: 681b ldr r3, [r3, #0]
8002ca8: 430a orrs r2, r1
8002caa: 605a str r2, [r3, #4]
}
#endif /* USE_SPI_CRC */
#if defined(SPI_I2SCFGR_I2SMOD)
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
8002cac: 687b ldr r3, [r7, #4]
8002cae: 681b ldr r3, [r3, #0]
8002cb0: 69da ldr r2, [r3, #28]
8002cb2: 687b ldr r3, [r7, #4]
8002cb4: 681b ldr r3, [r3, #0]
8002cb6: f422 6200 bic.w r2, r2, #2048 ; 0x800
8002cba: 61da str r2, [r3, #28]
#endif /* SPI_I2SCFGR_I2SMOD */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
8002cbc: 687b ldr r3, [r7, #4]
8002cbe: 2200 movs r2, #0
8002cc0: 655a str r2, [r3, #84] ; 0x54
hspi->State = HAL_SPI_STATE_READY;
8002cc2: 687b ldr r3, [r7, #4]
8002cc4: 2201 movs r2, #1
8002cc6: f883 2051 strb.w r2, [r3, #81] ; 0x51
return HAL_OK;
8002cca: 2300 movs r3, #0
}
8002ccc: 4618 mov r0, r3
8002cce: 3708 adds r7, #8
8002cd0: 46bd mov sp, r7
8002cd2: bd80 pop {r7, pc}
08002cd4 <HAL_SPI_Transmit_IT>:
* @param pData pointer to data buffer
* @param Size amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
8002cd4: b480 push {r7}
8002cd6: b087 sub sp, #28
8002cd8: af00 add r7, sp, #0
8002cda: 60f8 str r0, [r7, #12]
8002cdc: 60b9 str r1, [r7, #8]
8002cde: 4613 mov r3, r2
8002ce0: 80fb strh r3, [r7, #6]
HAL_StatusTypeDef errorcode = HAL_OK;
8002ce2: 2300 movs r3, #0
8002ce4: 75fb strb r3, [r7, #23]
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
/* Process Locked */
__HAL_LOCK(hspi);
8002ce6: 68fb ldr r3, [r7, #12]
8002ce8: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
8002cec: 2b01 cmp r3, #1
8002cee: d101 bne.n 8002cf4 <HAL_SPI_Transmit_IT+0x20>
8002cf0: 2302 movs r3, #2
8002cf2: e067 b.n 8002dc4 <HAL_SPI_Transmit_IT+0xf0>
8002cf4: 68fb ldr r3, [r7, #12]
8002cf6: 2201 movs r2, #1
8002cf8: f883 2050 strb.w r2, [r3, #80] ; 0x50
if ((pData == NULL) || (Size == 0U))
8002cfc: 68bb ldr r3, [r7, #8]
8002cfe: 2b00 cmp r3, #0
8002d00: d002 beq.n 8002d08 <HAL_SPI_Transmit_IT+0x34>
8002d02: 88fb ldrh r3, [r7, #6]
8002d04: 2b00 cmp r3, #0
8002d06: d102 bne.n 8002d0e <HAL_SPI_Transmit_IT+0x3a>
{
errorcode = HAL_ERROR;
8002d08: 2301 movs r3, #1
8002d0a: 75fb strb r3, [r7, #23]
goto error;
8002d0c: e055 b.n 8002dba <HAL_SPI_Transmit_IT+0xe6>
}
if (hspi->State != HAL_SPI_STATE_READY)
8002d0e: 68fb ldr r3, [r7, #12]
8002d10: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
8002d14: b2db uxtb r3, r3
8002d16: 2b01 cmp r3, #1
8002d18: d002 beq.n 8002d20 <HAL_SPI_Transmit_IT+0x4c>
{
errorcode = HAL_BUSY;
8002d1a: 2302 movs r3, #2
8002d1c: 75fb strb r3, [r7, #23]
goto error;
8002d1e: e04c b.n 8002dba <HAL_SPI_Transmit_IT+0xe6>
}
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
8002d20: 68fb ldr r3, [r7, #12]
8002d22: 2203 movs r2, #3
8002d24: f883 2051 strb.w r2, [r3, #81] ; 0x51
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
8002d28: 68fb ldr r3, [r7, #12]
8002d2a: 2200 movs r2, #0
8002d2c: 655a str r2, [r3, #84] ; 0x54
hspi->pTxBuffPtr = (uint8_t *)pData;
8002d2e: 68fb ldr r3, [r7, #12]
8002d30: 68ba ldr r2, [r7, #8]
8002d32: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferSize = Size;
8002d34: 68fb ldr r3, [r7, #12]
8002d36: 88fa ldrh r2, [r7, #6]
8002d38: 869a strh r2, [r3, #52] ; 0x34
hspi->TxXferCount = Size;
8002d3a: 68fb ldr r3, [r7, #12]
8002d3c: 88fa ldrh r2, [r7, #6]
8002d3e: 86da strh r2, [r3, #54] ; 0x36
/* Init field not used in handle to zero */
hspi->pRxBuffPtr = (uint8_t *)NULL;
8002d40: 68fb ldr r3, [r7, #12]
8002d42: 2200 movs r2, #0
8002d44: 639a str r2, [r3, #56] ; 0x38
hspi->RxXferSize = 0U;
8002d46: 68fb ldr r3, [r7, #12]
8002d48: 2200 movs r2, #0
8002d4a: 879a strh r2, [r3, #60] ; 0x3c
hspi->RxXferCount = 0U;
8002d4c: 68fb ldr r3, [r7, #12]
8002d4e: 2200 movs r2, #0
8002d50: 87da strh r2, [r3, #62] ; 0x3e
hspi->RxISR = NULL;
8002d52: 68fb ldr r3, [r7, #12]
8002d54: 2200 movs r2, #0
8002d56: 641a str r2, [r3, #64] ; 0x40
/* Set the function for IT treatment */
if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
8002d58: 68fb ldr r3, [r7, #12]
8002d5a: 68db ldr r3, [r3, #12]
8002d5c: 2b00 cmp r3, #0
8002d5e: d003 beq.n 8002d68 <HAL_SPI_Transmit_IT+0x94>
{
hspi->TxISR = SPI_TxISR_16BIT;
8002d60: 68fb ldr r3, [r7, #12]
8002d62: 4a1b ldr r2, [pc, #108] ; (8002dd0 <HAL_SPI_Transmit_IT+0xfc>)
8002d64: 645a str r2, [r3, #68] ; 0x44
8002d66: e002 b.n 8002d6e <HAL_SPI_Transmit_IT+0x9a>
}
else
{
hspi->TxISR = SPI_TxISR_8BIT;
8002d68: 68fb ldr r3, [r7, #12]
8002d6a: 4a1a ldr r2, [pc, #104] ; (8002dd4 <HAL_SPI_Transmit_IT+0x100>)
8002d6c: 645a str r2, [r3, #68] ; 0x44
}
/* Configure communication direction : 1Line */
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
8002d6e: 68fb ldr r3, [r7, #12]
8002d70: 689b ldr r3, [r3, #8]
8002d72: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8002d76: d107 bne.n 8002d88 <HAL_SPI_Transmit_IT+0xb4>
{
SPI_1LINE_TX(hspi);
8002d78: 68fb ldr r3, [r7, #12]
8002d7a: 681b ldr r3, [r3, #0]
8002d7c: 681a ldr r2, [r3, #0]
8002d7e: 68fb ldr r3, [r7, #12]
8002d80: 681b ldr r3, [r3, #0]
8002d82: f442 4280 orr.w r2, r2, #16384 ; 0x4000
8002d86: 601a str r2, [r3, #0]
SPI_RESET_CRC(hspi);
}
#endif /* USE_SPI_CRC */
/* Enable TXE and ERR interrupt */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
8002d88: 68fb ldr r3, [r7, #12]
8002d8a: 681b ldr r3, [r3, #0]
8002d8c: 685a ldr r2, [r3, #4]
8002d8e: 68fb ldr r3, [r7, #12]
8002d90: 681b ldr r3, [r3, #0]
8002d92: f042 02a0 orr.w r2, r2, #160 ; 0xa0
8002d96: 605a str r2, [r3, #4]
/* Check if the SPI is already enabled */
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
8002d98: 68fb ldr r3, [r7, #12]
8002d9a: 681b ldr r3, [r3, #0]
8002d9c: 681b ldr r3, [r3, #0]
8002d9e: f003 0340 and.w r3, r3, #64 ; 0x40
8002da2: 2b40 cmp r3, #64 ; 0x40
8002da4: d008 beq.n 8002db8 <HAL_SPI_Transmit_IT+0xe4>
{
/* Enable SPI peripheral */
__HAL_SPI_ENABLE(hspi);
8002da6: 68fb ldr r3, [r7, #12]
8002da8: 681b ldr r3, [r3, #0]
8002daa: 681a ldr r2, [r3, #0]
8002dac: 68fb ldr r3, [r7, #12]
8002dae: 681b ldr r3, [r3, #0]
8002db0: f042 0240 orr.w r2, r2, #64 ; 0x40
8002db4: 601a str r2, [r3, #0]
8002db6: e000 b.n 8002dba <HAL_SPI_Transmit_IT+0xe6>
}
error :
8002db8: bf00 nop
__HAL_UNLOCK(hspi);
8002dba: 68fb ldr r3, [r7, #12]
8002dbc: 2200 movs r2, #0
8002dbe: f883 2050 strb.w r2, [r3, #80] ; 0x50
return errorcode;
8002dc2: 7dfb ldrb r3, [r7, #23]
}
8002dc4: 4618 mov r0, r3
8002dc6: 371c adds r7, #28
8002dc8: 46bd mov sp, r7
8002dca: f85d 7b04 ldr.w r7, [sp], #4
8002dce: 4770 bx lr
8002dd0: 0800306f .word 0x0800306f
8002dd4: 08003029 .word 0x08003029
08002dd8 <HAL_SPI_IRQHandler>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for the specified SPI module.
* @retval None
*/
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
{
8002dd8: b580 push {r7, lr}
8002dda: b088 sub sp, #32
8002ddc: af00 add r7, sp, #0
8002dde: 6078 str r0, [r7, #4]
uint32_t itsource = hspi->Instance->CR2;
8002de0: 687b ldr r3, [r7, #4]
8002de2: 681b ldr r3, [r3, #0]
8002de4: 685b ldr r3, [r3, #4]
8002de6: 61fb str r3, [r7, #28]
uint32_t itflag = hspi->Instance->SR;
8002de8: 687b ldr r3, [r7, #4]
8002dea: 681b ldr r3, [r3, #0]
8002dec: 689b ldr r3, [r3, #8]
8002dee: 61bb str r3, [r7, #24]
/* SPI in mode Receiver ----------------------------------------------------*/
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
8002df0: 69bb ldr r3, [r7, #24]
8002df2: 099b lsrs r3, r3, #6
8002df4: f003 0301 and.w r3, r3, #1
8002df8: 2b00 cmp r3, #0
8002dfa: d10f bne.n 8002e1c <HAL_SPI_IRQHandler+0x44>
(SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
8002dfc: 69bb ldr r3, [r7, #24]
8002dfe: f003 0301 and.w r3, r3, #1
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
8002e02: 2b00 cmp r3, #0
8002e04: d00a beq.n 8002e1c <HAL_SPI_IRQHandler+0x44>
(SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
8002e06: 69fb ldr r3, [r7, #28]
8002e08: 099b lsrs r3, r3, #6
8002e0a: f003 0301 and.w r3, r3, #1
8002e0e: 2b00 cmp r3, #0
8002e10: d004 beq.n 8002e1c <HAL_SPI_IRQHandler+0x44>
{
hspi->RxISR(hspi);
8002e12: 687b ldr r3, [r7, #4]
8002e14: 6c1b ldr r3, [r3, #64] ; 0x40
8002e16: 6878 ldr r0, [r7, #4]
8002e18: 4798 blx r3
return;
8002e1a: e0d8 b.n 8002fce <HAL_SPI_IRQHandler+0x1f6>
}
/* SPI in mode Transmitter -------------------------------------------------*/
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET))
8002e1c: 69bb ldr r3, [r7, #24]
8002e1e: 085b lsrs r3, r3, #1
8002e20: f003 0301 and.w r3, r3, #1
8002e24: 2b00 cmp r3, #0
8002e26: d00a beq.n 8002e3e <HAL_SPI_IRQHandler+0x66>
8002e28: 69fb ldr r3, [r7, #28]
8002e2a: 09db lsrs r3, r3, #7
8002e2c: f003 0301 and.w r3, r3, #1
8002e30: 2b00 cmp r3, #0
8002e32: d004 beq.n 8002e3e <HAL_SPI_IRQHandler+0x66>
{
hspi->TxISR(hspi);
8002e34: 687b ldr r3, [r7, #4]
8002e36: 6c5b ldr r3, [r3, #68] ; 0x44
8002e38: 6878 ldr r0, [r7, #4]
8002e3a: 4798 blx r3
return;
8002e3c: e0c7 b.n 8002fce <HAL_SPI_IRQHandler+0x1f6>
}
/* SPI in Error Treatment --------------------------------------------------*/
if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
8002e3e: 69bb ldr r3, [r7, #24]
8002e40: 095b lsrs r3, r3, #5
8002e42: f003 0301 and.w r3, r3, #1
8002e46: 2b00 cmp r3, #0
8002e48: d10c bne.n 8002e64 <HAL_SPI_IRQHandler+0x8c>
8002e4a: 69bb ldr r3, [r7, #24]
8002e4c: 099b lsrs r3, r3, #6
8002e4e: f003 0301 and.w r3, r3, #1
8002e52: 2b00 cmp r3, #0
8002e54: d106 bne.n 8002e64 <HAL_SPI_IRQHandler+0x8c>
|| (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
8002e56: 69bb ldr r3, [r7, #24]
8002e58: 0a1b lsrs r3, r3, #8
8002e5a: f003 0301 and.w r3, r3, #1
8002e5e: 2b00 cmp r3, #0
8002e60: f000 80b5 beq.w 8002fce <HAL_SPI_IRQHandler+0x1f6>
8002e64: 69fb ldr r3, [r7, #28]
8002e66: 095b lsrs r3, r3, #5
8002e68: f003 0301 and.w r3, r3, #1
8002e6c: 2b00 cmp r3, #0
8002e6e: f000 80ae beq.w 8002fce <HAL_SPI_IRQHandler+0x1f6>
{
/* SPI Overrun error interrupt occurred ----------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
8002e72: 69bb ldr r3, [r7, #24]
8002e74: 099b lsrs r3, r3, #6
8002e76: f003 0301 and.w r3, r3, #1
8002e7a: 2b00 cmp r3, #0
8002e7c: d023 beq.n 8002ec6 <HAL_SPI_IRQHandler+0xee>
{
if (hspi->State != HAL_SPI_STATE_BUSY_TX)
8002e7e: 687b ldr r3, [r7, #4]
8002e80: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
8002e84: b2db uxtb r3, r3
8002e86: 2b03 cmp r3, #3
8002e88: d011 beq.n 8002eae <HAL_SPI_IRQHandler+0xd6>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
8002e8a: 687b ldr r3, [r7, #4]
8002e8c: 6d5b ldr r3, [r3, #84] ; 0x54
8002e8e: f043 0204 orr.w r2, r3, #4
8002e92: 687b ldr r3, [r7, #4]
8002e94: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_OVRFLAG(hspi);
8002e96: 2300 movs r3, #0
8002e98: 617b str r3, [r7, #20]
8002e9a: 687b ldr r3, [r7, #4]
8002e9c: 681b ldr r3, [r3, #0]
8002e9e: 68db ldr r3, [r3, #12]
8002ea0: 617b str r3, [r7, #20]
8002ea2: 687b ldr r3, [r7, #4]
8002ea4: 681b ldr r3, [r3, #0]
8002ea6: 689b ldr r3, [r3, #8]
8002ea8: 617b str r3, [r7, #20]
8002eaa: 697b ldr r3, [r7, #20]
8002eac: e00b b.n 8002ec6 <HAL_SPI_IRQHandler+0xee>
}
else
{
__HAL_SPI_CLEAR_OVRFLAG(hspi);
8002eae: 2300 movs r3, #0
8002eb0: 613b str r3, [r7, #16]
8002eb2: 687b ldr r3, [r7, #4]
8002eb4: 681b ldr r3, [r3, #0]
8002eb6: 68db ldr r3, [r3, #12]
8002eb8: 613b str r3, [r7, #16]
8002eba: 687b ldr r3, [r7, #4]
8002ebc: 681b ldr r3, [r3, #0]
8002ebe: 689b ldr r3, [r3, #8]
8002ec0: 613b str r3, [r7, #16]
8002ec2: 693b ldr r3, [r7, #16]
return;
8002ec4: e083 b.n 8002fce <HAL_SPI_IRQHandler+0x1f6>
}
}
/* SPI Mode Fault error interrupt occurred -------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET)
8002ec6: 69bb ldr r3, [r7, #24]
8002ec8: 095b lsrs r3, r3, #5
8002eca: f003 0301 and.w r3, r3, #1
8002ece: 2b00 cmp r3, #0
8002ed0: d014 beq.n 8002efc <HAL_SPI_IRQHandler+0x124>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
8002ed2: 687b ldr r3, [r7, #4]
8002ed4: 6d5b ldr r3, [r3, #84] ; 0x54
8002ed6: f043 0201 orr.w r2, r3, #1
8002eda: 687b ldr r3, [r7, #4]
8002edc: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_MODFFLAG(hspi);
8002ede: 2300 movs r3, #0
8002ee0: 60fb str r3, [r7, #12]
8002ee2: 687b ldr r3, [r7, #4]
8002ee4: 681b ldr r3, [r3, #0]
8002ee6: 689b ldr r3, [r3, #8]
8002ee8: 60fb str r3, [r7, #12]
8002eea: 687b ldr r3, [r7, #4]
8002eec: 681b ldr r3, [r3, #0]
8002eee: 681a ldr r2, [r3, #0]
8002ef0: 687b ldr r3, [r7, #4]
8002ef2: 681b ldr r3, [r3, #0]
8002ef4: f022 0240 bic.w r2, r2, #64 ; 0x40
8002ef8: 601a str r2, [r3, #0]
8002efa: 68fb ldr r3, [r7, #12]
}
/* SPI Frame error interrupt occurred ------------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)
8002efc: 69bb ldr r3, [r7, #24]
8002efe: 0a1b lsrs r3, r3, #8
8002f00: f003 0301 and.w r3, r3, #1
8002f04: 2b00 cmp r3, #0
8002f06: d00c beq.n 8002f22 <HAL_SPI_IRQHandler+0x14a>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
8002f08: 687b ldr r3, [r7, #4]
8002f0a: 6d5b ldr r3, [r3, #84] ; 0x54
8002f0c: f043 0208 orr.w r2, r3, #8
8002f10: 687b ldr r3, [r7, #4]
8002f12: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_FREFLAG(hspi);
8002f14: 2300 movs r3, #0
8002f16: 60bb str r3, [r7, #8]
8002f18: 687b ldr r3, [r7, #4]
8002f1a: 681b ldr r3, [r3, #0]
8002f1c: 689b ldr r3, [r3, #8]
8002f1e: 60bb str r3, [r7, #8]
8002f20: 68bb ldr r3, [r7, #8]
}
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
8002f22: 687b ldr r3, [r7, #4]
8002f24: 6d5b ldr r3, [r3, #84] ; 0x54
8002f26: 2b00 cmp r3, #0
8002f28: d050 beq.n 8002fcc <HAL_SPI_IRQHandler+0x1f4>
{
/* Disable all interrupts */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
8002f2a: 687b ldr r3, [r7, #4]
8002f2c: 681b ldr r3, [r3, #0]
8002f2e: 685a ldr r2, [r3, #4]
8002f30: 687b ldr r3, [r7, #4]
8002f32: 681b ldr r3, [r3, #0]
8002f34: f022 02e0 bic.w r2, r2, #224 ; 0xe0
8002f38: 605a str r2, [r3, #4]
hspi->State = HAL_SPI_STATE_READY;
8002f3a: 687b ldr r3, [r7, #4]
8002f3c: 2201 movs r2, #1
8002f3e: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the SPI DMA requests if enabled */
if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
8002f42: 69fb ldr r3, [r7, #28]
8002f44: f003 0302 and.w r3, r3, #2
8002f48: 2b00 cmp r3, #0
8002f4a: d104 bne.n 8002f56 <HAL_SPI_IRQHandler+0x17e>
8002f4c: 69fb ldr r3, [r7, #28]
8002f4e: f003 0301 and.w r3, r3, #1
8002f52: 2b00 cmp r3, #0
8002f54: d034 beq.n 8002fc0 <HAL_SPI_IRQHandler+0x1e8>
{
CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
8002f56: 687b ldr r3, [r7, #4]
8002f58: 681b ldr r3, [r3, #0]
8002f5a: 685a ldr r2, [r3, #4]
8002f5c: 687b ldr r3, [r7, #4]
8002f5e: 681b ldr r3, [r3, #0]
8002f60: f022 0203 bic.w r2, r2, #3
8002f64: 605a str r2, [r3, #4]
/* Abort the SPI DMA Rx channel */
if (hspi->hdmarx != NULL)
8002f66: 687b ldr r3, [r7, #4]
8002f68: 6cdb ldr r3, [r3, #76] ; 0x4c
8002f6a: 2b00 cmp r3, #0
8002f6c: d011 beq.n 8002f92 <HAL_SPI_IRQHandler+0x1ba>
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
8002f6e: 687b ldr r3, [r7, #4]
8002f70: 6cdb ldr r3, [r3, #76] ; 0x4c
8002f72: 4a18 ldr r2, [pc, #96] ; (8002fd4 <HAL_SPI_IRQHandler+0x1fc>)
8002f74: 651a str r2, [r3, #80] ; 0x50
if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx))
8002f76: 687b ldr r3, [r7, #4]
8002f78: 6cdb ldr r3, [r3, #76] ; 0x4c
8002f7a: 4618 mov r0, r3
8002f7c: f7ff f80d bl 8001f9a <HAL_DMA_Abort_IT>
8002f80: 4603 mov r3, r0
8002f82: 2b00 cmp r3, #0
8002f84: d005 beq.n 8002f92 <HAL_SPI_IRQHandler+0x1ba>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
8002f86: 687b ldr r3, [r7, #4]
8002f88: 6d5b ldr r3, [r3, #84] ; 0x54
8002f8a: f043 0240 orr.w r2, r3, #64 ; 0x40
8002f8e: 687b ldr r3, [r7, #4]
8002f90: 655a str r2, [r3, #84] ; 0x54
}
}
/* Abort the SPI DMA Tx channel */
if (hspi->hdmatx != NULL)
8002f92: 687b ldr r3, [r7, #4]
8002f94: 6c9b ldr r3, [r3, #72] ; 0x48
8002f96: 2b00 cmp r3, #0
8002f98: d016 beq.n 8002fc8 <HAL_SPI_IRQHandler+0x1f0>
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
8002f9a: 687b ldr r3, [r7, #4]
8002f9c: 6c9b ldr r3, [r3, #72] ; 0x48
8002f9e: 4a0d ldr r2, [pc, #52] ; (8002fd4 <HAL_SPI_IRQHandler+0x1fc>)
8002fa0: 651a str r2, [r3, #80] ; 0x50
if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx))
8002fa2: 687b ldr r3, [r7, #4]
8002fa4: 6c9b ldr r3, [r3, #72] ; 0x48
8002fa6: 4618 mov r0, r3
8002fa8: f7fe fff7 bl 8001f9a <HAL_DMA_Abort_IT>
8002fac: 4603 mov r3, r0
8002fae: 2b00 cmp r3, #0
8002fb0: d00a beq.n 8002fc8 <HAL_SPI_IRQHandler+0x1f0>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
8002fb2: 687b ldr r3, [r7, #4]
8002fb4: 6d5b ldr r3, [r3, #84] ; 0x54
8002fb6: f043 0240 orr.w r2, r3, #64 ; 0x40
8002fba: 687b ldr r3, [r7, #4]
8002fbc: 655a str r2, [r3, #84] ; 0x54
if (hspi->hdmatx != NULL)
8002fbe: e003 b.n 8002fc8 <HAL_SPI_IRQHandler+0x1f0>
{
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
8002fc0: 6878 ldr r0, [r7, #4]
8002fc2: f000 f813 bl 8002fec <HAL_SPI_ErrorCallback>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
}
return;
8002fc6: e000 b.n 8002fca <HAL_SPI_IRQHandler+0x1f2>
if (hspi->hdmatx != NULL)
8002fc8: bf00 nop
return;
8002fca: bf00 nop
8002fcc: bf00 nop
}
}
8002fce: 3720 adds r7, #32
8002fd0: 46bd mov sp, r7
8002fd2: bd80 pop {r7, pc}
8002fd4: 08003001 .word 0x08003001
08002fd8 <HAL_SPI_TxCpltCallback>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
{
8002fd8: b480 push {r7}
8002fda: b083 sub sp, #12
8002fdc: af00 add r7, sp, #0
8002fde: 6078 str r0, [r7, #4]
UNUSED(hspi);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SPI_TxCpltCallback should be implemented in the user file
*/
}
8002fe0: bf00 nop
8002fe2: 370c adds r7, #12
8002fe4: 46bd mov sp, r7
8002fe6: f85d 7b04 ldr.w r7, [sp], #4
8002fea: 4770 bx lr
08002fec <HAL_SPI_ErrorCallback>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
{
8002fec: b480 push {r7}
8002fee: b083 sub sp, #12
8002ff0: af00 add r7, sp, #0
8002ff2: 6078 str r0, [r7, #4]
the HAL_SPI_ErrorCallback should be implemented in the user file
*/
/* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
and user can use HAL_SPI_GetError() API to check the latest error occurred
*/
}
8002ff4: bf00 nop
8002ff6: 370c adds r7, #12
8002ff8: 46bd mov sp, r7
8002ffa: f85d 7b04 ldr.w r7, [sp], #4
8002ffe: 4770 bx lr
08003000 <SPI_DMAAbortOnError>:
* (To be called at end of DMA Abort procedure following error occurrence).
* @param hdma DMA handle.
* @retval None
*/
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
8003000: b580 push {r7, lr}
8003002: b084 sub sp, #16
8003004: af00 add r7, sp, #0
8003006: 6078 str r0, [r7, #4]
SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
8003008: 687b ldr r3, [r7, #4]
800300a: 6b9b ldr r3, [r3, #56] ; 0x38
800300c: 60fb str r3, [r7, #12]
hspi->RxXferCount = 0U;
800300e: 68fb ldr r3, [r7, #12]
8003010: 2200 movs r2, #0
8003012: 87da strh r2, [r3, #62] ; 0x3e
hspi->TxXferCount = 0U;
8003014: 68fb ldr r3, [r7, #12]
8003016: 2200 movs r2, #0
8003018: 86da strh r2, [r3, #54] ; 0x36
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
800301a: 68f8 ldr r0, [r7, #12]
800301c: f7ff ffe6 bl 8002fec <HAL_SPI_ErrorCallback>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
8003020: bf00 nop
8003022: 3710 adds r7, #16
8003024: 46bd mov sp, r7
8003026: bd80 pop {r7, pc}
08003028 <SPI_TxISR_8BIT>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
8003028: b580 push {r7, lr}
800302a: b082 sub sp, #8
800302c: af00 add r7, sp, #0
800302e: 6078 str r0, [r7, #4]
*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
8003030: 687b ldr r3, [r7, #4]
8003032: 6b1a ldr r2, [r3, #48] ; 0x30
8003034: 687b ldr r3, [r7, #4]
8003036: 681b ldr r3, [r3, #0]
8003038: 330c adds r3, #12
800303a: 7812 ldrb r2, [r2, #0]
800303c: 701a strb r2, [r3, #0]
hspi->pTxBuffPtr++;
800303e: 687b ldr r3, [r7, #4]
8003040: 6b1b ldr r3, [r3, #48] ; 0x30
8003042: 1c5a adds r2, r3, #1
8003044: 687b ldr r3, [r7, #4]
8003046: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferCount--;
8003048: 687b ldr r3, [r7, #4]
800304a: 8edb ldrh r3, [r3, #54] ; 0x36
800304c: b29b uxth r3, r3
800304e: 3b01 subs r3, #1
8003050: b29a uxth r2, r3
8003052: 687b ldr r3, [r7, #4]
8003054: 86da strh r2, [r3, #54] ; 0x36
if (hspi->TxXferCount == 0U)
8003056: 687b ldr r3, [r7, #4]
8003058: 8edb ldrh r3, [r3, #54] ; 0x36
800305a: b29b uxth r3, r3
800305c: 2b00 cmp r3, #0
800305e: d102 bne.n 8003066 <SPI_TxISR_8BIT+0x3e>
{
/* Enable CRC Transmission */
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
}
#endif /* USE_SPI_CRC */
SPI_CloseTx_ISR(hspi);
8003060: 6878 ldr r0, [r7, #4]
8003062: f000 f8d3 bl 800320c <SPI_CloseTx_ISR>
}
}
8003066: bf00 nop
8003068: 3708 adds r7, #8
800306a: 46bd mov sp, r7
800306c: bd80 pop {r7, pc}
0800306e <SPI_TxISR_16BIT>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
800306e: b580 push {r7, lr}
8003070: b082 sub sp, #8
8003072: af00 add r7, sp, #0
8003074: 6078 str r0, [r7, #4]
/* Transmit data in 16 Bit mode */
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
8003076: 687b ldr r3, [r7, #4]
8003078: 6b1b ldr r3, [r3, #48] ; 0x30
800307a: 881a ldrh r2, [r3, #0]
800307c: 687b ldr r3, [r7, #4]
800307e: 681b ldr r3, [r3, #0]
8003080: 60da str r2, [r3, #12]
hspi->pTxBuffPtr += sizeof(uint16_t);
8003082: 687b ldr r3, [r7, #4]
8003084: 6b1b ldr r3, [r3, #48] ; 0x30
8003086: 1c9a adds r2, r3, #2
8003088: 687b ldr r3, [r7, #4]
800308a: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferCount--;
800308c: 687b ldr r3, [r7, #4]
800308e: 8edb ldrh r3, [r3, #54] ; 0x36
8003090: b29b uxth r3, r3
8003092: 3b01 subs r3, #1
8003094: b29a uxth r2, r3
8003096: 687b ldr r3, [r7, #4]
8003098: 86da strh r2, [r3, #54] ; 0x36
if (hspi->TxXferCount == 0U)
800309a: 687b ldr r3, [r7, #4]
800309c: 8edb ldrh r3, [r3, #54] ; 0x36
800309e: b29b uxth r3, r3
80030a0: 2b00 cmp r3, #0
80030a2: d102 bne.n 80030aa <SPI_TxISR_16BIT+0x3c>
{
/* Enable CRC Transmission */
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
}
#endif /* USE_SPI_CRC */
SPI_CloseTx_ISR(hspi);
80030a4: 6878 ldr r0, [r7, #4]
80030a6: f000 f8b1 bl 800320c <SPI_CloseTx_ISR>
}
}
80030aa: bf00 nop
80030ac: 3708 adds r7, #8
80030ae: 46bd mov sp, r7
80030b0: bd80 pop {r7, pc}
080030b2 <SPI_WaitFlagStateUntilTimeout>:
* @param Tickstart tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
uint32_t Timeout, uint32_t Tickstart)
{
80030b2: b580 push {r7, lr}
80030b4: b084 sub sp, #16
80030b6: af00 add r7, sp, #0
80030b8: 60f8 str r0, [r7, #12]
80030ba: 60b9 str r1, [r7, #8]
80030bc: 603b str r3, [r7, #0]
80030be: 4613 mov r3, r2
80030c0: 71fb strb r3, [r7, #7]
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
80030c2: e04c b.n 800315e <SPI_WaitFlagStateUntilTimeout+0xac>
{
if (Timeout != HAL_MAX_DELAY)
80030c4: 683b ldr r3, [r7, #0]
80030c6: f1b3 3fff cmp.w r3, #4294967295
80030ca: d048 beq.n 800315e <SPI_WaitFlagStateUntilTimeout+0xac>
{
if (((HAL_GetTick() - Tickstart) >= Timeout) || (Timeout == 0U))
80030cc: f7fe fe26 bl 8001d1c <HAL_GetTick>
80030d0: 4602 mov r2, r0
80030d2: 69bb ldr r3, [r7, #24]
80030d4: 1ad3 subs r3, r2, r3
80030d6: 683a ldr r2, [r7, #0]
80030d8: 429a cmp r2, r3
80030da: d902 bls.n 80030e2 <SPI_WaitFlagStateUntilTimeout+0x30>
80030dc: 683b ldr r3, [r7, #0]
80030de: 2b00 cmp r3, #0
80030e0: d13d bne.n 800315e <SPI_WaitFlagStateUntilTimeout+0xac>
/* Disable the SPI and reset the CRC: the CRC value should be cleared
on both master and slave sides in order to resynchronize the master
and slave for their respective CRC calculation */
/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
80030e2: 68fb ldr r3, [r7, #12]
80030e4: 681b ldr r3, [r3, #0]
80030e6: 685a ldr r2, [r3, #4]
80030e8: 68fb ldr r3, [r7, #12]
80030ea: 681b ldr r3, [r3, #0]
80030ec: f022 02e0 bic.w r2, r2, #224 ; 0xe0
80030f0: 605a str r2, [r3, #4]
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
80030f2: 68fb ldr r3, [r7, #12]
80030f4: 685b ldr r3, [r3, #4]
80030f6: f5b3 7f82 cmp.w r3, #260 ; 0x104
80030fa: d111 bne.n 8003120 <SPI_WaitFlagStateUntilTimeout+0x6e>
80030fc: 68fb ldr r3, [r7, #12]
80030fe: 689b ldr r3, [r3, #8]
8003100: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8003104: d004 beq.n 8003110 <SPI_WaitFlagStateUntilTimeout+0x5e>
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
8003106: 68fb ldr r3, [r7, #12]
8003108: 689b ldr r3, [r3, #8]
800310a: f5b3 6f80 cmp.w r3, #1024 ; 0x400
800310e: d107 bne.n 8003120 <SPI_WaitFlagStateUntilTimeout+0x6e>
{
/* Disable SPI peripheral */
__HAL_SPI_DISABLE(hspi);
8003110: 68fb ldr r3, [r7, #12]
8003112: 681b ldr r3, [r3, #0]
8003114: 681a ldr r2, [r3, #0]
8003116: 68fb ldr r3, [r7, #12]
8003118: 681b ldr r3, [r3, #0]
800311a: f022 0240 bic.w r2, r2, #64 ; 0x40
800311e: 601a str r2, [r3, #0]
}
/* Reset CRC Calculation */
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
8003120: 68fb ldr r3, [r7, #12]
8003122: 6a9b ldr r3, [r3, #40] ; 0x28
8003124: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
8003128: d10f bne.n 800314a <SPI_WaitFlagStateUntilTimeout+0x98>
{
SPI_RESET_CRC(hspi);
800312a: 68fb ldr r3, [r7, #12]
800312c: 681b ldr r3, [r3, #0]
800312e: 681a ldr r2, [r3, #0]
8003130: 68fb ldr r3, [r7, #12]
8003132: 681b ldr r3, [r3, #0]
8003134: f422 5200 bic.w r2, r2, #8192 ; 0x2000
8003138: 601a str r2, [r3, #0]
800313a: 68fb ldr r3, [r7, #12]
800313c: 681b ldr r3, [r3, #0]
800313e: 681a ldr r2, [r3, #0]
8003140: 68fb ldr r3, [r7, #12]
8003142: 681b ldr r3, [r3, #0]
8003144: f442 5200 orr.w r2, r2, #8192 ; 0x2000
8003148: 601a str r2, [r3, #0]
}
hspi->State = HAL_SPI_STATE_READY;
800314a: 68fb ldr r3, [r7, #12]
800314c: 2201 movs r2, #1
800314e: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Process Unlocked */
__HAL_UNLOCK(hspi);
8003152: 68fb ldr r3, [r7, #12]
8003154: 2200 movs r2, #0
8003156: f883 2050 strb.w r2, [r3, #80] ; 0x50
return HAL_TIMEOUT;
800315a: 2303 movs r3, #3
800315c: e00f b.n 800317e <SPI_WaitFlagStateUntilTimeout+0xcc>
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
800315e: 68fb ldr r3, [r7, #12]
8003160: 681b ldr r3, [r3, #0]
8003162: 689a ldr r2, [r3, #8]
8003164: 68bb ldr r3, [r7, #8]
8003166: 4013 ands r3, r2
8003168: 68ba ldr r2, [r7, #8]
800316a: 429a cmp r2, r3
800316c: bf0c ite eq
800316e: 2301 moveq r3, #1
8003170: 2300 movne r3, #0
8003172: b2db uxtb r3, r3
8003174: 461a mov r2, r3
8003176: 79fb ldrb r3, [r7, #7]
8003178: 429a cmp r2, r3
800317a: d1a3 bne.n 80030c4 <SPI_WaitFlagStateUntilTimeout+0x12>
}
}
}
return HAL_OK;
800317c: 2300 movs r3, #0
}
800317e: 4618 mov r0, r3
8003180: 3710 adds r7, #16
8003182: 46bd mov sp, r7
8003184: bd80 pop {r7, pc}
...
08003188 <SPI_EndRxTxTransaction>:
* @param Timeout Timeout duration
* @param Tickstart tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
{
8003188: b580 push {r7, lr}
800318a: b088 sub sp, #32
800318c: af02 add r7, sp, #8
800318e: 60f8 str r0, [r7, #12]
8003190: 60b9 str r1, [r7, #8]
8003192: 607a str r2, [r7, #4]
/* Timeout in µs */
__IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
8003194: 4b1b ldr r3, [pc, #108] ; (8003204 <SPI_EndRxTxTransaction+0x7c>)
8003196: 681b ldr r3, [r3, #0]
8003198: 4a1b ldr r2, [pc, #108] ; (8003208 <SPI_EndRxTxTransaction+0x80>)
800319a: fba2 2303 umull r2, r3, r2, r3
800319e: 0d5b lsrs r3, r3, #21
80031a0: f44f 727a mov.w r2, #1000 ; 0x3e8
80031a4: fb02 f303 mul.w r3, r2, r3
80031a8: 617b str r3, [r7, #20]
/* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
if (hspi->Init.Mode == SPI_MODE_MASTER)
80031aa: 68fb ldr r3, [r7, #12]
80031ac: 685b ldr r3, [r3, #4]
80031ae: f5b3 7f82 cmp.w r3, #260 ; 0x104
80031b2: d112 bne.n 80031da <SPI_EndRxTxTransaction+0x52>
{
/* Control the BSY flag */
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
80031b4: 687b ldr r3, [r7, #4]
80031b6: 9300 str r3, [sp, #0]
80031b8: 68bb ldr r3, [r7, #8]
80031ba: 2200 movs r2, #0
80031bc: 2180 movs r1, #128 ; 0x80
80031be: 68f8 ldr r0, [r7, #12]
80031c0: f7ff ff77 bl 80030b2 <SPI_WaitFlagStateUntilTimeout>
80031c4: 4603 mov r3, r0
80031c6: 2b00 cmp r3, #0
80031c8: d016 beq.n 80031f8 <SPI_EndRxTxTransaction+0x70>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
80031ca: 68fb ldr r3, [r7, #12]
80031cc: 6d5b ldr r3, [r3, #84] ; 0x54
80031ce: f043 0220 orr.w r2, r3, #32
80031d2: 68fb ldr r3, [r7, #12]
80031d4: 655a str r2, [r3, #84] ; 0x54
return HAL_TIMEOUT;
80031d6: 2303 movs r3, #3
80031d8: e00f b.n 80031fa <SPI_EndRxTxTransaction+0x72>
* User have to calculate the timeout value to fit with the time of 1 byte transfer.
* This time is directly link with the SPI clock from Master device.
*/
do
{
if (count == 0U)
80031da: 697b ldr r3, [r7, #20]
80031dc: 2b00 cmp r3, #0
80031de: d00a beq.n 80031f6 <SPI_EndRxTxTransaction+0x6e>
{
break;
}
count--;
80031e0: 697b ldr r3, [r7, #20]
80031e2: 3b01 subs r3, #1
80031e4: 617b str r3, [r7, #20]
} while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
80031e6: 68fb ldr r3, [r7, #12]
80031e8: 681b ldr r3, [r3, #0]
80031ea: 689b ldr r3, [r3, #8]
80031ec: f003 0380 and.w r3, r3, #128 ; 0x80
80031f0: 2b80 cmp r3, #128 ; 0x80
80031f2: d0f2 beq.n 80031da <SPI_EndRxTxTransaction+0x52>
80031f4: e000 b.n 80031f8 <SPI_EndRxTxTransaction+0x70>
break;
80031f6: bf00 nop
}
return HAL_OK;
80031f8: 2300 movs r3, #0
}
80031fa: 4618 mov r0, r3
80031fc: 3718 adds r7, #24
80031fe: 46bd mov sp, r7
8003200: bd80 pop {r7, pc}
8003202: bf00 nop
8003204: 20000000 .word 0x20000000
8003208: 165e9f81 .word 0x165e9f81
0800320c <SPI_CloseTx_ISR>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
{
800320c: b580 push {r7, lr}
800320e: b086 sub sp, #24
8003210: af00 add r7, sp, #0
8003212: 6078 str r0, [r7, #4]
uint32_t tickstart;
__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
8003214: 4b2c ldr r3, [pc, #176] ; (80032c8 <SPI_CloseTx_ISR+0xbc>)
8003216: 681b ldr r3, [r3, #0]
8003218: 4a2c ldr r2, [pc, #176] ; (80032cc <SPI_CloseTx_ISR+0xc0>)
800321a: fba2 2303 umull r2, r3, r2, r3
800321e: 0a5b lsrs r3, r3, #9
8003220: 2264 movs r2, #100 ; 0x64
8003222: fb02 f303 mul.w r3, r2, r3
8003226: 613b str r3, [r7, #16]
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
8003228: f7fe fd78 bl 8001d1c <HAL_GetTick>
800322c: 6178 str r0, [r7, #20]
/* Wait until TXE flag is set */
do
{
if (count == 0U)
800322e: 693b ldr r3, [r7, #16]
8003230: 2b00 cmp r3, #0
8003232: d106 bne.n 8003242 <SPI_CloseTx_ISR+0x36>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8003234: 687b ldr r3, [r7, #4]
8003236: 6d5b ldr r3, [r3, #84] ; 0x54
8003238: f043 0220 orr.w r2, r3, #32
800323c: 687b ldr r3, [r7, #4]
800323e: 655a str r2, [r3, #84] ; 0x54
break;
8003240: e009 b.n 8003256 <SPI_CloseTx_ISR+0x4a>
}
count--;
8003242: 693b ldr r3, [r7, #16]
8003244: 3b01 subs r3, #1
8003246: 613b str r3, [r7, #16]
} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
8003248: 687b ldr r3, [r7, #4]
800324a: 681b ldr r3, [r3, #0]
800324c: 689b ldr r3, [r3, #8]
800324e: f003 0302 and.w r3, r3, #2
8003252: 2b00 cmp r3, #0
8003254: d0eb beq.n 800322e <SPI_CloseTx_ISR+0x22>
/* Disable TXE and ERR interrupt */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
8003256: 687b ldr r3, [r7, #4]
8003258: 681b ldr r3, [r3, #0]
800325a: 685a ldr r2, [r3, #4]
800325c: 687b ldr r3, [r7, #4]
800325e: 681b ldr r3, [r3, #0]
8003260: f022 02a0 bic.w r2, r2, #160 ; 0xa0
8003264: 605a str r2, [r3, #4]
/* Check the end of the transaction */
if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
8003266: 697a ldr r2, [r7, #20]
8003268: 2164 movs r1, #100 ; 0x64
800326a: 6878 ldr r0, [r7, #4]
800326c: f7ff ff8c bl 8003188 <SPI_EndRxTxTransaction>
8003270: 4603 mov r3, r0
8003272: 2b00 cmp r3, #0
8003274: d005 beq.n 8003282 <SPI_CloseTx_ISR+0x76>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8003276: 687b ldr r3, [r7, #4]
8003278: 6d5b ldr r3, [r3, #84] ; 0x54
800327a: f043 0220 orr.w r2, r3, #32
800327e: 687b ldr r3, [r7, #4]
8003280: 655a str r2, [r3, #84] ; 0x54
}
/* Clear overrun flag in 2 Lines communication mode because received is not read */
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
8003282: 687b ldr r3, [r7, #4]
8003284: 689b ldr r3, [r3, #8]
8003286: 2b00 cmp r3, #0
8003288: d10a bne.n 80032a0 <SPI_CloseTx_ISR+0x94>
{
__HAL_SPI_CLEAR_OVRFLAG(hspi);
800328a: 2300 movs r3, #0
800328c: 60fb str r3, [r7, #12]
800328e: 687b ldr r3, [r7, #4]
8003290: 681b ldr r3, [r3, #0]
8003292: 68db ldr r3, [r3, #12]
8003294: 60fb str r3, [r7, #12]
8003296: 687b ldr r3, [r7, #4]
8003298: 681b ldr r3, [r3, #0]
800329a: 689b ldr r3, [r3, #8]
800329c: 60fb str r3, [r7, #12]
800329e: 68fb ldr r3, [r7, #12]
}
hspi->State = HAL_SPI_STATE_READY;
80032a0: 687b ldr r3, [r7, #4]
80032a2: 2201 movs r2, #1
80032a4: f883 2051 strb.w r2, [r3, #81] ; 0x51
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
80032a8: 687b ldr r3, [r7, #4]
80032aa: 6d5b ldr r3, [r3, #84] ; 0x54
80032ac: 2b00 cmp r3, #0
80032ae: d003 beq.n 80032b8 <SPI_CloseTx_ISR+0xac>
{
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
80032b0: 6878 ldr r0, [r7, #4]
80032b2: f7ff fe9b bl 8002fec <HAL_SPI_ErrorCallback>
hspi->TxCpltCallback(hspi);
#else
HAL_SPI_TxCpltCallback(hspi);
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
}
80032b6: e002 b.n 80032be <SPI_CloseTx_ISR+0xb2>
HAL_SPI_TxCpltCallback(hspi);
80032b8: 6878 ldr r0, [r7, #4]
80032ba: f7ff fe8d bl 8002fd8 <HAL_SPI_TxCpltCallback>
}
80032be: bf00 nop
80032c0: 3718 adds r7, #24
80032c2: 46bd mov sp, r7
80032c4: bd80 pop {r7, pc}
80032c6: bf00 nop
80032c8: 20000000 .word 0x20000000
80032cc: 057619f1 .word 0x057619f1
080032d0 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
80032d0: b580 push {r7, lr}
80032d2: b082 sub sp, #8
80032d4: af00 add r7, sp, #0
80032d6: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
80032d8: 687b ldr r3, [r7, #4]
80032da: 2b00 cmp r3, #0
80032dc: d101 bne.n 80032e2 <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
80032de: 2301 movs r3, #1
80032e0: e01d b.n 800331e <HAL_TIM_Base_Init+0x4e>
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80032e2: 687b ldr r3, [r7, #4]
80032e4: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
80032e8: b2db uxtb r3, r3
80032ea: 2b00 cmp r3, #0
80032ec: d106 bne.n 80032fc <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
80032ee: 687b ldr r3, [r7, #4]
80032f0: 2200 movs r2, #0
80032f2: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
80032f6: 6878 ldr r0, [r7, #4]
80032f8: f7fe fb96 bl 8001a28 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80032fc: 687b ldr r3, [r7, #4]
80032fe: 2202 movs r2, #2
8003300: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003304: 687b ldr r3, [r7, #4]
8003306: 681a ldr r2, [r3, #0]
8003308: 687b ldr r3, [r7, #4]
800330a: 3304 adds r3, #4
800330c: 4619 mov r1, r3
800330e: 4610 mov r0, r2
8003310: f000 f9ae bl 8003670 <TIM_Base_SetConfig>
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003314: 687b ldr r3, [r7, #4]
8003316: 2201 movs r2, #1
8003318: f883 203d strb.w r2, [r3, #61] ; 0x3d
return HAL_OK;
800331c: 2300 movs r3, #0
}
800331e: 4618 mov r0, r3
8003320: 3708 adds r7, #8
8003322: 46bd mov sp, r7
8003324: bd80 pop {r7, pc}
08003326 <HAL_TIM_Base_Start_IT>:
* @brief Starts the TIM Base generation in interrupt mode.
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
8003326: b480 push {r7}
8003328: b085 sub sp, #20
800332a: af00 add r7, sp, #0
800332c: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_INSTANCE(htim->Instance));
/* Enable the TIM Update interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
800332e: 687b ldr r3, [r7, #4]
8003330: 681b ldr r3, [r3, #0]
8003332: 68da ldr r2, [r3, #12]
8003334: 687b ldr r3, [r7, #4]
8003336: 681b ldr r3, [r3, #0]
8003338: f042 0201 orr.w r2, r2, #1
800333c: 60da str r2, [r3, #12]
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
800333e: 687b ldr r3, [r7, #4]
8003340: 681b ldr r3, [r3, #0]
8003342: 689b ldr r3, [r3, #8]
8003344: f003 0307 and.w r3, r3, #7
8003348: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800334a: 68fb ldr r3, [r7, #12]
800334c: 2b06 cmp r3, #6
800334e: d007 beq.n 8003360 <HAL_TIM_Base_Start_IT+0x3a>
{
__HAL_TIM_ENABLE(htim);
8003350: 687b ldr r3, [r7, #4]
8003352: 681b ldr r3, [r3, #0]
8003354: 681a ldr r2, [r3, #0]
8003356: 687b ldr r3, [r7, #4]
8003358: 681b ldr r3, [r3, #0]
800335a: f042 0201 orr.w r2, r2, #1
800335e: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8003360: 2300 movs r3, #0
}
8003362: 4618 mov r0, r3
8003364: 3714 adds r7, #20
8003366: 46bd mov sp, r7
8003368: f85d 7b04 ldr.w r7, [sp], #4
800336c: 4770 bx lr
0800336e <HAL_TIM_OnePulse_Init>:
* @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
* @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
{
800336e: b580 push {r7, lr}
8003370: b082 sub sp, #8
8003372: af00 add r7, sp, #0
8003374: 6078 str r0, [r7, #4]
8003376: 6039 str r1, [r7, #0]
/* Check the TIM handle allocation */
if (htim == NULL)
8003378: 687b ldr r3, [r7, #4]
800337a: 2b00 cmp r3, #0
800337c: d101 bne.n 8003382 <HAL_TIM_OnePulse_Init+0x14>
{
return HAL_ERROR;
800337e: 2301 movs r3, #1
8003380: e02d b.n 80033de <HAL_TIM_OnePulse_Init+0x70>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_OPM_MODE(OnePulseMode));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003382: 687b ldr r3, [r7, #4]
8003384: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8003388: b2db uxtb r3, r3
800338a: 2b00 cmp r3, #0
800338c: d106 bne.n 800339c <HAL_TIM_OnePulse_Init+0x2e>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
800338e: 687b ldr r3, [r7, #4]
8003390: 2200 movs r2, #0
8003392: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->OnePulse_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_OnePulse_MspInit(htim);
8003396: 6878 ldr r0, [r7, #4]
8003398: f000 f825 bl 80033e6 <HAL_TIM_OnePulse_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
800339c: 687b ldr r3, [r7, #4]
800339e: 2202 movs r2, #2
80033a0: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Configure the Time base in the One Pulse Mode */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80033a4: 687b ldr r3, [r7, #4]
80033a6: 681a ldr r2, [r3, #0]
80033a8: 687b ldr r3, [r7, #4]
80033aa: 3304 adds r3, #4
80033ac: 4619 mov r1, r3
80033ae: 4610 mov r0, r2
80033b0: f000 f95e bl 8003670 <TIM_Base_SetConfig>
/* Reset the OPM Bit */
htim->Instance->CR1 &= ~TIM_CR1_OPM;
80033b4: 687b ldr r3, [r7, #4]
80033b6: 681b ldr r3, [r3, #0]
80033b8: 681a ldr r2, [r3, #0]
80033ba: 687b ldr r3, [r7, #4]
80033bc: 681b ldr r3, [r3, #0]
80033be: f022 0208 bic.w r2, r2, #8
80033c2: 601a str r2, [r3, #0]
/* Configure the OPM Mode */
htim->Instance->CR1 |= OnePulseMode;
80033c4: 687b ldr r3, [r7, #4]
80033c6: 681b ldr r3, [r3, #0]
80033c8: 6819 ldr r1, [r3, #0]
80033ca: 687b ldr r3, [r7, #4]
80033cc: 681b ldr r3, [r3, #0]
80033ce: 683a ldr r2, [r7, #0]
80033d0: 430a orrs r2, r1
80033d2: 601a str r2, [r3, #0]
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
80033d4: 687b ldr r3, [r7, #4]
80033d6: 2201 movs r2, #1
80033d8: f883 203d strb.w r2, [r3, #61] ; 0x3d
return HAL_OK;
80033dc: 2300 movs r3, #0
}
80033de: 4618 mov r0, r3
80033e0: 3708 adds r7, #8
80033e2: 46bd mov sp, r7
80033e4: bd80 pop {r7, pc}
080033e6 <HAL_TIM_OnePulse_MspInit>:
* @brief Initializes the TIM One Pulse MSP.
* @param htim TIM One Pulse handle
* @retval None
*/
__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
{
80033e6: b480 push {r7}
80033e8: b083 sub sp, #12
80033ea: af00 add r7, sp, #0
80033ec: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OnePulse_MspInit could be implemented in the user file
*/
}
80033ee: bf00 nop
80033f0: 370c adds r7, #12
80033f2: 46bd mov sp, r7
80033f4: f85d 7b04 ldr.w r7, [sp], #4
80033f8: 4770 bx lr
080033fa <HAL_TIM_IRQHandler>:
* @brief This function handles TIM interrupts requests.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
80033fa: b580 push {r7, lr}
80033fc: b082 sub sp, #8
80033fe: af00 add r7, sp, #0
8003400: 6078 str r0, [r7, #4]
/* Capture compare 1 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
8003402: 687b ldr r3, [r7, #4]
8003404: 681b ldr r3, [r3, #0]
8003406: 691b ldr r3, [r3, #16]
8003408: f003 0302 and.w r3, r3, #2
800340c: 2b02 cmp r3, #2
800340e: d122 bne.n 8003456 <HAL_TIM_IRQHandler+0x5c>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
8003410: 687b ldr r3, [r7, #4]
8003412: 681b ldr r3, [r3, #0]
8003414: 68db ldr r3, [r3, #12]
8003416: f003 0302 and.w r3, r3, #2
800341a: 2b02 cmp r3, #2
800341c: d11b bne.n 8003456 <HAL_TIM_IRQHandler+0x5c>
{
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
800341e: 687b ldr r3, [r7, #4]
8003420: 681b ldr r3, [r3, #0]
8003422: f06f 0202 mvn.w r2, #2
8003426: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
8003428: 687b ldr r3, [r7, #4]
800342a: 2201 movs r2, #1
800342c: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
800342e: 687b ldr r3, [r7, #4]
8003430: 681b ldr r3, [r3, #0]
8003432: 699b ldr r3, [r3, #24]
8003434: f003 0303 and.w r3, r3, #3
8003438: 2b00 cmp r3, #0
800343a: d003 beq.n 8003444 <HAL_TIM_IRQHandler+0x4a>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
800343c: 6878 ldr r0, [r7, #4]
800343e: f000 f8f8 bl 8003632 <HAL_TIM_IC_CaptureCallback>
8003442: e005 b.n 8003450 <HAL_TIM_IRQHandler+0x56>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003444: 6878 ldr r0, [r7, #4]
8003446: f000 f8ea bl 800361e <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
800344a: 6878 ldr r0, [r7, #4]
800344c: f000 f8fb bl 8003646 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8003450: 687b ldr r3, [r7, #4]
8003452: 2200 movs r2, #0
8003454: 771a strb r2, [r3, #28]
}
}
}
/* Capture compare 2 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
8003456: 687b ldr r3, [r7, #4]
8003458: 681b ldr r3, [r3, #0]
800345a: 691b ldr r3, [r3, #16]
800345c: f003 0304 and.w r3, r3, #4
8003460: 2b04 cmp r3, #4
8003462: d122 bne.n 80034aa <HAL_TIM_IRQHandler+0xb0>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
8003464: 687b ldr r3, [r7, #4]
8003466: 681b ldr r3, [r3, #0]
8003468: 68db ldr r3, [r3, #12]
800346a: f003 0304 and.w r3, r3, #4
800346e: 2b04 cmp r3, #4
8003470: d11b bne.n 80034aa <HAL_TIM_IRQHandler+0xb0>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
8003472: 687b ldr r3, [r7, #4]
8003474: 681b ldr r3, [r3, #0]
8003476: f06f 0204 mvn.w r2, #4
800347a: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
800347c: 687b ldr r3, [r7, #4]
800347e: 2202 movs r2, #2
8003480: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
8003482: 687b ldr r3, [r7, #4]
8003484: 681b ldr r3, [r3, #0]
8003486: 699b ldr r3, [r3, #24]
8003488: f403 7340 and.w r3, r3, #768 ; 0x300
800348c: 2b00 cmp r3, #0
800348e: d003 beq.n 8003498 <HAL_TIM_IRQHandler+0x9e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8003490: 6878 ldr r0, [r7, #4]
8003492: f000 f8ce bl 8003632 <HAL_TIM_IC_CaptureCallback>
8003496: e005 b.n 80034a4 <HAL_TIM_IRQHandler+0xaa>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003498: 6878 ldr r0, [r7, #4]
800349a: f000 f8c0 bl 800361e <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
800349e: 6878 ldr r0, [r7, #4]
80034a0: f000 f8d1 bl 8003646 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
80034a4: 687b ldr r3, [r7, #4]
80034a6: 2200 movs r2, #0
80034a8: 771a strb r2, [r3, #28]
}
}
/* Capture compare 3 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
80034aa: 687b ldr r3, [r7, #4]
80034ac: 681b ldr r3, [r3, #0]
80034ae: 691b ldr r3, [r3, #16]
80034b0: f003 0308 and.w r3, r3, #8
80034b4: 2b08 cmp r3, #8
80034b6: d122 bne.n 80034fe <HAL_TIM_IRQHandler+0x104>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
80034b8: 687b ldr r3, [r7, #4]
80034ba: 681b ldr r3, [r3, #0]
80034bc: 68db ldr r3, [r3, #12]
80034be: f003 0308 and.w r3, r3, #8
80034c2: 2b08 cmp r3, #8
80034c4: d11b bne.n 80034fe <HAL_TIM_IRQHandler+0x104>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
80034c6: 687b ldr r3, [r7, #4]
80034c8: 681b ldr r3, [r3, #0]
80034ca: f06f 0208 mvn.w r2, #8
80034ce: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
80034d0: 687b ldr r3, [r7, #4]
80034d2: 2204 movs r2, #4
80034d4: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
80034d6: 687b ldr r3, [r7, #4]
80034d8: 681b ldr r3, [r3, #0]
80034da: 69db ldr r3, [r3, #28]
80034dc: f003 0303 and.w r3, r3, #3
80034e0: 2b00 cmp r3, #0
80034e2: d003 beq.n 80034ec <HAL_TIM_IRQHandler+0xf2>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
80034e4: 6878 ldr r0, [r7, #4]
80034e6: f000 f8a4 bl 8003632 <HAL_TIM_IC_CaptureCallback>
80034ea: e005 b.n 80034f8 <HAL_TIM_IRQHandler+0xfe>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
80034ec: 6878 ldr r0, [r7, #4]
80034ee: f000 f896 bl 800361e <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
80034f2: 6878 ldr r0, [r7, #4]
80034f4: f000 f8a7 bl 8003646 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
80034f8: 687b ldr r3, [r7, #4]
80034fa: 2200 movs r2, #0
80034fc: 771a strb r2, [r3, #28]
}
}
/* Capture compare 4 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
80034fe: 687b ldr r3, [r7, #4]
8003500: 681b ldr r3, [r3, #0]
8003502: 691b ldr r3, [r3, #16]
8003504: f003 0310 and.w r3, r3, #16
8003508: 2b10 cmp r3, #16
800350a: d122 bne.n 8003552 <HAL_TIM_IRQHandler+0x158>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
800350c: 687b ldr r3, [r7, #4]
800350e: 681b ldr r3, [r3, #0]
8003510: 68db ldr r3, [r3, #12]
8003512: f003 0310 and.w r3, r3, #16
8003516: 2b10 cmp r3, #16
8003518: d11b bne.n 8003552 <HAL_TIM_IRQHandler+0x158>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
800351a: 687b ldr r3, [r7, #4]
800351c: 681b ldr r3, [r3, #0]
800351e: f06f 0210 mvn.w r2, #16
8003522: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
8003524: 687b ldr r3, [r7, #4]
8003526: 2208 movs r2, #8
8003528: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
800352a: 687b ldr r3, [r7, #4]
800352c: 681b ldr r3, [r3, #0]
800352e: 69db ldr r3, [r3, #28]
8003530: f403 7340 and.w r3, r3, #768 ; 0x300
8003534: 2b00 cmp r3, #0
8003536: d003 beq.n 8003540 <HAL_TIM_IRQHandler+0x146>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8003538: 6878 ldr r0, [r7, #4]
800353a: f000 f87a bl 8003632 <HAL_TIM_IC_CaptureCallback>
800353e: e005 b.n 800354c <HAL_TIM_IRQHandler+0x152>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003540: 6878 ldr r0, [r7, #4]
8003542: f000 f86c bl 800361e <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8003546: 6878 ldr r0, [r7, #4]
8003548: f000 f87d bl 8003646 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
800354c: 687b ldr r3, [r7, #4]
800354e: 2200 movs r2, #0
8003550: 771a strb r2, [r3, #28]
}
}
/* TIM Update event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
8003552: 687b ldr r3, [r7, #4]
8003554: 681b ldr r3, [r3, #0]
8003556: 691b ldr r3, [r3, #16]
8003558: f003 0301 and.w r3, r3, #1
800355c: 2b01 cmp r3, #1
800355e: d10e bne.n 800357e <HAL_TIM_IRQHandler+0x184>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
8003560: 687b ldr r3, [r7, #4]
8003562: 681b ldr r3, [r3, #0]
8003564: 68db ldr r3, [r3, #12]
8003566: f003 0301 and.w r3, r3, #1
800356a: 2b01 cmp r3, #1
800356c: d107 bne.n 800357e <HAL_TIM_IRQHandler+0x184>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
800356e: 687b ldr r3, [r7, #4]
8003570: 681b ldr r3, [r3, #0]
8003572: f06f 0201 mvn.w r2, #1
8003576: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
HAL_TIM_PeriodElapsedCallback(htim);
8003578: 6878 ldr r0, [r7, #4]
800357a: f000 f846 bl 800360a <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Break input event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
800357e: 687b ldr r3, [r7, #4]
8003580: 681b ldr r3, [r3, #0]
8003582: 691b ldr r3, [r3, #16]
8003584: f003 0380 and.w r3, r3, #128 ; 0x80
8003588: 2b80 cmp r3, #128 ; 0x80
800358a: d10e bne.n 80035aa <HAL_TIM_IRQHandler+0x1b0>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
800358c: 687b ldr r3, [r7, #4]
800358e: 681b ldr r3, [r3, #0]
8003590: 68db ldr r3, [r3, #12]
8003592: f003 0380 and.w r3, r3, #128 ; 0x80
8003596: 2b80 cmp r3, #128 ; 0x80
8003598: d107 bne.n 80035aa <HAL_TIM_IRQHandler+0x1b0>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
800359a: 687b ldr r3, [r7, #4]
800359c: 681b ldr r3, [r3, #0]
800359e: f06f 0280 mvn.w r2, #128 ; 0x80
80035a2: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
HAL_TIMEx_BreakCallback(htim);
80035a4: 6878 ldr r0, [r7, #4]
80035a6: f000 f989 bl 80038bc <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Trigger detection event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
80035aa: 687b ldr r3, [r7, #4]
80035ac: 681b ldr r3, [r3, #0]
80035ae: 691b ldr r3, [r3, #16]
80035b0: f003 0340 and.w r3, r3, #64 ; 0x40
80035b4: 2b40 cmp r3, #64 ; 0x40
80035b6: d10e bne.n 80035d6 <HAL_TIM_IRQHandler+0x1dc>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
80035b8: 687b ldr r3, [r7, #4]
80035ba: 681b ldr r3, [r3, #0]
80035bc: 68db ldr r3, [r3, #12]
80035be: f003 0340 and.w r3, r3, #64 ; 0x40
80035c2: 2b40 cmp r3, #64 ; 0x40
80035c4: d107 bne.n 80035d6 <HAL_TIM_IRQHandler+0x1dc>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
80035c6: 687b ldr r3, [r7, #4]
80035c8: 681b ldr r3, [r3, #0]
80035ca: f06f 0240 mvn.w r2, #64 ; 0x40
80035ce: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
HAL_TIM_TriggerCallback(htim);
80035d0: 6878 ldr r0, [r7, #4]
80035d2: f000 f842 bl 800365a <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM commutation event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
80035d6: 687b ldr r3, [r7, #4]
80035d8: 681b ldr r3, [r3, #0]
80035da: 691b ldr r3, [r3, #16]
80035dc: f003 0320 and.w r3, r3, #32
80035e0: 2b20 cmp r3, #32
80035e2: d10e bne.n 8003602 <HAL_TIM_IRQHandler+0x208>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
80035e4: 687b ldr r3, [r7, #4]
80035e6: 681b ldr r3, [r3, #0]
80035e8: 68db ldr r3, [r3, #12]
80035ea: f003 0320 and.w r3, r3, #32
80035ee: 2b20 cmp r3, #32
80035f0: d107 bne.n 8003602 <HAL_TIM_IRQHandler+0x208>
{
__HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
80035f2: 687b ldr r3, [r7, #4]
80035f4: 681b ldr r3, [r3, #0]
80035f6: f06f 0220 mvn.w r2, #32
80035fa: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
HAL_TIMEx_CommutCallback(htim);
80035fc: 6878 ldr r0, [r7, #4]
80035fe: f000 f953 bl 80038a8 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
}
8003602: bf00 nop
8003604: 3708 adds r7, #8
8003606: 46bd mov sp, r7
8003608: bd80 pop {r7, pc}
0800360a <HAL_TIM_PeriodElapsedCallback>:
* @brief Period elapsed callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
800360a: b480 push {r7}
800360c: b083 sub sp, #12
800360e: af00 add r7, sp, #0
8003610: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PeriodElapsedCallback could be implemented in the user file
*/
}
8003612: bf00 nop
8003614: 370c adds r7, #12
8003616: 46bd mov sp, r7
8003618: f85d 7b04 ldr.w r7, [sp], #4
800361c: 4770 bx lr
0800361e <HAL_TIM_OC_DelayElapsedCallback>:
* @brief Output Compare callback in non-blocking mode
* @param htim TIM OC handle
* @retval None
*/
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
800361e: b480 push {r7}
8003620: b083 sub sp, #12
8003622: af00 add r7, sp, #0
8003624: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
*/
}
8003626: bf00 nop
8003628: 370c adds r7, #12
800362a: 46bd mov sp, r7
800362c: f85d 7b04 ldr.w r7, [sp], #4
8003630: 4770 bx lr
08003632 <HAL_TIM_IC_CaptureCallback>:
* @brief Input Capture callback in non-blocking mode
* @param htim TIM IC handle
* @retval None
*/
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
8003632: b480 push {r7}
8003634: b083 sub sp, #12
8003636: af00 add r7, sp, #0
8003638: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_IC_CaptureCallback could be implemented in the user file
*/
}
800363a: bf00 nop
800363c: 370c adds r7, #12
800363e: 46bd mov sp, r7
8003640: f85d 7b04 ldr.w r7, [sp], #4
8003644: 4770 bx lr
08003646 <HAL_TIM_PWM_PulseFinishedCallback>:
* @brief PWM Pulse finished callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
8003646: b480 push {r7}
8003648: b083 sub sp, #12
800364a: af00 add r7, sp, #0
800364c: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
*/
}
800364e: bf00 nop
8003650: 370c adds r7, #12
8003652: 46bd mov sp, r7
8003654: f85d 7b04 ldr.w r7, [sp], #4
8003658: 4770 bx lr
0800365a <HAL_TIM_TriggerCallback>:
* @brief Hall Trigger detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
800365a: b480 push {r7}
800365c: b083 sub sp, #12
800365e: af00 add r7, sp, #0
8003660: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_TriggerCallback could be implemented in the user file
*/
}
8003662: bf00 nop
8003664: 370c adds r7, #12
8003666: 46bd mov sp, r7
8003668: f85d 7b04 ldr.w r7, [sp], #4
800366c: 4770 bx lr
...
08003670 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
{
8003670: b480 push {r7}
8003672: b085 sub sp, #20
8003674: af00 add r7, sp, #0
8003676: 6078 str r0, [r7, #4]
8003678: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
800367a: 687b ldr r3, [r7, #4]
800367c: 681b ldr r3, [r3, #0]
800367e: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8003680: 687b ldr r3, [r7, #4]
8003682: 4a40 ldr r2, [pc, #256] ; (8003784 <TIM_Base_SetConfig+0x114>)
8003684: 4293 cmp r3, r2
8003686: d013 beq.n 80036b0 <TIM_Base_SetConfig+0x40>
8003688: 687b ldr r3, [r7, #4]
800368a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
800368e: d00f beq.n 80036b0 <TIM_Base_SetConfig+0x40>
8003690: 687b ldr r3, [r7, #4]
8003692: 4a3d ldr r2, [pc, #244] ; (8003788 <TIM_Base_SetConfig+0x118>)
8003694: 4293 cmp r3, r2
8003696: d00b beq.n 80036b0 <TIM_Base_SetConfig+0x40>
8003698: 687b ldr r3, [r7, #4]
800369a: 4a3c ldr r2, [pc, #240] ; (800378c <TIM_Base_SetConfig+0x11c>)
800369c: 4293 cmp r3, r2
800369e: d007 beq.n 80036b0 <TIM_Base_SetConfig+0x40>
80036a0: 687b ldr r3, [r7, #4]
80036a2: 4a3b ldr r2, [pc, #236] ; (8003790 <TIM_Base_SetConfig+0x120>)
80036a4: 4293 cmp r3, r2
80036a6: d003 beq.n 80036b0 <TIM_Base_SetConfig+0x40>
80036a8: 687b ldr r3, [r7, #4]
80036aa: 4a3a ldr r2, [pc, #232] ; (8003794 <TIM_Base_SetConfig+0x124>)
80036ac: 4293 cmp r3, r2
80036ae: d108 bne.n 80036c2 <TIM_Base_SetConfig+0x52>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
80036b0: 68fb ldr r3, [r7, #12]
80036b2: f023 0370 bic.w r3, r3, #112 ; 0x70
80036b6: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
80036b8: 683b ldr r3, [r7, #0]
80036ba: 685b ldr r3, [r3, #4]
80036bc: 68fa ldr r2, [r7, #12]
80036be: 4313 orrs r3, r2
80036c0: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
80036c2: 687b ldr r3, [r7, #4]
80036c4: 4a2f ldr r2, [pc, #188] ; (8003784 <TIM_Base_SetConfig+0x114>)
80036c6: 4293 cmp r3, r2
80036c8: d02b beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036ca: 687b ldr r3, [r7, #4]
80036cc: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
80036d0: d027 beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036d2: 687b ldr r3, [r7, #4]
80036d4: 4a2c ldr r2, [pc, #176] ; (8003788 <TIM_Base_SetConfig+0x118>)
80036d6: 4293 cmp r3, r2
80036d8: d023 beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036da: 687b ldr r3, [r7, #4]
80036dc: 4a2b ldr r2, [pc, #172] ; (800378c <TIM_Base_SetConfig+0x11c>)
80036de: 4293 cmp r3, r2
80036e0: d01f beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036e2: 687b ldr r3, [r7, #4]
80036e4: 4a2a ldr r2, [pc, #168] ; (8003790 <TIM_Base_SetConfig+0x120>)
80036e6: 4293 cmp r3, r2
80036e8: d01b beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036ea: 687b ldr r3, [r7, #4]
80036ec: 4a29 ldr r2, [pc, #164] ; (8003794 <TIM_Base_SetConfig+0x124>)
80036ee: 4293 cmp r3, r2
80036f0: d017 beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036f2: 687b ldr r3, [r7, #4]
80036f4: 4a28 ldr r2, [pc, #160] ; (8003798 <TIM_Base_SetConfig+0x128>)
80036f6: 4293 cmp r3, r2
80036f8: d013 beq.n 8003722 <TIM_Base_SetConfig+0xb2>
80036fa: 687b ldr r3, [r7, #4]
80036fc: 4a27 ldr r2, [pc, #156] ; (800379c <TIM_Base_SetConfig+0x12c>)
80036fe: 4293 cmp r3, r2
8003700: d00f beq.n 8003722 <TIM_Base_SetConfig+0xb2>
8003702: 687b ldr r3, [r7, #4]
8003704: 4a26 ldr r2, [pc, #152] ; (80037a0 <TIM_Base_SetConfig+0x130>)
8003706: 4293 cmp r3, r2
8003708: d00b beq.n 8003722 <TIM_Base_SetConfig+0xb2>
800370a: 687b ldr r3, [r7, #4]
800370c: 4a25 ldr r2, [pc, #148] ; (80037a4 <TIM_Base_SetConfig+0x134>)
800370e: 4293 cmp r3, r2
8003710: d007 beq.n 8003722 <TIM_Base_SetConfig+0xb2>
8003712: 687b ldr r3, [r7, #4]
8003714: 4a24 ldr r2, [pc, #144] ; (80037a8 <TIM_Base_SetConfig+0x138>)
8003716: 4293 cmp r3, r2
8003718: d003 beq.n 8003722 <TIM_Base_SetConfig+0xb2>
800371a: 687b ldr r3, [r7, #4]
800371c: 4a23 ldr r2, [pc, #140] ; (80037ac <TIM_Base_SetConfig+0x13c>)
800371e: 4293 cmp r3, r2
8003720: d108 bne.n 8003734 <TIM_Base_SetConfig+0xc4>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8003722: 68fb ldr r3, [r7, #12]
8003724: f423 7340 bic.w r3, r3, #768 ; 0x300
8003728: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
800372a: 683b ldr r3, [r7, #0]
800372c: 68db ldr r3, [r3, #12]
800372e: 68fa ldr r2, [r7, #12]
8003730: 4313 orrs r3, r2
8003732: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8003734: 68fb ldr r3, [r7, #12]
8003736: f023 0280 bic.w r2, r3, #128 ; 0x80
800373a: 683b ldr r3, [r7, #0]
800373c: 695b ldr r3, [r3, #20]
800373e: 4313 orrs r3, r2
8003740: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8003742: 687b ldr r3, [r7, #4]
8003744: 68fa ldr r2, [r7, #12]
8003746: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8003748: 683b ldr r3, [r7, #0]
800374a: 689a ldr r2, [r3, #8]
800374c: 687b ldr r3, [r7, #4]
800374e: 62da str r2, [r3, #44] ; 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8003750: 683b ldr r3, [r7, #0]
8003752: 681a ldr r2, [r3, #0]
8003754: 687b ldr r3, [r7, #4]
8003756: 629a str r2, [r3, #40] ; 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8003758: 687b ldr r3, [r7, #4]
800375a: 4a0a ldr r2, [pc, #40] ; (8003784 <TIM_Base_SetConfig+0x114>)
800375c: 4293 cmp r3, r2
800375e: d003 beq.n 8003768 <TIM_Base_SetConfig+0xf8>
8003760: 687b ldr r3, [r7, #4]
8003762: 4a0c ldr r2, [pc, #48] ; (8003794 <TIM_Base_SetConfig+0x124>)
8003764: 4293 cmp r3, r2
8003766: d103 bne.n 8003770 <TIM_Base_SetConfig+0x100>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8003768: 683b ldr r3, [r7, #0]
800376a: 691a ldr r2, [r3, #16]
800376c: 687b ldr r3, [r7, #4]
800376e: 631a str r2, [r3, #48] ; 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8003770: 687b ldr r3, [r7, #4]
8003772: 2201 movs r2, #1
8003774: 615a str r2, [r3, #20]
}
8003776: bf00 nop
8003778: 3714 adds r7, #20
800377a: 46bd mov sp, r7
800377c: f85d 7b04 ldr.w r7, [sp], #4
8003780: 4770 bx lr
8003782: bf00 nop
8003784: 40010000 .word 0x40010000
8003788: 40000400 .word 0x40000400
800378c: 40000800 .word 0x40000800
8003790: 40000c00 .word 0x40000c00
8003794: 40010400 .word 0x40010400
8003798: 40014000 .word 0x40014000
800379c: 40014400 .word 0x40014400
80037a0: 40014800 .word 0x40014800
80037a4: 40001800 .word 0x40001800
80037a8: 40001c00 .word 0x40001c00
80037ac: 40002000 .word 0x40002000
080037b0 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
TIM_MasterConfigTypeDef *sMasterConfig)
{
80037b0: b480 push {r7}
80037b2: b085 sub sp, #20
80037b4: af00 add r7, sp, #0
80037b6: 6078 str r0, [r7, #4]
80037b8: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
80037ba: 687b ldr r3, [r7, #4]
80037bc: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
80037c0: 2b01 cmp r3, #1
80037c2: d101 bne.n 80037c8 <HAL_TIMEx_MasterConfigSynchronization+0x18>
80037c4: 2302 movs r3, #2
80037c6: e05a b.n 800387e <HAL_TIMEx_MasterConfigSynchronization+0xce>
80037c8: 687b ldr r3, [r7, #4]
80037ca: 2201 movs r2, #1
80037cc: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
80037d0: 687b ldr r3, [r7, #4]
80037d2: 2202 movs r2, #2
80037d4: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
80037d8: 687b ldr r3, [r7, #4]
80037da: 681b ldr r3, [r3, #0]
80037dc: 685b ldr r3, [r3, #4]
80037de: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
80037e0: 687b ldr r3, [r7, #4]
80037e2: 681b ldr r3, [r3, #0]
80037e4: 689b ldr r3, [r3, #8]
80037e6: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
80037e8: 68fb ldr r3, [r7, #12]
80037ea: f023 0370 bic.w r3, r3, #112 ; 0x70
80037ee: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
80037f0: 683b ldr r3, [r7, #0]
80037f2: 681b ldr r3, [r3, #0]
80037f4: 68fa ldr r2, [r7, #12]
80037f6: 4313 orrs r3, r2
80037f8: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
80037fa: 687b ldr r3, [r7, #4]
80037fc: 681b ldr r3, [r3, #0]
80037fe: 68fa ldr r2, [r7, #12]
8003800: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8003802: 687b ldr r3, [r7, #4]
8003804: 681b ldr r3, [r3, #0]
8003806: 4a21 ldr r2, [pc, #132] ; (800388c <HAL_TIMEx_MasterConfigSynchronization+0xdc>)
8003808: 4293 cmp r3, r2
800380a: d022 beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
800380c: 687b ldr r3, [r7, #4]
800380e: 681b ldr r3, [r3, #0]
8003810: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
8003814: d01d beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003816: 687b ldr r3, [r7, #4]
8003818: 681b ldr r3, [r3, #0]
800381a: 4a1d ldr r2, [pc, #116] ; (8003890 <HAL_TIMEx_MasterConfigSynchronization+0xe0>)
800381c: 4293 cmp r3, r2
800381e: d018 beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003820: 687b ldr r3, [r7, #4]
8003822: 681b ldr r3, [r3, #0]
8003824: 4a1b ldr r2, [pc, #108] ; (8003894 <HAL_TIMEx_MasterConfigSynchronization+0xe4>)
8003826: 4293 cmp r3, r2
8003828: d013 beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
800382a: 687b ldr r3, [r7, #4]
800382c: 681b ldr r3, [r3, #0]
800382e: 4a1a ldr r2, [pc, #104] ; (8003898 <HAL_TIMEx_MasterConfigSynchronization+0xe8>)
8003830: 4293 cmp r3, r2
8003832: d00e beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003834: 687b ldr r3, [r7, #4]
8003836: 681b ldr r3, [r3, #0]
8003838: 4a18 ldr r2, [pc, #96] ; (800389c <HAL_TIMEx_MasterConfigSynchronization+0xec>)
800383a: 4293 cmp r3, r2
800383c: d009 beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
800383e: 687b ldr r3, [r7, #4]
8003840: 681b ldr r3, [r3, #0]
8003842: 4a17 ldr r2, [pc, #92] ; (80038a0 <HAL_TIMEx_MasterConfigSynchronization+0xf0>)
8003844: 4293 cmp r3, r2
8003846: d004 beq.n 8003852 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003848: 687b ldr r3, [r7, #4]
800384a: 681b ldr r3, [r3, #0]
800384c: 4a15 ldr r2, [pc, #84] ; (80038a4 <HAL_TIMEx_MasterConfigSynchronization+0xf4>)
800384e: 4293 cmp r3, r2
8003850: d10c bne.n 800386c <HAL_TIMEx_MasterConfigSynchronization+0xbc>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8003852: 68bb ldr r3, [r7, #8]
8003854: f023 0380 bic.w r3, r3, #128 ; 0x80
8003858: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
800385a: 683b ldr r3, [r7, #0]
800385c: 685b ldr r3, [r3, #4]
800385e: 68ba ldr r2, [r7, #8]
8003860: 4313 orrs r3, r2
8003862: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8003864: 687b ldr r3, [r7, #4]
8003866: 681b ldr r3, [r3, #0]
8003868: 68ba ldr r2, [r7, #8]
800386a: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
800386c: 687b ldr r3, [r7, #4]
800386e: 2201 movs r2, #1
8003870: f883 203d strb.w r2, [r3, #61] ; 0x3d
__HAL_UNLOCK(htim);
8003874: 687b ldr r3, [r7, #4]
8003876: 2200 movs r2, #0
8003878: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_OK;
800387c: 2300 movs r3, #0
}
800387e: 4618 mov r0, r3
8003880: 3714 adds r7, #20
8003882: 46bd mov sp, r7
8003884: f85d 7b04 ldr.w r7, [sp], #4
8003888: 4770 bx lr
800388a: bf00 nop
800388c: 40010000 .word 0x40010000
8003890: 40000400 .word 0x40000400
8003894: 40000800 .word 0x40000800
8003898: 40000c00 .word 0x40000c00
800389c: 40010400 .word 0x40010400
80038a0: 40014000 .word 0x40014000
80038a4: 40001800 .word 0x40001800
080038a8 <HAL_TIMEx_CommutCallback>:
* @brief Hall commutation changed callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
80038a8: b480 push {r7}
80038aa: b083 sub sp, #12
80038ac: af00 add r7, sp, #0
80038ae: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_CommutCallback could be implemented in the user file
*/
}
80038b0: bf00 nop
80038b2: 370c adds r7, #12
80038b4: 46bd mov sp, r7
80038b6: f85d 7b04 ldr.w r7, [sp], #4
80038ba: 4770 bx lr
080038bc <HAL_TIMEx_BreakCallback>:
* @brief Hall Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
80038bc: b480 push {r7}
80038be: b083 sub sp, #12
80038c0: af00 add r7, sp, #0
80038c2: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_BreakCallback could be implemented in the user file
*/
}
80038c4: bf00 nop
80038c6: 370c adds r7, #12
80038c8: 46bd mov sp, r7
80038ca: f85d 7b04 ldr.w r7, [sp], #4
80038ce: 4770 bx lr
080038d0 <__errno>:
80038d0: 4b01 ldr r3, [pc, #4] ; (80038d8 <__errno+0x8>)
80038d2: 6818 ldr r0, [r3, #0]
80038d4: 4770 bx lr
80038d6: bf00 nop
80038d8: 2000000c .word 0x2000000c
080038dc <__libc_init_array>:
80038dc: b570 push {r4, r5, r6, lr}
80038de: 4e0d ldr r6, [pc, #52] ; (8003914 <__libc_init_array+0x38>)
80038e0: 4c0d ldr r4, [pc, #52] ; (8003918 <__libc_init_array+0x3c>)
80038e2: 1ba4 subs r4, r4, r6
80038e4: 10a4 asrs r4, r4, #2
80038e6: 2500 movs r5, #0
80038e8: 42a5 cmp r5, r4
80038ea: d109 bne.n 8003900 <__libc_init_array+0x24>
80038ec: 4e0b ldr r6, [pc, #44] ; (800391c <__libc_init_array+0x40>)
80038ee: 4c0c ldr r4, [pc, #48] ; (8003920 <__libc_init_array+0x44>)
80038f0: f000 f8c8 bl 8003a84 <_init>
80038f4: 1ba4 subs r4, r4, r6
80038f6: 10a4 asrs r4, r4, #2
80038f8: 2500 movs r5, #0
80038fa: 42a5 cmp r5, r4
80038fc: d105 bne.n 800390a <__libc_init_array+0x2e>
80038fe: bd70 pop {r4, r5, r6, pc}
8003900: f856 3025 ldr.w r3, [r6, r5, lsl #2]
8003904: 4798 blx r3
8003906: 3501 adds r5, #1
8003908: e7ee b.n 80038e8 <__libc_init_array+0xc>
800390a: f856 3025 ldr.w r3, [r6, r5, lsl #2]
800390e: 4798 blx r3
8003910: 3501 adds r5, #1
8003912: e7f2 b.n 80038fa <__libc_init_array+0x1e>
8003914: 08003ab4 .word 0x08003ab4
8003918: 08003ab4 .word 0x08003ab4
800391c: 08003ab4 .word 0x08003ab4
8003920: 08003ab8 .word 0x08003ab8
08003924 <memset>:
8003924: 4402 add r2, r0
8003926: 4603 mov r3, r0
8003928: 4293 cmp r3, r2
800392a: d100 bne.n 800392e <memset+0xa>
800392c: 4770 bx lr
800392e: f803 1b01 strb.w r1, [r3], #1
8003932: e7f9 b.n 8003928 <memset+0x4>
08003934 <rand>:
8003934: b538 push {r3, r4, r5, lr}
8003936: 4b13 ldr r3, [pc, #76] ; (8003984 <rand+0x50>)
8003938: 681c ldr r4, [r3, #0]
800393a: 6ba3 ldr r3, [r4, #56] ; 0x38
800393c: b97b cbnz r3, 800395e <rand+0x2a>
800393e: 2018 movs r0, #24
8003940: f000 f82c bl 800399c <malloc>
8003944: 4a10 ldr r2, [pc, #64] ; (8003988 <rand+0x54>)
8003946: 4b11 ldr r3, [pc, #68] ; (800398c <rand+0x58>)
8003948: 63a0 str r0, [r4, #56] ; 0x38
800394a: e9c0 2300 strd r2, r3, [r0]
800394e: 4b10 ldr r3, [pc, #64] ; (8003990 <rand+0x5c>)
8003950: 6083 str r3, [r0, #8]
8003952: 230b movs r3, #11
8003954: 8183 strh r3, [r0, #12]
8003956: 2201 movs r2, #1
8003958: 2300 movs r3, #0
800395a: e9c0 2304 strd r2, r3, [r0, #16]
800395e: 6ba1 ldr r1, [r4, #56] ; 0x38
8003960: 480c ldr r0, [pc, #48] ; (8003994 <rand+0x60>)
8003962: 690a ldr r2, [r1, #16]
8003964: 694b ldr r3, [r1, #20]
8003966: 4c0c ldr r4, [pc, #48] ; (8003998 <rand+0x64>)
8003968: 4350 muls r0, r2
800396a: fb04 0003 mla r0, r4, r3, r0
800396e: fba2 2304 umull r2, r3, r2, r4
8003972: 4403 add r3, r0
8003974: 1c54 adds r4, r2, #1
8003976: f143 0500 adc.w r5, r3, #0
800397a: e9c1 4504 strd r4, r5, [r1, #16]
800397e: f025 4000 bic.w r0, r5, #2147483648 ; 0x80000000
8003982: bd38 pop {r3, r4, r5, pc}
8003984: 2000000c .word 0x2000000c
8003988: abcd330e .word 0xabcd330e
800398c: e66d1234 .word 0xe66d1234
8003990: 0005deec .word 0x0005deec
8003994: 5851f42d .word 0x5851f42d
8003998: 4c957f2d .word 0x4c957f2d
0800399c <malloc>:
800399c: 4b02 ldr r3, [pc, #8] ; (80039a8 <malloc+0xc>)
800399e: 4601 mov r1, r0
80039a0: 6818 ldr r0, [r3, #0]
80039a2: f000 b803 b.w 80039ac <_malloc_r>
80039a6: bf00 nop
80039a8: 2000000c .word 0x2000000c
080039ac <_malloc_r>:
80039ac: b570 push {r4, r5, r6, lr}
80039ae: 1ccd adds r5, r1, #3
80039b0: f025 0503 bic.w r5, r5, #3
80039b4: 3508 adds r5, #8
80039b6: 2d0c cmp r5, #12
80039b8: bf38 it cc
80039ba: 250c movcc r5, #12
80039bc: 2d00 cmp r5, #0
80039be: 4606 mov r6, r0
80039c0: db01 blt.n 80039c6 <_malloc_r+0x1a>
80039c2: 42a9 cmp r1, r5
80039c4: d903 bls.n 80039ce <_malloc_r+0x22>
80039c6: 230c movs r3, #12
80039c8: 6033 str r3, [r6, #0]
80039ca: 2000 movs r0, #0
80039cc: bd70 pop {r4, r5, r6, pc}
80039ce: f000 f857 bl 8003a80 <__malloc_lock>
80039d2: 4a21 ldr r2, [pc, #132] ; (8003a58 <_malloc_r+0xac>)
80039d4: 6814 ldr r4, [r2, #0]
80039d6: 4621 mov r1, r4
80039d8: b991 cbnz r1, 8003a00 <_malloc_r+0x54>
80039da: 4c20 ldr r4, [pc, #128] ; (8003a5c <_malloc_r+0xb0>)
80039dc: 6823 ldr r3, [r4, #0]
80039de: b91b cbnz r3, 80039e8 <_malloc_r+0x3c>
80039e0: 4630 mov r0, r6
80039e2: f000 f83d bl 8003a60 <_sbrk_r>
80039e6: 6020 str r0, [r4, #0]
80039e8: 4629 mov r1, r5
80039ea: 4630 mov r0, r6
80039ec: f000 f838 bl 8003a60 <_sbrk_r>
80039f0: 1c43 adds r3, r0, #1
80039f2: d124 bne.n 8003a3e <_malloc_r+0x92>
80039f4: 230c movs r3, #12
80039f6: 6033 str r3, [r6, #0]
80039f8: 4630 mov r0, r6
80039fa: f000 f842 bl 8003a82 <__malloc_unlock>
80039fe: e7e4 b.n 80039ca <_malloc_r+0x1e>
8003a00: 680b ldr r3, [r1, #0]
8003a02: 1b5b subs r3, r3, r5
8003a04: d418 bmi.n 8003a38 <_malloc_r+0x8c>
8003a06: 2b0b cmp r3, #11
8003a08: d90f bls.n 8003a2a <_malloc_r+0x7e>
8003a0a: 600b str r3, [r1, #0]
8003a0c: 50cd str r5, [r1, r3]
8003a0e: 18cc adds r4, r1, r3
8003a10: 4630 mov r0, r6
8003a12: f000 f836 bl 8003a82 <__malloc_unlock>
8003a16: f104 000b add.w r0, r4, #11
8003a1a: 1d23 adds r3, r4, #4
8003a1c: f020 0007 bic.w r0, r0, #7
8003a20: 1ac3 subs r3, r0, r3
8003a22: d0d3 beq.n 80039cc <_malloc_r+0x20>
8003a24: 425a negs r2, r3
8003a26: 50e2 str r2, [r4, r3]
8003a28: e7d0 b.n 80039cc <_malloc_r+0x20>
8003a2a: 428c cmp r4, r1
8003a2c: 684b ldr r3, [r1, #4]
8003a2e: bf16 itet ne
8003a30: 6063 strne r3, [r4, #4]
8003a32: 6013 streq r3, [r2, #0]
8003a34: 460c movne r4, r1
8003a36: e7eb b.n 8003a10 <_malloc_r+0x64>
8003a38: 460c mov r4, r1
8003a3a: 6849 ldr r1, [r1, #4]
8003a3c: e7cc b.n 80039d8 <_malloc_r+0x2c>
8003a3e: 1cc4 adds r4, r0, #3
8003a40: f024 0403 bic.w r4, r4, #3
8003a44: 42a0 cmp r0, r4
8003a46: d005 beq.n 8003a54 <_malloc_r+0xa8>
8003a48: 1a21 subs r1, r4, r0
8003a4a: 4630 mov r0, r6
8003a4c: f000 f808 bl 8003a60 <_sbrk_r>
8003a50: 3001 adds r0, #1
8003a52: d0cf beq.n 80039f4 <_malloc_r+0x48>
8003a54: 6025 str r5, [r4, #0]
8003a56: e7db b.n 8003a10 <_malloc_r+0x64>
8003a58: 200003ac .word 0x200003ac
8003a5c: 200003b0 .word 0x200003b0
08003a60 <_sbrk_r>:
8003a60: b538 push {r3, r4, r5, lr}
8003a62: 4c06 ldr r4, [pc, #24] ; (8003a7c <_sbrk_r+0x1c>)
8003a64: 2300 movs r3, #0
8003a66: 4605 mov r5, r0
8003a68: 4608 mov r0, r1
8003a6a: 6023 str r3, [r4, #0]
8003a6c: f7fe f87a bl 8001b64 <_sbrk>
8003a70: 1c43 adds r3, r0, #1
8003a72: d102 bne.n 8003a7a <_sbrk_r+0x1a>
8003a74: 6823 ldr r3, [r4, #0]
8003a76: b103 cbz r3, 8003a7a <_sbrk_r+0x1a>
8003a78: 602b str r3, [r5, #0]
8003a7a: bd38 pop {r3, r4, r5, pc}
8003a7c: 20000450 .word 0x20000450
08003a80 <__malloc_lock>:
8003a80: 4770 bx lr
08003a82 <__malloc_unlock>:
8003a82: 4770 bx lr
08003a84 <_init>:
8003a84: b5f8 push {r3, r4, r5, r6, r7, lr}
8003a86: bf00 nop
8003a88: bcf8 pop {r3, r4, r5, r6, r7}
8003a8a: bc08 pop {r3}
8003a8c: 469e mov lr, r3
8003a8e: 4770 bx lr
08003a90 <_fini>:
8003a90: b5f8 push {r3, r4, r5, r6, r7, lr}
8003a92: bf00 nop
8003a94: bcf8 pop {r3, r4, r5, r6, r7}
8003a96: bc08 pop {r3}
8003a98: 469e mov lr, r3
8003a9a: 4770 bx lr
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