William/LED-Face-Mask-Rough
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33eb3b9d80a8e36510fd71657a02a16fe99569d8
LED-Face-Mask-Rough/Debug/STM32F429I-DISC1_LEDFaceMask-Rough.list
William Miceli 33eb3b9d80 Settled on this being the best looking on the actual mask
2020-08-27 23:46:48 -04:00

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STM32F429I-DISC1_LEDFaceMask-Rough.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001ac 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 000051f4 080001b0 080001b0 000101b0 2**3
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000010 080053a4 080053a4 000153a4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 080053b4 080053b4 00020074 2**0
CONTENTS
4 .ARM 00000008 080053b4 080053b4 000153b4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 080053bc 080053bc 00020074 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 080053bc 080053bc 000153bc 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 080053c0 080053c0 000153c0 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 00000074 20000000 080053c4 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 0000042c 20000074 08005438 00020074 2**2
ALLOC
10 ._user_heap_stack 00000600 200004a0 08005438 000204a0 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 00020074 2**0
CONTENTS, READONLY
12 .debug_info 0000d9cf 00000000 00000000 000200a4 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_abbrev 00001d33 00000000 00000000 0002da73 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_aranges 00000d30 00000000 00000000 0002f7a8 2**3
CONTENTS, READONLY, DEBUGGING
15 .debug_ranges 00000c48 00000000 00000000 000304d8 2**3
CONTENTS, READONLY, DEBUGGING
16 .debug_macro 0002448d 00000000 00000000 00031120 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_line 0000a54b 00000000 00000000 000555ad 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_str 000de373 00000000 00000000 0005faf8 2**0
CONTENTS, READONLY, DEBUGGING
19 .comment 0000007b 00000000 00000000 0013de6b 2**0
CONTENTS, READONLY
20 .debug_frame 00003a10 00000000 00000000 0013dee8 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080001b0 <__do_global_dtors_aux>:
80001b0: b510 push {r4, lr}
80001b2: 4c05 ldr r4, [pc, #20] ; (80001c8 <__do_global_dtors_aux+0x18>)
80001b4: 7823 ldrb r3, [r4, #0]
80001b6: b933 cbnz r3, 80001c6 <__do_global_dtors_aux+0x16>
80001b8: 4b04 ldr r3, [pc, #16] ; (80001cc <__do_global_dtors_aux+0x1c>)
80001ba: b113 cbz r3, 80001c2 <__do_global_dtors_aux+0x12>
80001bc: 4804 ldr r0, [pc, #16] ; (80001d0 <__do_global_dtors_aux+0x20>)
80001be: f3af 8000 nop.w
80001c2: 2301 movs r3, #1
80001c4: 7023 strb r3, [r4, #0]
80001c6: bd10 pop {r4, pc}
80001c8: 20000074 .word 0x20000074
80001cc: 00000000 .word 0x00000000
80001d0: 0800538c .word 0x0800538c
080001d4 <frame_dummy>:
80001d4: b508 push {r3, lr}
80001d6: 4b03 ldr r3, [pc, #12] ; (80001e4 <frame_dummy+0x10>)
80001d8: b11b cbz r3, 80001e2 <frame_dummy+0xe>
80001da: 4903 ldr r1, [pc, #12] ; (80001e8 <frame_dummy+0x14>)
80001dc: 4803 ldr r0, [pc, #12] ; (80001ec <frame_dummy+0x18>)
80001de: f3af 8000 nop.w
80001e2: bd08 pop {r3, pc}
80001e4: 00000000 .word 0x00000000
80001e8: 20000078 .word 0x20000078
80001ec: 0800538c .word 0x0800538c
080001f0 <__aeabi_drsub>:
80001f0: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
80001f4: e002 b.n 80001fc <__adddf3>
80001f6: bf00 nop
080001f8 <__aeabi_dsub>:
80001f8: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
080001fc <__adddf3>:
80001fc: b530 push {r4, r5, lr}
80001fe: ea4f 0441 mov.w r4, r1, lsl #1
8000202: ea4f 0543 mov.w r5, r3, lsl #1
8000206: ea94 0f05 teq r4, r5
800020a: bf08 it eq
800020c: ea90 0f02 teqeq r0, r2
8000210: bf1f itttt ne
8000212: ea54 0c00 orrsne.w ip, r4, r0
8000216: ea55 0c02 orrsne.w ip, r5, r2
800021a: ea7f 5c64 mvnsne.w ip, r4, asr #21
800021e: ea7f 5c65 mvnsne.w ip, r5, asr #21
8000222: f000 80e2 beq.w 80003ea <__adddf3+0x1ee>
8000226: ea4f 5454 mov.w r4, r4, lsr #21
800022a: ebd4 5555 rsbs r5, r4, r5, lsr #21
800022e: bfb8 it lt
8000230: 426d neglt r5, r5
8000232: dd0c ble.n 800024e <__adddf3+0x52>
8000234: 442c add r4, r5
8000236: ea80 0202 eor.w r2, r0, r2
800023a: ea81 0303 eor.w r3, r1, r3
800023e: ea82 0000 eor.w r0, r2, r0
8000242: ea83 0101 eor.w r1, r3, r1
8000246: ea80 0202 eor.w r2, r0, r2
800024a: ea81 0303 eor.w r3, r1, r3
800024e: 2d36 cmp r5, #54 ; 0x36
8000250: bf88 it hi
8000252: bd30 pophi {r4, r5, pc}
8000254: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
8000258: ea4f 3101 mov.w r1, r1, lsl #12
800025c: f44f 1c80 mov.w ip, #1048576 ; 0x100000
8000260: ea4c 3111 orr.w r1, ip, r1, lsr #12
8000264: d002 beq.n 800026c <__adddf3+0x70>
8000266: 4240 negs r0, r0
8000268: eb61 0141 sbc.w r1, r1, r1, lsl #1
800026c: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
8000270: ea4f 3303 mov.w r3, r3, lsl #12
8000274: ea4c 3313 orr.w r3, ip, r3, lsr #12
8000278: d002 beq.n 8000280 <__adddf3+0x84>
800027a: 4252 negs r2, r2
800027c: eb63 0343 sbc.w r3, r3, r3, lsl #1
8000280: ea94 0f05 teq r4, r5
8000284: f000 80a7 beq.w 80003d6 <__adddf3+0x1da>
8000288: f1a4 0401 sub.w r4, r4, #1
800028c: f1d5 0e20 rsbs lr, r5, #32
8000290: db0d blt.n 80002ae <__adddf3+0xb2>
8000292: fa02 fc0e lsl.w ip, r2, lr
8000296: fa22 f205 lsr.w r2, r2, r5
800029a: 1880 adds r0, r0, r2
800029c: f141 0100 adc.w r1, r1, #0
80002a0: fa03 f20e lsl.w r2, r3, lr
80002a4: 1880 adds r0, r0, r2
80002a6: fa43 f305 asr.w r3, r3, r5
80002aa: 4159 adcs r1, r3
80002ac: e00e b.n 80002cc <__adddf3+0xd0>
80002ae: f1a5 0520 sub.w r5, r5, #32
80002b2: f10e 0e20 add.w lr, lr, #32
80002b6: 2a01 cmp r2, #1
80002b8: fa03 fc0e lsl.w ip, r3, lr
80002bc: bf28 it cs
80002be: f04c 0c02 orrcs.w ip, ip, #2
80002c2: fa43 f305 asr.w r3, r3, r5
80002c6: 18c0 adds r0, r0, r3
80002c8: eb51 71e3 adcs.w r1, r1, r3, asr #31
80002cc: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
80002d0: d507 bpl.n 80002e2 <__adddf3+0xe6>
80002d2: f04f 0e00 mov.w lr, #0
80002d6: f1dc 0c00 rsbs ip, ip, #0
80002da: eb7e 0000 sbcs.w r0, lr, r0
80002de: eb6e 0101 sbc.w r1, lr, r1
80002e2: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
80002e6: d31b bcc.n 8000320 <__adddf3+0x124>
80002e8: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
80002ec: d30c bcc.n 8000308 <__adddf3+0x10c>
80002ee: 0849 lsrs r1, r1, #1
80002f0: ea5f 0030 movs.w r0, r0, rrx
80002f4: ea4f 0c3c mov.w ip, ip, rrx
80002f8: f104 0401 add.w r4, r4, #1
80002fc: ea4f 5244 mov.w r2, r4, lsl #21
8000300: f512 0f80 cmn.w r2, #4194304 ; 0x400000
8000304: f080 809a bcs.w 800043c <__adddf3+0x240>
8000308: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
800030c: bf08 it eq
800030e: ea5f 0c50 movseq.w ip, r0, lsr #1
8000312: f150 0000 adcs.w r0, r0, #0
8000316: eb41 5104 adc.w r1, r1, r4, lsl #20
800031a: ea41 0105 orr.w r1, r1, r5
800031e: bd30 pop {r4, r5, pc}
8000320: ea5f 0c4c movs.w ip, ip, lsl #1
8000324: 4140 adcs r0, r0
8000326: eb41 0101 adc.w r1, r1, r1
800032a: f411 1f80 tst.w r1, #1048576 ; 0x100000
800032e: f1a4 0401 sub.w r4, r4, #1
8000332: d1e9 bne.n 8000308 <__adddf3+0x10c>
8000334: f091 0f00 teq r1, #0
8000338: bf04 itt eq
800033a: 4601 moveq r1, r0
800033c: 2000 moveq r0, #0
800033e: fab1 f381 clz r3, r1
8000342: bf08 it eq
8000344: 3320 addeq r3, #32
8000346: f1a3 030b sub.w r3, r3, #11
800034a: f1b3 0220 subs.w r2, r3, #32
800034e: da0c bge.n 800036a <__adddf3+0x16e>
8000350: 320c adds r2, #12
8000352: dd08 ble.n 8000366 <__adddf3+0x16a>
8000354: f102 0c14 add.w ip, r2, #20
8000358: f1c2 020c rsb r2, r2, #12
800035c: fa01 f00c lsl.w r0, r1, ip
8000360: fa21 f102 lsr.w r1, r1, r2
8000364: e00c b.n 8000380 <__adddf3+0x184>
8000366: f102 0214 add.w r2, r2, #20
800036a: bfd8 it le
800036c: f1c2 0c20 rsble ip, r2, #32
8000370: fa01 f102 lsl.w r1, r1, r2
8000374: fa20 fc0c lsr.w ip, r0, ip
8000378: bfdc itt le
800037a: ea41 010c orrle.w r1, r1, ip
800037e: 4090 lslle r0, r2
8000380: 1ae4 subs r4, r4, r3
8000382: bfa2 ittt ge
8000384: eb01 5104 addge.w r1, r1, r4, lsl #20
8000388: 4329 orrge r1, r5
800038a: bd30 popge {r4, r5, pc}
800038c: ea6f 0404 mvn.w r4, r4
8000390: 3c1f subs r4, #31
8000392: da1c bge.n 80003ce <__adddf3+0x1d2>
8000394: 340c adds r4, #12
8000396: dc0e bgt.n 80003b6 <__adddf3+0x1ba>
8000398: f104 0414 add.w r4, r4, #20
800039c: f1c4 0220 rsb r2, r4, #32
80003a0: fa20 f004 lsr.w r0, r0, r4
80003a4: fa01 f302 lsl.w r3, r1, r2
80003a8: ea40 0003 orr.w r0, r0, r3
80003ac: fa21 f304 lsr.w r3, r1, r4
80003b0: ea45 0103 orr.w r1, r5, r3
80003b4: bd30 pop {r4, r5, pc}
80003b6: f1c4 040c rsb r4, r4, #12
80003ba: f1c4 0220 rsb r2, r4, #32
80003be: fa20 f002 lsr.w r0, r0, r2
80003c2: fa01 f304 lsl.w r3, r1, r4
80003c6: ea40 0003 orr.w r0, r0, r3
80003ca: 4629 mov r1, r5
80003cc: bd30 pop {r4, r5, pc}
80003ce: fa21 f004 lsr.w r0, r1, r4
80003d2: 4629 mov r1, r5
80003d4: bd30 pop {r4, r5, pc}
80003d6: f094 0f00 teq r4, #0
80003da: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
80003de: bf06 itte eq
80003e0: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
80003e4: 3401 addeq r4, #1
80003e6: 3d01 subne r5, #1
80003e8: e74e b.n 8000288 <__adddf3+0x8c>
80003ea: ea7f 5c64 mvns.w ip, r4, asr #21
80003ee: bf18 it ne
80003f0: ea7f 5c65 mvnsne.w ip, r5, asr #21
80003f4: d029 beq.n 800044a <__adddf3+0x24e>
80003f6: ea94 0f05 teq r4, r5
80003fa: bf08 it eq
80003fc: ea90 0f02 teqeq r0, r2
8000400: d005 beq.n 800040e <__adddf3+0x212>
8000402: ea54 0c00 orrs.w ip, r4, r0
8000406: bf04 itt eq
8000408: 4619 moveq r1, r3
800040a: 4610 moveq r0, r2
800040c: bd30 pop {r4, r5, pc}
800040e: ea91 0f03 teq r1, r3
8000412: bf1e ittt ne
8000414: 2100 movne r1, #0
8000416: 2000 movne r0, #0
8000418: bd30 popne {r4, r5, pc}
800041a: ea5f 5c54 movs.w ip, r4, lsr #21
800041e: d105 bne.n 800042c <__adddf3+0x230>
8000420: 0040 lsls r0, r0, #1
8000422: 4149 adcs r1, r1
8000424: bf28 it cs
8000426: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
800042a: bd30 pop {r4, r5, pc}
800042c: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
8000430: bf3c itt cc
8000432: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
8000436: bd30 popcc {r4, r5, pc}
8000438: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
800043c: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
8000440: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
8000444: f04f 0000 mov.w r0, #0
8000448: bd30 pop {r4, r5, pc}
800044a: ea7f 5c64 mvns.w ip, r4, asr #21
800044e: bf1a itte ne
8000450: 4619 movne r1, r3
8000452: 4610 movne r0, r2
8000454: ea7f 5c65 mvnseq.w ip, r5, asr #21
8000458: bf1c itt ne
800045a: 460b movne r3, r1
800045c: 4602 movne r2, r0
800045e: ea50 3401 orrs.w r4, r0, r1, lsl #12
8000462: bf06 itte eq
8000464: ea52 3503 orrseq.w r5, r2, r3, lsl #12
8000468: ea91 0f03 teqeq r1, r3
800046c: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
8000470: bd30 pop {r4, r5, pc}
8000472: bf00 nop
08000474 <__aeabi_ui2d>:
8000474: f090 0f00 teq r0, #0
8000478: bf04 itt eq
800047a: 2100 moveq r1, #0
800047c: 4770 bxeq lr
800047e: b530 push {r4, r5, lr}
8000480: f44f 6480 mov.w r4, #1024 ; 0x400
8000484: f104 0432 add.w r4, r4, #50 ; 0x32
8000488: f04f 0500 mov.w r5, #0
800048c: f04f 0100 mov.w r1, #0
8000490: e750 b.n 8000334 <__adddf3+0x138>
8000492: bf00 nop
08000494 <__aeabi_i2d>:
8000494: f090 0f00 teq r0, #0
8000498: bf04 itt eq
800049a: 2100 moveq r1, #0
800049c: 4770 bxeq lr
800049e: b530 push {r4, r5, lr}
80004a0: f44f 6480 mov.w r4, #1024 ; 0x400
80004a4: f104 0432 add.w r4, r4, #50 ; 0x32
80004a8: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
80004ac: bf48 it mi
80004ae: 4240 negmi r0, r0
80004b0: f04f 0100 mov.w r1, #0
80004b4: e73e b.n 8000334 <__adddf3+0x138>
80004b6: bf00 nop
080004b8 <__aeabi_f2d>:
80004b8: 0042 lsls r2, r0, #1
80004ba: ea4f 01e2 mov.w r1, r2, asr #3
80004be: ea4f 0131 mov.w r1, r1, rrx
80004c2: ea4f 7002 mov.w r0, r2, lsl #28
80004c6: bf1f itttt ne
80004c8: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
80004cc: f093 4f7f teqne r3, #4278190080 ; 0xff000000
80004d0: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
80004d4: 4770 bxne lr
80004d6: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
80004da: bf08 it eq
80004dc: 4770 bxeq lr
80004de: f093 4f7f teq r3, #4278190080 ; 0xff000000
80004e2: bf04 itt eq
80004e4: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
80004e8: 4770 bxeq lr
80004ea: b530 push {r4, r5, lr}
80004ec: f44f 7460 mov.w r4, #896 ; 0x380
80004f0: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
80004f4: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
80004f8: e71c b.n 8000334 <__adddf3+0x138>
80004fa: bf00 nop
080004fc <__aeabi_ul2d>:
80004fc: ea50 0201 orrs.w r2, r0, r1
8000500: bf08 it eq
8000502: 4770 bxeq lr
8000504: b530 push {r4, r5, lr}
8000506: f04f 0500 mov.w r5, #0
800050a: e00a b.n 8000522 <__aeabi_l2d+0x16>
0800050c <__aeabi_l2d>:
800050c: ea50 0201 orrs.w r2, r0, r1
8000510: bf08 it eq
8000512: 4770 bxeq lr
8000514: b530 push {r4, r5, lr}
8000516: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
800051a: d502 bpl.n 8000522 <__aeabi_l2d+0x16>
800051c: 4240 negs r0, r0
800051e: eb61 0141 sbc.w r1, r1, r1, lsl #1
8000522: f44f 6480 mov.w r4, #1024 ; 0x400
8000526: f104 0432 add.w r4, r4, #50 ; 0x32
800052a: ea5f 5c91 movs.w ip, r1, lsr #22
800052e: f43f aed8 beq.w 80002e2 <__adddf3+0xe6>
8000532: f04f 0203 mov.w r2, #3
8000536: ea5f 0cdc movs.w ip, ip, lsr #3
800053a: bf18 it ne
800053c: 3203 addne r2, #3
800053e: ea5f 0cdc movs.w ip, ip, lsr #3
8000542: bf18 it ne
8000544: 3203 addne r2, #3
8000546: eb02 02dc add.w r2, r2, ip, lsr #3
800054a: f1c2 0320 rsb r3, r2, #32
800054e: fa00 fc03 lsl.w ip, r0, r3
8000552: fa20 f002 lsr.w r0, r0, r2
8000556: fa01 fe03 lsl.w lr, r1, r3
800055a: ea40 000e orr.w r0, r0, lr
800055e: fa21 f102 lsr.w r1, r1, r2
8000562: 4414 add r4, r2
8000564: e6bd b.n 80002e2 <__adddf3+0xe6>
8000566: bf00 nop
08000568 <__aeabi_dmul>:
8000568: b570 push {r4, r5, r6, lr}
800056a: f04f 0cff mov.w ip, #255 ; 0xff
800056e: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
8000572: ea1c 5411 ands.w r4, ip, r1, lsr #20
8000576: bf1d ittte ne
8000578: ea1c 5513 andsne.w r5, ip, r3, lsr #20
800057c: ea94 0f0c teqne r4, ip
8000580: ea95 0f0c teqne r5, ip
8000584: f000 f8de bleq 8000744 <__aeabi_dmul+0x1dc>
8000588: 442c add r4, r5
800058a: ea81 0603 eor.w r6, r1, r3
800058e: ea21 514c bic.w r1, r1, ip, lsl #21
8000592: ea23 534c bic.w r3, r3, ip, lsl #21
8000596: ea50 3501 orrs.w r5, r0, r1, lsl #12
800059a: bf18 it ne
800059c: ea52 3503 orrsne.w r5, r2, r3, lsl #12
80005a0: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
80005a4: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
80005a8: d038 beq.n 800061c <__aeabi_dmul+0xb4>
80005aa: fba0 ce02 umull ip, lr, r0, r2
80005ae: f04f 0500 mov.w r5, #0
80005b2: fbe1 e502 umlal lr, r5, r1, r2
80005b6: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
80005ba: fbe0 e503 umlal lr, r5, r0, r3
80005be: f04f 0600 mov.w r6, #0
80005c2: fbe1 5603 umlal r5, r6, r1, r3
80005c6: f09c 0f00 teq ip, #0
80005ca: bf18 it ne
80005cc: f04e 0e01 orrne.w lr, lr, #1
80005d0: f1a4 04ff sub.w r4, r4, #255 ; 0xff
80005d4: f5b6 7f00 cmp.w r6, #512 ; 0x200
80005d8: f564 7440 sbc.w r4, r4, #768 ; 0x300
80005dc: d204 bcs.n 80005e8 <__aeabi_dmul+0x80>
80005de: ea5f 0e4e movs.w lr, lr, lsl #1
80005e2: 416d adcs r5, r5
80005e4: eb46 0606 adc.w r6, r6, r6
80005e8: ea42 21c6 orr.w r1, r2, r6, lsl #11
80005ec: ea41 5155 orr.w r1, r1, r5, lsr #21
80005f0: ea4f 20c5 mov.w r0, r5, lsl #11
80005f4: ea40 505e orr.w r0, r0, lr, lsr #21
80005f8: ea4f 2ece mov.w lr, lr, lsl #11
80005fc: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
8000600: bf88 it hi
8000602: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
8000606: d81e bhi.n 8000646 <__aeabi_dmul+0xde>
8000608: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
800060c: bf08 it eq
800060e: ea5f 0e50 movseq.w lr, r0, lsr #1
8000612: f150 0000 adcs.w r0, r0, #0
8000616: eb41 5104 adc.w r1, r1, r4, lsl #20
800061a: bd70 pop {r4, r5, r6, pc}
800061c: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
8000620: ea46 0101 orr.w r1, r6, r1
8000624: ea40 0002 orr.w r0, r0, r2
8000628: ea81 0103 eor.w r1, r1, r3
800062c: ebb4 045c subs.w r4, r4, ip, lsr #1
8000630: bfc2 ittt gt
8000632: ebd4 050c rsbsgt r5, r4, ip
8000636: ea41 5104 orrgt.w r1, r1, r4, lsl #20
800063a: bd70 popgt {r4, r5, r6, pc}
800063c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
8000640: f04f 0e00 mov.w lr, #0
8000644: 3c01 subs r4, #1
8000646: f300 80ab bgt.w 80007a0 <__aeabi_dmul+0x238>
800064a: f114 0f36 cmn.w r4, #54 ; 0x36
800064e: bfde ittt le
8000650: 2000 movle r0, #0
8000652: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
8000656: bd70 pople {r4, r5, r6, pc}
8000658: f1c4 0400 rsb r4, r4, #0
800065c: 3c20 subs r4, #32
800065e: da35 bge.n 80006cc <__aeabi_dmul+0x164>
8000660: 340c adds r4, #12
8000662: dc1b bgt.n 800069c <__aeabi_dmul+0x134>
8000664: f104 0414 add.w r4, r4, #20
8000668: f1c4 0520 rsb r5, r4, #32
800066c: fa00 f305 lsl.w r3, r0, r5
8000670: fa20 f004 lsr.w r0, r0, r4
8000674: fa01 f205 lsl.w r2, r1, r5
8000678: ea40 0002 orr.w r0, r0, r2
800067c: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
8000680: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
8000684: eb10 70d3 adds.w r0, r0, r3, lsr #31
8000688: fa21 f604 lsr.w r6, r1, r4
800068c: eb42 0106 adc.w r1, r2, r6
8000690: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
8000694: bf08 it eq
8000696: ea20 70d3 biceq.w r0, r0, r3, lsr #31
800069a: bd70 pop {r4, r5, r6, pc}
800069c: f1c4 040c rsb r4, r4, #12
80006a0: f1c4 0520 rsb r5, r4, #32
80006a4: fa00 f304 lsl.w r3, r0, r4
80006a8: fa20 f005 lsr.w r0, r0, r5
80006ac: fa01 f204 lsl.w r2, r1, r4
80006b0: ea40 0002 orr.w r0, r0, r2
80006b4: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
80006b8: eb10 70d3 adds.w r0, r0, r3, lsr #31
80006bc: f141 0100 adc.w r1, r1, #0
80006c0: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
80006c4: bf08 it eq
80006c6: ea20 70d3 biceq.w r0, r0, r3, lsr #31
80006ca: bd70 pop {r4, r5, r6, pc}
80006cc: f1c4 0520 rsb r5, r4, #32
80006d0: fa00 f205 lsl.w r2, r0, r5
80006d4: ea4e 0e02 orr.w lr, lr, r2
80006d8: fa20 f304 lsr.w r3, r0, r4
80006dc: fa01 f205 lsl.w r2, r1, r5
80006e0: ea43 0302 orr.w r3, r3, r2
80006e4: fa21 f004 lsr.w r0, r1, r4
80006e8: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
80006ec: fa21 f204 lsr.w r2, r1, r4
80006f0: ea20 0002 bic.w r0, r0, r2
80006f4: eb00 70d3 add.w r0, r0, r3, lsr #31
80006f8: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
80006fc: bf08 it eq
80006fe: ea20 70d3 biceq.w r0, r0, r3, lsr #31
8000702: bd70 pop {r4, r5, r6, pc}
8000704: f094 0f00 teq r4, #0
8000708: d10f bne.n 800072a <__aeabi_dmul+0x1c2>
800070a: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
800070e: 0040 lsls r0, r0, #1
8000710: eb41 0101 adc.w r1, r1, r1
8000714: f411 1f80 tst.w r1, #1048576 ; 0x100000
8000718: bf08 it eq
800071a: 3c01 subeq r4, #1
800071c: d0f7 beq.n 800070e <__aeabi_dmul+0x1a6>
800071e: ea41 0106 orr.w r1, r1, r6
8000722: f095 0f00 teq r5, #0
8000726: bf18 it ne
8000728: 4770 bxne lr
800072a: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
800072e: 0052 lsls r2, r2, #1
8000730: eb43 0303 adc.w r3, r3, r3
8000734: f413 1f80 tst.w r3, #1048576 ; 0x100000
8000738: bf08 it eq
800073a: 3d01 subeq r5, #1
800073c: d0f7 beq.n 800072e <__aeabi_dmul+0x1c6>
800073e: ea43 0306 orr.w r3, r3, r6
8000742: 4770 bx lr
8000744: ea94 0f0c teq r4, ip
8000748: ea0c 5513 and.w r5, ip, r3, lsr #20
800074c: bf18 it ne
800074e: ea95 0f0c teqne r5, ip
8000752: d00c beq.n 800076e <__aeabi_dmul+0x206>
8000754: ea50 0641 orrs.w r6, r0, r1, lsl #1
8000758: bf18 it ne
800075a: ea52 0643 orrsne.w r6, r2, r3, lsl #1
800075e: d1d1 bne.n 8000704 <__aeabi_dmul+0x19c>
8000760: ea81 0103 eor.w r1, r1, r3
8000764: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
8000768: f04f 0000 mov.w r0, #0
800076c: bd70 pop {r4, r5, r6, pc}
800076e: ea50 0641 orrs.w r6, r0, r1, lsl #1
8000772: bf06 itte eq
8000774: 4610 moveq r0, r2
8000776: 4619 moveq r1, r3
8000778: ea52 0643 orrsne.w r6, r2, r3, lsl #1
800077c: d019 beq.n 80007b2 <__aeabi_dmul+0x24a>
800077e: ea94 0f0c teq r4, ip
8000782: d102 bne.n 800078a <__aeabi_dmul+0x222>
8000784: ea50 3601 orrs.w r6, r0, r1, lsl #12
8000788: d113 bne.n 80007b2 <__aeabi_dmul+0x24a>
800078a: ea95 0f0c teq r5, ip
800078e: d105 bne.n 800079c <__aeabi_dmul+0x234>
8000790: ea52 3603 orrs.w r6, r2, r3, lsl #12
8000794: bf1c itt ne
8000796: 4610 movne r0, r2
8000798: 4619 movne r1, r3
800079a: d10a bne.n 80007b2 <__aeabi_dmul+0x24a>
800079c: ea81 0103 eor.w r1, r1, r3
80007a0: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
80007a4: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
80007a8: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
80007ac: f04f 0000 mov.w r0, #0
80007b0: bd70 pop {r4, r5, r6, pc}
80007b2: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
80007b6: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
80007ba: bd70 pop {r4, r5, r6, pc}
080007bc <__aeabi_ddiv>:
80007bc: b570 push {r4, r5, r6, lr}
80007be: f04f 0cff mov.w ip, #255 ; 0xff
80007c2: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
80007c6: ea1c 5411 ands.w r4, ip, r1, lsr #20
80007ca: bf1d ittte ne
80007cc: ea1c 5513 andsne.w r5, ip, r3, lsr #20
80007d0: ea94 0f0c teqne r4, ip
80007d4: ea95 0f0c teqne r5, ip
80007d8: f000 f8a7 bleq 800092a <__aeabi_ddiv+0x16e>
80007dc: eba4 0405 sub.w r4, r4, r5
80007e0: ea81 0e03 eor.w lr, r1, r3
80007e4: ea52 3503 orrs.w r5, r2, r3, lsl #12
80007e8: ea4f 3101 mov.w r1, r1, lsl #12
80007ec: f000 8088 beq.w 8000900 <__aeabi_ddiv+0x144>
80007f0: ea4f 3303 mov.w r3, r3, lsl #12
80007f4: f04f 5580 mov.w r5, #268435456 ; 0x10000000
80007f8: ea45 1313 orr.w r3, r5, r3, lsr #4
80007fc: ea43 6312 orr.w r3, r3, r2, lsr #24
8000800: ea4f 2202 mov.w r2, r2, lsl #8
8000804: ea45 1511 orr.w r5, r5, r1, lsr #4
8000808: ea45 6510 orr.w r5, r5, r0, lsr #24
800080c: ea4f 2600 mov.w r6, r0, lsl #8
8000810: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
8000814: 429d cmp r5, r3
8000816: bf08 it eq
8000818: 4296 cmpeq r6, r2
800081a: f144 04fd adc.w r4, r4, #253 ; 0xfd
800081e: f504 7440 add.w r4, r4, #768 ; 0x300
8000822: d202 bcs.n 800082a <__aeabi_ddiv+0x6e>
8000824: 085b lsrs r3, r3, #1
8000826: ea4f 0232 mov.w r2, r2, rrx
800082a: 1ab6 subs r6, r6, r2
800082c: eb65 0503 sbc.w r5, r5, r3
8000830: 085b lsrs r3, r3, #1
8000832: ea4f 0232 mov.w r2, r2, rrx
8000836: f44f 1080 mov.w r0, #1048576 ; 0x100000
800083a: f44f 2c00 mov.w ip, #524288 ; 0x80000
800083e: ebb6 0e02 subs.w lr, r6, r2
8000842: eb75 0e03 sbcs.w lr, r5, r3
8000846: bf22 ittt cs
8000848: 1ab6 subcs r6, r6, r2
800084a: 4675 movcs r5, lr
800084c: ea40 000c orrcs.w r0, r0, ip
8000850: 085b lsrs r3, r3, #1
8000852: ea4f 0232 mov.w r2, r2, rrx
8000856: ebb6 0e02 subs.w lr, r6, r2
800085a: eb75 0e03 sbcs.w lr, r5, r3
800085e: bf22 ittt cs
8000860: 1ab6 subcs r6, r6, r2
8000862: 4675 movcs r5, lr
8000864: ea40 005c orrcs.w r0, r0, ip, lsr #1
8000868: 085b lsrs r3, r3, #1
800086a: ea4f 0232 mov.w r2, r2, rrx
800086e: ebb6 0e02 subs.w lr, r6, r2
8000872: eb75 0e03 sbcs.w lr, r5, r3
8000876: bf22 ittt cs
8000878: 1ab6 subcs r6, r6, r2
800087a: 4675 movcs r5, lr
800087c: ea40 009c orrcs.w r0, r0, ip, lsr #2
8000880: 085b lsrs r3, r3, #1
8000882: ea4f 0232 mov.w r2, r2, rrx
8000886: ebb6 0e02 subs.w lr, r6, r2
800088a: eb75 0e03 sbcs.w lr, r5, r3
800088e: bf22 ittt cs
8000890: 1ab6 subcs r6, r6, r2
8000892: 4675 movcs r5, lr
8000894: ea40 00dc orrcs.w r0, r0, ip, lsr #3
8000898: ea55 0e06 orrs.w lr, r5, r6
800089c: d018 beq.n 80008d0 <__aeabi_ddiv+0x114>
800089e: ea4f 1505 mov.w r5, r5, lsl #4
80008a2: ea45 7516 orr.w r5, r5, r6, lsr #28
80008a6: ea4f 1606 mov.w r6, r6, lsl #4
80008aa: ea4f 03c3 mov.w r3, r3, lsl #3
80008ae: ea43 7352 orr.w r3, r3, r2, lsr #29
80008b2: ea4f 02c2 mov.w r2, r2, lsl #3
80008b6: ea5f 1c1c movs.w ip, ip, lsr #4
80008ba: d1c0 bne.n 800083e <__aeabi_ddiv+0x82>
80008bc: f411 1f80 tst.w r1, #1048576 ; 0x100000
80008c0: d10b bne.n 80008da <__aeabi_ddiv+0x11e>
80008c2: ea41 0100 orr.w r1, r1, r0
80008c6: f04f 0000 mov.w r0, #0
80008ca: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
80008ce: e7b6 b.n 800083e <__aeabi_ddiv+0x82>
80008d0: f411 1f80 tst.w r1, #1048576 ; 0x100000
80008d4: bf04 itt eq
80008d6: 4301 orreq r1, r0
80008d8: 2000 moveq r0, #0
80008da: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
80008de: bf88 it hi
80008e0: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
80008e4: f63f aeaf bhi.w 8000646 <__aeabi_dmul+0xde>
80008e8: ebb5 0c03 subs.w ip, r5, r3
80008ec: bf04 itt eq
80008ee: ebb6 0c02 subseq.w ip, r6, r2
80008f2: ea5f 0c50 movseq.w ip, r0, lsr #1
80008f6: f150 0000 adcs.w r0, r0, #0
80008fa: eb41 5104 adc.w r1, r1, r4, lsl #20
80008fe: bd70 pop {r4, r5, r6, pc}
8000900: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
8000904: ea4e 3111 orr.w r1, lr, r1, lsr #12
8000908: eb14 045c adds.w r4, r4, ip, lsr #1
800090c: bfc2 ittt gt
800090e: ebd4 050c rsbsgt r5, r4, ip
8000912: ea41 5104 orrgt.w r1, r1, r4, lsl #20
8000916: bd70 popgt {r4, r5, r6, pc}
8000918: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
800091c: f04f 0e00 mov.w lr, #0
8000920: 3c01 subs r4, #1
8000922: e690 b.n 8000646 <__aeabi_dmul+0xde>
8000924: ea45 0e06 orr.w lr, r5, r6
8000928: e68d b.n 8000646 <__aeabi_dmul+0xde>
800092a: ea0c 5513 and.w r5, ip, r3, lsr #20
800092e: ea94 0f0c teq r4, ip
8000932: bf08 it eq
8000934: ea95 0f0c teqeq r5, ip
8000938: f43f af3b beq.w 80007b2 <__aeabi_dmul+0x24a>
800093c: ea94 0f0c teq r4, ip
8000940: d10a bne.n 8000958 <__aeabi_ddiv+0x19c>
8000942: ea50 3401 orrs.w r4, r0, r1, lsl #12
8000946: f47f af34 bne.w 80007b2 <__aeabi_dmul+0x24a>
800094a: ea95 0f0c teq r5, ip
800094e: f47f af25 bne.w 800079c <__aeabi_dmul+0x234>
8000952: 4610 mov r0, r2
8000954: 4619 mov r1, r3
8000956: e72c b.n 80007b2 <__aeabi_dmul+0x24a>
8000958: ea95 0f0c teq r5, ip
800095c: d106 bne.n 800096c <__aeabi_ddiv+0x1b0>
800095e: ea52 3503 orrs.w r5, r2, r3, lsl #12
8000962: f43f aefd beq.w 8000760 <__aeabi_dmul+0x1f8>
8000966: 4610 mov r0, r2
8000968: 4619 mov r1, r3
800096a: e722 b.n 80007b2 <__aeabi_dmul+0x24a>
800096c: ea50 0641 orrs.w r6, r0, r1, lsl #1
8000970: bf18 it ne
8000972: ea52 0643 orrsne.w r6, r2, r3, lsl #1
8000976: f47f aec5 bne.w 8000704 <__aeabi_dmul+0x19c>
800097a: ea50 0441 orrs.w r4, r0, r1, lsl #1
800097e: f47f af0d bne.w 800079c <__aeabi_dmul+0x234>
8000982: ea52 0543 orrs.w r5, r2, r3, lsl #1
8000986: f47f aeeb bne.w 8000760 <__aeabi_dmul+0x1f8>
800098a: e712 b.n 80007b2 <__aeabi_dmul+0x24a>
0800098c <__aeabi_d2uiz>:
800098c: 004a lsls r2, r1, #1
800098e: d211 bcs.n 80009b4 <__aeabi_d2uiz+0x28>
8000990: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
8000994: d211 bcs.n 80009ba <__aeabi_d2uiz+0x2e>
8000996: d50d bpl.n 80009b4 <__aeabi_d2uiz+0x28>
8000998: f46f 7378 mvn.w r3, #992 ; 0x3e0
800099c: ebb3 5262 subs.w r2, r3, r2, asr #21
80009a0: d40e bmi.n 80009c0 <__aeabi_d2uiz+0x34>
80009a2: ea4f 23c1 mov.w r3, r1, lsl #11
80009a6: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
80009aa: ea43 5350 orr.w r3, r3, r0, lsr #21
80009ae: fa23 f002 lsr.w r0, r3, r2
80009b2: 4770 bx lr
80009b4: f04f 0000 mov.w r0, #0
80009b8: 4770 bx lr
80009ba: ea50 3001 orrs.w r0, r0, r1, lsl #12
80009be: d102 bne.n 80009c6 <__aeabi_d2uiz+0x3a>
80009c0: f04f 30ff mov.w r0, #4294967295
80009c4: 4770 bx lr
80009c6: f04f 0000 mov.w r0, #0
80009ca: 4770 bx lr
080009cc <__aeabi_uldivmod>:
80009cc: b953 cbnz r3, 80009e4 <__aeabi_uldivmod+0x18>
80009ce: b94a cbnz r2, 80009e4 <__aeabi_uldivmod+0x18>
80009d0: 2900 cmp r1, #0
80009d2: bf08 it eq
80009d4: 2800 cmpeq r0, #0
80009d6: bf1c itt ne
80009d8: f04f 31ff movne.w r1, #4294967295
80009dc: f04f 30ff movne.w r0, #4294967295
80009e0: f000 b972 b.w 8000cc8 <__aeabi_idiv0>
80009e4: f1ad 0c08 sub.w ip, sp, #8
80009e8: e96d ce04 strd ip, lr, [sp, #-16]!
80009ec: f000 f806 bl 80009fc <__udivmoddi4>
80009f0: f8dd e004 ldr.w lr, [sp, #4]
80009f4: e9dd 2302 ldrd r2, r3, [sp, #8]
80009f8: b004 add sp, #16
80009fa: 4770 bx lr
080009fc <__udivmoddi4>:
80009fc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8000a00: 9e08 ldr r6, [sp, #32]
8000a02: 4604 mov r4, r0
8000a04: 4688 mov r8, r1
8000a06: 2b00 cmp r3, #0
8000a08: d14b bne.n 8000aa2 <__udivmoddi4+0xa6>
8000a0a: 428a cmp r2, r1
8000a0c: 4615 mov r5, r2
8000a0e: d967 bls.n 8000ae0 <__udivmoddi4+0xe4>
8000a10: fab2 f282 clz r2, r2
8000a14: b14a cbz r2, 8000a2a <__udivmoddi4+0x2e>
8000a16: f1c2 0720 rsb r7, r2, #32
8000a1a: fa01 f302 lsl.w r3, r1, r2
8000a1e: fa20 f707 lsr.w r7, r0, r7
8000a22: 4095 lsls r5, r2
8000a24: ea47 0803 orr.w r8, r7, r3
8000a28: 4094 lsls r4, r2
8000a2a: ea4f 4e15 mov.w lr, r5, lsr #16
8000a2e: 0c23 lsrs r3, r4, #16
8000a30: fbb8 f7fe udiv r7, r8, lr
8000a34: fa1f fc85 uxth.w ip, r5
8000a38: fb0e 8817 mls r8, lr, r7, r8
8000a3c: ea43 4308 orr.w r3, r3, r8, lsl #16
8000a40: fb07 f10c mul.w r1, r7, ip
8000a44: 4299 cmp r1, r3
8000a46: d909 bls.n 8000a5c <__udivmoddi4+0x60>
8000a48: 18eb adds r3, r5, r3
8000a4a: f107 30ff add.w r0, r7, #4294967295
8000a4e: f080 811b bcs.w 8000c88 <__udivmoddi4+0x28c>
8000a52: 4299 cmp r1, r3
8000a54: f240 8118 bls.w 8000c88 <__udivmoddi4+0x28c>
8000a58: 3f02 subs r7, #2
8000a5a: 442b add r3, r5
8000a5c: 1a5b subs r3, r3, r1
8000a5e: b2a4 uxth r4, r4
8000a60: fbb3 f0fe udiv r0, r3, lr
8000a64: fb0e 3310 mls r3, lr, r0, r3
8000a68: ea44 4403 orr.w r4, r4, r3, lsl #16
8000a6c: fb00 fc0c mul.w ip, r0, ip
8000a70: 45a4 cmp ip, r4
8000a72: d909 bls.n 8000a88 <__udivmoddi4+0x8c>
8000a74: 192c adds r4, r5, r4
8000a76: f100 33ff add.w r3, r0, #4294967295
8000a7a: f080 8107 bcs.w 8000c8c <__udivmoddi4+0x290>
8000a7e: 45a4 cmp ip, r4
8000a80: f240 8104 bls.w 8000c8c <__udivmoddi4+0x290>
8000a84: 3802 subs r0, #2
8000a86: 442c add r4, r5
8000a88: ea40 4007 orr.w r0, r0, r7, lsl #16
8000a8c: eba4 040c sub.w r4, r4, ip
8000a90: 2700 movs r7, #0
8000a92: b11e cbz r6, 8000a9c <__udivmoddi4+0xa0>
8000a94: 40d4 lsrs r4, r2
8000a96: 2300 movs r3, #0
8000a98: e9c6 4300 strd r4, r3, [r6]
8000a9c: 4639 mov r1, r7
8000a9e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8000aa2: 428b cmp r3, r1
8000aa4: d909 bls.n 8000aba <__udivmoddi4+0xbe>
8000aa6: 2e00 cmp r6, #0
8000aa8: f000 80eb beq.w 8000c82 <__udivmoddi4+0x286>
8000aac: 2700 movs r7, #0
8000aae: e9c6 0100 strd r0, r1, [r6]
8000ab2: 4638 mov r0, r7
8000ab4: 4639 mov r1, r7
8000ab6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8000aba: fab3 f783 clz r7, r3
8000abe: 2f00 cmp r7, #0
8000ac0: d147 bne.n 8000b52 <__udivmoddi4+0x156>
8000ac2: 428b cmp r3, r1
8000ac4: d302 bcc.n 8000acc <__udivmoddi4+0xd0>
8000ac6: 4282 cmp r2, r0
8000ac8: f200 80fa bhi.w 8000cc0 <__udivmoddi4+0x2c4>
8000acc: 1a84 subs r4, r0, r2
8000ace: eb61 0303 sbc.w r3, r1, r3
8000ad2: 2001 movs r0, #1
8000ad4: 4698 mov r8, r3
8000ad6: 2e00 cmp r6, #0
8000ad8: d0e0 beq.n 8000a9c <__udivmoddi4+0xa0>
8000ada: e9c6 4800 strd r4, r8, [r6]
8000ade: e7dd b.n 8000a9c <__udivmoddi4+0xa0>
8000ae0: b902 cbnz r2, 8000ae4 <__udivmoddi4+0xe8>
8000ae2: deff udf #255 ; 0xff
8000ae4: fab2 f282 clz r2, r2
8000ae8: 2a00 cmp r2, #0
8000aea: f040 808f bne.w 8000c0c <__udivmoddi4+0x210>
8000aee: 1b49 subs r1, r1, r5
8000af0: ea4f 4e15 mov.w lr, r5, lsr #16
8000af4: fa1f f885 uxth.w r8, r5
8000af8: 2701 movs r7, #1
8000afa: fbb1 fcfe udiv ip, r1, lr
8000afe: 0c23 lsrs r3, r4, #16
8000b00: fb0e 111c mls r1, lr, ip, r1
8000b04: ea43 4301 orr.w r3, r3, r1, lsl #16
8000b08: fb08 f10c mul.w r1, r8, ip
8000b0c: 4299 cmp r1, r3
8000b0e: d907 bls.n 8000b20 <__udivmoddi4+0x124>
8000b10: 18eb adds r3, r5, r3
8000b12: f10c 30ff add.w r0, ip, #4294967295
8000b16: d202 bcs.n 8000b1e <__udivmoddi4+0x122>
8000b18: 4299 cmp r1, r3
8000b1a: f200 80cd bhi.w 8000cb8 <__udivmoddi4+0x2bc>
8000b1e: 4684 mov ip, r0
8000b20: 1a59 subs r1, r3, r1
8000b22: b2a3 uxth r3, r4
8000b24: fbb1 f0fe udiv r0, r1, lr
8000b28: fb0e 1410 mls r4, lr, r0, r1
8000b2c: ea43 4404 orr.w r4, r3, r4, lsl #16
8000b30: fb08 f800 mul.w r8, r8, r0
8000b34: 45a0 cmp r8, r4
8000b36: d907 bls.n 8000b48 <__udivmoddi4+0x14c>
8000b38: 192c adds r4, r5, r4
8000b3a: f100 33ff add.w r3, r0, #4294967295
8000b3e: d202 bcs.n 8000b46 <__udivmoddi4+0x14a>
8000b40: 45a0 cmp r8, r4
8000b42: f200 80b6 bhi.w 8000cb2 <__udivmoddi4+0x2b6>
8000b46: 4618 mov r0, r3
8000b48: eba4 0408 sub.w r4, r4, r8
8000b4c: ea40 400c orr.w r0, r0, ip, lsl #16
8000b50: e79f b.n 8000a92 <__udivmoddi4+0x96>
8000b52: f1c7 0c20 rsb ip, r7, #32
8000b56: 40bb lsls r3, r7
8000b58: fa22 fe0c lsr.w lr, r2, ip
8000b5c: ea4e 0e03 orr.w lr, lr, r3
8000b60: fa01 f407 lsl.w r4, r1, r7
8000b64: fa20 f50c lsr.w r5, r0, ip
8000b68: fa21 f30c lsr.w r3, r1, ip
8000b6c: ea4f 481e mov.w r8, lr, lsr #16
8000b70: 4325 orrs r5, r4
8000b72: fbb3 f9f8 udiv r9, r3, r8
8000b76: 0c2c lsrs r4, r5, #16
8000b78: fb08 3319 mls r3, r8, r9, r3
8000b7c: fa1f fa8e uxth.w sl, lr
8000b80: ea44 4303 orr.w r3, r4, r3, lsl #16
8000b84: fb09 f40a mul.w r4, r9, sl
8000b88: 429c cmp r4, r3
8000b8a: fa02 f207 lsl.w r2, r2, r7
8000b8e: fa00 f107 lsl.w r1, r0, r7
8000b92: d90b bls.n 8000bac <__udivmoddi4+0x1b0>
8000b94: eb1e 0303 adds.w r3, lr, r3
8000b98: f109 30ff add.w r0, r9, #4294967295
8000b9c: f080 8087 bcs.w 8000cae <__udivmoddi4+0x2b2>
8000ba0: 429c cmp r4, r3
8000ba2: f240 8084 bls.w 8000cae <__udivmoddi4+0x2b2>
8000ba6: f1a9 0902 sub.w r9, r9, #2
8000baa: 4473 add r3, lr
8000bac: 1b1b subs r3, r3, r4
8000bae: b2ad uxth r5, r5
8000bb0: fbb3 f0f8 udiv r0, r3, r8
8000bb4: fb08 3310 mls r3, r8, r0, r3
8000bb8: ea45 4403 orr.w r4, r5, r3, lsl #16
8000bbc: fb00 fa0a mul.w sl, r0, sl
8000bc0: 45a2 cmp sl, r4
8000bc2: d908 bls.n 8000bd6 <__udivmoddi4+0x1da>
8000bc4: eb1e 0404 adds.w r4, lr, r4
8000bc8: f100 33ff add.w r3, r0, #4294967295
8000bcc: d26b bcs.n 8000ca6 <__udivmoddi4+0x2aa>
8000bce: 45a2 cmp sl, r4
8000bd0: d969 bls.n 8000ca6 <__udivmoddi4+0x2aa>
8000bd2: 3802 subs r0, #2
8000bd4: 4474 add r4, lr
8000bd6: ea40 4009 orr.w r0, r0, r9, lsl #16
8000bda: fba0 8902 umull r8, r9, r0, r2
8000bde: eba4 040a sub.w r4, r4, sl
8000be2: 454c cmp r4, r9
8000be4: 46c2 mov sl, r8
8000be6: 464b mov r3, r9
8000be8: d354 bcc.n 8000c94 <__udivmoddi4+0x298>
8000bea: d051 beq.n 8000c90 <__udivmoddi4+0x294>
8000bec: 2e00 cmp r6, #0
8000bee: d069 beq.n 8000cc4 <__udivmoddi4+0x2c8>
8000bf0: ebb1 050a subs.w r5, r1, sl
8000bf4: eb64 0403 sbc.w r4, r4, r3
8000bf8: fa04 fc0c lsl.w ip, r4, ip
8000bfc: 40fd lsrs r5, r7
8000bfe: 40fc lsrs r4, r7
8000c00: ea4c 0505 orr.w r5, ip, r5
8000c04: e9c6 5400 strd r5, r4, [r6]
8000c08: 2700 movs r7, #0
8000c0a: e747 b.n 8000a9c <__udivmoddi4+0xa0>
8000c0c: f1c2 0320 rsb r3, r2, #32
8000c10: fa20 f703 lsr.w r7, r0, r3
8000c14: 4095 lsls r5, r2
8000c16: fa01 f002 lsl.w r0, r1, r2
8000c1a: fa21 f303 lsr.w r3, r1, r3
8000c1e: ea4f 4e15 mov.w lr, r5, lsr #16
8000c22: 4338 orrs r0, r7
8000c24: 0c01 lsrs r1, r0, #16
8000c26: fbb3 f7fe udiv r7, r3, lr
8000c2a: fa1f f885 uxth.w r8, r5
8000c2e: fb0e 3317 mls r3, lr, r7, r3
8000c32: ea41 4103 orr.w r1, r1, r3, lsl #16
8000c36: fb07 f308 mul.w r3, r7, r8
8000c3a: 428b cmp r3, r1
8000c3c: fa04 f402 lsl.w r4, r4, r2
8000c40: d907 bls.n 8000c52 <__udivmoddi4+0x256>
8000c42: 1869 adds r1, r5, r1
8000c44: f107 3cff add.w ip, r7, #4294967295
8000c48: d22f bcs.n 8000caa <__udivmoddi4+0x2ae>
8000c4a: 428b cmp r3, r1
8000c4c: d92d bls.n 8000caa <__udivmoddi4+0x2ae>
8000c4e: 3f02 subs r7, #2
8000c50: 4429 add r1, r5
8000c52: 1acb subs r3, r1, r3
8000c54: b281 uxth r1, r0
8000c56: fbb3 f0fe udiv r0, r3, lr
8000c5a: fb0e 3310 mls r3, lr, r0, r3
8000c5e: ea41 4103 orr.w r1, r1, r3, lsl #16
8000c62: fb00 f308 mul.w r3, r0, r8
8000c66: 428b cmp r3, r1
8000c68: d907 bls.n 8000c7a <__udivmoddi4+0x27e>
8000c6a: 1869 adds r1, r5, r1
8000c6c: f100 3cff add.w ip, r0, #4294967295
8000c70: d217 bcs.n 8000ca2 <__udivmoddi4+0x2a6>
8000c72: 428b cmp r3, r1
8000c74: d915 bls.n 8000ca2 <__udivmoddi4+0x2a6>
8000c76: 3802 subs r0, #2
8000c78: 4429 add r1, r5
8000c7a: 1ac9 subs r1, r1, r3
8000c7c: ea40 4707 orr.w r7, r0, r7, lsl #16
8000c80: e73b b.n 8000afa <__udivmoddi4+0xfe>
8000c82: 4637 mov r7, r6
8000c84: 4630 mov r0, r6
8000c86: e709 b.n 8000a9c <__udivmoddi4+0xa0>
8000c88: 4607 mov r7, r0
8000c8a: e6e7 b.n 8000a5c <__udivmoddi4+0x60>
8000c8c: 4618 mov r0, r3
8000c8e: e6fb b.n 8000a88 <__udivmoddi4+0x8c>
8000c90: 4541 cmp r1, r8
8000c92: d2ab bcs.n 8000bec <__udivmoddi4+0x1f0>
8000c94: ebb8 0a02 subs.w sl, r8, r2
8000c98: eb69 020e sbc.w r2, r9, lr
8000c9c: 3801 subs r0, #1
8000c9e: 4613 mov r3, r2
8000ca0: e7a4 b.n 8000bec <__udivmoddi4+0x1f0>
8000ca2: 4660 mov r0, ip
8000ca4: e7e9 b.n 8000c7a <__udivmoddi4+0x27e>
8000ca6: 4618 mov r0, r3
8000ca8: e795 b.n 8000bd6 <__udivmoddi4+0x1da>
8000caa: 4667 mov r7, ip
8000cac: e7d1 b.n 8000c52 <__udivmoddi4+0x256>
8000cae: 4681 mov r9, r0
8000cb0: e77c b.n 8000bac <__udivmoddi4+0x1b0>
8000cb2: 3802 subs r0, #2
8000cb4: 442c add r4, r5
8000cb6: e747 b.n 8000b48 <__udivmoddi4+0x14c>
8000cb8: f1ac 0c02 sub.w ip, ip, #2
8000cbc: 442b add r3, r5
8000cbe: e72f b.n 8000b20 <__udivmoddi4+0x124>
8000cc0: 4638 mov r0, r7
8000cc2: e708 b.n 8000ad6 <__udivmoddi4+0xda>
8000cc4: 4637 mov r7, r6
8000cc6: e6e9 b.n 8000a9c <__udivmoddi4+0xa0>
08000cc8 <__aeabi_idiv0>:
8000cc8: 4770 bx lr
8000cca: bf00 nop
08000ccc <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000ccc: b580 push {r7, lr}
8000cce: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000cd0: f002 f878 bl 8002dc4 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000cd4: f000 f854 bl 8000d80 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000cd8: f000 f986 bl 8000fe8 <MX_GPIO_Init>
MX_SPI4_Init();
8000cdc: f000 f90e bl 8000efc <MX_SPI4_Init>
MX_TIM6_Init();
8000ce0: f000 f942 bl 8000f68 <MX_TIM6_Init>
MX_ADC3_Init();
8000ce4: f000 f8b6 bl 8000e54 <MX_ADC3_Init>
/* USER CODE BEGIN 2 */
updateWS2812BData();
8000ce8: f001 fcf4 bl 80026d4 <updateWS2812BData>
HAL_SPI_Transmit_IT(&hspi4, (uint8_t*) &LEDData, (uint16_t) 66 * 3 * 3);
8000cec: f240 2252 movw r2, #594 ; 0x252
8000cf0: 491e ldr r1, [pc, #120] ; (8000d6c <main+0xa0>)
8000cf2: 481f ldr r0, [pc, #124] ; (8000d70 <main+0xa4>)
8000cf4: f003 fc72 bl 80045dc <HAL_SPI_Transmit_IT>
HAL_ADC_Start(&hadc3);
8000cf8: 481e ldr r0, [pc, #120] ; (8000d74 <main+0xa8>)
8000cfa: f002 f93b bl 8002f74 <HAL_ADC_Start>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
if(LEDDesign_PendingChange){
8000cfe: 4b1e ldr r3, [pc, #120] ; (8000d78 <main+0xac>)
8000d00: 781b ldrb r3, [r3, #0]
8000d02: 2b00 cmp r3, #0
8000d04: d002 beq.n 8000d0c <main+0x40>
LEDDesign_Off();
8000d06: f000 fc61 bl 80015cc <LEDDesign_Off>
8000d0a: e02c b.n 8000d66 <main+0x9a>
}else{
switch (LEDMode) {
8000d0c: 4b1b ldr r3, [pc, #108] ; (8000d7c <main+0xb0>)
8000d0e: 781b ldrb r3, [r3, #0]
8000d10: 2b06 cmp r3, #6
8000d12: d826 bhi.n 8000d62 <main+0x96>
8000d14: a201 add r2, pc, #4 ; (adr r2, 8000d1c <main+0x50>)
8000d16: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000d1a: bf00 nop
8000d1c: 08000d39 .word 0x08000d39
8000d20: 08000d3f .word 0x08000d3f
8000d24: 08000d45 .word 0x08000d45
8000d28: 08000d4b .word 0x08000d4b
8000d2c: 08000d51 .word 0x08000d51
8000d30: 08000d57 .word 0x08000d57
8000d34: 08000d5d .word 0x08000d5d
case 0:
LEDDesign_Smile();
8000d38: f000 fd9a bl 8001870 <LEDDesign_Smile>
break;
8000d3c: e013 b.n 8000d66 <main+0x9a>
case 1:
LEDDesign_Crazy();
8000d3e: f000 fd55 bl 80017ec <LEDDesign_Crazy>
break;
8000d42: e010 b.n 8000d66 <main+0x9a>
case 2:
LEDDesign_SuperCrazy();
8000d44: f001 faa4 bl 8002290 <LEDDesign_SuperCrazy>
break;
8000d48: e00d b.n 8000d66 <main+0x9a>
case 3:
LEDDesign_ColorWhite();
8000d4a: f000 fc67 bl 800161c <LEDDesign_ColorWhite>
break;
8000d4e: e00a b.n 8000d66 <main+0x9a>
case 4:
LEDDesign_ColorRed();
8000d50: f000 fd0c bl 800176c <LEDDesign_ColorRed>
break;
8000d54: e007 b.n 8000d66 <main+0x9a>
case 5:
LEDDesign_ColorGreen();
8000d56: f000 fcc9 bl 80016ec <LEDDesign_ColorGreen>
break;
8000d5a: e004 b.n 8000d66 <main+0x9a>
case 6:
LEDDesign_ColorBlue();
8000d5c: f000 fc86 bl 800166c <LEDDesign_ColorBlue>
break;
8000d60: e001 b.n 8000d66 <main+0x9a>
default:
LEDDesign_Off();
8000d62: f000 fc33 bl 80015cc <LEDDesign_Off>
}
}
updateWS2812BData();
8000d66: f001 fcb5 bl 80026d4 <updateWS2812BData>
if(LEDDesign_PendingChange){
8000d6a: e7c8 b.n 8000cfe <main+0x32>
8000d6c: 20000094 .word 0x20000094
8000d70: 200003fc .word 0x200003fc
8000d74: 200003b4 .word 0x200003b4
8000d78: 20000091 .word 0x20000091
8000d7c: 20000090 .word 0x20000090
08000d80 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000d80: b580 push {r7, lr}
8000d82: b094 sub sp, #80 ; 0x50
8000d84: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000d86: f107 0320 add.w r3, r7, #32
8000d8a: 2230 movs r2, #48 ; 0x30
8000d8c: 2100 movs r1, #0
8000d8e: 4618 mov r0, r3
8000d90: f004 fa4c bl 800522c <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000d94: f107 030c add.w r3, r7, #12
8000d98: 2200 movs r2, #0
8000d9a: 601a str r2, [r3, #0]
8000d9c: 605a str r2, [r3, #4]
8000d9e: 609a str r2, [r3, #8]
8000da0: 60da str r2, [r3, #12]
8000da2: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
8000da4: 2300 movs r3, #0
8000da6: 60bb str r3, [r7, #8]
8000da8: 4b28 ldr r3, [pc, #160] ; (8000e4c <SystemClock_Config+0xcc>)
8000daa: 6c1b ldr r3, [r3, #64] ; 0x40
8000dac: 4a27 ldr r2, [pc, #156] ; (8000e4c <SystemClock_Config+0xcc>)
8000dae: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8000db2: 6413 str r3, [r2, #64] ; 0x40
8000db4: 4b25 ldr r3, [pc, #148] ; (8000e4c <SystemClock_Config+0xcc>)
8000db6: 6c1b ldr r3, [r3, #64] ; 0x40
8000db8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000dbc: 60bb str r3, [r7, #8]
8000dbe: 68bb ldr r3, [r7, #8]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
8000dc0: 2300 movs r3, #0
8000dc2: 607b str r3, [r7, #4]
8000dc4: 4b22 ldr r3, [pc, #136] ; (8000e50 <SystemClock_Config+0xd0>)
8000dc6: 681b ldr r3, [r3, #0]
8000dc8: 4a21 ldr r2, [pc, #132] ; (8000e50 <SystemClock_Config+0xd0>)
8000dca: f443 4340 orr.w r3, r3, #49152 ; 0xc000
8000dce: 6013 str r3, [r2, #0]
8000dd0: 4b1f ldr r3, [pc, #124] ; (8000e50 <SystemClock_Config+0xd0>)
8000dd2: 681b ldr r3, [r3, #0]
8000dd4: f403 4340 and.w r3, r3, #49152 ; 0xc000
8000dd8: 607b str r3, [r7, #4]
8000dda: 687b ldr r3, [r7, #4]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8000ddc: 2301 movs r3, #1
8000dde: 623b str r3, [r7, #32]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8000de0: f44f 3380 mov.w r3, #65536 ; 0x10000
8000de4: 627b str r3, [r7, #36] ; 0x24
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8000de6: 2302 movs r3, #2
8000de8: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8000dea: f44f 0380 mov.w r3, #4194304 ; 0x400000
8000dee: 63fb str r3, [r7, #60] ; 0x3c
RCC_OscInitStruct.PLL.PLLM = 4;
8000df0: 2304 movs r3, #4
8000df2: 643b str r3, [r7, #64] ; 0x40
RCC_OscInitStruct.PLL.PLLN = 160;
8000df4: 23a0 movs r3, #160 ; 0xa0
8000df6: 647b str r3, [r7, #68] ; 0x44
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
8000df8: 2302 movs r3, #2
8000dfa: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.PLL.PLLQ = 7;
8000dfc: 2307 movs r3, #7
8000dfe: 64fb str r3, [r7, #76] ; 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8000e00: f107 0320 add.w r3, r7, #32
8000e04: 4618 mov r0, r3
8000e06: f002 ff57 bl 8003cb8 <HAL_RCC_OscConfig>
8000e0a: 4603 mov r3, r0
8000e0c: 2b00 cmp r3, #0
8000e0e: d001 beq.n 8000e14 <SystemClock_Config+0x94>
{
Error_Handler();
8000e10: f001 fe00 bl 8002a14 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000e14: 230f movs r3, #15
8000e16: 60fb str r3, [r7, #12]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000e18: 2302 movs r3, #2
8000e1a: 613b str r3, [r7, #16]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8000e1c: 2300 movs r3, #0
8000e1e: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
8000e20: f44f 53a0 mov.w r3, #5120 ; 0x1400
8000e24: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
8000e26: f44f 5380 mov.w r3, #4096 ; 0x1000
8000e2a: 61fb str r3, [r7, #28]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
8000e2c: f107 030c add.w r3, r7, #12
8000e30: 2105 movs r1, #5
8000e32: 4618 mov r0, r3
8000e34: f003 f9b0 bl 8004198 <HAL_RCC_ClockConfig>
8000e38: 4603 mov r3, r0
8000e3a: 2b00 cmp r3, #0
8000e3c: d001 beq.n 8000e42 <SystemClock_Config+0xc2>
{
Error_Handler();
8000e3e: f001 fde9 bl 8002a14 <Error_Handler>
}
}
8000e42: bf00 nop
8000e44: 3750 adds r7, #80 ; 0x50
8000e46: 46bd mov sp, r7
8000e48: bd80 pop {r7, pc}
8000e4a: bf00 nop
8000e4c: 40023800 .word 0x40023800
8000e50: 40007000 .word 0x40007000
08000e54 <MX_ADC3_Init>:
* @brief ADC3 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC3_Init(void)
{
8000e54: b580 push {r7, lr}
8000e56: b084 sub sp, #16
8000e58: af00 add r7, sp, #0
/* USER CODE BEGIN ADC3_Init 0 */
/* USER CODE END ADC3_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
8000e5a: 463b mov r3, r7
8000e5c: 2200 movs r2, #0
8000e5e: 601a str r2, [r3, #0]
8000e60: 605a str r2, [r3, #4]
8000e62: 609a str r2, [r3, #8]
8000e64: 60da str r2, [r3, #12]
/* USER CODE BEGIN ADC3_Init 1 */
/* USER CODE END ADC3_Init 1 */
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
*/
hadc3.Instance = ADC3;
8000e66: 4b22 ldr r3, [pc, #136] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e68: 4a22 ldr r2, [pc, #136] ; (8000ef4 <MX_ADC3_Init+0xa0>)
8000e6a: 601a str r2, [r3, #0]
hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
8000e6c: 4b20 ldr r3, [pc, #128] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e6e: f44f 3280 mov.w r2, #65536 ; 0x10000
8000e72: 605a str r2, [r3, #4]
hadc3.Init.Resolution = ADC_RESOLUTION_8B;
8000e74: 4b1e ldr r3, [pc, #120] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e76: f04f 7200 mov.w r2, #33554432 ; 0x2000000
8000e7a: 609a str r2, [r3, #8]
hadc3.Init.ScanConvMode = DISABLE;
8000e7c: 4b1c ldr r3, [pc, #112] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e7e: 2200 movs r2, #0
8000e80: 611a str r2, [r3, #16]
hadc3.Init.ContinuousConvMode = DISABLE;
8000e82: 4b1b ldr r3, [pc, #108] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e84: 2200 movs r2, #0
8000e86: 761a strb r2, [r3, #24]
hadc3.Init.DiscontinuousConvMode = DISABLE;
8000e88: 4b19 ldr r3, [pc, #100] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e8a: 2200 movs r2, #0
8000e8c: f883 2020 strb.w r2, [r3, #32]
hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
8000e90: 4b17 ldr r3, [pc, #92] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e92: 2200 movs r2, #0
8000e94: 62da str r2, [r3, #44] ; 0x2c
hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8000e96: 4b16 ldr r3, [pc, #88] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e98: 4a17 ldr r2, [pc, #92] ; (8000ef8 <MX_ADC3_Init+0xa4>)
8000e9a: 629a str r2, [r3, #40] ; 0x28
hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8000e9c: 4b14 ldr r3, [pc, #80] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000e9e: 2200 movs r2, #0
8000ea0: 60da str r2, [r3, #12]
hadc3.Init.NbrOfConversion = 1;
8000ea2: 4b13 ldr r3, [pc, #76] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000ea4: 2201 movs r2, #1
8000ea6: 61da str r2, [r3, #28]
hadc3.Init.DMAContinuousRequests = DISABLE;
8000ea8: 4b11 ldr r3, [pc, #68] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000eaa: 2200 movs r2, #0
8000eac: f883 2030 strb.w r2, [r3, #48] ; 0x30
hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
8000eb0: 4b0f ldr r3, [pc, #60] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000eb2: 2201 movs r2, #1
8000eb4: 615a str r2, [r3, #20]
if (HAL_ADC_Init(&hadc3) != HAL_OK)
8000eb6: 480e ldr r0, [pc, #56] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000eb8: f002 f818 bl 8002eec <HAL_ADC_Init>
8000ebc: 4603 mov r3, r0
8000ebe: 2b00 cmp r3, #0
8000ec0: d001 beq.n 8000ec6 <MX_ADC3_Init+0x72>
{
Error_Handler();
8000ec2: f001 fda7 bl 8002a14 <Error_Handler>
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
*/
sConfig.Channel = ADC_CHANNEL_4;
8000ec6: 2304 movs r3, #4
8000ec8: 603b str r3, [r7, #0]
sConfig.Rank = 1;
8000eca: 2301 movs r3, #1
8000ecc: 607b str r3, [r7, #4]
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
8000ece: 2300 movs r3, #0
8000ed0: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
8000ed2: 463b mov r3, r7
8000ed4: 4619 mov r1, r3
8000ed6: 4806 ldr r0, [pc, #24] ; (8000ef0 <MX_ADC3_Init+0x9c>)
8000ed8: f002 f9a4 bl 8003224 <HAL_ADC_ConfigChannel>
8000edc: 4603 mov r3, r0
8000ede: 2b00 cmp r3, #0
8000ee0: d001 beq.n 8000ee6 <MX_ADC3_Init+0x92>
{
Error_Handler();
8000ee2: f001 fd97 bl 8002a14 <Error_Handler>
}
/* USER CODE BEGIN ADC3_Init 2 */
/* USER CODE END ADC3_Init 2 */
}
8000ee6: bf00 nop
8000ee8: 3710 adds r7, #16
8000eea: 46bd mov sp, r7
8000eec: bd80 pop {r7, pc}
8000eee: bf00 nop
8000ef0: 200003b4 .word 0x200003b4
8000ef4: 40012200 .word 0x40012200
8000ef8: 0f000001 .word 0x0f000001
08000efc <MX_SPI4_Init>:
* @brief SPI4 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI4_Init(void)
{
8000efc: b580 push {r7, lr}
8000efe: af00 add r7, sp, #0
/* USER CODE BEGIN SPI4_Init 1 */
/* USER CODE END SPI4_Init 1 */
/* SPI4 parameter configuration*/
hspi4.Instance = SPI4;
8000f00: 4b17 ldr r3, [pc, #92] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f02: 4a18 ldr r2, [pc, #96] ; (8000f64 <MX_SPI4_Init+0x68>)
8000f04: 601a str r2, [r3, #0]
hspi4.Init.Mode = SPI_MODE_MASTER;
8000f06: 4b16 ldr r3, [pc, #88] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f08: f44f 7282 mov.w r2, #260 ; 0x104
8000f0c: 605a str r2, [r3, #4]
hspi4.Init.Direction = SPI_DIRECTION_2LINES;
8000f0e: 4b14 ldr r3, [pc, #80] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f10: 2200 movs r2, #0
8000f12: 609a str r2, [r3, #8]
hspi4.Init.DataSize = SPI_DATASIZE_8BIT;
8000f14: 4b12 ldr r3, [pc, #72] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f16: 2200 movs r2, #0
8000f18: 60da str r2, [r3, #12]
hspi4.Init.CLKPolarity = SPI_POLARITY_LOW;
8000f1a: 4b11 ldr r3, [pc, #68] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f1c: 2200 movs r2, #0
8000f1e: 611a str r2, [r3, #16]
hspi4.Init.CLKPhase = SPI_PHASE_1EDGE;
8000f20: 4b0f ldr r3, [pc, #60] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f22: 2200 movs r2, #0
8000f24: 615a str r2, [r3, #20]
hspi4.Init.NSS = SPI_NSS_SOFT;
8000f26: 4b0e ldr r3, [pc, #56] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f28: f44f 7200 mov.w r2, #512 ; 0x200
8000f2c: 619a str r2, [r3, #24]
hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
8000f2e: 4b0c ldr r3, [pc, #48] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f30: 2220 movs r2, #32
8000f32: 61da str r2, [r3, #28]
hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB;
8000f34: 4b0a ldr r3, [pc, #40] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f36: 2200 movs r2, #0
8000f38: 621a str r2, [r3, #32]
hspi4.Init.TIMode = SPI_TIMODE_DISABLE;
8000f3a: 4b09 ldr r3, [pc, #36] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f3c: 2200 movs r2, #0
8000f3e: 625a str r2, [r3, #36] ; 0x24
hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
8000f40: 4b07 ldr r3, [pc, #28] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f42: 2200 movs r2, #0
8000f44: 629a str r2, [r3, #40] ; 0x28
hspi4.Init.CRCPolynomial = 10;
8000f46: 4b06 ldr r3, [pc, #24] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f48: 220a movs r2, #10
8000f4a: 62da str r2, [r3, #44] ; 0x2c
if (HAL_SPI_Init(&hspi4) != HAL_OK)
8000f4c: 4804 ldr r0, [pc, #16] ; (8000f60 <MX_SPI4_Init+0x64>)
8000f4e: f003 fae1 bl 8004514 <HAL_SPI_Init>
8000f52: 4603 mov r3, r0
8000f54: 2b00 cmp r3, #0
8000f56: d001 beq.n 8000f5c <MX_SPI4_Init+0x60>
{
Error_Handler();
8000f58: f001 fd5c bl 8002a14 <Error_Handler>
}
/* USER CODE BEGIN SPI4_Init 2 */
/* USER CODE END SPI4_Init 2 */
}
8000f5c: bf00 nop
8000f5e: bd80 pop {r7, pc}
8000f60: 200003fc .word 0x200003fc
8000f64: 40013400 .word 0x40013400
08000f68 <MX_TIM6_Init>:
* @brief TIM6 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM6_Init(void)
{
8000f68: b580 push {r7, lr}
8000f6a: b082 sub sp, #8
8000f6c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
8000f6e: 463b mov r3, r7
8000f70: 2200 movs r2, #0
8000f72: 601a str r2, [r3, #0]
8000f74: 605a str r2, [r3, #4]
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
8000f76: 4b1a ldr r3, [pc, #104] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000f78: 4a1a ldr r2, [pc, #104] ; (8000fe4 <MX_TIM6_Init+0x7c>)
8000f7a: 601a str r2, [r3, #0]
htim6.Init.Prescaler = 4000;
8000f7c: 4b18 ldr r3, [pc, #96] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000f7e: f44f 627a mov.w r2, #4000 ; 0xfa0
8000f82: 605a str r2, [r3, #4]
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
8000f84: 4b16 ldr r3, [pc, #88] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000f86: 2200 movs r2, #0
8000f88: 609a str r2, [r3, #8]
htim6.Init.Period = 10000;
8000f8a: 4b15 ldr r3, [pc, #84] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000f8c: f242 7210 movw r2, #10000 ; 0x2710
8000f90: 60da str r2, [r3, #12]
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
8000f92: 4b13 ldr r3, [pc, #76] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000f94: 2280 movs r2, #128 ; 0x80
8000f96: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
8000f98: 4811 ldr r0, [pc, #68] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000f9a: f003 fe1d bl 8004bd8 <HAL_TIM_Base_Init>
8000f9e: 4603 mov r3, r0
8000fa0: 2b00 cmp r3, #0
8000fa2: d001 beq.n 8000fa8 <MX_TIM6_Init+0x40>
{
Error_Handler();
8000fa4: f001 fd36 bl 8002a14 <Error_Handler>
}
if (HAL_TIM_OnePulse_Init(&htim6, TIM_OPMODE_SINGLE) != HAL_OK)
8000fa8: 2108 movs r1, #8
8000faa: 480d ldr r0, [pc, #52] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000fac: f003 fe63 bl 8004c76 <HAL_TIM_OnePulse_Init>
8000fb0: 4603 mov r3, r0
8000fb2: 2b00 cmp r3, #0
8000fb4: d001 beq.n 8000fba <MX_TIM6_Init+0x52>
{
Error_Handler();
8000fb6: f001 fd2d bl 8002a14 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000fba: 2300 movs r3, #0
8000fbc: 603b str r3, [r7, #0]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000fbe: 2300 movs r3, #0
8000fc0: 607b str r3, [r7, #4]
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
8000fc2: 463b mov r3, r7
8000fc4: 4619 mov r1, r3
8000fc6: 4806 ldr r0, [pc, #24] ; (8000fe0 <MX_TIM6_Init+0x78>)
8000fc8: f004 f876 bl 80050b8 <HAL_TIMEx_MasterConfigSynchronization>
8000fcc: 4603 mov r3, r0
8000fce: 2b00 cmp r3, #0
8000fd0: d001 beq.n 8000fd6 <MX_TIM6_Init+0x6e>
{
Error_Handler();
8000fd2: f001 fd1f bl 8002a14 <Error_Handler>
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
8000fd6: bf00 nop
8000fd8: 3708 adds r7, #8
8000fda: 46bd mov sp, r7
8000fdc: bd80 pop {r7, pc}
8000fde: bf00 nop
8000fe0: 20000454 .word 0x20000454
8000fe4: 40001000 .word 0x40001000
08000fe8 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000fe8: b580 push {r7, lr}
8000fea: b08e sub sp, #56 ; 0x38
8000fec: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000fee: f107 0324 add.w r3, r7, #36 ; 0x24
8000ff2: 2200 movs r2, #0
8000ff4: 601a str r2, [r3, #0]
8000ff6: 605a str r2, [r3, #4]
8000ff8: 609a str r2, [r3, #8]
8000ffa: 60da str r2, [r3, #12]
8000ffc: 611a str r2, [r3, #16]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
8000ffe: 2300 movs r3, #0
8001000: 623b str r3, [r7, #32]
8001002: 4bb0 ldr r3, [pc, #704] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001004: 6b1b ldr r3, [r3, #48] ; 0x30
8001006: 4aaf ldr r2, [pc, #700] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001008: f043 0310 orr.w r3, r3, #16
800100c: 6313 str r3, [r2, #48] ; 0x30
800100e: 4bad ldr r3, [pc, #692] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001010: 6b1b ldr r3, [r3, #48] ; 0x30
8001012: f003 0310 and.w r3, r3, #16
8001016: 623b str r3, [r7, #32]
8001018: 6a3b ldr r3, [r7, #32]
__HAL_RCC_GPIOC_CLK_ENABLE();
800101a: 2300 movs r3, #0
800101c: 61fb str r3, [r7, #28]
800101e: 4ba9 ldr r3, [pc, #676] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001020: 6b1b ldr r3, [r3, #48] ; 0x30
8001022: 4aa8 ldr r2, [pc, #672] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001024: f043 0304 orr.w r3, r3, #4
8001028: 6313 str r3, [r2, #48] ; 0x30
800102a: 4ba6 ldr r3, [pc, #664] ; (80012c4 <MX_GPIO_Init+0x2dc>)
800102c: 6b1b ldr r3, [r3, #48] ; 0x30
800102e: f003 0304 and.w r3, r3, #4
8001032: 61fb str r3, [r7, #28]
8001034: 69fb ldr r3, [r7, #28]
__HAL_RCC_GPIOF_CLK_ENABLE();
8001036: 2300 movs r3, #0
8001038: 61bb str r3, [r7, #24]
800103a: 4ba2 ldr r3, [pc, #648] ; (80012c4 <MX_GPIO_Init+0x2dc>)
800103c: 6b1b ldr r3, [r3, #48] ; 0x30
800103e: 4aa1 ldr r2, [pc, #644] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001040: f043 0320 orr.w r3, r3, #32
8001044: 6313 str r3, [r2, #48] ; 0x30
8001046: 4b9f ldr r3, [pc, #636] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001048: 6b1b ldr r3, [r3, #48] ; 0x30
800104a: f003 0320 and.w r3, r3, #32
800104e: 61bb str r3, [r7, #24]
8001050: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOH_CLK_ENABLE();
8001052: 2300 movs r3, #0
8001054: 617b str r3, [r7, #20]
8001056: 4b9b ldr r3, [pc, #620] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001058: 6b1b ldr r3, [r3, #48] ; 0x30
800105a: 4a9a ldr r2, [pc, #616] ; (80012c4 <MX_GPIO_Init+0x2dc>)
800105c: f043 0380 orr.w r3, r3, #128 ; 0x80
8001060: 6313 str r3, [r2, #48] ; 0x30
8001062: 4b98 ldr r3, [pc, #608] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001064: 6b1b ldr r3, [r3, #48] ; 0x30
8001066: f003 0380 and.w r3, r3, #128 ; 0x80
800106a: 617b str r3, [r7, #20]
800106c: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
800106e: 2300 movs r3, #0
8001070: 613b str r3, [r7, #16]
8001072: 4b94 ldr r3, [pc, #592] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001074: 6b1b ldr r3, [r3, #48] ; 0x30
8001076: 4a93 ldr r2, [pc, #588] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001078: f043 0301 orr.w r3, r3, #1
800107c: 6313 str r3, [r2, #48] ; 0x30
800107e: 4b91 ldr r3, [pc, #580] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001080: 6b1b ldr r3, [r3, #48] ; 0x30
8001082: f003 0301 and.w r3, r3, #1
8001086: 613b str r3, [r7, #16]
8001088: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
800108a: 2300 movs r3, #0
800108c: 60fb str r3, [r7, #12]
800108e: 4b8d ldr r3, [pc, #564] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001090: 6b1b ldr r3, [r3, #48] ; 0x30
8001092: 4a8c ldr r2, [pc, #560] ; (80012c4 <MX_GPIO_Init+0x2dc>)
8001094: f043 0302 orr.w r3, r3, #2
8001098: 6313 str r3, [r2, #48] ; 0x30
800109a: 4b8a ldr r3, [pc, #552] ; (80012c4 <MX_GPIO_Init+0x2dc>)
800109c: 6b1b ldr r3, [r3, #48] ; 0x30
800109e: f003 0302 and.w r3, r3, #2
80010a2: 60fb str r3, [r7, #12]
80010a4: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOG_CLK_ENABLE();
80010a6: 2300 movs r3, #0
80010a8: 60bb str r3, [r7, #8]
80010aa: 4b86 ldr r3, [pc, #536] ; (80012c4 <MX_GPIO_Init+0x2dc>)
80010ac: 6b1b ldr r3, [r3, #48] ; 0x30
80010ae: 4a85 ldr r2, [pc, #532] ; (80012c4 <MX_GPIO_Init+0x2dc>)
80010b0: f043 0340 orr.w r3, r3, #64 ; 0x40
80010b4: 6313 str r3, [r2, #48] ; 0x30
80010b6: 4b83 ldr r3, [pc, #524] ; (80012c4 <MX_GPIO_Init+0x2dc>)
80010b8: 6b1b ldr r3, [r3, #48] ; 0x30
80010ba: f003 0340 and.w r3, r3, #64 ; 0x40
80010be: 60bb str r3, [r7, #8]
80010c0: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOD_CLK_ENABLE();
80010c2: 2300 movs r3, #0
80010c4: 607b str r3, [r7, #4]
80010c6: 4b7f ldr r3, [pc, #508] ; (80012c4 <MX_GPIO_Init+0x2dc>)
80010c8: 6b1b ldr r3, [r3, #48] ; 0x30
80010ca: 4a7e ldr r2, [pc, #504] ; (80012c4 <MX_GPIO_Init+0x2dc>)
80010cc: f043 0308 orr.w r3, r3, #8
80010d0: 6313 str r3, [r2, #48] ; 0x30
80010d2: 4b7c ldr r3, [pc, #496] ; (80012c4 <MX_GPIO_Init+0x2dc>)
80010d4: 6b1b ldr r3, [r3, #48] ; 0x30
80010d6: f003 0308 and.w r3, r3, #8
80010da: 607b str r3, [r7, #4]
80010dc: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
80010de: 2200 movs r2, #0
80010e0: 2116 movs r1, #22
80010e2: 4879 ldr r0, [pc, #484] ; (80012c8 <MX_GPIO_Init+0x2e0>)
80010e4: f002 fdaa bl 8003c3c <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
80010e8: 2200 movs r2, #0
80010ea: 2180 movs r1, #128 ; 0x80
80010ec: 4877 ldr r0, [pc, #476] ; (80012cc <MX_GPIO_Init+0x2e4>)
80010ee: f002 fda5 bl 8003c3c <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
80010f2: 2200 movs r2, #0
80010f4: f44f 5140 mov.w r1, #12288 ; 0x3000
80010f8: 4875 ldr r0, [pc, #468] ; (80012d0 <MX_GPIO_Init+0x2e8>)
80010fa: f002 fd9f bl 8003c3c <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
80010fe: 2200 movs r2, #0
8001100: f44f 41c0 mov.w r1, #24576 ; 0x6000
8001104: 4873 ldr r0, [pc, #460] ; (80012d4 <MX_GPIO_Init+0x2ec>)
8001106: f002 fd99 bl 8003c3c <HAL_GPIO_WritePin>
/*Configure GPIO pins : A0_Pin A1_Pin A2_Pin A3_Pin
A4_Pin A5_Pin SDNRAS_Pin A6_Pin
A7_Pin A8_Pin A9_Pin */
GPIO_InitStruct.Pin = A0_Pin|A1_Pin|A2_Pin|A3_Pin
800110a: f64f 033f movw r3, #63551 ; 0xf83f
800110e: 627b str r3, [r7, #36] ; 0x24
|A4_Pin|A5_Pin|SDNRAS_Pin|A6_Pin
|A7_Pin|A8_Pin|A9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001110: 2302 movs r3, #2
8001112: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001114: 2300 movs r3, #0
8001116: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001118: 2303 movs r3, #3
800111a: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
800111c: 230c movs r3, #12
800111e: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8001120: f107 0324 add.w r3, r7, #36 ; 0x24
8001124: 4619 mov r1, r3
8001126: 486c ldr r0, [pc, #432] ; (80012d8 <MX_GPIO_Init+0x2f0>)
8001128: f002 fbde bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : SPI5_SCK_Pin SPI5_MISO_Pin SPI5_MOSI_Pin */
GPIO_InitStruct.Pin = SPI5_SCK_Pin|SPI5_MISO_Pin|SPI5_MOSI_Pin;
800112c: f44f 7360 mov.w r3, #896 ; 0x380
8001130: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001132: 2302 movs r3, #2
8001134: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001136: 2300 movs r3, #0
8001138: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800113a: 2300 movs r3, #0
800113c: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
800113e: 2305 movs r3, #5
8001140: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8001142: f107 0324 add.w r3, r7, #36 ; 0x24
8001146: 4619 mov r1, r3
8001148: 4863 ldr r0, [pc, #396] ; (80012d8 <MX_GPIO_Init+0x2f0>)
800114a: f002 fbcd bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : ENABLE_Pin */
GPIO_InitStruct.Pin = ENABLE_Pin;
800114e: f44f 6380 mov.w r3, #1024 ; 0x400
8001152: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001154: 2302 movs r3, #2
8001156: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001158: 2300 movs r3, #0
800115a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800115c: 2300 movs r3, #0
800115e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8001160: 230e movs r3, #14
8001162: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(ENABLE_GPIO_Port, &GPIO_InitStruct);
8001164: f107 0324 add.w r3, r7, #36 ; 0x24
8001168: 4619 mov r1, r3
800116a: 485b ldr r0, [pc, #364] ; (80012d8 <MX_GPIO_Init+0x2f0>)
800116c: f002 fbbc bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : SDNWE_Pin */
GPIO_InitStruct.Pin = SDNWE_Pin;
8001170: 2301 movs r3, #1
8001172: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001174: 2302 movs r3, #2
8001176: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001178: 2300 movs r3, #0
800117a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
800117c: 2303 movs r3, #3
800117e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8001180: 230c movs r3, #12
8001182: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(SDNWE_GPIO_Port, &GPIO_InitStruct);
8001184: f107 0324 add.w r3, r7, #36 ; 0x24
8001188: 4619 mov r1, r3
800118a: 484f ldr r0, [pc, #316] ; (80012c8 <MX_GPIO_Init+0x2e0>)
800118c: f002 fbac bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
8001190: 2316 movs r3, #22
8001192: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001194: 2301 movs r3, #1
8001196: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001198: 2300 movs r3, #0
800119a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800119c: 2300 movs r3, #0
800119e: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80011a0: f107 0324 add.w r3, r7, #36 ; 0x24
80011a4: 4619 mov r1, r3
80011a6: 4848 ldr r0, [pc, #288] ; (80012c8 <MX_GPIO_Init+0x2e0>)
80011a8: f002 fb9e bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : B1_Pin */
GPIO_InitStruct.Pin = B1_Pin;
80011ac: 2301 movs r3, #1
80011ae: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
80011b0: 4b4a ldr r3, [pc, #296] ; (80012dc <MX_GPIO_Init+0x2f4>)
80011b2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80011b4: 2300 movs r3, #0
80011b6: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
80011b8: f107 0324 add.w r3, r7, #36 ; 0x24
80011bc: 4619 mov r1, r3
80011be: 4843 ldr r0, [pc, #268] ; (80012cc <MX_GPIO_Init+0x2e4>)
80011c0: f002 fb92 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
GPIO_InitStruct.Pin = MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
80011c4: f248 0306 movw r3, #32774 ; 0x8006
80011c8: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
80011ca: 4b45 ldr r3, [pc, #276] ; (80012e0 <MX_GPIO_Init+0x2f8>)
80011cc: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80011ce: 2300 movs r3, #0
80011d0: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80011d2: f107 0324 add.w r3, r7, #36 ; 0x24
80011d6: 4619 mov r1, r3
80011d8: 483c ldr r0, [pc, #240] ; (80012cc <MX_GPIO_Init+0x2e4>)
80011da: f002 fb85 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : B5_Pin VSYNC_Pin G2_Pin R4_Pin
R5_Pin */
GPIO_InitStruct.Pin = B5_Pin|VSYNC_Pin|G2_Pin|R4_Pin
80011de: f641 0358 movw r3, #6232 ; 0x1858
80011e2: 627b str r3, [r7, #36] ; 0x24
|R5_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80011e4: 2302 movs r3, #2
80011e6: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80011e8: 2300 movs r3, #0
80011ea: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80011ec: 2300 movs r3, #0
80011ee: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
80011f0: 230e movs r3, #14
80011f2: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80011f4: f107 0324 add.w r3, r7, #36 ; 0x24
80011f8: 4619 mov r1, r3
80011fa: 4834 ldr r0, [pc, #208] ; (80012cc <MX_GPIO_Init+0x2e4>)
80011fc: f002 fb74 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : ACP_RST_Pin */
GPIO_InitStruct.Pin = ACP_RST_Pin;
8001200: 2380 movs r3, #128 ; 0x80
8001202: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001204: 2301 movs r3, #1
8001206: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001208: 2300 movs r3, #0
800120a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800120c: 2300 movs r3, #0
800120e: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
8001210: f107 0324 add.w r3, r7, #36 ; 0x24
8001214: 4619 mov r1, r3
8001216: 482d ldr r0, [pc, #180] ; (80012cc <MX_GPIO_Init+0x2e4>)
8001218: f002 fb66 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : OTG_FS_OC_Pin */
GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
800121c: 2320 movs r3, #32
800121e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
8001220: 4b2f ldr r3, [pc, #188] ; (80012e0 <MX_GPIO_Init+0x2f8>)
8001222: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001224: 2300 movs r3, #0
8001226: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
8001228: f107 0324 add.w r3, r7, #36 ; 0x24
800122c: 4619 mov r1, r3
800122e: 4826 ldr r0, [pc, #152] ; (80012c8 <MX_GPIO_Init+0x2e0>)
8001230: f002 fb5a bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : R3_Pin R6_Pin */
GPIO_InitStruct.Pin = R3_Pin|R6_Pin;
8001234: 2303 movs r3, #3
8001236: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001238: 2302 movs r3, #2
800123a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800123c: 2300 movs r3, #0
800123e: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001240: 2300 movs r3, #0
8001242: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
8001244: 2309 movs r3, #9
8001246: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001248: f107 0324 add.w r3, r7, #36 ; 0x24
800124c: 4619 mov r1, r3
800124e: 4825 ldr r0, [pc, #148] ; (80012e4 <MX_GPIO_Init+0x2fc>)
8001250: f002 fb4a bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : BOOT1_Pin */
GPIO_InitStruct.Pin = BOOT1_Pin;
8001254: 2304 movs r3, #4
8001256: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001258: 2300 movs r3, #0
800125a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800125c: 2300 movs r3, #0
800125e: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
8001260: f107 0324 add.w r3, r7, #36 ; 0x24
8001264: 4619 mov r1, r3
8001266: 481f ldr r0, [pc, #124] ; (80012e4 <MX_GPIO_Init+0x2fc>)
8001268: f002 fb3e bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : A10_Pin A11_Pin BA0_Pin BA1_Pin
SDCLK_Pin SDNCAS_Pin */
GPIO_InitStruct.Pin = A10_Pin|A11_Pin|BA0_Pin|BA1_Pin
800126c: f248 1333 movw r3, #33075 ; 0x8133
8001270: 627b str r3, [r7, #36] ; 0x24
|SDCLK_Pin|SDNCAS_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001272: 2302 movs r3, #2
8001274: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001276: 2300 movs r3, #0
8001278: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
800127a: 2303 movs r3, #3
800127c: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
800127e: 230c movs r3, #12
8001280: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8001282: f107 0324 add.w r3, r7, #36 ; 0x24
8001286: 4619 mov r1, r3
8001288: 4812 ldr r0, [pc, #72] ; (80012d4 <MX_GPIO_Init+0x2ec>)
800128a: f002 fb2d bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : D4_Pin D5_Pin D6_Pin D7_Pin
D8_Pin D9_Pin D10_Pin D11_Pin
D12_Pin NBL0_Pin NBL1_Pin */
GPIO_InitStruct.Pin = D4_Pin|D5_Pin|D6_Pin|D7_Pin
800128e: f64f 7383 movw r3, #65411 ; 0xff83
8001292: 627b str r3, [r7, #36] ; 0x24
|D8_Pin|D9_Pin|D10_Pin|D11_Pin
|D12_Pin|NBL0_Pin|NBL1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001294: 2302 movs r3, #2
8001296: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001298: 2300 movs r3, #0
800129a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
800129c: 2303 movs r3, #3
800129e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
80012a0: 230c movs r3, #12
80012a2: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
80012a4: f107 0324 add.w r3, r7, #36 ; 0x24
80012a8: 4619 mov r1, r3
80012aa: 480f ldr r0, [pc, #60] ; (80012e8 <MX_GPIO_Init+0x300>)
80012ac: f002 fb1c bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : G4_Pin G5_Pin B6_Pin B7_Pin */
GPIO_InitStruct.Pin = G4_Pin|G5_Pin|B6_Pin|B7_Pin;
80012b0: f44f 6370 mov.w r3, #3840 ; 0xf00
80012b4: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80012b6: 2302 movs r3, #2
80012b8: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80012ba: 2300 movs r3, #0
80012bc: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80012be: 2300 movs r3, #0
80012c0: 633b str r3, [r7, #48] ; 0x30
80012c2: e013 b.n 80012ec <MX_GPIO_Init+0x304>
80012c4: 40023800 .word 0x40023800
80012c8: 40020800 .word 0x40020800
80012cc: 40020000 .word 0x40020000
80012d0: 40020c00 .word 0x40020c00
80012d4: 40021800 .word 0x40021800
80012d8: 40021400 .word 0x40021400
80012dc: 10110000 .word 0x10110000
80012e0: 10120000 .word 0x10120000
80012e4: 40020400 .word 0x40020400
80012e8: 40021000 .word 0x40021000
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
80012ec: 230e movs r3, #14
80012ee: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80012f0: f107 0324 add.w r3, r7, #36 ; 0x24
80012f4: 4619 mov r1, r3
80012f6: 4877 ldr r0, [pc, #476] ; (80014d4 <MX_GPIO_Init+0x4ec>)
80012f8: f002 faf6 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : OTG_HS_ID_Pin OTG_HS_DM_Pin OTG_HS_DP_Pin */
GPIO_InitStruct.Pin = OTG_HS_ID_Pin|OTG_HS_DM_Pin|OTG_HS_DP_Pin;
80012fc: f44f 4350 mov.w r3, #53248 ; 0xd000
8001300: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001302: 2302 movs r3, #2
8001304: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001306: 2300 movs r3, #0
8001308: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800130a: 2300 movs r3, #0
800130c: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
800130e: 230c movs r3, #12
8001310: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001312: f107 0324 add.w r3, r7, #36 ; 0x24
8001316: 4619 mov r1, r3
8001318: 486e ldr r0, [pc, #440] ; (80014d4 <MX_GPIO_Init+0x4ec>)
800131a: f002 fae5 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : VBUS_HS_Pin */
GPIO_InitStruct.Pin = VBUS_HS_Pin;
800131e: f44f 5300 mov.w r3, #8192 ; 0x2000
8001322: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001324: 2300 movs r3, #0
8001326: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001328: 2300 movs r3, #0
800132a: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(VBUS_HS_GPIO_Port, &GPIO_InitStruct);
800132c: f107 0324 add.w r3, r7, #36 ; 0x24
8001330: 4619 mov r1, r3
8001332: 4868 ldr r0, [pc, #416] ; (80014d4 <MX_GPIO_Init+0x4ec>)
8001334: f002 fad8 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : D13_Pin D14_Pin D15_Pin D0_Pin
D1_Pin D2_Pin D3_Pin */
GPIO_InitStruct.Pin = D13_Pin|D14_Pin|D15_Pin|D0_Pin
8001338: f24c 7303 movw r3, #50947 ; 0xc703
800133c: 627b str r3, [r7, #36] ; 0x24
|D1_Pin|D2_Pin|D3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800133e: 2302 movs r3, #2
8001340: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001342: 2300 movs r3, #0
8001344: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001346: 2303 movs r3, #3
8001348: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
800134a: 230c movs r3, #12
800134c: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
800134e: f107 0324 add.w r3, r7, #36 ; 0x24
8001352: 4619 mov r1, r3
8001354: 4860 ldr r0, [pc, #384] ; (80014d8 <MX_GPIO_Init+0x4f0>)
8001356: f002 fac7 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : TE_Pin */
GPIO_InitStruct.Pin = TE_Pin;
800135a: f44f 6300 mov.w r3, #2048 ; 0x800
800135e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001360: 2300 movs r3, #0
8001362: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001364: 2300 movs r3, #0
8001366: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
8001368: f107 0324 add.w r3, r7, #36 ; 0x24
800136c: 4619 mov r1, r3
800136e: 485a ldr r0, [pc, #360] ; (80014d8 <MX_GPIO_Init+0x4f0>)
8001370: f002 faba bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
8001374: f44f 5340 mov.w r3, #12288 ; 0x3000
8001378: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800137a: 2301 movs r3, #1
800137c: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800137e: 2300 movs r3, #0
8001380: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001382: 2300 movs r3, #0
8001384: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8001386: f107 0324 add.w r3, r7, #36 ; 0x24
800138a: 4619 mov r1, r3
800138c: 4852 ldr r0, [pc, #328] ; (80014d8 <MX_GPIO_Init+0x4f0>)
800138e: f002 faab bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : R7_Pin DOTCLK_Pin B3_Pin */
GPIO_InitStruct.Pin = R7_Pin|DOTCLK_Pin|B3_Pin;
8001392: f44f 630c mov.w r3, #2240 ; 0x8c0
8001396: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001398: 2302 movs r3, #2
800139a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
800139c: 2300 movs r3, #0
800139e: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80013a0: 2300 movs r3, #0
80013a2: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
80013a4: 230e movs r3, #14
80013a6: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
80013a8: f107 0324 add.w r3, r7, #36 ; 0x24
80013ac: 4619 mov r1, r3
80013ae: 484b ldr r0, [pc, #300] ; (80014dc <MX_GPIO_Init+0x4f4>)
80013b0: f002 fa9a bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : HSYNC_Pin G6_Pin R2_Pin */
GPIO_InitStruct.Pin = HSYNC_Pin|G6_Pin|R2_Pin;
80013b4: f44f 6398 mov.w r3, #1216 ; 0x4c0
80013b8: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80013ba: 2302 movs r3, #2
80013bc: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80013be: 2300 movs r3, #0
80013c0: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80013c2: 2300 movs r3, #0
80013c4: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
80013c6: 230e movs r3, #14
80013c8: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80013ca: f107 0324 add.w r3, r7, #36 ; 0x24
80013ce: 4619 mov r1, r3
80013d0: 4843 ldr r0, [pc, #268] ; (80014e0 <MX_GPIO_Init+0x4f8>)
80013d2: f002 fa89 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : I2C3_SDA_Pin */
GPIO_InitStruct.Pin = I2C3_SDA_Pin;
80013d6: f44f 7300 mov.w r3, #512 ; 0x200
80013da: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
80013dc: 2312 movs r3, #18
80013de: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_PULLUP;
80013e0: 2301 movs r3, #1
80013e2: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80013e4: 2300 movs r3, #0
80013e6: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
80013e8: 2304 movs r3, #4
80013ea: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2C3_SDA_GPIO_Port, &GPIO_InitStruct);
80013ec: f107 0324 add.w r3, r7, #36 ; 0x24
80013f0: 4619 mov r1, r3
80013f2: 483b ldr r0, [pc, #236] ; (80014e0 <MX_GPIO_Init+0x4f8>)
80013f4: f002 fa78 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pin : I2C3_SCL_Pin */
GPIO_InitStruct.Pin = I2C3_SCL_Pin;
80013f8: f44f 7380 mov.w r3, #256 ; 0x100
80013fc: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
80013fe: 2312 movs r3, #18
8001400: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_PULLUP;
8001402: 2301 movs r3, #1
8001404: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001406: 2300 movs r3, #0
8001408: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
800140a: 2304 movs r3, #4
800140c: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2C3_SCL_GPIO_Port, &GPIO_InitStruct);
800140e: f107 0324 add.w r3, r7, #36 ; 0x24
8001412: 4619 mov r1, r3
8001414: 4833 ldr r0, [pc, #204] ; (80014e4 <MX_GPIO_Init+0x4fc>)
8001416: f002 fa67 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : STLINK_RX_Pin STLINK_TX_Pin */
GPIO_InitStruct.Pin = STLINK_RX_Pin|STLINK_TX_Pin;
800141a: f44f 63c0 mov.w r3, #1536 ; 0x600
800141e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001420: 2302 movs r3, #2
8001422: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001424: 2300 movs r3, #0
8001426: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001428: 2303 movs r3, #3
800142a: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
800142c: 2307 movs r3, #7
800142e: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001430: f107 0324 add.w r3, r7, #36 ; 0x24
8001434: 4619 mov r1, r3
8001436: 482b ldr r0, [pc, #172] ; (80014e4 <MX_GPIO_Init+0x4fc>)
8001438: f002 fa56 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : G7_Pin B2_Pin */
GPIO_InitStruct.Pin = G7_Pin|B2_Pin;
800143c: 2348 movs r3, #72 ; 0x48
800143e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001440: 2302 movs r3, #2
8001442: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001444: 2300 movs r3, #0
8001446: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001448: 2300 movs r3, #0
800144a: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
800144c: 230e movs r3, #14
800144e: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8001450: f107 0324 add.w r3, r7, #36 ; 0x24
8001454: 4619 mov r1, r3
8001456: 4820 ldr r0, [pc, #128] ; (80014d8 <MX_GPIO_Init+0x4f0>)
8001458: f002 fa46 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : G3_Pin B4_Pin */
GPIO_InitStruct.Pin = G3_Pin|B4_Pin;
800145c: f44f 53a0 mov.w r3, #5120 ; 0x1400
8001460: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001462: 2302 movs r3, #2
8001464: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001466: 2300 movs r3, #0
8001468: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800146a: 2300 movs r3, #0
800146c: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
800146e: 2309 movs r3, #9
8001470: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8001472: f107 0324 add.w r3, r7, #36 ; 0x24
8001476: 4619 mov r1, r3
8001478: 4818 ldr r0, [pc, #96] ; (80014dc <MX_GPIO_Init+0x4f4>)
800147a: f002 fa35 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : LD3_Pin LD4_Pin */
GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
800147e: f44f 43c0 mov.w r3, #24576 ; 0x6000
8001482: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001484: 2301 movs r3, #1
8001486: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001488: 2300 movs r3, #0
800148a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800148c: 2300 movs r3, #0
800148e: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8001490: f107 0324 add.w r3, r7, #36 ; 0x24
8001494: 4619 mov r1, r3
8001496: 4811 ldr r0, [pc, #68] ; (80014dc <MX_GPIO_Init+0x4f4>)
8001498: f002 fa26 bl 80038e8 <HAL_GPIO_Init>
/*Configure GPIO pins : SDCKE1_Pin SDNE1_Pin */
GPIO_InitStruct.Pin = SDCKE1_Pin|SDNE1_Pin;
800149c: 2360 movs r3, #96 ; 0x60
800149e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80014a0: 2302 movs r3, #2
80014a2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
80014a4: 2300 movs r3, #0
80014a6: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80014a8: 2303 movs r3, #3
80014aa: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
80014ac: 230c movs r3, #12
80014ae: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80014b0: f107 0324 add.w r3, r7, #36 ; 0x24
80014b4: 4619 mov r1, r3
80014b6: 4807 ldr r0, [pc, #28] ; (80014d4 <MX_GPIO_Init+0x4ec>)
80014b8: f002 fa16 bl 80038e8 <HAL_GPIO_Init>
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);
80014bc: 2200 movs r2, #0
80014be: 2100 movs r1, #0
80014c0: 2006 movs r0, #6
80014c2: f002 f9b8 bl 8003836 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
80014c6: 2006 movs r0, #6
80014c8: f002 f9d1 bl 800386e <HAL_NVIC_EnableIRQ>
}
80014cc: bf00 nop
80014ce: 3738 adds r7, #56 ; 0x38
80014d0: 46bd mov sp, r7
80014d2: bd80 pop {r7, pc}
80014d4: 40020400 .word 0x40020400
80014d8: 40020c00 .word 0x40020c00
80014dc: 40021800 .word 0x40021800
80014e0: 40020800 .word 0x40020800
80014e4: 40020000 .word 0x40020000
080014e8 <getSoundLevel>:
/* USER CODE BEGIN 4 */
uint8_t getSoundLevel(void){
80014e8: b580 push {r7, lr}
80014ea: b084 sub sp, #16
80014ec: af00 add r7, sp, #0
// Adjustment / Calibration
static uint8_t cutoff = 90;
// By order of process
uint8_t samples[8];
uint16_t estimatedSoundLevel = 0;
80014ee: 2300 movs r3, #0
80014f0: 81fb strh r3, [r7, #14]
static uint16_t averagedReturnValue = 0;
uint16_t returnValue;
for(uint8_t i = 0; i < sizeof(samples); ++i){
80014f2: 2300 movs r3, #0
80014f4: 72fb strb r3, [r7, #11]
80014f6: e014 b.n 8001522 <getSoundLevel+0x3a>
HAL_ADC_Start(&hadc3);
80014f8: 4830 ldr r0, [pc, #192] ; (80015bc <getSoundLevel+0xd4>)
80014fa: f001 fd3b bl 8002f74 <HAL_ADC_Start>
HAL_ADC_PollForConversion(&hadc3, (uint32_t) 20);
80014fe: 2114 movs r1, #20
8001500: 482e ldr r0, [pc, #184] ; (80015bc <getSoundLevel+0xd4>)
8001502: f001 fdfd bl 8003100 <HAL_ADC_PollForConversion>
samples[i] = HAL_ADC_GetValue(&hadc3);
8001506: 482d ldr r0, [pc, #180] ; (80015bc <getSoundLevel+0xd4>)
8001508: f001 fe7e bl 8003208 <HAL_ADC_GetValue>
800150c: 4602 mov r2, r0
800150e: 7afb ldrb r3, [r7, #11]
8001510: b2d2 uxtb r2, r2
8001512: f107 0110 add.w r1, r7, #16
8001516: 440b add r3, r1
8001518: f803 2c10 strb.w r2, [r3, #-16]
for(uint8_t i = 0; i < sizeof(samples); ++i){
800151c: 7afb ldrb r3, [r7, #11]
800151e: 3301 adds r3, #1
8001520: 72fb strb r3, [r7, #11]
8001522: 7afb ldrb r3, [r7, #11]
8001524: 2b07 cmp r3, #7
8001526: d9e7 bls.n 80014f8 <getSoundLevel+0x10>
}
for(uint8_t i = 0; i < sizeof(samples); ++i){
8001528: 2300 movs r3, #0
800152a: 72bb strb r3, [r7, #10]
800152c: e00c b.n 8001548 <getSoundLevel+0x60>
estimatedSoundLevel += samples[i];
800152e: 7abb ldrb r3, [r7, #10]
8001530: f107 0210 add.w r2, r7, #16
8001534: 4413 add r3, r2
8001536: f813 3c10 ldrb.w r3, [r3, #-16]
800153a: b29a uxth r2, r3
800153c: 89fb ldrh r3, [r7, #14]
800153e: 4413 add r3, r2
8001540: 81fb strh r3, [r7, #14]
for(uint8_t i = 0; i < sizeof(samples); ++i){
8001542: 7abb ldrb r3, [r7, #10]
8001544: 3301 adds r3, #1
8001546: 72bb strb r3, [r7, #10]
8001548: 7abb ldrb r3, [r7, #10]
800154a: 2b07 cmp r3, #7
800154c: d9ef bls.n 800152e <getSoundLevel+0x46>
}
estimatedSoundLevel /= sizeof(samples);
800154e: 89fb ldrh r3, [r7, #14]
8001550: 08db lsrs r3, r3, #3
8001552: 81fb strh r3, [r7, #14]
if(estimatedSoundLevel <= cutoff){
8001554: 4b1a ldr r3, [pc, #104] ; (80015c0 <getSoundLevel+0xd8>)
8001556: 781b ldrb r3, [r3, #0]
8001558: b29b uxth r3, r3
800155a: 89fa ldrh r2, [r7, #14]
800155c: 429a cmp r2, r3
800155e: d802 bhi.n 8001566 <getSoundLevel+0x7e>
returnValue = 0;
8001560: 2300 movs r3, #0
8001562: 81bb strh r3, [r7, #12]
8001564: e006 b.n 8001574 <getSoundLevel+0x8c>
}else{
returnValue = (uint16_t) (2 * (estimatedSoundLevel - cutoff));
8001566: 89fb ldrh r3, [r7, #14]
8001568: 4a15 ldr r2, [pc, #84] ; (80015c0 <getSoundLevel+0xd8>)
800156a: 7812 ldrb r2, [r2, #0]
800156c: 1a9b subs r3, r3, r2
800156e: b29b uxth r3, r3
8001570: 005b lsls r3, r3, #1
8001572: 81bb strh r3, [r7, #12]
}
averagedReturnValue += ((int32_t) returnValue - (int32_t) averagedReturnValue) / 3;
8001574: 89bb ldrh r3, [r7, #12]
8001576: 4a13 ldr r2, [pc, #76] ; (80015c4 <getSoundLevel+0xdc>)
8001578: 8812 ldrh r2, [r2, #0]
800157a: 1a9b subs r3, r3, r2
800157c: 4a12 ldr r2, [pc, #72] ; (80015c8 <getSoundLevel+0xe0>)
800157e: fb82 1203 smull r1, r2, r2, r3
8001582: 17db asrs r3, r3, #31
8001584: 1ad3 subs r3, r2, r3
8001586: b29a uxth r2, r3
8001588: 4b0e ldr r3, [pc, #56] ; (80015c4 <getSoundLevel+0xdc>)
800158a: 881b ldrh r3, [r3, #0]
800158c: 4413 add r3, r2
800158e: b29a uxth r2, r3
8001590: 4b0c ldr r3, [pc, #48] ; (80015c4 <getSoundLevel+0xdc>)
8001592: 801a strh r2, [r3, #0]
if(averagedReturnValue >= 0xFF){
8001594: 4b0b ldr r3, [pc, #44] ; (80015c4 <getSoundLevel+0xdc>)
8001596: 881b ldrh r3, [r3, #0]
8001598: 2bfe cmp r3, #254 ; 0xfe
800159a: d901 bls.n 80015a0 <getSoundLevel+0xb8>
return 0xFF;
800159c: 23ff movs r3, #255 ; 0xff
800159e: e008 b.n 80015b2 <getSoundLevel+0xca>
}else if(averagedReturnValue <= 10){
80015a0: 4b08 ldr r3, [pc, #32] ; (80015c4 <getSoundLevel+0xdc>)
80015a2: 881b ldrh r3, [r3, #0]
80015a4: 2b0a cmp r3, #10
80015a6: d801 bhi.n 80015ac <getSoundLevel+0xc4>
return 0x00;
80015a8: 2300 movs r3, #0
80015aa: e002 b.n 80015b2 <getSoundLevel+0xca>
}else{
return averagedReturnValue;
80015ac: 4b05 ldr r3, [pc, #20] ; (80015c4 <getSoundLevel+0xdc>)
80015ae: 881b ldrh r3, [r3, #0]
80015b0: b2db uxtb r3, r3
}
}
80015b2: 4618 mov r0, r3
80015b4: 3710 adds r7, #16
80015b6: 46bd mov sp, r7
80015b8: bd80 pop {r7, pc}
80015ba: bf00 nop
80015bc: 200003b4 .word 0x200003b4
80015c0: 20000000 .word 0x20000000
80015c4: 200003a6 .word 0x200003a6
80015c8: 55555556 .word 0x55555556
080015cc <LEDDesign_Off>:
void LEDDesign_Off(void){
80015cc: b480 push {r7}
80015ce: b083 sub sp, #12
80015d0: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
80015d2: 2300 movs r3, #0
80015d4: 71fb strb r3, [r7, #7]
80015d6: e015 b.n 8001604 <LEDDesign_Off+0x38>
for(uint8_t j = 0; j < 3; ++j){
80015d8: 2300 movs r3, #0
80015da: 71bb strb r3, [r7, #6]
80015dc: e00c b.n 80015f8 <LEDDesign_Off+0x2c>
LEDData[i][j] = 0x00;
80015de: 79fa ldrb r2, [r7, #7]
80015e0: 79b9 ldrb r1, [r7, #6]
80015e2: 480d ldr r0, [pc, #52] ; (8001618 <LEDDesign_Off+0x4c>)
80015e4: 4613 mov r3, r2
80015e6: 005b lsls r3, r3, #1
80015e8: 4413 add r3, r2
80015ea: 4403 add r3, r0
80015ec: 440b add r3, r1
80015ee: 2200 movs r2, #0
80015f0: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
80015f2: 79bb ldrb r3, [r7, #6]
80015f4: 3301 adds r3, #1
80015f6: 71bb strb r3, [r7, #6]
80015f8: 79bb ldrb r3, [r7, #6]
80015fa: 2b02 cmp r3, #2
80015fc: d9ef bls.n 80015de <LEDDesign_Off+0x12>
for(uint8_t i = 0; i < 64; ++i){
80015fe: 79fb ldrb r3, [r7, #7]
8001600: 3301 adds r3, #1
8001602: 71fb strb r3, [r7, #7]
8001604: 79fb ldrb r3, [r7, #7]
8001606: 2b3f cmp r3, #63 ; 0x3f
8001608: d9e6 bls.n 80015d8 <LEDDesign_Off+0xc>
}
}
}
800160a: bf00 nop
800160c: 370c adds r7, #12
800160e: 46bd mov sp, r7
8001610: f85d 7b04 ldr.w r7, [sp], #4
8001614: 4770 bx lr
8001616: bf00 nop
8001618: 20000094 .word 0x20000094
0800161c <LEDDesign_ColorWhite>:
void LEDDesign_ColorWhite(void){
800161c: b480 push {r7}
800161e: b083 sub sp, #12
8001620: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
8001622: 2300 movs r3, #0
8001624: 71fb strb r3, [r7, #7]
8001626: e015 b.n 8001654 <LEDDesign_ColorWhite+0x38>
for(uint8_t j = 0; j < 3; ++j){
8001628: 2300 movs r3, #0
800162a: 71bb strb r3, [r7, #6]
800162c: e00c b.n 8001648 <LEDDesign_ColorWhite+0x2c>
LEDData[i][j] = 0xFF;
800162e: 79fa ldrb r2, [r7, #7]
8001630: 79b9 ldrb r1, [r7, #6]
8001632: 480d ldr r0, [pc, #52] ; (8001668 <LEDDesign_ColorWhite+0x4c>)
8001634: 4613 mov r3, r2
8001636: 005b lsls r3, r3, #1
8001638: 4413 add r3, r2
800163a: 4403 add r3, r0
800163c: 440b add r3, r1
800163e: 22ff movs r2, #255 ; 0xff
8001640: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
8001642: 79bb ldrb r3, [r7, #6]
8001644: 3301 adds r3, #1
8001646: 71bb strb r3, [r7, #6]
8001648: 79bb ldrb r3, [r7, #6]
800164a: 2b02 cmp r3, #2
800164c: d9ef bls.n 800162e <LEDDesign_ColorWhite+0x12>
for(uint8_t i = 0; i < 64; ++i){
800164e: 79fb ldrb r3, [r7, #7]
8001650: 3301 adds r3, #1
8001652: 71fb strb r3, [r7, #7]
8001654: 79fb ldrb r3, [r7, #7]
8001656: 2b3f cmp r3, #63 ; 0x3f
8001658: d9e6 bls.n 8001628 <LEDDesign_ColorWhite+0xc>
}
}
}
800165a: bf00 nop
800165c: 370c adds r7, #12
800165e: 46bd mov sp, r7
8001660: f85d 7b04 ldr.w r7, [sp], #4
8001664: 4770 bx lr
8001666: bf00 nop
8001668: 20000094 .word 0x20000094
0800166c <LEDDesign_ColorBlue>:
void LEDDesign_ColorBlue(void){
800166c: b480 push {r7}
800166e: b083 sub sp, #12
8001670: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
8001672: 2300 movs r3, #0
8001674: 71fb strb r3, [r7, #7]
8001676: e00a b.n 800168e <LEDDesign_ColorBlue+0x22>
LEDData[i][0] = 0x00;
8001678: 79fa ldrb r2, [r7, #7]
800167a: 491b ldr r1, [pc, #108] ; (80016e8 <LEDDesign_ColorBlue+0x7c>)
800167c: 4613 mov r3, r2
800167e: 005b lsls r3, r3, #1
8001680: 4413 add r3, r2
8001682: 440b add r3, r1
8001684: 2200 movs r2, #0
8001686: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001688: 79fb ldrb r3, [r7, #7]
800168a: 3301 adds r3, #1
800168c: 71fb strb r3, [r7, #7]
800168e: 79fb ldrb r3, [r7, #7]
8001690: 2b3f cmp r3, #63 ; 0x3f
8001692: d9f1 bls.n 8001678 <LEDDesign_ColorBlue+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
8001694: 2300 movs r3, #0
8001696: 71bb strb r3, [r7, #6]
8001698: e00b b.n 80016b2 <LEDDesign_ColorBlue+0x46>
LEDData[i][1] = 0x00;
800169a: 79ba ldrb r2, [r7, #6]
800169c: 4912 ldr r1, [pc, #72] ; (80016e8 <LEDDesign_ColorBlue+0x7c>)
800169e: 4613 mov r3, r2
80016a0: 005b lsls r3, r3, #1
80016a2: 4413 add r3, r2
80016a4: 440b add r3, r1
80016a6: 3301 adds r3, #1
80016a8: 2200 movs r2, #0
80016aa: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80016ac: 79bb ldrb r3, [r7, #6]
80016ae: 3301 adds r3, #1
80016b0: 71bb strb r3, [r7, #6]
80016b2: 79bb ldrb r3, [r7, #6]
80016b4: 2b3f cmp r3, #63 ; 0x3f
80016b6: d9f0 bls.n 800169a <LEDDesign_ColorBlue+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
80016b8: 2300 movs r3, #0
80016ba: 717b strb r3, [r7, #5]
80016bc: e00b b.n 80016d6 <LEDDesign_ColorBlue+0x6a>
LEDData[i][2] = 0xFF;
80016be: 797a ldrb r2, [r7, #5]
80016c0: 4909 ldr r1, [pc, #36] ; (80016e8 <LEDDesign_ColorBlue+0x7c>)
80016c2: 4613 mov r3, r2
80016c4: 005b lsls r3, r3, #1
80016c6: 4413 add r3, r2
80016c8: 440b add r3, r1
80016ca: 3302 adds r3, #2
80016cc: 22ff movs r2, #255 ; 0xff
80016ce: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80016d0: 797b ldrb r3, [r7, #5]
80016d2: 3301 adds r3, #1
80016d4: 717b strb r3, [r7, #5]
80016d6: 797b ldrb r3, [r7, #5]
80016d8: 2b3f cmp r3, #63 ; 0x3f
80016da: d9f0 bls.n 80016be <LEDDesign_ColorBlue+0x52>
}
}
80016dc: bf00 nop
80016de: 370c adds r7, #12
80016e0: 46bd mov sp, r7
80016e2: f85d 7b04 ldr.w r7, [sp], #4
80016e6: 4770 bx lr
80016e8: 20000094 .word 0x20000094
080016ec <LEDDesign_ColorGreen>:
void LEDDesign_ColorGreen(void){
80016ec: b480 push {r7}
80016ee: b083 sub sp, #12
80016f0: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
80016f2: 2300 movs r3, #0
80016f4: 71fb strb r3, [r7, #7]
80016f6: e00a b.n 800170e <LEDDesign_ColorGreen+0x22>
LEDData[i][0] = 0xFF;
80016f8: 79fa ldrb r2, [r7, #7]
80016fa: 491b ldr r1, [pc, #108] ; (8001768 <LEDDesign_ColorGreen+0x7c>)
80016fc: 4613 mov r3, r2
80016fe: 005b lsls r3, r3, #1
8001700: 4413 add r3, r2
8001702: 440b add r3, r1
8001704: 22ff movs r2, #255 ; 0xff
8001706: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001708: 79fb ldrb r3, [r7, #7]
800170a: 3301 adds r3, #1
800170c: 71fb strb r3, [r7, #7]
800170e: 79fb ldrb r3, [r7, #7]
8001710: 2b3f cmp r3, #63 ; 0x3f
8001712: d9f1 bls.n 80016f8 <LEDDesign_ColorGreen+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
8001714: 2300 movs r3, #0
8001716: 71bb strb r3, [r7, #6]
8001718: e00b b.n 8001732 <LEDDesign_ColorGreen+0x46>
LEDData[i][1] = 0x00;
800171a: 79ba ldrb r2, [r7, #6]
800171c: 4912 ldr r1, [pc, #72] ; (8001768 <LEDDesign_ColorGreen+0x7c>)
800171e: 4613 mov r3, r2
8001720: 005b lsls r3, r3, #1
8001722: 4413 add r3, r2
8001724: 440b add r3, r1
8001726: 3301 adds r3, #1
8001728: 2200 movs r2, #0
800172a: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
800172c: 79bb ldrb r3, [r7, #6]
800172e: 3301 adds r3, #1
8001730: 71bb strb r3, [r7, #6]
8001732: 79bb ldrb r3, [r7, #6]
8001734: 2b3f cmp r3, #63 ; 0x3f
8001736: d9f0 bls.n 800171a <LEDDesign_ColorGreen+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
8001738: 2300 movs r3, #0
800173a: 717b strb r3, [r7, #5]
800173c: e00b b.n 8001756 <LEDDesign_ColorGreen+0x6a>
LEDData[i][2] = 0x00;
800173e: 797a ldrb r2, [r7, #5]
8001740: 4909 ldr r1, [pc, #36] ; (8001768 <LEDDesign_ColorGreen+0x7c>)
8001742: 4613 mov r3, r2
8001744: 005b lsls r3, r3, #1
8001746: 4413 add r3, r2
8001748: 440b add r3, r1
800174a: 3302 adds r3, #2
800174c: 2200 movs r2, #0
800174e: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001750: 797b ldrb r3, [r7, #5]
8001752: 3301 adds r3, #1
8001754: 717b strb r3, [r7, #5]
8001756: 797b ldrb r3, [r7, #5]
8001758: 2b3f cmp r3, #63 ; 0x3f
800175a: d9f0 bls.n 800173e <LEDDesign_ColorGreen+0x52>
}
}
800175c: bf00 nop
800175e: 370c adds r7, #12
8001760: 46bd mov sp, r7
8001762: f85d 7b04 ldr.w r7, [sp], #4
8001766: 4770 bx lr
8001768: 20000094 .word 0x20000094
0800176c <LEDDesign_ColorRed>:
void LEDDesign_ColorRed(void){
800176c: b480 push {r7}
800176e: b083 sub sp, #12
8001770: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
8001772: 2300 movs r3, #0
8001774: 71fb strb r3, [r7, #7]
8001776: e00a b.n 800178e <LEDDesign_ColorRed+0x22>
LEDData[i][0] = 0x00;
8001778: 79fa ldrb r2, [r7, #7]
800177a: 491b ldr r1, [pc, #108] ; (80017e8 <LEDDesign_ColorRed+0x7c>)
800177c: 4613 mov r3, r2
800177e: 005b lsls r3, r3, #1
8001780: 4413 add r3, r2
8001782: 440b add r3, r1
8001784: 2200 movs r2, #0
8001786: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001788: 79fb ldrb r3, [r7, #7]
800178a: 3301 adds r3, #1
800178c: 71fb strb r3, [r7, #7]
800178e: 79fb ldrb r3, [r7, #7]
8001790: 2b3f cmp r3, #63 ; 0x3f
8001792: d9f1 bls.n 8001778 <LEDDesign_ColorRed+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
8001794: 2300 movs r3, #0
8001796: 71bb strb r3, [r7, #6]
8001798: e00b b.n 80017b2 <LEDDesign_ColorRed+0x46>
LEDData[i][1] = 0xFF;
800179a: 79ba ldrb r2, [r7, #6]
800179c: 4912 ldr r1, [pc, #72] ; (80017e8 <LEDDesign_ColorRed+0x7c>)
800179e: 4613 mov r3, r2
80017a0: 005b lsls r3, r3, #1
80017a2: 4413 add r3, r2
80017a4: 440b add r3, r1
80017a6: 3301 adds r3, #1
80017a8: 22ff movs r2, #255 ; 0xff
80017aa: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80017ac: 79bb ldrb r3, [r7, #6]
80017ae: 3301 adds r3, #1
80017b0: 71bb strb r3, [r7, #6]
80017b2: 79bb ldrb r3, [r7, #6]
80017b4: 2b3f cmp r3, #63 ; 0x3f
80017b6: d9f0 bls.n 800179a <LEDDesign_ColorRed+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
80017b8: 2300 movs r3, #0
80017ba: 717b strb r3, [r7, #5]
80017bc: e00b b.n 80017d6 <LEDDesign_ColorRed+0x6a>
LEDData[i][2] = 0x00;
80017be: 797a ldrb r2, [r7, #5]
80017c0: 4909 ldr r1, [pc, #36] ; (80017e8 <LEDDesign_ColorRed+0x7c>)
80017c2: 4613 mov r3, r2
80017c4: 005b lsls r3, r3, #1
80017c6: 4413 add r3, r2
80017c8: 440b add r3, r1
80017ca: 3302 adds r3, #2
80017cc: 2200 movs r2, #0
80017ce: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80017d0: 797b ldrb r3, [r7, #5]
80017d2: 3301 adds r3, #1
80017d4: 717b strb r3, [r7, #5]
80017d6: 797b ldrb r3, [r7, #5]
80017d8: 2b3f cmp r3, #63 ; 0x3f
80017da: d9f0 bls.n 80017be <LEDDesign_ColorRed+0x52>
}
}
80017dc: bf00 nop
80017de: 370c adds r7, #12
80017e0: 46bd mov sp, r7
80017e2: f85d 7b04 ldr.w r7, [sp], #4
80017e6: 4770 bx lr
80017e8: 20000094 .word 0x20000094
080017ec <LEDDesign_Crazy>:
void LEDDesign_Crazy(void){
80017ec: b590 push {r4, r7, lr}
80017ee: b085 sub sp, #20
80017f0: af00 add r7, sp, #0
HAL_Delay(50);
80017f2: 2032 movs r0, #50 ; 0x32
80017f4: f001 fb58 bl 8002ea8 <HAL_Delay>
for(uint8_t i = 0; i < 64; ++i){
80017f8: 2300 movs r3, #0
80017fa: 73fb strb r3, [r7, #15]
80017fc: e029 b.n 8001852 <LEDDesign_Crazy+0x66>
for(uint8_t j = 0; j < 3; ++j){
80017fe: 2300 movs r3, #0
8001800: 73bb strb r3, [r7, #14]
8001802: e020 b.n 8001846 <LEDDesign_Crazy+0x5a>
LEDData[i][j] = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
8001804: f003 fd1a bl 800523c <rand>
8001808: ee07 0a90 vmov s15, r0
800180c: eeb8 7ae7 vcvt.f32.s32 s14, s15
8001810: eddf 6a13 vldr s13, [pc, #76] ; 8001860 <LEDDesign_Crazy+0x74>
8001814: eec7 7a26 vdiv.f32 s15, s14, s13
8001818: ed9f 7a12 vldr s14, [pc, #72] ; 8001864 <LEDDesign_Crazy+0x78>
800181c: ee67 7a87 vmul.f32 s15, s15, s14
8001820: 7bfa ldrb r2, [r7, #15]
8001822: 7bb9 ldrb r1, [r7, #14]
8001824: eefc 7ae7 vcvt.u32.f32 s15, s15
8001828: edc7 7a01 vstr s15, [r7, #4]
800182c: 793b ldrb r3, [r7, #4]
800182e: b2dc uxtb r4, r3
8001830: 480d ldr r0, [pc, #52] ; (8001868 <LEDDesign_Crazy+0x7c>)
8001832: 4613 mov r3, r2
8001834: 005b lsls r3, r3, #1
8001836: 4413 add r3, r2
8001838: 4403 add r3, r0
800183a: 440b add r3, r1
800183c: 4622 mov r2, r4
800183e: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
8001840: 7bbb ldrb r3, [r7, #14]
8001842: 3301 adds r3, #1
8001844: 73bb strb r3, [r7, #14]
8001846: 7bbb ldrb r3, [r7, #14]
8001848: 2b02 cmp r3, #2
800184a: d9db bls.n 8001804 <LEDDesign_Crazy+0x18>
for(uint8_t i = 0; i < 64; ++i){
800184c: 7bfb ldrb r3, [r7, #15]
800184e: 3301 adds r3, #1
8001850: 73fb strb r3, [r7, #15]
8001852: 7bfb ldrb r3, [r7, #15]
8001854: 2b3f cmp r3, #63 ; 0x3f
8001856: d9d2 bls.n 80017fe <LEDDesign_Crazy+0x12>
}
}
}
8001858: bf00 nop
800185a: 3714 adds r7, #20
800185c: 46bd mov sp, r7
800185e: bd90 pop {r4, r7, pc}
8001860: 4f000000 .word 0x4f000000
8001864: 437f0000 .word 0x437f0000
8001868: 20000094 .word 0x20000094
800186c: 00000000 .word 0x00000000
08001870 <LEDDesign_Smile>:
void LEDDesign_Smile(void){
8001870: b5b0 push {r4, r5, r7, lr}
8001872: b082 sub sp, #8
8001874: af00 add r7, sp, #0
uint8_t currentSoundLevel = getSoundLevel();
8001876: f7ff fe37 bl 80014e8 <getSoundLevel>
800187a: 4603 mov r3, r0
800187c: 71fb strb r3, [r7, #7]
setLED(lookupLED(0,0), 0x00, 0x00, 0x00);
800187e: 2100 movs r1, #0
8001880: 2000 movs r0, #0
8001882: f000 fd87 bl 8002394 <lookupLED>
8001886: 4603 mov r3, r0
8001888: 4618 mov r0, r3
800188a: 2300 movs r3, #0
800188c: 2200 movs r2, #0
800188e: 2100 movs r1, #0
8001890: f000 fef0 bl 8002674 <setLED>
setLED(lookupLED(0,1), 0x00, 0x00, 0x00);
8001894: 2101 movs r1, #1
8001896: 2000 movs r0, #0
8001898: f000 fd7c bl 8002394 <lookupLED>
800189c: 4603 mov r3, r0
800189e: 4618 mov r0, r3
80018a0: 2300 movs r3, #0
80018a2: 2200 movs r2, #0
80018a4: 2100 movs r1, #0
80018a6: f000 fee5 bl 8002674 <setLED>
setLED(lookupLED(0,2), 0x00, 0x00, currentSoundLevel * 0.25);
80018aa: 2102 movs r1, #2
80018ac: 2000 movs r0, #0
80018ae: f000 fd71 bl 8002394 <lookupLED>
80018b2: 4603 mov r3, r0
80018b4: 461d mov r5, r3
80018b6: 79fb ldrb r3, [r7, #7]
80018b8: 4618 mov r0, r3
80018ba: f7fe fdeb bl 8000494 <__aeabi_i2d>
80018be: f04f 0200 mov.w r2, #0
80018c2: 4beb ldr r3, [pc, #940] ; (8001c70 <LEDDesign_Smile+0x400>)
80018c4: f7fe fe50 bl 8000568 <__aeabi_dmul>
80018c8: 4603 mov r3, r0
80018ca: 460c mov r4, r1
80018cc: 4618 mov r0, r3
80018ce: 4621 mov r1, r4
80018d0: f7ff f85c bl 800098c <__aeabi_d2uiz>
80018d4: 4603 mov r3, r0
80018d6: b2db uxtb r3, r3
80018d8: 2200 movs r2, #0
80018da: 2100 movs r1, #0
80018dc: 4628 mov r0, r5
80018de: f000 fec9 bl 8002674 <setLED>
setLED(lookupLED(0,3), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
80018e2: 2103 movs r1, #3
80018e4: 2000 movs r0, #0
80018e6: f000 fd55 bl 8002394 <lookupLED>
80018ea: 4603 mov r3, r0
80018ec: 461d mov r5, r3
80018ee: 79fb ldrb r3, [r7, #7]
80018f0: 4618 mov r0, r3
80018f2: f7fe fdcf bl 8000494 <__aeabi_i2d>
80018f6: f04f 0200 mov.w r2, #0
80018fa: 4bde ldr r3, [pc, #888] ; (8001c74 <LEDDesign_Smile+0x404>)
80018fc: f7fe fe34 bl 8000568 <__aeabi_dmul>
8001900: 4603 mov r3, r0
8001902: 460c mov r4, r1
8001904: 4618 mov r0, r3
8001906: 4621 mov r1, r4
8001908: a3d7 add r3, pc, #860 ; (adr r3, 8001c68 <LEDDesign_Smile+0x3f8>)
800190a: e9d3 2300 ldrd r2, r3, [r3]
800190e: f7fe fc75 bl 80001fc <__adddf3>
8001912: 4603 mov r3, r0
8001914: 460c mov r4, r1
8001916: 4618 mov r0, r3
8001918: 4621 mov r1, r4
800191a: f7ff f837 bl 800098c <__aeabi_d2uiz>
800191e: 4603 mov r3, r0
8001920: b2db uxtb r3, r3
8001922: 2200 movs r2, #0
8001924: 2100 movs r1, #0
8001926: 4628 mov r0, r5
8001928: f000 fea4 bl 8002674 <setLED>
setLED(lookupLED(0,4), 0x00, 0x00, currentSoundLevel * 0.25);
800192c: 2104 movs r1, #4
800192e: 2000 movs r0, #0
8001930: f000 fd30 bl 8002394 <lookupLED>
8001934: 4603 mov r3, r0
8001936: 461d mov r5, r3
8001938: 79fb ldrb r3, [r7, #7]
800193a: 4618 mov r0, r3
800193c: f7fe fdaa bl 8000494 <__aeabi_i2d>
8001940: f04f 0200 mov.w r2, #0
8001944: 4bca ldr r3, [pc, #808] ; (8001c70 <LEDDesign_Smile+0x400>)
8001946: f7fe fe0f bl 8000568 <__aeabi_dmul>
800194a: 4603 mov r3, r0
800194c: 460c mov r4, r1
800194e: 4618 mov r0, r3
8001950: 4621 mov r1, r4
8001952: f7ff f81b bl 800098c <__aeabi_d2uiz>
8001956: 4603 mov r3, r0
8001958: b2db uxtb r3, r3
800195a: 2200 movs r2, #0
800195c: 2100 movs r1, #0
800195e: 4628 mov r0, r5
8001960: f000 fe88 bl 8002674 <setLED>
setLED(lookupLED(0,5), 0x00, 0x00, 0x00);
8001964: 2105 movs r1, #5
8001966: 2000 movs r0, #0
8001968: f000 fd14 bl 8002394 <lookupLED>
800196c: 4603 mov r3, r0
800196e: 4618 mov r0, r3
8001970: 2300 movs r3, #0
8001972: 2200 movs r2, #0
8001974: 2100 movs r1, #0
8001976: f000 fe7d bl 8002674 <setLED>
setLED(lookupLED(0,6), 0x00, 0x00, 0x00);
800197a: 2106 movs r1, #6
800197c: 2000 movs r0, #0
800197e: f000 fd09 bl 8002394 <lookupLED>
8001982: 4603 mov r3, r0
8001984: 4618 mov r0, r3
8001986: 2300 movs r3, #0
8001988: 2200 movs r2, #0
800198a: 2100 movs r1, #0
800198c: f000 fe72 bl 8002674 <setLED>
setLED(lookupLED(0,7), 0x00, 0x00, 0x00);
8001990: 2107 movs r1, #7
8001992: 2000 movs r0, #0
8001994: f000 fcfe bl 8002394 <lookupLED>
8001998: 4603 mov r3, r0
800199a: 4618 mov r0, r3
800199c: 2300 movs r3, #0
800199e: 2200 movs r2, #0
80019a0: 2100 movs r1, #0
80019a2: f000 fe67 bl 8002674 <setLED>
setLED(lookupLED(1,0), 0x00, 0x00, 0x00);
80019a6: 2100 movs r1, #0
80019a8: 2001 movs r0, #1
80019aa: f000 fcf3 bl 8002394 <lookupLED>
80019ae: 4603 mov r3, r0
80019b0: 4618 mov r0, r3
80019b2: 2300 movs r3, #0
80019b4: 2200 movs r2, #0
80019b6: 2100 movs r1, #0
80019b8: f000 fe5c bl 8002674 <setLED>
setLED(lookupLED(1,1), 0x00, 0x00, currentSoundLevel * 0.5);
80019bc: 2101 movs r1, #1
80019be: 2001 movs r0, #1
80019c0: f000 fce8 bl 8002394 <lookupLED>
80019c4: 4603 mov r3, r0
80019c6: 461d mov r5, r3
80019c8: 79fb ldrb r3, [r7, #7]
80019ca: 4618 mov r0, r3
80019cc: f7fe fd62 bl 8000494 <__aeabi_i2d>
80019d0: f04f 0200 mov.w r2, #0
80019d4: 4ba7 ldr r3, [pc, #668] ; (8001c74 <LEDDesign_Smile+0x404>)
80019d6: f7fe fdc7 bl 8000568 <__aeabi_dmul>
80019da: 4603 mov r3, r0
80019dc: 460c mov r4, r1
80019de: 4618 mov r0, r3
80019e0: 4621 mov r1, r4
80019e2: f7fe ffd3 bl 800098c <__aeabi_d2uiz>
80019e6: 4603 mov r3, r0
80019e8: b2db uxtb r3, r3
80019ea: 2200 movs r2, #0
80019ec: 2100 movs r1, #0
80019ee: 4628 mov r0, r5
80019f0: f000 fe40 bl 8002674 <setLED>
setLED(lookupLED(1,2), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
80019f4: 2102 movs r1, #2
80019f6: 2001 movs r0, #1
80019f8: f000 fccc bl 8002394 <lookupLED>
80019fc: 4603 mov r3, r0
80019fe: 461d mov r5, r3
8001a00: 79fb ldrb r3, [r7, #7]
8001a02: 4618 mov r0, r3
8001a04: f7fe fd46 bl 8000494 <__aeabi_i2d>
8001a08: f04f 0200 mov.w r2, #0
8001a0c: 4b99 ldr r3, [pc, #612] ; (8001c74 <LEDDesign_Smile+0x404>)
8001a0e: f7fe fdab bl 8000568 <__aeabi_dmul>
8001a12: 4603 mov r3, r0
8001a14: 460c mov r4, r1
8001a16: 4618 mov r0, r3
8001a18: 4621 mov r1, r4
8001a1a: a393 add r3, pc, #588 ; (adr r3, 8001c68 <LEDDesign_Smile+0x3f8>)
8001a1c: e9d3 2300 ldrd r2, r3, [r3]
8001a20: f7fe fbec bl 80001fc <__adddf3>
8001a24: 4603 mov r3, r0
8001a26: 460c mov r4, r1
8001a28: 4618 mov r0, r3
8001a2a: 4621 mov r1, r4
8001a2c: f7fe ffae bl 800098c <__aeabi_d2uiz>
8001a30: 4603 mov r3, r0
8001a32: b2db uxtb r3, r3
8001a34: 2200 movs r2, #0
8001a36: 2100 movs r1, #0
8001a38: 4628 mov r0, r5
8001a3a: f000 fe1b bl 8002674 <setLED>
setLED(lookupLED(1,3), 0x00, 0x00, currentSoundLevel);
8001a3e: 2103 movs r1, #3
8001a40: 2001 movs r0, #1
8001a42: f000 fca7 bl 8002394 <lookupLED>
8001a46: 4603 mov r3, r0
8001a48: 4618 mov r0, r3
8001a4a: 79fb ldrb r3, [r7, #7]
8001a4c: 2200 movs r2, #0
8001a4e: 2100 movs r1, #0
8001a50: f000 fe10 bl 8002674 <setLED>
setLED(lookupLED(1,4), 0x00, 0x00, currentSoundLevel);
8001a54: 2104 movs r1, #4
8001a56: 2001 movs r0, #1
8001a58: f000 fc9c bl 8002394 <lookupLED>
8001a5c: 4603 mov r3, r0
8001a5e: 4618 mov r0, r3
8001a60: 79fb ldrb r3, [r7, #7]
8001a62: 2200 movs r2, #0
8001a64: 2100 movs r1, #0
8001a66: f000 fe05 bl 8002674 <setLED>
setLED(lookupLED(1,5), 0x00, 0x00, currentSoundLevel * 0.5);
8001a6a: 2105 movs r1, #5
8001a6c: 2001 movs r0, #1
8001a6e: f000 fc91 bl 8002394 <lookupLED>
8001a72: 4603 mov r3, r0
8001a74: 461d mov r5, r3
8001a76: 79fb ldrb r3, [r7, #7]
8001a78: 4618 mov r0, r3
8001a7a: f7fe fd0b bl 8000494 <__aeabi_i2d>
8001a7e: f04f 0200 mov.w r2, #0
8001a82: 4b7c ldr r3, [pc, #496] ; (8001c74 <LEDDesign_Smile+0x404>)
8001a84: f7fe fd70 bl 8000568 <__aeabi_dmul>
8001a88: 4603 mov r3, r0
8001a8a: 460c mov r4, r1
8001a8c: 4618 mov r0, r3
8001a8e: 4621 mov r1, r4
8001a90: f7fe ff7c bl 800098c <__aeabi_d2uiz>
8001a94: 4603 mov r3, r0
8001a96: b2db uxtb r3, r3
8001a98: 2200 movs r2, #0
8001a9a: 2100 movs r1, #0
8001a9c: 4628 mov r0, r5
8001a9e: f000 fde9 bl 8002674 <setLED>
setLED(lookupLED(1,6), 0x00, 0x00, 0x00);
8001aa2: 2106 movs r1, #6
8001aa4: 2001 movs r0, #1
8001aa6: f000 fc75 bl 8002394 <lookupLED>
8001aaa: 4603 mov r3, r0
8001aac: 4618 mov r0, r3
8001aae: 2300 movs r3, #0
8001ab0: 2200 movs r2, #0
8001ab2: 2100 movs r1, #0
8001ab4: f000 fdde bl 8002674 <setLED>
setLED(lookupLED(1,7), 0x00, 0x00, 0x00);
8001ab8: 2107 movs r1, #7
8001aba: 2001 movs r0, #1
8001abc: f000 fc6a bl 8002394 <lookupLED>
8001ac0: 4603 mov r3, r0
8001ac2: 4618 mov r0, r3
8001ac4: 2300 movs r3, #0
8001ac6: 2200 movs r2, #0
8001ac8: 2100 movs r1, #0
8001aca: f000 fdd3 bl 8002674 <setLED>
setLED(lookupLED(2,0), 0x00, 0x00, 0x00);
8001ace: 2100 movs r1, #0
8001ad0: 2002 movs r0, #2
8001ad2: f000 fc5f bl 8002394 <lookupLED>
8001ad6: 4603 mov r3, r0
8001ad8: 4618 mov r0, r3
8001ada: 2300 movs r3, #0
8001adc: 2200 movs r2, #0
8001ade: 2100 movs r1, #0
8001ae0: f000 fdc8 bl 8002674 <setLED>
setLED(lookupLED(2,1), 0x00, 0x00, currentSoundLevel * 0.5);
8001ae4: 2101 movs r1, #1
8001ae6: 2002 movs r0, #2
8001ae8: f000 fc54 bl 8002394 <lookupLED>
8001aec: 4603 mov r3, r0
8001aee: 461d mov r5, r3
8001af0: 79fb ldrb r3, [r7, #7]
8001af2: 4618 mov r0, r3
8001af4: f7fe fcce bl 8000494 <__aeabi_i2d>
8001af8: f04f 0200 mov.w r2, #0
8001afc: 4b5d ldr r3, [pc, #372] ; (8001c74 <LEDDesign_Smile+0x404>)
8001afe: f7fe fd33 bl 8000568 <__aeabi_dmul>
8001b02: 4603 mov r3, r0
8001b04: 460c mov r4, r1
8001b06: 4618 mov r0, r3
8001b08: 4621 mov r1, r4
8001b0a: f7fe ff3f bl 800098c <__aeabi_d2uiz>
8001b0e: 4603 mov r3, r0
8001b10: b2db uxtb r3, r3
8001b12: 2200 movs r2, #0
8001b14: 2100 movs r1, #0
8001b16: 4628 mov r0, r5
8001b18: f000 fdac bl 8002674 <setLED>
setLED(lookupLED(2,2), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
8001b1c: 2102 movs r1, #2
8001b1e: 2002 movs r0, #2
8001b20: f000 fc38 bl 8002394 <lookupLED>
8001b24: 4603 mov r3, r0
8001b26: 461d mov r5, r3
8001b28: 79fb ldrb r3, [r7, #7]
8001b2a: 4618 mov r0, r3
8001b2c: f7fe fcb2 bl 8000494 <__aeabi_i2d>
8001b30: f04f 0200 mov.w r2, #0
8001b34: 4b4f ldr r3, [pc, #316] ; (8001c74 <LEDDesign_Smile+0x404>)
8001b36: f7fe fd17 bl 8000568 <__aeabi_dmul>
8001b3a: 4603 mov r3, r0
8001b3c: 460c mov r4, r1
8001b3e: 4618 mov r0, r3
8001b40: 4621 mov r1, r4
8001b42: a349 add r3, pc, #292 ; (adr r3, 8001c68 <LEDDesign_Smile+0x3f8>)
8001b44: e9d3 2300 ldrd r2, r3, [r3]
8001b48: f7fe fb58 bl 80001fc <__adddf3>
8001b4c: 4603 mov r3, r0
8001b4e: 460c mov r4, r1
8001b50: 4618 mov r0, r3
8001b52: 4621 mov r1, r4
8001b54: f7fe ff1a bl 800098c <__aeabi_d2uiz>
8001b58: 4603 mov r3, r0
8001b5a: b2db uxtb r3, r3
8001b5c: 2200 movs r2, #0
8001b5e: 2100 movs r1, #0
8001b60: 4628 mov r0, r5
8001b62: f000 fd87 bl 8002674 <setLED>
setLED(lookupLED(2,3), 0x00, 0x00, currentSoundLevel);
8001b66: 2103 movs r1, #3
8001b68: 2002 movs r0, #2
8001b6a: f000 fc13 bl 8002394 <lookupLED>
8001b6e: 4603 mov r3, r0
8001b70: 4618 mov r0, r3
8001b72: 79fb ldrb r3, [r7, #7]
8001b74: 2200 movs r2, #0
8001b76: 2100 movs r1, #0
8001b78: f000 fd7c bl 8002674 <setLED>
setLED(lookupLED(2,4), 0x00, 0x00, currentSoundLevel);
8001b7c: 2104 movs r1, #4
8001b7e: 2002 movs r0, #2
8001b80: f000 fc08 bl 8002394 <lookupLED>
8001b84: 4603 mov r3, r0
8001b86: 4618 mov r0, r3
8001b88: 79fb ldrb r3, [r7, #7]
8001b8a: 2200 movs r2, #0
8001b8c: 2100 movs r1, #0
8001b8e: f000 fd71 bl 8002674 <setLED>
setLED(lookupLED(2,5), 0x00, 0x00, currentSoundLevel * 0.5);
8001b92: 2105 movs r1, #5
8001b94: 2002 movs r0, #2
8001b96: f000 fbfd bl 8002394 <lookupLED>
8001b9a: 4603 mov r3, r0
8001b9c: 461d mov r5, r3
8001b9e: 79fb ldrb r3, [r7, #7]
8001ba0: 4618 mov r0, r3
8001ba2: f7fe fc77 bl 8000494 <__aeabi_i2d>
8001ba6: f04f 0200 mov.w r2, #0
8001baa: 4b32 ldr r3, [pc, #200] ; (8001c74 <LEDDesign_Smile+0x404>)
8001bac: f7fe fcdc bl 8000568 <__aeabi_dmul>
8001bb0: 4603 mov r3, r0
8001bb2: 460c mov r4, r1
8001bb4: 4618 mov r0, r3
8001bb6: 4621 mov r1, r4
8001bb8: f7fe fee8 bl 800098c <__aeabi_d2uiz>
8001bbc: 4603 mov r3, r0
8001bbe: b2db uxtb r3, r3
8001bc0: 2200 movs r2, #0
8001bc2: 2100 movs r1, #0
8001bc4: 4628 mov r0, r5
8001bc6: f000 fd55 bl 8002674 <setLED>
setLED(lookupLED(2,6), 0x00, 0x00, 0x00);
8001bca: 2106 movs r1, #6
8001bcc: 2002 movs r0, #2
8001bce: f000 fbe1 bl 8002394 <lookupLED>
8001bd2: 4603 mov r3, r0
8001bd4: 4618 mov r0, r3
8001bd6: 2300 movs r3, #0
8001bd8: 2200 movs r2, #0
8001bda: 2100 movs r1, #0
8001bdc: f000 fd4a bl 8002674 <setLED>
setLED(lookupLED(2,7), 0x00, 0x00, 0x00);
8001be0: 2107 movs r1, #7
8001be2: 2002 movs r0, #2
8001be4: f000 fbd6 bl 8002394 <lookupLED>
8001be8: 4603 mov r3, r0
8001bea: 4618 mov r0, r3
8001bec: 2300 movs r3, #0
8001bee: 2200 movs r2, #0
8001bf0: 2100 movs r1, #0
8001bf2: f000 fd3f bl 8002674 <setLED>
setLED(lookupLED(3,0), 0x00, 0x00, currentSoundLevel * 0.25);
8001bf6: 2100 movs r1, #0
8001bf8: 2003 movs r0, #3
8001bfa: f000 fbcb bl 8002394 <lookupLED>
8001bfe: 4603 mov r3, r0
8001c00: 461d mov r5, r3
8001c02: 79fb ldrb r3, [r7, #7]
8001c04: 4618 mov r0, r3
8001c06: f7fe fc45 bl 8000494 <__aeabi_i2d>
8001c0a: f04f 0200 mov.w r2, #0
8001c0e: 4b18 ldr r3, [pc, #96] ; (8001c70 <LEDDesign_Smile+0x400>)
8001c10: f7fe fcaa bl 8000568 <__aeabi_dmul>
8001c14: 4603 mov r3, r0
8001c16: 460c mov r4, r1
8001c18: 4618 mov r0, r3
8001c1a: 4621 mov r1, r4
8001c1c: f7fe feb6 bl 800098c <__aeabi_d2uiz>
8001c20: 4603 mov r3, r0
8001c22: b2db uxtb r3, r3
8001c24: 2200 movs r2, #0
8001c26: 2100 movs r1, #0
8001c28: 4628 mov r0, r5
8001c2a: f000 fd23 bl 8002674 <setLED>
setLED(lookupLED(3,1), 0x00, 0x00, currentSoundLevel * 0.5);
8001c2e: 2101 movs r1, #1
8001c30: 2003 movs r0, #3
8001c32: f000 fbaf bl 8002394 <lookupLED>
8001c36: 4603 mov r3, r0
8001c38: 461d mov r5, r3
8001c3a: 79fb ldrb r3, [r7, #7]
8001c3c: 4618 mov r0, r3
8001c3e: f7fe fc29 bl 8000494 <__aeabi_i2d>
8001c42: f04f 0200 mov.w r2, #0
8001c46: 4b0b ldr r3, [pc, #44] ; (8001c74 <LEDDesign_Smile+0x404>)
8001c48: f7fe fc8e bl 8000568 <__aeabi_dmul>
8001c4c: 4603 mov r3, r0
8001c4e: 460c mov r4, r1
8001c50: 4618 mov r0, r3
8001c52: 4621 mov r1, r4
8001c54: f7fe fe9a bl 800098c <__aeabi_d2uiz>
8001c58: 4603 mov r3, r0
8001c5a: b2db uxtb r3, r3
8001c5c: 2200 movs r2, #0
8001c5e: 2100 movs r1, #0
8001c60: e00a b.n 8001c78 <LEDDesign_Smile+0x408>
8001c62: bf00 nop
8001c64: f3af 8000 nop.w
8001c68: 00000000 .word 0x00000000
8001c6c: 405fc000 .word 0x405fc000
8001c70: 3fd00000 .word 0x3fd00000
8001c74: 3fe00000 .word 0x3fe00000
8001c78: 4628 mov r0, r5
8001c7a: f000 fcfb bl 8002674 <setLED>
setLED(lookupLED(3,2), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
8001c7e: 2102 movs r1, #2
8001c80: 2003 movs r0, #3
8001c82: f000 fb87 bl 8002394 <lookupLED>
8001c86: 4603 mov r3, r0
8001c88: 461d mov r5, r3
8001c8a: 79fb ldrb r3, [r7, #7]
8001c8c: 4618 mov r0, r3
8001c8e: f7fe fc01 bl 8000494 <__aeabi_i2d>
8001c92: f04f 0200 mov.w r2, #0
8001c96: 4bea ldr r3, [pc, #936] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001c98: f7fe fc66 bl 8000568 <__aeabi_dmul>
8001c9c: 4603 mov r3, r0
8001c9e: 460c mov r4, r1
8001ca0: 4618 mov r0, r3
8001ca2: 4621 mov r1, r4
8001ca4: a3e4 add r3, pc, #912 ; (adr r3, 8002038 <LEDDesign_Smile+0x7c8>)
8001ca6: e9d3 2300 ldrd r2, r3, [r3]
8001caa: f7fe faa7 bl 80001fc <__adddf3>
8001cae: 4603 mov r3, r0
8001cb0: 460c mov r4, r1
8001cb2: 4618 mov r0, r3
8001cb4: 4621 mov r1, r4
8001cb6: f7fe fe69 bl 800098c <__aeabi_d2uiz>
8001cba: 4603 mov r3, r0
8001cbc: b2db uxtb r3, r3
8001cbe: 2200 movs r2, #0
8001cc0: 2100 movs r1, #0
8001cc2: 4628 mov r0, r5
8001cc4: f000 fcd6 bl 8002674 <setLED>
setLED(lookupLED(3,3), 0x00, 0x00, currentSoundLevel);
8001cc8: 2103 movs r1, #3
8001cca: 2003 movs r0, #3
8001ccc: f000 fb62 bl 8002394 <lookupLED>
8001cd0: 4603 mov r3, r0
8001cd2: 4618 mov r0, r3
8001cd4: 79fb ldrb r3, [r7, #7]
8001cd6: 2200 movs r2, #0
8001cd8: 2100 movs r1, #0
8001cda: f000 fccb bl 8002674 <setLED>
setLED(lookupLED(3,4), 0x00, 0x00, currentSoundLevel);
8001cde: 2104 movs r1, #4
8001ce0: 2003 movs r0, #3
8001ce2: f000 fb57 bl 8002394 <lookupLED>
8001ce6: 4603 mov r3, r0
8001ce8: 4618 mov r0, r3
8001cea: 79fb ldrb r3, [r7, #7]
8001cec: 2200 movs r2, #0
8001cee: 2100 movs r1, #0
8001cf0: f000 fcc0 bl 8002674 <setLED>
setLED(lookupLED(3,5), 0x00, 0x00, currentSoundLevel * 0.5);
8001cf4: 2105 movs r1, #5
8001cf6: 2003 movs r0, #3
8001cf8: f000 fb4c bl 8002394 <lookupLED>
8001cfc: 4603 mov r3, r0
8001cfe: 461d mov r5, r3
8001d00: 79fb ldrb r3, [r7, #7]
8001d02: 4618 mov r0, r3
8001d04: f7fe fbc6 bl 8000494 <__aeabi_i2d>
8001d08: f04f 0200 mov.w r2, #0
8001d0c: 4bcc ldr r3, [pc, #816] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001d0e: f7fe fc2b bl 8000568 <__aeabi_dmul>
8001d12: 4603 mov r3, r0
8001d14: 460c mov r4, r1
8001d16: 4618 mov r0, r3
8001d18: 4621 mov r1, r4
8001d1a: f7fe fe37 bl 800098c <__aeabi_d2uiz>
8001d1e: 4603 mov r3, r0
8001d20: b2db uxtb r3, r3
8001d22: 2200 movs r2, #0
8001d24: 2100 movs r1, #0
8001d26: 4628 mov r0, r5
8001d28: f000 fca4 bl 8002674 <setLED>
setLED(lookupLED(3,6), 0x00, 0x00, currentSoundLevel * 0.25);
8001d2c: 2106 movs r1, #6
8001d2e: 2003 movs r0, #3
8001d30: f000 fb30 bl 8002394 <lookupLED>
8001d34: 4603 mov r3, r0
8001d36: 461d mov r5, r3
8001d38: 79fb ldrb r3, [r7, #7]
8001d3a: 4618 mov r0, r3
8001d3c: f7fe fbaa bl 8000494 <__aeabi_i2d>
8001d40: f04f 0200 mov.w r2, #0
8001d44: 4bbf ldr r3, [pc, #764] ; (8002044 <LEDDesign_Smile+0x7d4>)
8001d46: f7fe fc0f bl 8000568 <__aeabi_dmul>
8001d4a: 4603 mov r3, r0
8001d4c: 460c mov r4, r1
8001d4e: 4618 mov r0, r3
8001d50: 4621 mov r1, r4
8001d52: f7fe fe1b bl 800098c <__aeabi_d2uiz>
8001d56: 4603 mov r3, r0
8001d58: b2db uxtb r3, r3
8001d5a: 2200 movs r2, #0
8001d5c: 2100 movs r1, #0
8001d5e: 4628 mov r0, r5
8001d60: f000 fc88 bl 8002674 <setLED>
setLED(lookupLED(3,7), 0x00, 0x00, 0x00);
8001d64: 2107 movs r1, #7
8001d66: 2003 movs r0, #3
8001d68: f000 fb14 bl 8002394 <lookupLED>
8001d6c: 4603 mov r3, r0
8001d6e: 4618 mov r0, r3
8001d70: 2300 movs r3, #0
8001d72: 2200 movs r2, #0
8001d74: 2100 movs r1, #0
8001d76: f000 fc7d bl 8002674 <setLED>
setLED(lookupLED(4,0), 0x00, 0x00, currentSoundLevel * 0.25);
8001d7a: 2100 movs r1, #0
8001d7c: 2004 movs r0, #4
8001d7e: f000 fb09 bl 8002394 <lookupLED>
8001d82: 4603 mov r3, r0
8001d84: 461d mov r5, r3
8001d86: 79fb ldrb r3, [r7, #7]
8001d88: 4618 mov r0, r3
8001d8a: f7fe fb83 bl 8000494 <__aeabi_i2d>
8001d8e: f04f 0200 mov.w r2, #0
8001d92: 4bac ldr r3, [pc, #688] ; (8002044 <LEDDesign_Smile+0x7d4>)
8001d94: f7fe fbe8 bl 8000568 <__aeabi_dmul>
8001d98: 4603 mov r3, r0
8001d9a: 460c mov r4, r1
8001d9c: 4618 mov r0, r3
8001d9e: 4621 mov r1, r4
8001da0: f7fe fdf4 bl 800098c <__aeabi_d2uiz>
8001da4: 4603 mov r3, r0
8001da6: b2db uxtb r3, r3
8001da8: 2200 movs r2, #0
8001daa: 2100 movs r1, #0
8001dac: 4628 mov r0, r5
8001dae: f000 fc61 bl 8002674 <setLED>
setLED(lookupLED(4,1), 0x00, 0x00, currentSoundLevel * 0.5);
8001db2: 2101 movs r1, #1
8001db4: 2004 movs r0, #4
8001db6: f000 faed bl 8002394 <lookupLED>
8001dba: 4603 mov r3, r0
8001dbc: 461d mov r5, r3
8001dbe: 79fb ldrb r3, [r7, #7]
8001dc0: 4618 mov r0, r3
8001dc2: f7fe fb67 bl 8000494 <__aeabi_i2d>
8001dc6: f04f 0200 mov.w r2, #0
8001dca: 4b9d ldr r3, [pc, #628] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001dcc: f7fe fbcc bl 8000568 <__aeabi_dmul>
8001dd0: 4603 mov r3, r0
8001dd2: 460c mov r4, r1
8001dd4: 4618 mov r0, r3
8001dd6: 4621 mov r1, r4
8001dd8: f7fe fdd8 bl 800098c <__aeabi_d2uiz>
8001ddc: 4603 mov r3, r0
8001dde: b2db uxtb r3, r3
8001de0: 2200 movs r2, #0
8001de2: 2100 movs r1, #0
8001de4: 4628 mov r0, r5
8001de6: f000 fc45 bl 8002674 <setLED>
setLED(lookupLED(4,2), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
8001dea: 2102 movs r1, #2
8001dec: 2004 movs r0, #4
8001dee: f000 fad1 bl 8002394 <lookupLED>
8001df2: 4603 mov r3, r0
8001df4: 461d mov r5, r3
8001df6: 79fb ldrb r3, [r7, #7]
8001df8: 4618 mov r0, r3
8001dfa: f7fe fb4b bl 8000494 <__aeabi_i2d>
8001dfe: f04f 0200 mov.w r2, #0
8001e02: 4b8f ldr r3, [pc, #572] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001e04: f7fe fbb0 bl 8000568 <__aeabi_dmul>
8001e08: 4603 mov r3, r0
8001e0a: 460c mov r4, r1
8001e0c: 4618 mov r0, r3
8001e0e: 4621 mov r1, r4
8001e10: a389 add r3, pc, #548 ; (adr r3, 8002038 <LEDDesign_Smile+0x7c8>)
8001e12: e9d3 2300 ldrd r2, r3, [r3]
8001e16: f7fe f9f1 bl 80001fc <__adddf3>
8001e1a: 4603 mov r3, r0
8001e1c: 460c mov r4, r1
8001e1e: 4618 mov r0, r3
8001e20: 4621 mov r1, r4
8001e22: f7fe fdb3 bl 800098c <__aeabi_d2uiz>
8001e26: 4603 mov r3, r0
8001e28: b2db uxtb r3, r3
8001e2a: 2200 movs r2, #0
8001e2c: 2100 movs r1, #0
8001e2e: 4628 mov r0, r5
8001e30: f000 fc20 bl 8002674 <setLED>
setLED(lookupLED(4,3), 0x00, 0x00, currentSoundLevel);
8001e34: 2103 movs r1, #3
8001e36: 2004 movs r0, #4
8001e38: f000 faac bl 8002394 <lookupLED>
8001e3c: 4603 mov r3, r0
8001e3e: 4618 mov r0, r3
8001e40: 79fb ldrb r3, [r7, #7]
8001e42: 2200 movs r2, #0
8001e44: 2100 movs r1, #0
8001e46: f000 fc15 bl 8002674 <setLED>
setLED(lookupLED(4,4), 0x00, 0x00, currentSoundLevel);
8001e4a: 2104 movs r1, #4
8001e4c: 2004 movs r0, #4
8001e4e: f000 faa1 bl 8002394 <lookupLED>
8001e52: 4603 mov r3, r0
8001e54: 4618 mov r0, r3
8001e56: 79fb ldrb r3, [r7, #7]
8001e58: 2200 movs r2, #0
8001e5a: 2100 movs r1, #0
8001e5c: f000 fc0a bl 8002674 <setLED>
setLED(lookupLED(4,5), 0x00, 0x00, currentSoundLevel * 0.5);
8001e60: 2105 movs r1, #5
8001e62: 2004 movs r0, #4
8001e64: f000 fa96 bl 8002394 <lookupLED>
8001e68: 4603 mov r3, r0
8001e6a: 461d mov r5, r3
8001e6c: 79fb ldrb r3, [r7, #7]
8001e6e: 4618 mov r0, r3
8001e70: f7fe fb10 bl 8000494 <__aeabi_i2d>
8001e74: f04f 0200 mov.w r2, #0
8001e78: 4b71 ldr r3, [pc, #452] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001e7a: f7fe fb75 bl 8000568 <__aeabi_dmul>
8001e7e: 4603 mov r3, r0
8001e80: 460c mov r4, r1
8001e82: 4618 mov r0, r3
8001e84: 4621 mov r1, r4
8001e86: f7fe fd81 bl 800098c <__aeabi_d2uiz>
8001e8a: 4603 mov r3, r0
8001e8c: b2db uxtb r3, r3
8001e8e: 2200 movs r2, #0
8001e90: 2100 movs r1, #0
8001e92: 4628 mov r0, r5
8001e94: f000 fbee bl 8002674 <setLED>
setLED(lookupLED(4,6), 0x00, 0x00, currentSoundLevel * 0.25);
8001e98: 2106 movs r1, #6
8001e9a: 2004 movs r0, #4
8001e9c: f000 fa7a bl 8002394 <lookupLED>
8001ea0: 4603 mov r3, r0
8001ea2: 461d mov r5, r3
8001ea4: 79fb ldrb r3, [r7, #7]
8001ea6: 4618 mov r0, r3
8001ea8: f7fe faf4 bl 8000494 <__aeabi_i2d>
8001eac: f04f 0200 mov.w r2, #0
8001eb0: 4b64 ldr r3, [pc, #400] ; (8002044 <LEDDesign_Smile+0x7d4>)
8001eb2: f7fe fb59 bl 8000568 <__aeabi_dmul>
8001eb6: 4603 mov r3, r0
8001eb8: 460c mov r4, r1
8001eba: 4618 mov r0, r3
8001ebc: 4621 mov r1, r4
8001ebe: f7fe fd65 bl 800098c <__aeabi_d2uiz>
8001ec2: 4603 mov r3, r0
8001ec4: b2db uxtb r3, r3
8001ec6: 2200 movs r2, #0
8001ec8: 2100 movs r1, #0
8001eca: 4628 mov r0, r5
8001ecc: f000 fbd2 bl 8002674 <setLED>
setLED(lookupLED(4,7), 0x00, 0x00, 0x00);
8001ed0: 2107 movs r1, #7
8001ed2: 2004 movs r0, #4
8001ed4: f000 fa5e bl 8002394 <lookupLED>
8001ed8: 4603 mov r3, r0
8001eda: 4618 mov r0, r3
8001edc: 2300 movs r3, #0
8001ede: 2200 movs r2, #0
8001ee0: 2100 movs r1, #0
8001ee2: f000 fbc7 bl 8002674 <setLED>
setLED(lookupLED(5,0), 0x00, 0x00, 0x00);
8001ee6: 2100 movs r1, #0
8001ee8: 2005 movs r0, #5
8001eea: f000 fa53 bl 8002394 <lookupLED>
8001eee: 4603 mov r3, r0
8001ef0: 4618 mov r0, r3
8001ef2: 2300 movs r3, #0
8001ef4: 2200 movs r2, #0
8001ef6: 2100 movs r1, #0
8001ef8: f000 fbbc bl 8002674 <setLED>
setLED(lookupLED(5,1), 0x00, 0x00, currentSoundLevel * 0.5);
8001efc: 2101 movs r1, #1
8001efe: 2005 movs r0, #5
8001f00: f000 fa48 bl 8002394 <lookupLED>
8001f04: 4603 mov r3, r0
8001f06: 461d mov r5, r3
8001f08: 79fb ldrb r3, [r7, #7]
8001f0a: 4618 mov r0, r3
8001f0c: f7fe fac2 bl 8000494 <__aeabi_i2d>
8001f10: f04f 0200 mov.w r2, #0
8001f14: 4b4a ldr r3, [pc, #296] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001f16: f7fe fb27 bl 8000568 <__aeabi_dmul>
8001f1a: 4603 mov r3, r0
8001f1c: 460c mov r4, r1
8001f1e: 4618 mov r0, r3
8001f20: 4621 mov r1, r4
8001f22: f7fe fd33 bl 800098c <__aeabi_d2uiz>
8001f26: 4603 mov r3, r0
8001f28: b2db uxtb r3, r3
8001f2a: 2200 movs r2, #0
8001f2c: 2100 movs r1, #0
8001f2e: 4628 mov r0, r5
8001f30: f000 fba0 bl 8002674 <setLED>
setLED(lookupLED(5,2), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
8001f34: 2102 movs r1, #2
8001f36: 2005 movs r0, #5
8001f38: f000 fa2c bl 8002394 <lookupLED>
8001f3c: 4603 mov r3, r0
8001f3e: 461d mov r5, r3
8001f40: 79fb ldrb r3, [r7, #7]
8001f42: 4618 mov r0, r3
8001f44: f7fe faa6 bl 8000494 <__aeabi_i2d>
8001f48: f04f 0200 mov.w r2, #0
8001f4c: 4b3c ldr r3, [pc, #240] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001f4e: f7fe fb0b bl 8000568 <__aeabi_dmul>
8001f52: 4603 mov r3, r0
8001f54: 460c mov r4, r1
8001f56: 4618 mov r0, r3
8001f58: 4621 mov r1, r4
8001f5a: a337 add r3, pc, #220 ; (adr r3, 8002038 <LEDDesign_Smile+0x7c8>)
8001f5c: e9d3 2300 ldrd r2, r3, [r3]
8001f60: f7fe f94c bl 80001fc <__adddf3>
8001f64: 4603 mov r3, r0
8001f66: 460c mov r4, r1
8001f68: 4618 mov r0, r3
8001f6a: 4621 mov r1, r4
8001f6c: f7fe fd0e bl 800098c <__aeabi_d2uiz>
8001f70: 4603 mov r3, r0
8001f72: b2db uxtb r3, r3
8001f74: 2200 movs r2, #0
8001f76: 2100 movs r1, #0
8001f78: 4628 mov r0, r5
8001f7a: f000 fb7b bl 8002674 <setLED>
setLED(lookupLED(5,3), 0x00, 0x00, currentSoundLevel);
8001f7e: 2103 movs r1, #3
8001f80: 2005 movs r0, #5
8001f82: f000 fa07 bl 8002394 <lookupLED>
8001f86: 4603 mov r3, r0
8001f88: 4618 mov r0, r3
8001f8a: 79fb ldrb r3, [r7, #7]
8001f8c: 2200 movs r2, #0
8001f8e: 2100 movs r1, #0
8001f90: f000 fb70 bl 8002674 <setLED>
setLED(lookupLED(5,4), 0x00, 0x00, currentSoundLevel);
8001f94: 2104 movs r1, #4
8001f96: 2005 movs r0, #5
8001f98: f000 f9fc bl 8002394 <lookupLED>
8001f9c: 4603 mov r3, r0
8001f9e: 4618 mov r0, r3
8001fa0: 79fb ldrb r3, [r7, #7]
8001fa2: 2200 movs r2, #0
8001fa4: 2100 movs r1, #0
8001fa6: f000 fb65 bl 8002674 <setLED>
setLED(lookupLED(5,5), 0x00, 0x00, currentSoundLevel * 0.5);
8001faa: 2105 movs r1, #5
8001fac: 2005 movs r0, #5
8001fae: f000 f9f1 bl 8002394 <lookupLED>
8001fb2: 4603 mov r3, r0
8001fb4: 461d mov r5, r3
8001fb6: 79fb ldrb r3, [r7, #7]
8001fb8: 4618 mov r0, r3
8001fba: f7fe fa6b bl 8000494 <__aeabi_i2d>
8001fbe: f04f 0200 mov.w r2, #0
8001fc2: 4b1f ldr r3, [pc, #124] ; (8002040 <LEDDesign_Smile+0x7d0>)
8001fc4: f7fe fad0 bl 8000568 <__aeabi_dmul>
8001fc8: 4603 mov r3, r0
8001fca: 460c mov r4, r1
8001fcc: 4618 mov r0, r3
8001fce: 4621 mov r1, r4
8001fd0: f7fe fcdc bl 800098c <__aeabi_d2uiz>
8001fd4: 4603 mov r3, r0
8001fd6: b2db uxtb r3, r3
8001fd8: 2200 movs r2, #0
8001fda: 2100 movs r1, #0
8001fdc: 4628 mov r0, r5
8001fde: f000 fb49 bl 8002674 <setLED>
setLED(lookupLED(5,6), 0x00, 0x00, 0x00);
8001fe2: 2106 movs r1, #6
8001fe4: 2005 movs r0, #5
8001fe6: f000 f9d5 bl 8002394 <lookupLED>
8001fea: 4603 mov r3, r0
8001fec: 4618 mov r0, r3
8001fee: 2300 movs r3, #0
8001ff0: 2200 movs r2, #0
8001ff2: 2100 movs r1, #0
8001ff4: f000 fb3e bl 8002674 <setLED>
setLED(lookupLED(5,7), 0x00, 0x00, 0x00);
8001ff8: 2107 movs r1, #7
8001ffa: 2005 movs r0, #5
8001ffc: f000 f9ca bl 8002394 <lookupLED>
8002000: 4603 mov r3, r0
8002002: 4618 mov r0, r3
8002004: 2300 movs r3, #0
8002006: 2200 movs r2, #0
8002008: 2100 movs r1, #0
800200a: f000 fb33 bl 8002674 <setLED>
setLED(lookupLED(6,0), 0x00, 0x00, 0x00);
800200e: 2100 movs r1, #0
8002010: 2006 movs r0, #6
8002012: f000 f9bf bl 8002394 <lookupLED>
8002016: 4603 mov r3, r0
8002018: 4618 mov r0, r3
800201a: 2300 movs r3, #0
800201c: 2200 movs r2, #0
800201e: 2100 movs r1, #0
8002020: f000 fb28 bl 8002674 <setLED>
setLED(lookupLED(6,1), 0x00, 0x00, currentSoundLevel * 0.5);
8002024: 2101 movs r1, #1
8002026: 2006 movs r0, #6
8002028: f000 f9b4 bl 8002394 <lookupLED>
800202c: 4603 mov r3, r0
800202e: 461d mov r5, r3
8002030: e00a b.n 8002048 <LEDDesign_Smile+0x7d8>
8002032: bf00 nop
8002034: f3af 8000 nop.w
8002038: 00000000 .word 0x00000000
800203c: 405fc000 .word 0x405fc000
8002040: 3fe00000 .word 0x3fe00000
8002044: 3fd00000 .word 0x3fd00000
8002048: 79fb ldrb r3, [r7, #7]
800204a: 4618 mov r0, r3
800204c: f7fe fa22 bl 8000494 <__aeabi_i2d>
8002050: f04f 0200 mov.w r2, #0
8002054: 4b8c ldr r3, [pc, #560] ; (8002288 <LEDDesign_Smile+0xa18>)
8002056: f7fe fa87 bl 8000568 <__aeabi_dmul>
800205a: 4603 mov r3, r0
800205c: 460c mov r4, r1
800205e: 4618 mov r0, r3
8002060: 4621 mov r1, r4
8002062: f7fe fc93 bl 800098c <__aeabi_d2uiz>
8002066: 4603 mov r3, r0
8002068: b2db uxtb r3, r3
800206a: 2200 movs r2, #0
800206c: 2100 movs r1, #0
800206e: 4628 mov r0, r5
8002070: f000 fb00 bl 8002674 <setLED>
setLED(lookupLED(6,2), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
8002074: 2102 movs r1, #2
8002076: 2006 movs r0, #6
8002078: f000 f98c bl 8002394 <lookupLED>
800207c: 4603 mov r3, r0
800207e: 461d mov r5, r3
8002080: 79fb ldrb r3, [r7, #7]
8002082: 4618 mov r0, r3
8002084: f7fe fa06 bl 8000494 <__aeabi_i2d>
8002088: f04f 0200 mov.w r2, #0
800208c: 4b7e ldr r3, [pc, #504] ; (8002288 <LEDDesign_Smile+0xa18>)
800208e: f7fe fa6b bl 8000568 <__aeabi_dmul>
8002092: 4603 mov r3, r0
8002094: 460c mov r4, r1
8002096: 4618 mov r0, r3
8002098: 4621 mov r1, r4
800209a: a379 add r3, pc, #484 ; (adr r3, 8002280 <LEDDesign_Smile+0xa10>)
800209c: e9d3 2300 ldrd r2, r3, [r3]
80020a0: f7fe f8ac bl 80001fc <__adddf3>
80020a4: 4603 mov r3, r0
80020a6: 460c mov r4, r1
80020a8: 4618 mov r0, r3
80020aa: 4621 mov r1, r4
80020ac: f7fe fc6e bl 800098c <__aeabi_d2uiz>
80020b0: 4603 mov r3, r0
80020b2: b2db uxtb r3, r3
80020b4: 2200 movs r2, #0
80020b6: 2100 movs r1, #0
80020b8: 4628 mov r0, r5
80020ba: f000 fadb bl 8002674 <setLED>
setLED(lookupLED(6,3), 0x00, 0x00, currentSoundLevel);
80020be: 2103 movs r1, #3
80020c0: 2006 movs r0, #6
80020c2: f000 f967 bl 8002394 <lookupLED>
80020c6: 4603 mov r3, r0
80020c8: 4618 mov r0, r3
80020ca: 79fb ldrb r3, [r7, #7]
80020cc: 2200 movs r2, #0
80020ce: 2100 movs r1, #0
80020d0: f000 fad0 bl 8002674 <setLED>
setLED(lookupLED(6,4), 0x00, 0x00, currentSoundLevel);
80020d4: 2104 movs r1, #4
80020d6: 2006 movs r0, #6
80020d8: f000 f95c bl 8002394 <lookupLED>
80020dc: 4603 mov r3, r0
80020de: 4618 mov r0, r3
80020e0: 79fb ldrb r3, [r7, #7]
80020e2: 2200 movs r2, #0
80020e4: 2100 movs r1, #0
80020e6: f000 fac5 bl 8002674 <setLED>
setLED(lookupLED(6,5), 0x00, 0x00, currentSoundLevel * 0.5);
80020ea: 2105 movs r1, #5
80020ec: 2006 movs r0, #6
80020ee: f000 f951 bl 8002394 <lookupLED>
80020f2: 4603 mov r3, r0
80020f4: 461d mov r5, r3
80020f6: 79fb ldrb r3, [r7, #7]
80020f8: 4618 mov r0, r3
80020fa: f7fe f9cb bl 8000494 <__aeabi_i2d>
80020fe: f04f 0200 mov.w r2, #0
8002102: 4b61 ldr r3, [pc, #388] ; (8002288 <LEDDesign_Smile+0xa18>)
8002104: f7fe fa30 bl 8000568 <__aeabi_dmul>
8002108: 4603 mov r3, r0
800210a: 460c mov r4, r1
800210c: 4618 mov r0, r3
800210e: 4621 mov r1, r4
8002110: f7fe fc3c bl 800098c <__aeabi_d2uiz>
8002114: 4603 mov r3, r0
8002116: b2db uxtb r3, r3
8002118: 2200 movs r2, #0
800211a: 2100 movs r1, #0
800211c: 4628 mov r0, r5
800211e: f000 faa9 bl 8002674 <setLED>
setLED(lookupLED(6,6), 0x00, 0x00, 0x00);
8002122: 2106 movs r1, #6
8002124: 2006 movs r0, #6
8002126: f000 f935 bl 8002394 <lookupLED>
800212a: 4603 mov r3, r0
800212c: 4618 mov r0, r3
800212e: 2300 movs r3, #0
8002130: 2200 movs r2, #0
8002132: 2100 movs r1, #0
8002134: f000 fa9e bl 8002674 <setLED>
setLED(lookupLED(6,7), 0x00, 0x00, 0x00);
8002138: 2107 movs r1, #7
800213a: 2006 movs r0, #6
800213c: f000 f92a bl 8002394 <lookupLED>
8002140: 4603 mov r3, r0
8002142: 4618 mov r0, r3
8002144: 2300 movs r3, #0
8002146: 2200 movs r2, #0
8002148: 2100 movs r1, #0
800214a: f000 fa93 bl 8002674 <setLED>
setLED(lookupLED(7,0), 0x00, 0x00, 0x00);
800214e: 2100 movs r1, #0
8002150: 2007 movs r0, #7
8002152: f000 f91f bl 8002394 <lookupLED>
8002156: 4603 mov r3, r0
8002158: 4618 mov r0, r3
800215a: 2300 movs r3, #0
800215c: 2200 movs r2, #0
800215e: 2100 movs r1, #0
8002160: f000 fa88 bl 8002674 <setLED>
setLED(lookupLED(7,1), 0x00, 0x00, 0x00);
8002164: 2101 movs r1, #1
8002166: 2007 movs r0, #7
8002168: f000 f914 bl 8002394 <lookupLED>
800216c: 4603 mov r3, r0
800216e: 4618 mov r0, r3
8002170: 2300 movs r3, #0
8002172: 2200 movs r2, #0
8002174: 2100 movs r1, #0
8002176: f000 fa7d bl 8002674 <setLED>
setLED(lookupLED(7,2), 0x00, 0x00, currentSoundLevel * 0.25);
800217a: 2102 movs r1, #2
800217c: 2007 movs r0, #7
800217e: f000 f909 bl 8002394 <lookupLED>
8002182: 4603 mov r3, r0
8002184: 461d mov r5, r3
8002186: 79fb ldrb r3, [r7, #7]
8002188: 4618 mov r0, r3
800218a: f7fe f983 bl 8000494 <__aeabi_i2d>
800218e: f04f 0200 mov.w r2, #0
8002192: 4b3e ldr r3, [pc, #248] ; (800228c <LEDDesign_Smile+0xa1c>)
8002194: f7fe f9e8 bl 8000568 <__aeabi_dmul>
8002198: 4603 mov r3, r0
800219a: 460c mov r4, r1
800219c: 4618 mov r0, r3
800219e: 4621 mov r1, r4
80021a0: f7fe fbf4 bl 800098c <__aeabi_d2uiz>
80021a4: 4603 mov r3, r0
80021a6: b2db uxtb r3, r3
80021a8: 2200 movs r2, #0
80021aa: 2100 movs r1, #0
80021ac: 4628 mov r0, r5
80021ae: f000 fa61 bl 8002674 <setLED>
setLED(lookupLED(7,3), 0x00, 0x00, 0x7F + (currentSoundLevel * 0.5));
80021b2: 2103 movs r1, #3
80021b4: 2007 movs r0, #7
80021b6: f000 f8ed bl 8002394 <lookupLED>
80021ba: 4603 mov r3, r0
80021bc: 461d mov r5, r3
80021be: 79fb ldrb r3, [r7, #7]
80021c0: 4618 mov r0, r3
80021c2: f7fe f967 bl 8000494 <__aeabi_i2d>
80021c6: f04f 0200 mov.w r2, #0
80021ca: 4b2f ldr r3, [pc, #188] ; (8002288 <LEDDesign_Smile+0xa18>)
80021cc: f7fe f9cc bl 8000568 <__aeabi_dmul>
80021d0: 4603 mov r3, r0
80021d2: 460c mov r4, r1
80021d4: 4618 mov r0, r3
80021d6: 4621 mov r1, r4
80021d8: a329 add r3, pc, #164 ; (adr r3, 8002280 <LEDDesign_Smile+0xa10>)
80021da: e9d3 2300 ldrd r2, r3, [r3]
80021de: f7fe f80d bl 80001fc <__adddf3>
80021e2: 4603 mov r3, r0
80021e4: 460c mov r4, r1
80021e6: 4618 mov r0, r3
80021e8: 4621 mov r1, r4
80021ea: f7fe fbcf bl 800098c <__aeabi_d2uiz>
80021ee: 4603 mov r3, r0
80021f0: b2db uxtb r3, r3
80021f2: 2200 movs r2, #0
80021f4: 2100 movs r1, #0
80021f6: 4628 mov r0, r5
80021f8: f000 fa3c bl 8002674 <setLED>
setLED(lookupLED(7,4), 0x00, 0x00, currentSoundLevel * 0.25);
80021fc: 2104 movs r1, #4
80021fe: 2007 movs r0, #7
8002200: f000 f8c8 bl 8002394 <lookupLED>
8002204: 4603 mov r3, r0
8002206: 461d mov r5, r3
8002208: 79fb ldrb r3, [r7, #7]
800220a: 4618 mov r0, r3
800220c: f7fe f942 bl 8000494 <__aeabi_i2d>
8002210: f04f 0200 mov.w r2, #0
8002214: 4b1d ldr r3, [pc, #116] ; (800228c <LEDDesign_Smile+0xa1c>)
8002216: f7fe f9a7 bl 8000568 <__aeabi_dmul>
800221a: 4603 mov r3, r0
800221c: 460c mov r4, r1
800221e: 4618 mov r0, r3
8002220: 4621 mov r1, r4
8002222: f7fe fbb3 bl 800098c <__aeabi_d2uiz>
8002226: 4603 mov r3, r0
8002228: b2db uxtb r3, r3
800222a: 2200 movs r2, #0
800222c: 2100 movs r1, #0
800222e: 4628 mov r0, r5
8002230: f000 fa20 bl 8002674 <setLED>
setLED(lookupLED(7,5), 0x00, 0x00, 0x00);
8002234: 2105 movs r1, #5
8002236: 2007 movs r0, #7
8002238: f000 f8ac bl 8002394 <lookupLED>
800223c: 4603 mov r3, r0
800223e: 4618 mov r0, r3
8002240: 2300 movs r3, #0
8002242: 2200 movs r2, #0
8002244: 2100 movs r1, #0
8002246: f000 fa15 bl 8002674 <setLED>
setLED(lookupLED(7,6), 0x00, 0x00, 0x00);
800224a: 2106 movs r1, #6
800224c: 2007 movs r0, #7
800224e: f000 f8a1 bl 8002394 <lookupLED>
8002252: 4603 mov r3, r0
8002254: 4618 mov r0, r3
8002256: 2300 movs r3, #0
8002258: 2200 movs r2, #0
800225a: 2100 movs r1, #0
800225c: f000 fa0a bl 8002674 <setLED>
setLED(lookupLED(7,7), 0x00, 0x00, 0x00);
8002260: 2107 movs r1, #7
8002262: 2007 movs r0, #7
8002264: f000 f896 bl 8002394 <lookupLED>
8002268: 4603 mov r3, r0
800226a: 4618 mov r0, r3
800226c: 2300 movs r3, #0
800226e: 2200 movs r2, #0
8002270: 2100 movs r1, #0
8002272: f000 f9ff bl 8002674 <setLED>
}
8002276: bf00 nop
8002278: 3708 adds r7, #8
800227a: 46bd mov sp, r7
800227c: bdb0 pop {r4, r5, r7, pc}
800227e: bf00 nop
8002280: 00000000 .word 0x00000000
8002284: 405fc000 .word 0x405fc000
8002288: 3fe00000 .word 0x3fe00000
800228c: 3fd00000 .word 0x3fd00000
08002290 <LEDDesign_SuperCrazy>:
void LEDDesign_SuperCrazy(void){
8002290: b580 push {r7, lr}
8002292: b084 sub sp, #16
8002294: af00 add r7, sp, #0
HAL_Delay(50);
8002296: 2032 movs r0, #50 ; 0x32
8002298: f000 fe06 bl 8002ea8 <HAL_Delay>
uint8_t randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
800229c: f002 ffce bl 800523c <rand>
80022a0: ee07 0a90 vmov s15, r0
80022a4: eeb8 7ae7 vcvt.f32.s32 s14, s15
80022a8: eddf 6a37 vldr s13, [pc, #220] ; 8002388 <LEDDesign_SuperCrazy+0xf8>
80022ac: eec7 7a26 vdiv.f32 s15, s14, s13
80022b0: ed9f 7a36 vldr s14, [pc, #216] ; 800238c <LEDDesign_SuperCrazy+0xfc>
80022b4: ee67 7a87 vmul.f32 s15, s15, s14
80022b8: eefc 7ae7 vcvt.u32.f32 s15, s15
80022bc: edc7 7a01 vstr s15, [r7, #4]
80022c0: 793b ldrb r3, [r7, #4]
80022c2: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
80022c4: 2300 movs r3, #0
80022c6: 73fb strb r3, [r7, #15]
80022c8: e00a b.n 80022e0 <LEDDesign_SuperCrazy+0x50>
LEDData[i][0] = randomByte;
80022ca: 7bfa ldrb r2, [r7, #15]
80022cc: 4930 ldr r1, [pc, #192] ; (8002390 <LEDDesign_SuperCrazy+0x100>)
80022ce: 4613 mov r3, r2
80022d0: 005b lsls r3, r3, #1
80022d2: 4413 add r3, r2
80022d4: 440b add r3, r1
80022d6: 7b3a ldrb r2, [r7, #12]
80022d8: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80022da: 7bfb ldrb r3, [r7, #15]
80022dc: 3301 adds r3, #1
80022de: 73fb strb r3, [r7, #15]
80022e0: 7bfb ldrb r3, [r7, #15]
80022e2: 2b3f cmp r3, #63 ; 0x3f
80022e4: d9f1 bls.n 80022ca <LEDDesign_SuperCrazy+0x3a>
}
randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
80022e6: f002 ffa9 bl 800523c <rand>
80022ea: ee07 0a90 vmov s15, r0
80022ee: eeb8 7ae7 vcvt.f32.s32 s14, s15
80022f2: eddf 6a25 vldr s13, [pc, #148] ; 8002388 <LEDDesign_SuperCrazy+0xf8>
80022f6: eec7 7a26 vdiv.f32 s15, s14, s13
80022fa: ed9f 7a24 vldr s14, [pc, #144] ; 800238c <LEDDesign_SuperCrazy+0xfc>
80022fe: ee67 7a87 vmul.f32 s15, s15, s14
8002302: eefc 7ae7 vcvt.u32.f32 s15, s15
8002306: edc7 7a01 vstr s15, [r7, #4]
800230a: 793b ldrb r3, [r7, #4]
800230c: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
800230e: 2300 movs r3, #0
8002310: 73bb strb r3, [r7, #14]
8002312: e00b b.n 800232c <LEDDesign_SuperCrazy+0x9c>
LEDData[i][1] = randomByte;
8002314: 7bba ldrb r2, [r7, #14]
8002316: 491e ldr r1, [pc, #120] ; (8002390 <LEDDesign_SuperCrazy+0x100>)
8002318: 4613 mov r3, r2
800231a: 005b lsls r3, r3, #1
800231c: 4413 add r3, r2
800231e: 440b add r3, r1
8002320: 3301 adds r3, #1
8002322: 7b3a ldrb r2, [r7, #12]
8002324: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8002326: 7bbb ldrb r3, [r7, #14]
8002328: 3301 adds r3, #1
800232a: 73bb strb r3, [r7, #14]
800232c: 7bbb ldrb r3, [r7, #14]
800232e: 2b3f cmp r3, #63 ; 0x3f
8002330: d9f0 bls.n 8002314 <LEDDesign_SuperCrazy+0x84>
}
randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
8002332: f002 ff83 bl 800523c <rand>
8002336: ee07 0a90 vmov s15, r0
800233a: eeb8 7ae7 vcvt.f32.s32 s14, s15
800233e: eddf 6a12 vldr s13, [pc, #72] ; 8002388 <LEDDesign_SuperCrazy+0xf8>
8002342: eec7 7a26 vdiv.f32 s15, s14, s13
8002346: ed9f 7a11 vldr s14, [pc, #68] ; 800238c <LEDDesign_SuperCrazy+0xfc>
800234a: ee67 7a87 vmul.f32 s15, s15, s14
800234e: eefc 7ae7 vcvt.u32.f32 s15, s15
8002352: edc7 7a01 vstr s15, [r7, #4]
8002356: 793b ldrb r3, [r7, #4]
8002358: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
800235a: 2300 movs r3, #0
800235c: 737b strb r3, [r7, #13]
800235e: e00b b.n 8002378 <LEDDesign_SuperCrazy+0xe8>
LEDData[i][2] = randomByte;
8002360: 7b7a ldrb r2, [r7, #13]
8002362: 490b ldr r1, [pc, #44] ; (8002390 <LEDDesign_SuperCrazy+0x100>)
8002364: 4613 mov r3, r2
8002366: 005b lsls r3, r3, #1
8002368: 4413 add r3, r2
800236a: 440b add r3, r1
800236c: 3302 adds r3, #2
800236e: 7b3a ldrb r2, [r7, #12]
8002370: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8002372: 7b7b ldrb r3, [r7, #13]
8002374: 3301 adds r3, #1
8002376: 737b strb r3, [r7, #13]
8002378: 7b7b ldrb r3, [r7, #13]
800237a: 2b3f cmp r3, #63 ; 0x3f
800237c: d9f0 bls.n 8002360 <LEDDesign_SuperCrazy+0xd0>
}
}
800237e: bf00 nop
8002380: 3710 adds r7, #16
8002382: 46bd mov sp, r7
8002384: bd80 pop {r7, pc}
8002386: bf00 nop
8002388: 4f000000 .word 0x4f000000
800238c: 437f0000 .word 0x437f0000
8002390: 20000094 .word 0x20000094
08002394 <lookupLED>:
uint8_t lookupLED(uint8_t column, uint8_t row){
8002394: b480 push {r7}
8002396: b083 sub sp, #12
8002398: af00 add r7, sp, #0
800239a: 4603 mov r3, r0
800239c: 460a mov r2, r1
800239e: 71fb strb r3, [r7, #7]
80023a0: 4613 mov r3, r2
80023a2: 71bb strb r3, [r7, #6]
switch(column){
80023a4: 79fb ldrb r3, [r7, #7]
80023a6: 2b07 cmp r3, #7
80023a8: f200 815d bhi.w 8002666 <lookupLED+0x2d2>
80023ac: a201 add r2, pc, #4 ; (adr r2, 80023b4 <lookupLED+0x20>)
80023ae: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80023b2: bf00 nop
80023b4: 080023d5 .word 0x080023d5
80023b8: 08002425 .word 0x08002425
80023bc: 08002475 .word 0x08002475
80023c0: 080024c5 .word 0x080024c5
80023c4: 08002515 .word 0x08002515
80023c8: 08002565 .word 0x08002565
80023cc: 080025b1 .word 0x080025b1
80023d0: 080025fd .word 0x080025fd
case 0:
switch(row){
80023d4: 79bb ldrb r3, [r7, #6]
80023d6: 2b07 cmp r3, #7
80023d8: f200 8136 bhi.w 8002648 <lookupLED+0x2b4>
80023dc: a201 add r2, pc, #4 ; (adr r2, 80023e4 <lookupLED+0x50>)
80023de: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80023e2: bf00 nop
80023e4: 08002405 .word 0x08002405
80023e8: 08002409 .word 0x08002409
80023ec: 0800240d .word 0x0800240d
80023f0: 08002411 .word 0x08002411
80023f4: 08002415 .word 0x08002415
80023f8: 08002419 .word 0x08002419
80023fc: 0800241d .word 0x0800241d
8002400: 08002421 .word 0x08002421
case 0:
return 0;
8002404: 2300 movs r3, #0
8002406: e12f b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 15;
8002408: 230f movs r3, #15
800240a: e12d b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 16;
800240c: 2310 movs r3, #16
800240e: e12b b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 31;
8002410: 231f movs r3, #31
8002412: e129 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 32;
8002414: 2320 movs r3, #32
8002416: e127 b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 47;
8002418: 232f movs r3, #47 ; 0x2f
800241a: e125 b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 48;
800241c: 2330 movs r3, #48 ; 0x30
800241e: e123 b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 63;
8002420: 233f movs r3, #63 ; 0x3f
8002422: e121 b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 1:
switch(row){
8002424: 79bb ldrb r3, [r7, #6]
8002426: 2b07 cmp r3, #7
8002428: f200 8110 bhi.w 800264c <lookupLED+0x2b8>
800242c: a201 add r2, pc, #4 ; (adr r2, 8002434 <lookupLED+0xa0>)
800242e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002432: bf00 nop
8002434: 08002455 .word 0x08002455
8002438: 08002459 .word 0x08002459
800243c: 0800245d .word 0x0800245d
8002440: 08002461 .word 0x08002461
8002444: 08002465 .word 0x08002465
8002448: 08002469 .word 0x08002469
800244c: 0800246d .word 0x0800246d
8002450: 08002471 .word 0x08002471
case 0:
return 1;
8002454: 2301 movs r3, #1
8002456: e107 b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 14;
8002458: 230e movs r3, #14
800245a: e105 b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 17;
800245c: 2311 movs r3, #17
800245e: e103 b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 30;
8002460: 231e movs r3, #30
8002462: e101 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 33;
8002464: 2321 movs r3, #33 ; 0x21
8002466: e0ff b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 46;
8002468: 232e movs r3, #46 ; 0x2e
800246a: e0fd b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 49;
800246c: 2331 movs r3, #49 ; 0x31
800246e: e0fb b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 62;
8002470: 233e movs r3, #62 ; 0x3e
8002472: e0f9 b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 2:
switch(row){
8002474: 79bb ldrb r3, [r7, #6]
8002476: 2b07 cmp r3, #7
8002478: f200 80ea bhi.w 8002650 <lookupLED+0x2bc>
800247c: a201 add r2, pc, #4 ; (adr r2, 8002484 <lookupLED+0xf0>)
800247e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002482: bf00 nop
8002484: 080024a5 .word 0x080024a5
8002488: 080024a9 .word 0x080024a9
800248c: 080024ad .word 0x080024ad
8002490: 080024b1 .word 0x080024b1
8002494: 080024b5 .word 0x080024b5
8002498: 080024b9 .word 0x080024b9
800249c: 080024bd .word 0x080024bd
80024a0: 080024c1 .word 0x080024c1
case 0:
return 2;
80024a4: 2302 movs r3, #2
80024a6: e0df b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 13;
80024a8: 230d movs r3, #13
80024aa: e0dd b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 18;
80024ac: 2312 movs r3, #18
80024ae: e0db b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 29;
80024b0: 231d movs r3, #29
80024b2: e0d9 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 34;
80024b4: 2322 movs r3, #34 ; 0x22
80024b6: e0d7 b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 45;
80024b8: 232d movs r3, #45 ; 0x2d
80024ba: e0d5 b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 50;
80024bc: 2332 movs r3, #50 ; 0x32
80024be: e0d3 b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 61;
80024c0: 233d movs r3, #61 ; 0x3d
80024c2: e0d1 b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 3:
switch(row){
80024c4: 79bb ldrb r3, [r7, #6]
80024c6: 2b07 cmp r3, #7
80024c8: f200 80c4 bhi.w 8002654 <lookupLED+0x2c0>
80024cc: a201 add r2, pc, #4 ; (adr r2, 80024d4 <lookupLED+0x140>)
80024ce: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80024d2: bf00 nop
80024d4: 080024f5 .word 0x080024f5
80024d8: 080024f9 .word 0x080024f9
80024dc: 080024fd .word 0x080024fd
80024e0: 08002501 .word 0x08002501
80024e4: 08002505 .word 0x08002505
80024e8: 08002509 .word 0x08002509
80024ec: 0800250d .word 0x0800250d
80024f0: 08002511 .word 0x08002511
case 0:
return 3;
80024f4: 2303 movs r3, #3
80024f6: e0b7 b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 12;
80024f8: 230c movs r3, #12
80024fa: e0b5 b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 19;
80024fc: 2313 movs r3, #19
80024fe: e0b3 b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 28;
8002500: 231c movs r3, #28
8002502: e0b1 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 35;
8002504: 2323 movs r3, #35 ; 0x23
8002506: e0af b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 44;
8002508: 232c movs r3, #44 ; 0x2c
800250a: e0ad b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 51;
800250c: 2333 movs r3, #51 ; 0x33
800250e: e0ab b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 60;
8002510: 233c movs r3, #60 ; 0x3c
8002512: e0a9 b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 4:
switch(row){
8002514: 79bb ldrb r3, [r7, #6]
8002516: 2b07 cmp r3, #7
8002518: f200 809e bhi.w 8002658 <lookupLED+0x2c4>
800251c: a201 add r2, pc, #4 ; (adr r2, 8002524 <lookupLED+0x190>)
800251e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002522: bf00 nop
8002524: 08002545 .word 0x08002545
8002528: 08002549 .word 0x08002549
800252c: 0800254d .word 0x0800254d
8002530: 08002551 .word 0x08002551
8002534: 08002555 .word 0x08002555
8002538: 08002559 .word 0x08002559
800253c: 0800255d .word 0x0800255d
8002540: 08002561 .word 0x08002561
case 0:
return 4;
8002544: 2304 movs r3, #4
8002546: e08f b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 11;
8002548: 230b movs r3, #11
800254a: e08d b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 20;
800254c: 2314 movs r3, #20
800254e: e08b b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 27;
8002550: 231b movs r3, #27
8002552: e089 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 36;
8002554: 2324 movs r3, #36 ; 0x24
8002556: e087 b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 43;
8002558: 232b movs r3, #43 ; 0x2b
800255a: e085 b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 52;
800255c: 2334 movs r3, #52 ; 0x34
800255e: e083 b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 59;
8002560: 233b movs r3, #59 ; 0x3b
8002562: e081 b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 5:
switch(row){
8002564: 79bb ldrb r3, [r7, #6]
8002566: 2b07 cmp r3, #7
8002568: d878 bhi.n 800265c <lookupLED+0x2c8>
800256a: a201 add r2, pc, #4 ; (adr r2, 8002570 <lookupLED+0x1dc>)
800256c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002570: 08002591 .word 0x08002591
8002574: 08002595 .word 0x08002595
8002578: 08002599 .word 0x08002599
800257c: 0800259d .word 0x0800259d
8002580: 080025a1 .word 0x080025a1
8002584: 080025a5 .word 0x080025a5
8002588: 080025a9 .word 0x080025a9
800258c: 080025ad .word 0x080025ad
case 0:
return 5;
8002590: 2305 movs r3, #5
8002592: e069 b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 10;
8002594: 230a movs r3, #10
8002596: e067 b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 21;
8002598: 2315 movs r3, #21
800259a: e065 b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 26;
800259c: 231a movs r3, #26
800259e: e063 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 37;
80025a0: 2325 movs r3, #37 ; 0x25
80025a2: e061 b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 42;
80025a4: 232a movs r3, #42 ; 0x2a
80025a6: e05f b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 53;
80025a8: 2335 movs r3, #53 ; 0x35
80025aa: e05d b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 58;
80025ac: 233a movs r3, #58 ; 0x3a
80025ae: e05b b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 6:
switch(row){
80025b0: 79bb ldrb r3, [r7, #6]
80025b2: 2b07 cmp r3, #7
80025b4: d854 bhi.n 8002660 <lookupLED+0x2cc>
80025b6: a201 add r2, pc, #4 ; (adr r2, 80025bc <lookupLED+0x228>)
80025b8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80025bc: 080025dd .word 0x080025dd
80025c0: 080025e1 .word 0x080025e1
80025c4: 080025e5 .word 0x080025e5
80025c8: 080025e9 .word 0x080025e9
80025cc: 080025ed .word 0x080025ed
80025d0: 080025f1 .word 0x080025f1
80025d4: 080025f5 .word 0x080025f5
80025d8: 080025f9 .word 0x080025f9
case 0:
return 6;
80025dc: 2306 movs r3, #6
80025de: e043 b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 9;
80025e0: 2309 movs r3, #9
80025e2: e041 b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 22;
80025e4: 2316 movs r3, #22
80025e6: e03f b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 25;
80025e8: 2319 movs r3, #25
80025ea: e03d b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 38;
80025ec: 2326 movs r3, #38 ; 0x26
80025ee: e03b b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 41;
80025f0: 2329 movs r3, #41 ; 0x29
80025f2: e039 b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 54;
80025f4: 2336 movs r3, #54 ; 0x36
80025f6: e037 b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 57;
80025f8: 2339 movs r3, #57 ; 0x39
80025fa: e035 b.n 8002668 <lookupLED+0x2d4>
break;
}
break;
case 7:
switch(row){
80025fc: 79bb ldrb r3, [r7, #6]
80025fe: 2b07 cmp r3, #7
8002600: d830 bhi.n 8002664 <lookupLED+0x2d0>
8002602: a201 add r2, pc, #4 ; (adr r2, 8002608 <lookupLED+0x274>)
8002604: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002608: 08002629 .word 0x08002629
800260c: 0800262d .word 0x0800262d
8002610: 08002631 .word 0x08002631
8002614: 08002635 .word 0x08002635
8002618: 08002639 .word 0x08002639
800261c: 0800263d .word 0x0800263d
8002620: 08002641 .word 0x08002641
8002624: 08002645 .word 0x08002645
case 0:
return 7;
8002628: 2307 movs r3, #7
800262a: e01d b.n 8002668 <lookupLED+0x2d4>
break;
case 1:
return 8;
800262c: 2308 movs r3, #8
800262e: e01b b.n 8002668 <lookupLED+0x2d4>
break;
case 2:
return 23;
8002630: 2317 movs r3, #23
8002632: e019 b.n 8002668 <lookupLED+0x2d4>
break;
case 3:
return 24;
8002634: 2318 movs r3, #24
8002636: e017 b.n 8002668 <lookupLED+0x2d4>
break;
case 4:
return 39;
8002638: 2327 movs r3, #39 ; 0x27
800263a: e015 b.n 8002668 <lookupLED+0x2d4>
break;
case 5:
return 40;
800263c: 2328 movs r3, #40 ; 0x28
800263e: e013 b.n 8002668 <lookupLED+0x2d4>
break;
case 6:
return 55;
8002640: 2337 movs r3, #55 ; 0x37
8002642: e011 b.n 8002668 <lookupLED+0x2d4>
break;
case 7:
return 56;
8002644: 2338 movs r3, #56 ; 0x38
8002646: e00f b.n 8002668 <lookupLED+0x2d4>
break;
8002648: bf00 nop
800264a: e00c b.n 8002666 <lookupLED+0x2d2>
break;
800264c: bf00 nop
800264e: e00a b.n 8002666 <lookupLED+0x2d2>
break;
8002650: bf00 nop
8002652: e008 b.n 8002666 <lookupLED+0x2d2>
break;
8002654: bf00 nop
8002656: e006 b.n 8002666 <lookupLED+0x2d2>
break;
8002658: bf00 nop
800265a: e004 b.n 8002666 <lookupLED+0x2d2>
break;
800265c: bf00 nop
800265e: e002 b.n 8002666 <lookupLED+0x2d2>
break;
8002660: bf00 nop
8002662: e000 b.n 8002666 <lookupLED+0x2d2>
break;
}
break;
8002664: bf00 nop
}
return 0;
8002666: 2300 movs r3, #0
}
8002668: 4618 mov r0, r3
800266a: 370c adds r7, #12
800266c: 46bd mov sp, r7
800266e: f85d 7b04 ldr.w r7, [sp], #4
8002672: 4770 bx lr
08002674 <setLED>:
void setLED(uint8_t pixelNumber, uint8_t redLevel, uint8_t greenLevel, uint8_t blueLevel){
8002674: b490 push {r4, r7}
8002676: b082 sub sp, #8
8002678: af00 add r7, sp, #0
800267a: 4604 mov r4, r0
800267c: 4608 mov r0, r1
800267e: 4611 mov r1, r2
8002680: 461a mov r2, r3
8002682: 4623 mov r3, r4
8002684: 71fb strb r3, [r7, #7]
8002686: 4603 mov r3, r0
8002688: 71bb strb r3, [r7, #6]
800268a: 460b mov r3, r1
800268c: 717b strb r3, [r7, #5]
800268e: 4613 mov r3, r2
8002690: 713b strb r3, [r7, #4]
LEDData[pixelNumber][0] = greenLevel;
8002692: 79fa ldrb r2, [r7, #7]
8002694: 490e ldr r1, [pc, #56] ; (80026d0 <setLED+0x5c>)
8002696: 4613 mov r3, r2
8002698: 005b lsls r3, r3, #1
800269a: 4413 add r3, r2
800269c: 440b add r3, r1
800269e: 797a ldrb r2, [r7, #5]
80026a0: 701a strb r2, [r3, #0]
LEDData[pixelNumber][1] = redLevel;
80026a2: 79fa ldrb r2, [r7, #7]
80026a4: 490a ldr r1, [pc, #40] ; (80026d0 <setLED+0x5c>)
80026a6: 4613 mov r3, r2
80026a8: 005b lsls r3, r3, #1
80026aa: 4413 add r3, r2
80026ac: 440b add r3, r1
80026ae: 3301 adds r3, #1
80026b0: 79ba ldrb r2, [r7, #6]
80026b2: 701a strb r2, [r3, #0]
LEDData[pixelNumber][2] = blueLevel;
80026b4: 79fa ldrb r2, [r7, #7]
80026b6: 4906 ldr r1, [pc, #24] ; (80026d0 <setLED+0x5c>)
80026b8: 4613 mov r3, r2
80026ba: 005b lsls r3, r3, #1
80026bc: 4413 add r3, r2
80026be: 440b add r3, r1
80026c0: 3302 adds r3, #2
80026c2: 793a ldrb r2, [r7, #4]
80026c4: 701a strb r2, [r3, #0]
}
80026c6: bf00 nop
80026c8: 3708 adds r7, #8
80026ca: 46bd mov sp, r7
80026cc: bc90 pop {r4, r7}
80026ce: 4770 bx lr
80026d0: 20000094 .word 0x20000094
080026d4 <updateWS2812BData>:
void updateWS2812BData(void){
80026d4: b490 push {r4, r7}
80026d6: b082 sub sp, #8
80026d8: af00 add r7, sp, #0
uint8_t byteToConvert;
for (uint8_t i = 0; i < 64; ++i) {
80026da: 2300 movs r3, #0
80026dc: 71fb strb r3, [r7, #7]
80026de: e18b b.n 80029f8 <updateWS2812BData+0x324>
for (uint8_t j = 0; j < 3; ++j) {
80026e0: 2300 movs r3, #0
80026e2: 71bb strb r3, [r7, #6]
80026e4: e181 b.n 80029ea <updateWS2812BData+0x316>
byteToConvert = LEDData[i][j];
80026e6: 79fa ldrb r2, [r7, #7]
80026e8: 79b9 ldrb r1, [r7, #6]
80026ea: 488e ldr r0, [pc, #568] ; (8002924 <updateWS2812BData+0x250>)
80026ec: 4613 mov r3, r2
80026ee: 005b lsls r3, r3, #1
80026f0: 4413 add r3, r2
80026f2: 4403 add r3, r0
80026f4: 440b add r3, r1
80026f6: 781b ldrb r3, [r3, #0]
80026f8: 717b strb r3, [r7, #5]
switch((byteToConvert & 0xF0) >> 4){
80026fa: 797b ldrb r3, [r7, #5]
80026fc: 091b lsrs r3, r3, #4
80026fe: b2db uxtb r3, r3
8002700: 2b0e cmp r3, #14
8002702: d85d bhi.n 80027c0 <updateWS2812BData+0xec>
8002704: a201 add r2, pc, #4 ; (adr r2, 800270c <updateWS2812BData+0x38>)
8002706: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800270a: bf00 nop
800270c: 08002749 .word 0x08002749
8002710: 08002751 .word 0x08002751
8002714: 08002759 .word 0x08002759
8002718: 08002761 .word 0x08002761
800271c: 08002769 .word 0x08002769
8002720: 08002771 .word 0x08002771
8002724: 08002779 .word 0x08002779
8002728: 08002781 .word 0x08002781
800272c: 08002789 .word 0x08002789
8002730: 08002791 .word 0x08002791
8002734: 08002799 .word 0x08002799
8002738: 080027a1 .word 0x080027a1
800273c: 080027a9 .word 0x080027a9
8002740: 080027b1 .word 0x080027b1
8002744: 080027b9 .word 0x080027b9
case 0x00:
WS2812BConvertedData = 0x00924000;
8002748: 4b77 ldr r3, [pc, #476] ; (8002928 <updateWS2812BData+0x254>)
800274a: 4a78 ldr r2, [pc, #480] ; (800292c <updateWS2812BData+0x258>)
800274c: 601a str r2, [r3, #0]
break;
800274e: e03a b.n 80027c6 <updateWS2812BData+0xf2>
case 0x01:
WS2812BConvertedData = 0x00926000;
8002750: 4b75 ldr r3, [pc, #468] ; (8002928 <updateWS2812BData+0x254>)
8002752: 4a77 ldr r2, [pc, #476] ; (8002930 <updateWS2812BData+0x25c>)
8002754: 601a str r2, [r3, #0]
break;
8002756: e036 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x02:
WS2812BConvertedData = 0x00934000;
8002758: 4b73 ldr r3, [pc, #460] ; (8002928 <updateWS2812BData+0x254>)
800275a: 4a76 ldr r2, [pc, #472] ; (8002934 <updateWS2812BData+0x260>)
800275c: 601a str r2, [r3, #0]
break;
800275e: e032 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x03:
WS2812BConvertedData = 0x00936000;
8002760: 4b71 ldr r3, [pc, #452] ; (8002928 <updateWS2812BData+0x254>)
8002762: 4a75 ldr r2, [pc, #468] ; (8002938 <updateWS2812BData+0x264>)
8002764: 601a str r2, [r3, #0]
break;
8002766: e02e b.n 80027c6 <updateWS2812BData+0xf2>
case 0x04:
WS2812BConvertedData = 0x009A4000;
8002768: 4b6f ldr r3, [pc, #444] ; (8002928 <updateWS2812BData+0x254>)
800276a: 4a74 ldr r2, [pc, #464] ; (800293c <updateWS2812BData+0x268>)
800276c: 601a str r2, [r3, #0]
break;
800276e: e02a b.n 80027c6 <updateWS2812BData+0xf2>
case 0x05:
WS2812BConvertedData = 0x009A6000;
8002770: 4b6d ldr r3, [pc, #436] ; (8002928 <updateWS2812BData+0x254>)
8002772: 4a73 ldr r2, [pc, #460] ; (8002940 <updateWS2812BData+0x26c>)
8002774: 601a str r2, [r3, #0]
break;
8002776: e026 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x06:
WS2812BConvertedData = 0x009B4000;
8002778: 4b6b ldr r3, [pc, #428] ; (8002928 <updateWS2812BData+0x254>)
800277a: 4a72 ldr r2, [pc, #456] ; (8002944 <updateWS2812BData+0x270>)
800277c: 601a str r2, [r3, #0]
break;
800277e: e022 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x07:
WS2812BConvertedData = 0x009B6000;
8002780: 4b69 ldr r3, [pc, #420] ; (8002928 <updateWS2812BData+0x254>)
8002782: 4a71 ldr r2, [pc, #452] ; (8002948 <updateWS2812BData+0x274>)
8002784: 601a str r2, [r3, #0]
break;
8002786: e01e b.n 80027c6 <updateWS2812BData+0xf2>
case 0x08:
WS2812BConvertedData = 0x00D24000;
8002788: 4b67 ldr r3, [pc, #412] ; (8002928 <updateWS2812BData+0x254>)
800278a: 4a70 ldr r2, [pc, #448] ; (800294c <updateWS2812BData+0x278>)
800278c: 601a str r2, [r3, #0]
break;
800278e: e01a b.n 80027c6 <updateWS2812BData+0xf2>
case 0x09:
WS2812BConvertedData = 0x00D26000;
8002790: 4b65 ldr r3, [pc, #404] ; (8002928 <updateWS2812BData+0x254>)
8002792: 4a6f ldr r2, [pc, #444] ; (8002950 <updateWS2812BData+0x27c>)
8002794: 601a str r2, [r3, #0]
break;
8002796: e016 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x0A:
WS2812BConvertedData = 0x00D34000;
8002798: 4b63 ldr r3, [pc, #396] ; (8002928 <updateWS2812BData+0x254>)
800279a: 4a6e ldr r2, [pc, #440] ; (8002954 <updateWS2812BData+0x280>)
800279c: 601a str r2, [r3, #0]
break;
800279e: e012 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x0B:
WS2812BConvertedData = 0x00D36000;
80027a0: 4b61 ldr r3, [pc, #388] ; (8002928 <updateWS2812BData+0x254>)
80027a2: 4a6d ldr r2, [pc, #436] ; (8002958 <updateWS2812BData+0x284>)
80027a4: 601a str r2, [r3, #0]
break;
80027a6: e00e b.n 80027c6 <updateWS2812BData+0xf2>
case 0x0C:
WS2812BConvertedData = 0x00DA4000;
80027a8: 4b5f ldr r3, [pc, #380] ; (8002928 <updateWS2812BData+0x254>)
80027aa: 4a6c ldr r2, [pc, #432] ; (800295c <updateWS2812BData+0x288>)
80027ac: 601a str r2, [r3, #0]
break;
80027ae: e00a b.n 80027c6 <updateWS2812BData+0xf2>
case 0x0D:
WS2812BConvertedData = 0x00DA6000;
80027b0: 4b5d ldr r3, [pc, #372] ; (8002928 <updateWS2812BData+0x254>)
80027b2: 4a6b ldr r2, [pc, #428] ; (8002960 <updateWS2812BData+0x28c>)
80027b4: 601a str r2, [r3, #0]
break;
80027b6: e006 b.n 80027c6 <updateWS2812BData+0xf2>
case 0x0E:
WS2812BConvertedData = 0x00DB4000;
80027b8: 4b5b ldr r3, [pc, #364] ; (8002928 <updateWS2812BData+0x254>)
80027ba: 4a6a ldr r2, [pc, #424] ; (8002964 <updateWS2812BData+0x290>)
80027bc: 601a str r2, [r3, #0]
break;
80027be: e002 b.n 80027c6 <updateWS2812BData+0xf2>
default: // 0x0F
WS2812BConvertedData = 0x00DB6000;
80027c0: 4b59 ldr r3, [pc, #356] ; (8002928 <updateWS2812BData+0x254>)
80027c2: 4a69 ldr r2, [pc, #420] ; (8002968 <updateWS2812BData+0x294>)
80027c4: 601a str r2, [r3, #0]
}
switch(byteToConvert & 0x0F){
80027c6: 797b ldrb r3, [r7, #5]
80027c8: f003 030f and.w r3, r3, #15
80027cc: 2b0e cmp r3, #14
80027ce: f200 80cd bhi.w 800296c <updateWS2812BData+0x298>
80027d2: a201 add r2, pc, #4 ; (adr r2, 80027d8 <updateWS2812BData+0x104>)
80027d4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80027d8: 08002815 .word 0x08002815
80027dc: 08002827 .word 0x08002827
80027e0: 08002839 .word 0x08002839
80027e4: 0800284b .word 0x0800284b
80027e8: 0800285d .word 0x0800285d
80027ec: 0800286f .word 0x0800286f
80027f0: 08002881 .word 0x08002881
80027f4: 08002893 .word 0x08002893
80027f8: 080028a5 .word 0x080028a5
80027fc: 080028b7 .word 0x080028b7
8002800: 080028c9 .word 0x080028c9
8002804: 080028db .word 0x080028db
8002808: 080028ed .word 0x080028ed
800280c: 080028ff .word 0x080028ff
8002810: 08002911 .word 0x08002911
case 0x00:
WS2812BConvertedData |= 0x00000924;
8002814: 4b44 ldr r3, [pc, #272] ; (8002928 <updateWS2812BData+0x254>)
8002816: 681b ldr r3, [r3, #0]
8002818: f443 6312 orr.w r3, r3, #2336 ; 0x920
800281c: f043 0304 orr.w r3, r3, #4
8002820: 4a41 ldr r2, [pc, #260] ; (8002928 <updateWS2812BData+0x254>)
8002822: 6013 str r3, [r2, #0]
break;
8002824: e0aa b.n 800297c <updateWS2812BData+0x2a8>
case 0x01:
WS2812BConvertedData |= 0x00000926;
8002826: 4b40 ldr r3, [pc, #256] ; (8002928 <updateWS2812BData+0x254>)
8002828: 681b ldr r3, [r3, #0]
800282a: f443 6312 orr.w r3, r3, #2336 ; 0x920
800282e: f043 0306 orr.w r3, r3, #6
8002832: 4a3d ldr r2, [pc, #244] ; (8002928 <updateWS2812BData+0x254>)
8002834: 6013 str r3, [r2, #0]
break;
8002836: e0a1 b.n 800297c <updateWS2812BData+0x2a8>
case 0x02:
WS2812BConvertedData |= 0x00000934;
8002838: 4b3b ldr r3, [pc, #236] ; (8002928 <updateWS2812BData+0x254>)
800283a: 681b ldr r3, [r3, #0]
800283c: f443 6313 orr.w r3, r3, #2352 ; 0x930
8002840: f043 0304 orr.w r3, r3, #4
8002844: 4a38 ldr r2, [pc, #224] ; (8002928 <updateWS2812BData+0x254>)
8002846: 6013 str r3, [r2, #0]
break;
8002848: e098 b.n 800297c <updateWS2812BData+0x2a8>
case 0x03:
WS2812BConvertedData |= 0x00000936;
800284a: 4b37 ldr r3, [pc, #220] ; (8002928 <updateWS2812BData+0x254>)
800284c: 681b ldr r3, [r3, #0]
800284e: f443 6313 orr.w r3, r3, #2352 ; 0x930
8002852: f043 0306 orr.w r3, r3, #6
8002856: 4a34 ldr r2, [pc, #208] ; (8002928 <updateWS2812BData+0x254>)
8002858: 6013 str r3, [r2, #0]
break;
800285a: e08f b.n 800297c <updateWS2812BData+0x2a8>
case 0x04:
WS2812BConvertedData |= 0x000009A4;
800285c: 4b32 ldr r3, [pc, #200] ; (8002928 <updateWS2812BData+0x254>)
800285e: 681b ldr r3, [r3, #0]
8002860: f443 631a orr.w r3, r3, #2464 ; 0x9a0
8002864: f043 0304 orr.w r3, r3, #4
8002868: 4a2f ldr r2, [pc, #188] ; (8002928 <updateWS2812BData+0x254>)
800286a: 6013 str r3, [r2, #0]
break;
800286c: e086 b.n 800297c <updateWS2812BData+0x2a8>
case 0x05:
WS2812BConvertedData |= 0x000009A6;
800286e: 4b2e ldr r3, [pc, #184] ; (8002928 <updateWS2812BData+0x254>)
8002870: 681b ldr r3, [r3, #0]
8002872: f443 631a orr.w r3, r3, #2464 ; 0x9a0
8002876: f043 0306 orr.w r3, r3, #6
800287a: 4a2b ldr r2, [pc, #172] ; (8002928 <updateWS2812BData+0x254>)
800287c: 6013 str r3, [r2, #0]
break;
800287e: e07d b.n 800297c <updateWS2812BData+0x2a8>
case 0x06:
WS2812BConvertedData |= 0x000009B4;
8002880: 4b29 ldr r3, [pc, #164] ; (8002928 <updateWS2812BData+0x254>)
8002882: 681b ldr r3, [r3, #0]
8002884: f443 631b orr.w r3, r3, #2480 ; 0x9b0
8002888: f043 0304 orr.w r3, r3, #4
800288c: 4a26 ldr r2, [pc, #152] ; (8002928 <updateWS2812BData+0x254>)
800288e: 6013 str r3, [r2, #0]
break;
8002890: e074 b.n 800297c <updateWS2812BData+0x2a8>
case 0x07:
WS2812BConvertedData |= 0x000009B6;
8002892: 4b25 ldr r3, [pc, #148] ; (8002928 <updateWS2812BData+0x254>)
8002894: 681b ldr r3, [r3, #0]
8002896: f443 631b orr.w r3, r3, #2480 ; 0x9b0
800289a: f043 0306 orr.w r3, r3, #6
800289e: 4a22 ldr r2, [pc, #136] ; (8002928 <updateWS2812BData+0x254>)
80028a0: 6013 str r3, [r2, #0]
break;
80028a2: e06b b.n 800297c <updateWS2812BData+0x2a8>
case 0x08:
WS2812BConvertedData |= 0x00000D24;
80028a4: 4b20 ldr r3, [pc, #128] ; (8002928 <updateWS2812BData+0x254>)
80028a6: 681b ldr r3, [r3, #0]
80028a8: f443 6352 orr.w r3, r3, #3360 ; 0xd20
80028ac: f043 0304 orr.w r3, r3, #4
80028b0: 4a1d ldr r2, [pc, #116] ; (8002928 <updateWS2812BData+0x254>)
80028b2: 6013 str r3, [r2, #0]
break;
80028b4: e062 b.n 800297c <updateWS2812BData+0x2a8>
case 0x09:
WS2812BConvertedData |= 0x00000D26;
80028b6: 4b1c ldr r3, [pc, #112] ; (8002928 <updateWS2812BData+0x254>)
80028b8: 681b ldr r3, [r3, #0]
80028ba: f443 6352 orr.w r3, r3, #3360 ; 0xd20
80028be: f043 0306 orr.w r3, r3, #6
80028c2: 4a19 ldr r2, [pc, #100] ; (8002928 <updateWS2812BData+0x254>)
80028c4: 6013 str r3, [r2, #0]
break;
80028c6: e059 b.n 800297c <updateWS2812BData+0x2a8>
case 0x0A:
WS2812BConvertedData |= 0x00000D34;
80028c8: 4b17 ldr r3, [pc, #92] ; (8002928 <updateWS2812BData+0x254>)
80028ca: 681b ldr r3, [r3, #0]
80028cc: f443 6353 orr.w r3, r3, #3376 ; 0xd30
80028d0: f043 0304 orr.w r3, r3, #4
80028d4: 4a14 ldr r2, [pc, #80] ; (8002928 <updateWS2812BData+0x254>)
80028d6: 6013 str r3, [r2, #0]
break;
80028d8: e050 b.n 800297c <updateWS2812BData+0x2a8>
case 0x0B:
WS2812BConvertedData |= 0x00000D36;
80028da: 4b13 ldr r3, [pc, #76] ; (8002928 <updateWS2812BData+0x254>)
80028dc: 681b ldr r3, [r3, #0]
80028de: f443 6353 orr.w r3, r3, #3376 ; 0xd30
80028e2: f043 0306 orr.w r3, r3, #6
80028e6: 4a10 ldr r2, [pc, #64] ; (8002928 <updateWS2812BData+0x254>)
80028e8: 6013 str r3, [r2, #0]
break;
80028ea: e047 b.n 800297c <updateWS2812BData+0x2a8>
case 0x0C:
WS2812BConvertedData |= 0x00000DA4;
80028ec: 4b0e ldr r3, [pc, #56] ; (8002928 <updateWS2812BData+0x254>)
80028ee: 681b ldr r3, [r3, #0]
80028f0: f443 635a orr.w r3, r3, #3488 ; 0xda0
80028f4: f043 0304 orr.w r3, r3, #4
80028f8: 4a0b ldr r2, [pc, #44] ; (8002928 <updateWS2812BData+0x254>)
80028fa: 6013 str r3, [r2, #0]
break;
80028fc: e03e b.n 800297c <updateWS2812BData+0x2a8>
case 0x0D:
WS2812BConvertedData |= 0x00000DA6;
80028fe: 4b0a ldr r3, [pc, #40] ; (8002928 <updateWS2812BData+0x254>)
8002900: 681b ldr r3, [r3, #0]
8002902: f443 635a orr.w r3, r3, #3488 ; 0xda0
8002906: f043 0306 orr.w r3, r3, #6
800290a: 4a07 ldr r2, [pc, #28] ; (8002928 <updateWS2812BData+0x254>)
800290c: 6013 str r3, [r2, #0]
break;
800290e: e035 b.n 800297c <updateWS2812BData+0x2a8>
case 0x0E:
WS2812BConvertedData |= 0x00000DB4;
8002910: 4b05 ldr r3, [pc, #20] ; (8002928 <updateWS2812BData+0x254>)
8002912: 681b ldr r3, [r3, #0]
8002914: f443 635b orr.w r3, r3, #3504 ; 0xdb0
8002918: f043 0304 orr.w r3, r3, #4
800291c: 4a02 ldr r2, [pc, #8] ; (8002928 <updateWS2812BData+0x254>)
800291e: 6013 str r3, [r2, #0]
break;
8002920: e02c b.n 800297c <updateWS2812BData+0x2a8>
8002922: bf00 nop
8002924: 20000094 .word 0x20000094
8002928: 20000494 .word 0x20000494
800292c: 00924000 .word 0x00924000
8002930: 00926000 .word 0x00926000
8002934: 00934000 .word 0x00934000
8002938: 00936000 .word 0x00936000
800293c: 009a4000 .word 0x009a4000
8002940: 009a6000 .word 0x009a6000
8002944: 009b4000 .word 0x009b4000
8002948: 009b6000 .word 0x009b6000
800294c: 00d24000 .word 0x00d24000
8002950: 00d26000 .word 0x00d26000
8002954: 00d34000 .word 0x00d34000
8002958: 00d36000 .word 0x00d36000
800295c: 00da4000 .word 0x00da4000
8002960: 00da6000 .word 0x00da6000
8002964: 00db4000 .word 0x00db4000
8002968: 00db6000 .word 0x00db6000
default: // 0x0F
WS2812BConvertedData |= 0x00000DB6;
800296c: 4b27 ldr r3, [pc, #156] ; (8002a0c <updateWS2812BData+0x338>)
800296e: 681b ldr r3, [r3, #0]
8002970: f443 635b orr.w r3, r3, #3504 ; 0xdb0
8002974: f043 0306 orr.w r3, r3, #6
8002978: 4a24 ldr r2, [pc, #144] ; (8002a0c <updateWS2812BData+0x338>)
800297a: 6013 str r3, [r2, #0]
}
LEDData_WS2812B[i][j][0] = (WS2812BConvertedData & 0x00FF0000) >> 16;
800297c: 4b23 ldr r3, [pc, #140] ; (8002a0c <updateWS2812BData+0x338>)
800297e: 681b ldr r3, [r3, #0]
8002980: 0c1a lsrs r2, r3, #16
8002982: 79f9 ldrb r1, [r7, #7]
8002984: 79bb ldrb r3, [r7, #6]
8002986: b2d4 uxtb r4, r2
8002988: 4821 ldr r0, [pc, #132] ; (8002a10 <updateWS2812BData+0x33c>)
800298a: 461a mov r2, r3
800298c: 0052 lsls r2, r2, #1
800298e: 441a add r2, r3
8002990: 460b mov r3, r1
8002992: 00db lsls r3, r3, #3
8002994: 440b add r3, r1
8002996: 4413 add r3, r2
8002998: 4403 add r3, r0
800299a: 4622 mov r2, r4
800299c: 701a strb r2, [r3, #0]
LEDData_WS2812B[i][j][1] = (WS2812BConvertedData & 0x0000FF00) >> 8;
800299e: 4b1b ldr r3, [pc, #108] ; (8002a0c <updateWS2812BData+0x338>)
80029a0: 681b ldr r3, [r3, #0]
80029a2: 0a1a lsrs r2, r3, #8
80029a4: 79f9 ldrb r1, [r7, #7]
80029a6: 79bb ldrb r3, [r7, #6]
80029a8: b2d4 uxtb r4, r2
80029aa: 4819 ldr r0, [pc, #100] ; (8002a10 <updateWS2812BData+0x33c>)
80029ac: 461a mov r2, r3
80029ae: 0052 lsls r2, r2, #1
80029b0: 441a add r2, r3
80029b2: 460b mov r3, r1
80029b4: 00db lsls r3, r3, #3
80029b6: 440b add r3, r1
80029b8: 4413 add r3, r2
80029ba: 4403 add r3, r0
80029bc: 3301 adds r3, #1
80029be: 4622 mov r2, r4
80029c0: 701a strb r2, [r3, #0]
LEDData_WS2812B[i][j][2] = WS2812BConvertedData & 0x000000FF;
80029c2: 4b12 ldr r3, [pc, #72] ; (8002a0c <updateWS2812BData+0x338>)
80029c4: 681a ldr r2, [r3, #0]
80029c6: 79f9 ldrb r1, [r7, #7]
80029c8: 79bb ldrb r3, [r7, #6]
80029ca: b2d4 uxtb r4, r2
80029cc: 4810 ldr r0, [pc, #64] ; (8002a10 <updateWS2812BData+0x33c>)
80029ce: 461a mov r2, r3
80029d0: 0052 lsls r2, r2, #1
80029d2: 441a add r2, r3
80029d4: 460b mov r3, r1
80029d6: 00db lsls r3, r3, #3
80029d8: 440b add r3, r1
80029da: 4413 add r3, r2
80029dc: 4403 add r3, r0
80029de: 3302 adds r3, #2
80029e0: 4622 mov r2, r4
80029e2: 701a strb r2, [r3, #0]
for (uint8_t j = 0; j < 3; ++j) {
80029e4: 79bb ldrb r3, [r7, #6]
80029e6: 3301 adds r3, #1
80029e8: 71bb strb r3, [r7, #6]
80029ea: 79bb ldrb r3, [r7, #6]
80029ec: 2b02 cmp r3, #2
80029ee: f67f ae7a bls.w 80026e6 <updateWS2812BData+0x12>
for (uint8_t i = 0; i < 64; ++i) {
80029f2: 79fb ldrb r3, [r7, #7]
80029f4: 3301 adds r3, #1
80029f6: 71fb strb r3, [r7, #7]
80029f8: 79fb ldrb r3, [r7, #7]
80029fa: 2b3f cmp r3, #63 ; 0x3f
80029fc: f67f ae70 bls.w 80026e0 <updateWS2812BData+0xc>
}
}
}
8002a00: bf00 nop
8002a02: 3708 adds r7, #8
8002a04: 46bd mov sp, r7
8002a06: bc90 pop {r4, r7}
8002a08: 4770 bx lr
8002a0a: bf00 nop
8002a0c: 20000494 .word 0x20000494
8002a10: 20000154 .word 0x20000154
08002a14 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8002a14: b480 push {r7}
8002a16: af00 add r7, sp, #0
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
8002a18: bf00 nop
8002a1a: 46bd mov sp, r7
8002a1c: f85d 7b04 ldr.w r7, [sp], #4
8002a20: 4770 bx lr
...
08002a24 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8002a24: b580 push {r7, lr}
8002a26: b082 sub sp, #8
8002a28: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8002a2a: 2300 movs r3, #0
8002a2c: 607b str r3, [r7, #4]
8002a2e: 4b10 ldr r3, [pc, #64] ; (8002a70 <HAL_MspInit+0x4c>)
8002a30: 6c5b ldr r3, [r3, #68] ; 0x44
8002a32: 4a0f ldr r2, [pc, #60] ; (8002a70 <HAL_MspInit+0x4c>)
8002a34: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8002a38: 6453 str r3, [r2, #68] ; 0x44
8002a3a: 4b0d ldr r3, [pc, #52] ; (8002a70 <HAL_MspInit+0x4c>)
8002a3c: 6c5b ldr r3, [r3, #68] ; 0x44
8002a3e: f403 4380 and.w r3, r3, #16384 ; 0x4000
8002a42: 607b str r3, [r7, #4]
8002a44: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
8002a46: 2300 movs r3, #0
8002a48: 603b str r3, [r7, #0]
8002a4a: 4b09 ldr r3, [pc, #36] ; (8002a70 <HAL_MspInit+0x4c>)
8002a4c: 6c1b ldr r3, [r3, #64] ; 0x40
8002a4e: 4a08 ldr r2, [pc, #32] ; (8002a70 <HAL_MspInit+0x4c>)
8002a50: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8002a54: 6413 str r3, [r2, #64] ; 0x40
8002a56: 4b06 ldr r3, [pc, #24] ; (8002a70 <HAL_MspInit+0x4c>)
8002a58: 6c1b ldr r3, [r3, #64] ; 0x40
8002a5a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002a5e: 603b str r3, [r7, #0]
8002a60: 683b ldr r3, [r7, #0]
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
8002a62: 2007 movs r0, #7
8002a64: f000 fedc bl 8003820 <HAL_NVIC_SetPriorityGrouping>
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8002a68: bf00 nop
8002a6a: 3708 adds r7, #8
8002a6c: 46bd mov sp, r7
8002a6e: bd80 pop {r7, pc}
8002a70: 40023800 .word 0x40023800
08002a74 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8002a74: b580 push {r7, lr}
8002a76: b08a sub sp, #40 ; 0x28
8002a78: af00 add r7, sp, #0
8002a7a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8002a7c: f107 0314 add.w r3, r7, #20
8002a80: 2200 movs r2, #0
8002a82: 601a str r2, [r3, #0]
8002a84: 605a str r2, [r3, #4]
8002a86: 609a str r2, [r3, #8]
8002a88: 60da str r2, [r3, #12]
8002a8a: 611a str r2, [r3, #16]
if(hadc->Instance==ADC3)
8002a8c: 687b ldr r3, [r7, #4]
8002a8e: 681b ldr r3, [r3, #0]
8002a90: 4a17 ldr r2, [pc, #92] ; (8002af0 <HAL_ADC_MspInit+0x7c>)
8002a92: 4293 cmp r3, r2
8002a94: d127 bne.n 8002ae6 <HAL_ADC_MspInit+0x72>
{
/* USER CODE BEGIN ADC3_MspInit 0 */
/* USER CODE END ADC3_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC3_CLK_ENABLE();
8002a96: 2300 movs r3, #0
8002a98: 613b str r3, [r7, #16]
8002a9a: 4b16 ldr r3, [pc, #88] ; (8002af4 <HAL_ADC_MspInit+0x80>)
8002a9c: 6c5b ldr r3, [r3, #68] ; 0x44
8002a9e: 4a15 ldr r2, [pc, #84] ; (8002af4 <HAL_ADC_MspInit+0x80>)
8002aa0: f443 6380 orr.w r3, r3, #1024 ; 0x400
8002aa4: 6453 str r3, [r2, #68] ; 0x44
8002aa6: 4b13 ldr r3, [pc, #76] ; (8002af4 <HAL_ADC_MspInit+0x80>)
8002aa8: 6c5b ldr r3, [r3, #68] ; 0x44
8002aaa: f403 6380 and.w r3, r3, #1024 ; 0x400
8002aae: 613b str r3, [r7, #16]
8002ab0: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOF_CLK_ENABLE();
8002ab2: 2300 movs r3, #0
8002ab4: 60fb str r3, [r7, #12]
8002ab6: 4b0f ldr r3, [pc, #60] ; (8002af4 <HAL_ADC_MspInit+0x80>)
8002ab8: 6b1b ldr r3, [r3, #48] ; 0x30
8002aba: 4a0e ldr r2, [pc, #56] ; (8002af4 <HAL_ADC_MspInit+0x80>)
8002abc: f043 0320 orr.w r3, r3, #32
8002ac0: 6313 str r3, [r2, #48] ; 0x30
8002ac2: 4b0c ldr r3, [pc, #48] ; (8002af4 <HAL_ADC_MspInit+0x80>)
8002ac4: 6b1b ldr r3, [r3, #48] ; 0x30
8002ac6: f003 0320 and.w r3, r3, #32
8002aca: 60fb str r3, [r7, #12]
8002acc: 68fb ldr r3, [r7, #12]
/**ADC3 GPIO Configuration
PF6 ------> ADC3_IN4
*/
GPIO_InitStruct.Pin = GPIO_PIN_6;
8002ace: 2340 movs r3, #64 ; 0x40
8002ad0: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8002ad2: 2303 movs r3, #3
8002ad4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002ad6: 2300 movs r3, #0
8002ad8: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8002ada: f107 0314 add.w r3, r7, #20
8002ade: 4619 mov r1, r3
8002ae0: 4805 ldr r0, [pc, #20] ; (8002af8 <HAL_ADC_MspInit+0x84>)
8002ae2: f000 ff01 bl 80038e8 <HAL_GPIO_Init>
/* USER CODE BEGIN ADC3_MspInit 1 */
/* USER CODE END ADC3_MspInit 1 */
}
}
8002ae6: bf00 nop
8002ae8: 3728 adds r7, #40 ; 0x28
8002aea: 46bd mov sp, r7
8002aec: bd80 pop {r7, pc}
8002aee: bf00 nop
8002af0: 40012200 .word 0x40012200
8002af4: 40023800 .word 0x40023800
8002af8: 40021400 .word 0x40021400
08002afc <HAL_SPI_MspInit>:
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
8002afc: b580 push {r7, lr}
8002afe: b08a sub sp, #40 ; 0x28
8002b00: af00 add r7, sp, #0
8002b02: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8002b04: f107 0314 add.w r3, r7, #20
8002b08: 2200 movs r2, #0
8002b0a: 601a str r2, [r3, #0]
8002b0c: 605a str r2, [r3, #4]
8002b0e: 609a str r2, [r3, #8]
8002b10: 60da str r2, [r3, #12]
8002b12: 611a str r2, [r3, #16]
if(hspi->Instance==SPI4)
8002b14: 687b ldr r3, [r7, #4]
8002b16: 681b ldr r3, [r3, #0]
8002b18: 4a1d ldr r2, [pc, #116] ; (8002b90 <HAL_SPI_MspInit+0x94>)
8002b1a: 4293 cmp r3, r2
8002b1c: d133 bne.n 8002b86 <HAL_SPI_MspInit+0x8a>
{
/* USER CODE BEGIN SPI4_MspInit 0 */
/* USER CODE END SPI4_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI4_CLK_ENABLE();
8002b1e: 2300 movs r3, #0
8002b20: 613b str r3, [r7, #16]
8002b22: 4b1c ldr r3, [pc, #112] ; (8002b94 <HAL_SPI_MspInit+0x98>)
8002b24: 6c5b ldr r3, [r3, #68] ; 0x44
8002b26: 4a1b ldr r2, [pc, #108] ; (8002b94 <HAL_SPI_MspInit+0x98>)
8002b28: f443 5300 orr.w r3, r3, #8192 ; 0x2000
8002b2c: 6453 str r3, [r2, #68] ; 0x44
8002b2e: 4b19 ldr r3, [pc, #100] ; (8002b94 <HAL_SPI_MspInit+0x98>)
8002b30: 6c5b ldr r3, [r3, #68] ; 0x44
8002b32: f403 5300 and.w r3, r3, #8192 ; 0x2000
8002b36: 613b str r3, [r7, #16]
8002b38: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOE_CLK_ENABLE();
8002b3a: 2300 movs r3, #0
8002b3c: 60fb str r3, [r7, #12]
8002b3e: 4b15 ldr r3, [pc, #84] ; (8002b94 <HAL_SPI_MspInit+0x98>)
8002b40: 6b1b ldr r3, [r3, #48] ; 0x30
8002b42: 4a14 ldr r2, [pc, #80] ; (8002b94 <HAL_SPI_MspInit+0x98>)
8002b44: f043 0310 orr.w r3, r3, #16
8002b48: 6313 str r3, [r2, #48] ; 0x30
8002b4a: 4b12 ldr r3, [pc, #72] ; (8002b94 <HAL_SPI_MspInit+0x98>)
8002b4c: 6b1b ldr r3, [r3, #48] ; 0x30
8002b4e: f003 0310 and.w r3, r3, #16
8002b52: 60fb str r3, [r7, #12]
8002b54: 68fb ldr r3, [r7, #12]
/**SPI4 GPIO Configuration
PE2 ------> SPI4_SCK
PE6 ------> SPI4_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_6;
8002b56: 2344 movs r3, #68 ; 0x44
8002b58: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8002b5a: 2302 movs r3, #2
8002b5c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002b5e: 2300 movs r3, #0
8002b60: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8002b62: 2303 movs r3, #3
8002b64: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
8002b66: 2305 movs r3, #5
8002b68: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8002b6a: f107 0314 add.w r3, r7, #20
8002b6e: 4619 mov r1, r3
8002b70: 4809 ldr r0, [pc, #36] ; (8002b98 <HAL_SPI_MspInit+0x9c>)
8002b72: f000 feb9 bl 80038e8 <HAL_GPIO_Init>
/* SPI4 interrupt Init */
HAL_NVIC_SetPriority(SPI4_IRQn, 0, 0);
8002b76: 2200 movs r2, #0
8002b78: 2100 movs r1, #0
8002b7a: 2054 movs r0, #84 ; 0x54
8002b7c: f000 fe5b bl 8003836 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(SPI4_IRQn);
8002b80: 2054 movs r0, #84 ; 0x54
8002b82: f000 fe74 bl 800386e <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN SPI4_MspInit 1 */
/* USER CODE END SPI4_MspInit 1 */
}
}
8002b86: bf00 nop
8002b88: 3728 adds r7, #40 ; 0x28
8002b8a: 46bd mov sp, r7
8002b8c: bd80 pop {r7, pc}
8002b8e: bf00 nop
8002b90: 40013400 .word 0x40013400
8002b94: 40023800 .word 0x40023800
8002b98: 40021000 .word 0x40021000
08002b9c <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8002b9c: b580 push {r7, lr}
8002b9e: b084 sub sp, #16
8002ba0: af00 add r7, sp, #0
8002ba2: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM6)
8002ba4: 687b ldr r3, [r7, #4]
8002ba6: 681b ldr r3, [r3, #0]
8002ba8: 4a0e ldr r2, [pc, #56] ; (8002be4 <HAL_TIM_Base_MspInit+0x48>)
8002baa: 4293 cmp r3, r2
8002bac: d115 bne.n 8002bda <HAL_TIM_Base_MspInit+0x3e>
{
/* USER CODE BEGIN TIM6_MspInit 0 */
/* USER CODE END TIM6_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM6_CLK_ENABLE();
8002bae: 2300 movs r3, #0
8002bb0: 60fb str r3, [r7, #12]
8002bb2: 4b0d ldr r3, [pc, #52] ; (8002be8 <HAL_TIM_Base_MspInit+0x4c>)
8002bb4: 6c1b ldr r3, [r3, #64] ; 0x40
8002bb6: 4a0c ldr r2, [pc, #48] ; (8002be8 <HAL_TIM_Base_MspInit+0x4c>)
8002bb8: f043 0310 orr.w r3, r3, #16
8002bbc: 6413 str r3, [r2, #64] ; 0x40
8002bbe: 4b0a ldr r3, [pc, #40] ; (8002be8 <HAL_TIM_Base_MspInit+0x4c>)
8002bc0: 6c1b ldr r3, [r3, #64] ; 0x40
8002bc2: f003 0310 and.w r3, r3, #16
8002bc6: 60fb str r3, [r7, #12]
8002bc8: 68fb ldr r3, [r7, #12]
/* TIM6 interrupt Init */
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
8002bca: 2200 movs r2, #0
8002bcc: 2100 movs r1, #0
8002bce: 2036 movs r0, #54 ; 0x36
8002bd0: f000 fe31 bl 8003836 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
8002bd4: 2036 movs r0, #54 ; 0x36
8002bd6: f000 fe4a bl 800386e <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN TIM6_MspInit 1 */
/* USER CODE END TIM6_MspInit 1 */
}
}
8002bda: bf00 nop
8002bdc: 3710 adds r7, #16
8002bde: 46bd mov sp, r7
8002be0: bd80 pop {r7, pc}
8002be2: bf00 nop
8002be4: 40001000 .word 0x40001000
8002be8: 40023800 .word 0x40023800
08002bec <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8002bec: b480 push {r7}
8002bee: af00 add r7, sp, #0
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
8002bf0: bf00 nop
8002bf2: 46bd mov sp, r7
8002bf4: f85d 7b04 ldr.w r7, [sp], #4
8002bf8: 4770 bx lr
08002bfa <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8002bfa: b480 push {r7}
8002bfc: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8002bfe: e7fe b.n 8002bfe <HardFault_Handler+0x4>
08002c00 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8002c00: b480 push {r7}
8002c02: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8002c04: e7fe b.n 8002c04 <MemManage_Handler+0x4>
08002c06 <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8002c06: b480 push {r7}
8002c08: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8002c0a: e7fe b.n 8002c0a <BusFault_Handler+0x4>
08002c0c <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8002c0c: b480 push {r7}
8002c0e: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8002c10: e7fe b.n 8002c10 <UsageFault_Handler+0x4>
08002c12 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8002c12: b480 push {r7}
8002c14: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8002c16: bf00 nop
8002c18: 46bd mov sp, r7
8002c1a: f85d 7b04 ldr.w r7, [sp], #4
8002c1e: 4770 bx lr
08002c20 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8002c20: b480 push {r7}
8002c22: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8002c24: bf00 nop
8002c26: 46bd mov sp, r7
8002c28: f85d 7b04 ldr.w r7, [sp], #4
8002c2c: 4770 bx lr
08002c2e <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8002c2e: b480 push {r7}
8002c30: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8002c32: bf00 nop
8002c34: 46bd mov sp, r7
8002c36: f85d 7b04 ldr.w r7, [sp], #4
8002c3a: 4770 bx lr
08002c3c <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8002c3c: b580 push {r7, lr}
8002c3e: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8002c40: f000 f912 bl 8002e68 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8002c44: bf00 nop
8002c46: bd80 pop {r7, pc}
08002c48 <EXTI0_IRQHandler>:
/**
* @brief This function handles EXTI line0 interrupt.
*/
void EXTI0_IRQHandler(void)
{
8002c48: b580 push {r7, lr}
8002c4a: af00 add r7, sp, #0
/* USER CODE BEGIN EXTI0_IRQn 0 */
/* USER CODE END EXTI0_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
8002c4c: 2001 movs r0, #1
8002c4e: f001 f80f bl 8003c70 <HAL_GPIO_EXTI_IRQHandler>
/* USER CODE BEGIN EXTI0_IRQn 1 */
HAL_TIM_Base_Start_IT(&htim6);
8002c52: 4804 ldr r0, [pc, #16] ; (8002c64 <EXTI0_IRQHandler+0x1c>)
8002c54: f001 ffeb bl 8004c2e <HAL_TIM_Base_Start_IT>
LEDDesign_PendingChange = true;
8002c58: 4b03 ldr r3, [pc, #12] ; (8002c68 <EXTI0_IRQHandler+0x20>)
8002c5a: 2201 movs r2, #1
8002c5c: 701a strb r2, [r3, #0]
/* USER CODE END EXTI0_IRQn 1 */
}
8002c5e: bf00 nop
8002c60: bd80 pop {r7, pc}
8002c62: bf00 nop
8002c64: 20000454 .word 0x20000454
8002c68: 20000091 .word 0x20000091
08002c6c <TIM6_DAC_IRQHandler>:
/**
* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
*/
void TIM6_DAC_IRQHandler(void)
{
8002c6c: b580 push {r7, lr}
8002c6e: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM6_DAC_IRQn 0 */
HAL_TIM_IRQHandler(&htim6);
8002c70: 480c ldr r0, [pc, #48] ; (8002ca4 <TIM6_DAC_IRQHandler+0x38>)
8002c72: f002 f846 bl 8004d02 <HAL_TIM_IRQHandler>
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
LEDMode = (LEDMode + 1) % 7;
8002c76: 4b0c ldr r3, [pc, #48] ; (8002ca8 <TIM6_DAC_IRQHandler+0x3c>)
8002c78: 781b ldrb r3, [r3, #0]
8002c7a: 1c5a adds r2, r3, #1
8002c7c: 4b0b ldr r3, [pc, #44] ; (8002cac <TIM6_DAC_IRQHandler+0x40>)
8002c7e: fb83 1302 smull r1, r3, r3, r2
8002c82: 4413 add r3, r2
8002c84: 1099 asrs r1, r3, #2
8002c86: 17d3 asrs r3, r2, #31
8002c88: 1ac9 subs r1, r1, r3
8002c8a: 460b mov r3, r1
8002c8c: 00db lsls r3, r3, #3
8002c8e: 1a5b subs r3, r3, r1
8002c90: 1ad1 subs r1, r2, r3
8002c92: b2ca uxtb r2, r1
8002c94: 4b04 ldr r3, [pc, #16] ; (8002ca8 <TIM6_DAC_IRQHandler+0x3c>)
8002c96: 701a strb r2, [r3, #0]
LEDDesign_PendingChange = false;
8002c98: 4b05 ldr r3, [pc, #20] ; (8002cb0 <TIM6_DAC_IRQHandler+0x44>)
8002c9a: 2200 movs r2, #0
8002c9c: 701a strb r2, [r3, #0]
/* USER CODE END TIM6_DAC_IRQn 1 */
}
8002c9e: bf00 nop
8002ca0: bd80 pop {r7, pc}
8002ca2: bf00 nop
8002ca4: 20000454 .word 0x20000454
8002ca8: 20000090 .word 0x20000090
8002cac: 92492493 .word 0x92492493
8002cb0: 20000091 .word 0x20000091
08002cb4 <SPI4_IRQHandler>:
/**
* @brief This function handles SPI4 global interrupt.
*/
void SPI4_IRQHandler(void)
{
8002cb4: b580 push {r7, lr}
8002cb6: af00 add r7, sp, #0
/* USER CODE BEGIN SPI4_IRQn 0 */
/* USER CODE END SPI4_IRQn 0 */
HAL_SPI_IRQHandler(&hspi4);
8002cb8: 4805 ldr r0, [pc, #20] ; (8002cd0 <SPI4_IRQHandler+0x1c>)
8002cba: f001 fd11 bl 80046e0 <HAL_SPI_IRQHandler>
/* USER CODE BEGIN SPI4_IRQn 1 */
HAL_SPI_Transmit_IT(&hspi4, (uint8_t *) &LEDData_WS2812B, (uint16_t) 66 * 3 * 3);
8002cbe: f240 2252 movw r2, #594 ; 0x252
8002cc2: 4904 ldr r1, [pc, #16] ; (8002cd4 <SPI4_IRQHandler+0x20>)
8002cc4: 4802 ldr r0, [pc, #8] ; (8002cd0 <SPI4_IRQHandler+0x1c>)
8002cc6: f001 fc89 bl 80045dc <HAL_SPI_Transmit_IT>
/* USER CODE END SPI4_IRQn 1 */
}
8002cca: bf00 nop
8002ccc: bd80 pop {r7, pc}
8002cce: bf00 nop
8002cd0: 200003fc .word 0x200003fc
8002cd4: 20000154 .word 0x20000154
08002cd8 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8002cd8: b580 push {r7, lr}
8002cda: b086 sub sp, #24
8002cdc: af00 add r7, sp, #0
8002cde: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8002ce0: 4a14 ldr r2, [pc, #80] ; (8002d34 <_sbrk+0x5c>)
8002ce2: 4b15 ldr r3, [pc, #84] ; (8002d38 <_sbrk+0x60>)
8002ce4: 1ad3 subs r3, r2, r3
8002ce6: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8002ce8: 697b ldr r3, [r7, #20]
8002cea: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initalize heap end at first call */
if (NULL == __sbrk_heap_end)
8002cec: 4b13 ldr r3, [pc, #76] ; (8002d3c <_sbrk+0x64>)
8002cee: 681b ldr r3, [r3, #0]
8002cf0: 2b00 cmp r3, #0
8002cf2: d102 bne.n 8002cfa <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8002cf4: 4b11 ldr r3, [pc, #68] ; (8002d3c <_sbrk+0x64>)
8002cf6: 4a12 ldr r2, [pc, #72] ; (8002d40 <_sbrk+0x68>)
8002cf8: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8002cfa: 4b10 ldr r3, [pc, #64] ; (8002d3c <_sbrk+0x64>)
8002cfc: 681a ldr r2, [r3, #0]
8002cfe: 687b ldr r3, [r7, #4]
8002d00: 4413 add r3, r2
8002d02: 693a ldr r2, [r7, #16]
8002d04: 429a cmp r2, r3
8002d06: d207 bcs.n 8002d18 <_sbrk+0x40>
{
errno = ENOMEM;
8002d08: f002 fa66 bl 80051d8 <__errno>
8002d0c: 4602 mov r2, r0
8002d0e: 230c movs r3, #12
8002d10: 6013 str r3, [r2, #0]
return (void *)-1;
8002d12: f04f 33ff mov.w r3, #4294967295
8002d16: e009 b.n 8002d2c <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8002d18: 4b08 ldr r3, [pc, #32] ; (8002d3c <_sbrk+0x64>)
8002d1a: 681b ldr r3, [r3, #0]
8002d1c: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8002d1e: 4b07 ldr r3, [pc, #28] ; (8002d3c <_sbrk+0x64>)
8002d20: 681a ldr r2, [r3, #0]
8002d22: 687b ldr r3, [r7, #4]
8002d24: 4413 add r3, r2
8002d26: 4a05 ldr r2, [pc, #20] ; (8002d3c <_sbrk+0x64>)
8002d28: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8002d2a: 68fb ldr r3, [r7, #12]
}
8002d2c: 4618 mov r0, r3
8002d2e: 3718 adds r7, #24
8002d30: 46bd mov sp, r7
8002d32: bd80 pop {r7, pc}
8002d34: 20030000 .word 0x20030000
8002d38: 00000400 .word 0x00000400
8002d3c: 200003a8 .word 0x200003a8
8002d40: 200004a0 .word 0x200004a0
08002d44 <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
8002d44: b480 push {r7}
8002d46: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
8002d48: 4b08 ldr r3, [pc, #32] ; (8002d6c <SystemInit+0x28>)
8002d4a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
8002d4e: 4a07 ldr r2, [pc, #28] ; (8002d6c <SystemInit+0x28>)
8002d50: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
8002d54: f8c2 3088 str.w r3, [r2, #136] ; 0x88
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
8002d58: 4b04 ldr r3, [pc, #16] ; (8002d6c <SystemInit+0x28>)
8002d5a: f04f 6200 mov.w r2, #134217728 ; 0x8000000
8002d5e: 609a str r2, [r3, #8]
#endif
}
8002d60: bf00 nop
8002d62: 46bd mov sp, r7
8002d64: f85d 7b04 ldr.w r7, [sp], #4
8002d68: 4770 bx lr
8002d6a: bf00 nop
8002d6c: e000ed00 .word 0xe000ed00
08002d70 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
8002d70: f8df d034 ldr.w sp, [pc, #52] ; 8002da8 <LoopFillZerobss+0x14>
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
8002d74: 2100 movs r1, #0
b LoopCopyDataInit
8002d76: e003 b.n 8002d80 <LoopCopyDataInit>
08002d78 <CopyDataInit>:
CopyDataInit:
ldr r3, =_sidata
8002d78: 4b0c ldr r3, [pc, #48] ; (8002dac <LoopFillZerobss+0x18>)
ldr r3, [r3, r1]
8002d7a: 585b ldr r3, [r3, r1]
str r3, [r0, r1]
8002d7c: 5043 str r3, [r0, r1]
adds r1, r1, #4
8002d7e: 3104 adds r1, #4
08002d80 <LoopCopyDataInit>:
LoopCopyDataInit:
ldr r0, =_sdata
8002d80: 480b ldr r0, [pc, #44] ; (8002db0 <LoopFillZerobss+0x1c>)
ldr r3, =_edata
8002d82: 4b0c ldr r3, [pc, #48] ; (8002db4 <LoopFillZerobss+0x20>)
adds r2, r0, r1
8002d84: 1842 adds r2, r0, r1
cmp r2, r3
8002d86: 429a cmp r2, r3
bcc CopyDataInit
8002d88: d3f6 bcc.n 8002d78 <CopyDataInit>
ldr r2, =_sbss
8002d8a: 4a0b ldr r2, [pc, #44] ; (8002db8 <LoopFillZerobss+0x24>)
b LoopFillZerobss
8002d8c: e002 b.n 8002d94 <LoopFillZerobss>
08002d8e <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
8002d8e: 2300 movs r3, #0
str r3, [r2], #4
8002d90: f842 3b04 str.w r3, [r2], #4
08002d94 <LoopFillZerobss>:
LoopFillZerobss:
ldr r3, = _ebss
8002d94: 4b09 ldr r3, [pc, #36] ; (8002dbc <LoopFillZerobss+0x28>)
cmp r2, r3
8002d96: 429a cmp r2, r3
bcc FillZerobss
8002d98: d3f9 bcc.n 8002d8e <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8002d9a: f7ff ffd3 bl 8002d44 <SystemInit>
/* Call static constructors */
bl __libc_init_array
8002d9e: f002 fa21 bl 80051e4 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8002da2: f7fd ff93 bl 8000ccc <main>
bx lr
8002da6: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
8002da8: 20030000 .word 0x20030000
ldr r3, =_sidata
8002dac: 080053c4 .word 0x080053c4
ldr r0, =_sdata
8002db0: 20000000 .word 0x20000000
ldr r3, =_edata
8002db4: 20000074 .word 0x20000074
ldr r2, =_sbss
8002db8: 20000074 .word 0x20000074
ldr r3, = _ebss
8002dbc: 200004a0 .word 0x200004a0
08002dc0 <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8002dc0: e7fe b.n 8002dc0 <ADC_IRQHandler>
...
08002dc4 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8002dc4: b580 push {r7, lr}
8002dc6: af00 add r7, sp, #0
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
8002dc8: 4b0e ldr r3, [pc, #56] ; (8002e04 <HAL_Init+0x40>)
8002dca: 681b ldr r3, [r3, #0]
8002dcc: 4a0d ldr r2, [pc, #52] ; (8002e04 <HAL_Init+0x40>)
8002dce: f443 7300 orr.w r3, r3, #512 ; 0x200
8002dd2: 6013 str r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
8002dd4: 4b0b ldr r3, [pc, #44] ; (8002e04 <HAL_Init+0x40>)
8002dd6: 681b ldr r3, [r3, #0]
8002dd8: 4a0a ldr r2, [pc, #40] ; (8002e04 <HAL_Init+0x40>)
8002dda: f443 6380 orr.w r3, r3, #1024 ; 0x400
8002dde: 6013 str r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8002de0: 4b08 ldr r3, [pc, #32] ; (8002e04 <HAL_Init+0x40>)
8002de2: 681b ldr r3, [r3, #0]
8002de4: 4a07 ldr r2, [pc, #28] ; (8002e04 <HAL_Init+0x40>)
8002de6: f443 7380 orr.w r3, r3, #256 ; 0x100
8002dea: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8002dec: 2003 movs r0, #3
8002dee: f000 fd17 bl 8003820 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8002df2: 2000 movs r0, #0
8002df4: f000 f808 bl 8002e08 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8002df8: f7ff fe14 bl 8002a24 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8002dfc: 2300 movs r3, #0
}
8002dfe: 4618 mov r0, r3
8002e00: bd80 pop {r7, pc}
8002e02: bf00 nop
8002e04: 40023c00 .word 0x40023c00
08002e08 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8002e08: b580 push {r7, lr}
8002e0a: b082 sub sp, #8
8002e0c: af00 add r7, sp, #0
8002e0e: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8002e10: 4b12 ldr r3, [pc, #72] ; (8002e5c <HAL_InitTick+0x54>)
8002e12: 681a ldr r2, [r3, #0]
8002e14: 4b12 ldr r3, [pc, #72] ; (8002e60 <HAL_InitTick+0x58>)
8002e16: 781b ldrb r3, [r3, #0]
8002e18: 4619 mov r1, r3
8002e1a: f44f 737a mov.w r3, #1000 ; 0x3e8
8002e1e: fbb3 f3f1 udiv r3, r3, r1
8002e22: fbb2 f3f3 udiv r3, r2, r3
8002e26: 4618 mov r0, r3
8002e28: f000 fd2f bl 800388a <HAL_SYSTICK_Config>
8002e2c: 4603 mov r3, r0
8002e2e: 2b00 cmp r3, #0
8002e30: d001 beq.n 8002e36 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8002e32: 2301 movs r3, #1
8002e34: e00e b.n 8002e54 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8002e36: 687b ldr r3, [r7, #4]
8002e38: 2b0f cmp r3, #15
8002e3a: d80a bhi.n 8002e52 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8002e3c: 2200 movs r2, #0
8002e3e: 6879 ldr r1, [r7, #4]
8002e40: f04f 30ff mov.w r0, #4294967295
8002e44: f000 fcf7 bl 8003836 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8002e48: 4a06 ldr r2, [pc, #24] ; (8002e64 <HAL_InitTick+0x5c>)
8002e4a: 687b ldr r3, [r7, #4]
8002e4c: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8002e4e: 2300 movs r3, #0
8002e50: e000 b.n 8002e54 <HAL_InitTick+0x4c>
return HAL_ERROR;
8002e52: 2301 movs r3, #1
}
8002e54: 4618 mov r0, r3
8002e56: 3708 adds r7, #8
8002e58: 46bd mov sp, r7
8002e5a: bd80 pop {r7, pc}
8002e5c: 20000004 .word 0x20000004
8002e60: 2000000c .word 0x2000000c
8002e64: 20000008 .word 0x20000008
08002e68 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8002e68: b480 push {r7}
8002e6a: af00 add r7, sp, #0
uwTick += uwTickFreq;
8002e6c: 4b06 ldr r3, [pc, #24] ; (8002e88 <HAL_IncTick+0x20>)
8002e6e: 781b ldrb r3, [r3, #0]
8002e70: 461a mov r2, r3
8002e72: 4b06 ldr r3, [pc, #24] ; (8002e8c <HAL_IncTick+0x24>)
8002e74: 681b ldr r3, [r3, #0]
8002e76: 4413 add r3, r2
8002e78: 4a04 ldr r2, [pc, #16] ; (8002e8c <HAL_IncTick+0x24>)
8002e7a: 6013 str r3, [r2, #0]
}
8002e7c: bf00 nop
8002e7e: 46bd mov sp, r7
8002e80: f85d 7b04 ldr.w r7, [sp], #4
8002e84: 4770 bx lr
8002e86: bf00 nop
8002e88: 2000000c .word 0x2000000c
8002e8c: 20000498 .word 0x20000498
08002e90 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8002e90: b480 push {r7}
8002e92: af00 add r7, sp, #0
return uwTick;
8002e94: 4b03 ldr r3, [pc, #12] ; (8002ea4 <HAL_GetTick+0x14>)
8002e96: 681b ldr r3, [r3, #0]
}
8002e98: 4618 mov r0, r3
8002e9a: 46bd mov sp, r7
8002e9c: f85d 7b04 ldr.w r7, [sp], #4
8002ea0: 4770 bx lr
8002ea2: bf00 nop
8002ea4: 20000498 .word 0x20000498
08002ea8 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
8002ea8: b580 push {r7, lr}
8002eaa: b084 sub sp, #16
8002eac: af00 add r7, sp, #0
8002eae: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8002eb0: f7ff ffee bl 8002e90 <HAL_GetTick>
8002eb4: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
8002eb6: 687b ldr r3, [r7, #4]
8002eb8: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
8002eba: 68fb ldr r3, [r7, #12]
8002ebc: f1b3 3fff cmp.w r3, #4294967295
8002ec0: d005 beq.n 8002ece <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
8002ec2: 4b09 ldr r3, [pc, #36] ; (8002ee8 <HAL_Delay+0x40>)
8002ec4: 781b ldrb r3, [r3, #0]
8002ec6: 461a mov r2, r3
8002ec8: 68fb ldr r3, [r7, #12]
8002eca: 4413 add r3, r2
8002ecc: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
8002ece: bf00 nop
8002ed0: f7ff ffde bl 8002e90 <HAL_GetTick>
8002ed4: 4602 mov r2, r0
8002ed6: 68bb ldr r3, [r7, #8]
8002ed8: 1ad3 subs r3, r2, r3
8002eda: 68fa ldr r2, [r7, #12]
8002edc: 429a cmp r2, r3
8002ede: d8f7 bhi.n 8002ed0 <HAL_Delay+0x28>
{
}
}
8002ee0: bf00 nop
8002ee2: 3710 adds r7, #16
8002ee4: 46bd mov sp, r7
8002ee6: bd80 pop {r7, pc}
8002ee8: 2000000c .word 0x2000000c
08002eec <HAL_ADC_Init>:
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8002eec: b580 push {r7, lr}
8002eee: b084 sub sp, #16
8002ef0: af00 add r7, sp, #0
8002ef2: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8002ef4: 2300 movs r3, #0
8002ef6: 73fb strb r3, [r7, #15]
/* Check ADC handle */
if(hadc == NULL)
8002ef8: 687b ldr r3, [r7, #4]
8002efa: 2b00 cmp r3, #0
8002efc: d101 bne.n 8002f02 <HAL_ADC_Init+0x16>
{
return HAL_ERROR;
8002efe: 2301 movs r3, #1
8002f00: e033 b.n 8002f6a <HAL_ADC_Init+0x7e>
if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
{
assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
}
if(hadc->State == HAL_ADC_STATE_RESET)
8002f02: 687b ldr r3, [r7, #4]
8002f04: 6c1b ldr r3, [r3, #64] ; 0x40
8002f06: 2b00 cmp r3, #0
8002f08: d109 bne.n 8002f1e <HAL_ADC_Init+0x32>
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8002f0a: 6878 ldr r0, [r7, #4]
8002f0c: f7ff fdb2 bl 8002a74 <HAL_ADC_MspInit>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8002f10: 687b ldr r3, [r7, #4]
8002f12: 2200 movs r2, #0
8002f14: 645a str r2, [r3, #68] ; 0x44
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8002f16: 687b ldr r3, [r7, #4]
8002f18: 2200 movs r2, #0
8002f1a: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
8002f1e: 687b ldr r3, [r7, #4]
8002f20: 6c1b ldr r3, [r3, #64] ; 0x40
8002f22: f003 0310 and.w r3, r3, #16
8002f26: 2b00 cmp r3, #0
8002f28: d118 bne.n 8002f5c <HAL_ADC_Init+0x70>
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8002f2a: 687b ldr r3, [r7, #4]
8002f2c: 6c1b ldr r3, [r3, #64] ; 0x40
8002f2e: f423 5388 bic.w r3, r3, #4352 ; 0x1100
8002f32: f023 0302 bic.w r3, r3, #2
8002f36: f043 0202 orr.w r2, r3, #2
8002f3a: 687b ldr r3, [r7, #4]
8002f3c: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
HAL_ADC_STATE_BUSY_INTERNAL);
/* Set ADC parameters */
ADC_Init(hadc);
8002f3e: 6878 ldr r0, [r7, #4]
8002f40: f000 faa2 bl 8003488 <ADC_Init>
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8002f44: 687b ldr r3, [r7, #4]
8002f46: 2200 movs r2, #0
8002f48: 645a str r2, [r3, #68] ; 0x44
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8002f4a: 687b ldr r3, [r7, #4]
8002f4c: 6c1b ldr r3, [r3, #64] ; 0x40
8002f4e: f023 0303 bic.w r3, r3, #3
8002f52: f043 0201 orr.w r2, r3, #1
8002f56: 687b ldr r3, [r7, #4]
8002f58: 641a str r2, [r3, #64] ; 0x40
8002f5a: e001 b.n 8002f60 <HAL_ADC_Init+0x74>
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_READY);
}
else
{
tmp_hal_status = HAL_ERROR;
8002f5c: 2301 movs r3, #1
8002f5e: 73fb strb r3, [r7, #15]
}
/* Release Lock */
__HAL_UNLOCK(hadc);
8002f60: 687b ldr r3, [r7, #4]
8002f62: 2200 movs r2, #0
8002f64: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Return function status */
return tmp_hal_status;
8002f68: 7bfb ldrb r3, [r7, #15]
}
8002f6a: 4618 mov r0, r3
8002f6c: 3710 adds r7, #16
8002f6e: 46bd mov sp, r7
8002f70: bd80 pop {r7, pc}
...
08002f74 <HAL_ADC_Start>:
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
{
8002f74: b480 push {r7}
8002f76: b085 sub sp, #20
8002f78: af00 add r7, sp, #0
8002f7a: 6078 str r0, [r7, #4]
__IO uint32_t counter = 0U;
8002f7c: 2300 movs r3, #0
8002f7e: 60bb str r3, [r7, #8]
/* Check the parameters */
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
/* Process locked */
__HAL_LOCK(hadc);
8002f80: 687b ldr r3, [r7, #4]
8002f82: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
8002f86: 2b01 cmp r3, #1
8002f88: d101 bne.n 8002f8e <HAL_ADC_Start+0x1a>
8002f8a: 2302 movs r3, #2
8002f8c: e0a5 b.n 80030da <HAL_ADC_Start+0x166>
8002f8e: 687b ldr r3, [r7, #4]
8002f90: 2201 movs r2, #1
8002f92: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Enable the ADC peripheral */
/* Check if ADC peripheral is disabled in order to enable it and wait during
Tstab time the ADC's stabilization */
if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
8002f96: 687b ldr r3, [r7, #4]
8002f98: 681b ldr r3, [r3, #0]
8002f9a: 689b ldr r3, [r3, #8]
8002f9c: f003 0301 and.w r3, r3, #1
8002fa0: 2b01 cmp r3, #1
8002fa2: d018 beq.n 8002fd6 <HAL_ADC_Start+0x62>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
8002fa4: 687b ldr r3, [r7, #4]
8002fa6: 681b ldr r3, [r3, #0]
8002fa8: 689a ldr r2, [r3, #8]
8002faa: 687b ldr r3, [r7, #4]
8002fac: 681b ldr r3, [r3, #0]
8002fae: f042 0201 orr.w r2, r2, #1
8002fb2: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
8002fb4: 4b4c ldr r3, [pc, #304] ; (80030e8 <HAL_ADC_Start+0x174>)
8002fb6: 681b ldr r3, [r3, #0]
8002fb8: 4a4c ldr r2, [pc, #304] ; (80030ec <HAL_ADC_Start+0x178>)
8002fba: fba2 2303 umull r2, r3, r2, r3
8002fbe: 0c9a lsrs r2, r3, #18
8002fc0: 4613 mov r3, r2
8002fc2: 005b lsls r3, r3, #1
8002fc4: 4413 add r3, r2
8002fc6: 60bb str r3, [r7, #8]
while(counter != 0U)
8002fc8: e002 b.n 8002fd0 <HAL_ADC_Start+0x5c>
{
counter--;
8002fca: 68bb ldr r3, [r7, #8]
8002fcc: 3b01 subs r3, #1
8002fce: 60bb str r3, [r7, #8]
while(counter != 0U)
8002fd0: 68bb ldr r3, [r7, #8]
8002fd2: 2b00 cmp r3, #0
8002fd4: d1f9 bne.n 8002fca <HAL_ADC_Start+0x56>
}
}
/* Start conversion if ADC is effectively enabled */
if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
8002fd6: 687b ldr r3, [r7, #4]
8002fd8: 681b ldr r3, [r3, #0]
8002fda: 689b ldr r3, [r3, #8]
8002fdc: f003 0301 and.w r3, r3, #1
8002fe0: 2b01 cmp r3, #1
8002fe2: d179 bne.n 80030d8 <HAL_ADC_Start+0x164>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular group operation */
ADC_STATE_CLR_SET(hadc->State,
8002fe4: 687b ldr r3, [r7, #4]
8002fe6: 6c1b ldr r3, [r3, #64] ; 0x40
8002fe8: f423 63e0 bic.w r3, r3, #1792 ; 0x700
8002fec: f023 0301 bic.w r3, r3, #1
8002ff0: f443 7280 orr.w r2, r3, #256 ; 0x100
8002ff4: 687b ldr r3, [r7, #4]
8002ff6: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
HAL_ADC_STATE_REG_BUSY);
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8002ff8: 687b ldr r3, [r7, #4]
8002ffa: 681b ldr r3, [r3, #0]
8002ffc: 685b ldr r3, [r3, #4]
8002ffe: f403 6380 and.w r3, r3, #1024 ; 0x400
8003002: 2b00 cmp r3, #0
8003004: d007 beq.n 8003016 <HAL_ADC_Start+0xa2>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8003006: 687b ldr r3, [r7, #4]
8003008: 6c1b ldr r3, [r3, #64] ; 0x40
800300a: f423 5340 bic.w r3, r3, #12288 ; 0x3000
800300e: f443 5280 orr.w r2, r3, #4096 ; 0x1000
8003012: 687b ldr r3, [r7, #4]
8003014: 641a str r2, [r3, #64] ; 0x40
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8003016: 687b ldr r3, [r7, #4]
8003018: 6c1b ldr r3, [r3, #64] ; 0x40
800301a: f403 5380 and.w r3, r3, #4096 ; 0x1000
800301e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
8003022: d106 bne.n 8003032 <HAL_ADC_Start+0xbe>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8003024: 687b ldr r3, [r7, #4]
8003026: 6c5b ldr r3, [r3, #68] ; 0x44
8003028: f023 0206 bic.w r2, r3, #6
800302c: 687b ldr r3, [r7, #4]
800302e: 645a str r2, [r3, #68] ; 0x44
8003030: e002 b.n 8003038 <HAL_ADC_Start+0xc4>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
8003032: 687b ldr r3, [r7, #4]
8003034: 2200 movs r2, #0
8003036: 645a str r2, [r3, #68] ; 0x44
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
8003038: 687b ldr r3, [r7, #4]
800303a: 2200 movs r2, #0
800303c: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
/* control register) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
8003040: 4b2b ldr r3, [pc, #172] ; (80030f0 <HAL_ADC_Start+0x17c>)
8003042: 60fb str r3, [r7, #12]
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
8003044: 687b ldr r3, [r7, #4]
8003046: 681b ldr r3, [r3, #0]
8003048: f06f 0222 mvn.w r2, #34 ; 0x22
800304c: 601a str r2, [r3, #0]
/* Check if Multimode enabled */
if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
800304e: 68fb ldr r3, [r7, #12]
8003050: 685b ldr r3, [r3, #4]
8003052: f003 031f and.w r3, r3, #31
8003056: 2b00 cmp r3, #0
8003058: d12a bne.n 80030b0 <HAL_ADC_Start+0x13c>
{
#if defined(ADC2) && defined(ADC3)
if((hadc->Instance == ADC1) || ((hadc->Instance == ADC2) && ((ADC->CCR & ADC_CCR_MULTI_Msk) < ADC_CCR_MULTI_0)) \
800305a: 687b ldr r3, [r7, #4]
800305c: 681b ldr r3, [r3, #0]
800305e: 4a25 ldr r2, [pc, #148] ; (80030f4 <HAL_ADC_Start+0x180>)
8003060: 4293 cmp r3, r2
8003062: d015 beq.n 8003090 <HAL_ADC_Start+0x11c>
8003064: 687b ldr r3, [r7, #4]
8003066: 681b ldr r3, [r3, #0]
8003068: 4a23 ldr r2, [pc, #140] ; (80030f8 <HAL_ADC_Start+0x184>)
800306a: 4293 cmp r3, r2
800306c: d105 bne.n 800307a <HAL_ADC_Start+0x106>
800306e: 4b20 ldr r3, [pc, #128] ; (80030f0 <HAL_ADC_Start+0x17c>)
8003070: 685b ldr r3, [r3, #4]
8003072: f003 031f and.w r3, r3, #31
8003076: 2b00 cmp r3, #0
8003078: d00a beq.n 8003090 <HAL_ADC_Start+0x11c>
|| ((hadc->Instance == ADC3) && ((ADC->CCR & ADC_CCR_MULTI_Msk) < ADC_CCR_MULTI_4)))
800307a: 687b ldr r3, [r7, #4]
800307c: 681b ldr r3, [r3, #0]
800307e: 4a1f ldr r2, [pc, #124] ; (80030fc <HAL_ADC_Start+0x188>)
8003080: 4293 cmp r3, r2
8003082: d129 bne.n 80030d8 <HAL_ADC_Start+0x164>
8003084: 4b1a ldr r3, [pc, #104] ; (80030f0 <HAL_ADC_Start+0x17c>)
8003086: 685b ldr r3, [r3, #4]
8003088: f003 031f and.w r3, r3, #31
800308c: 2b0f cmp r3, #15
800308e: d823 bhi.n 80030d8 <HAL_ADC_Start+0x164>
{
#endif /* ADC2 || ADC3 */
/* if no external trigger present enable software conversion of regular channels */
if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
8003090: 687b ldr r3, [r7, #4]
8003092: 681b ldr r3, [r3, #0]
8003094: 689b ldr r3, [r3, #8]
8003096: f003 5340 and.w r3, r3, #805306368 ; 0x30000000
800309a: 2b00 cmp r3, #0
800309c: d11c bne.n 80030d8 <HAL_ADC_Start+0x164>
{
/* Enable the selected ADC software conversion for regular group */
hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
800309e: 687b ldr r3, [r7, #4]
80030a0: 681b ldr r3, [r3, #0]
80030a2: 689a ldr r2, [r3, #8]
80030a4: 687b ldr r3, [r7, #4]
80030a6: 681b ldr r3, [r3, #0]
80030a8: f042 4280 orr.w r2, r2, #1073741824 ; 0x40000000
80030ac: 609a str r2, [r3, #8]
80030ae: e013 b.n 80030d8 <HAL_ADC_Start+0x164>
#endif /* ADC2 || ADC3 */
}
else
{
/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
80030b0: 687b ldr r3, [r7, #4]
80030b2: 681b ldr r3, [r3, #0]
80030b4: 4a0f ldr r2, [pc, #60] ; (80030f4 <HAL_ADC_Start+0x180>)
80030b6: 4293 cmp r3, r2
80030b8: d10e bne.n 80030d8 <HAL_ADC_Start+0x164>
80030ba: 687b ldr r3, [r7, #4]
80030bc: 681b ldr r3, [r3, #0]
80030be: 689b ldr r3, [r3, #8]
80030c0: f003 5340 and.w r3, r3, #805306368 ; 0x30000000
80030c4: 2b00 cmp r3, #0
80030c6: d107 bne.n 80030d8 <HAL_ADC_Start+0x164>
{
/* Enable the selected ADC software conversion for regular group */
hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
80030c8: 687b ldr r3, [r7, #4]
80030ca: 681b ldr r3, [r3, #0]
80030cc: 689a ldr r2, [r3, #8]
80030ce: 687b ldr r3, [r7, #4]
80030d0: 681b ldr r3, [r3, #0]
80030d2: f042 4280 orr.w r2, r2, #1073741824 ; 0x40000000
80030d6: 609a str r2, [r3, #8]
}
}
}
/* Return function status */
return HAL_OK;
80030d8: 2300 movs r3, #0
}
80030da: 4618 mov r0, r3
80030dc: 3714 adds r7, #20
80030de: 46bd mov sp, r7
80030e0: f85d 7b04 ldr.w r7, [sp], #4
80030e4: 4770 bx lr
80030e6: bf00 nop
80030e8: 20000004 .word 0x20000004
80030ec: 431bde83 .word 0x431bde83
80030f0: 40012300 .word 0x40012300
80030f4: 40012000 .word 0x40012000
80030f8: 40012100 .word 0x40012100
80030fc: 40012200 .word 0x40012200
08003100 <HAL_ADC_PollForConversion>:
* the configuration information for the specified ADC.
* @param Timeout Timeout value in millisecond.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
{
8003100: b580 push {r7, lr}
8003102: b084 sub sp, #16
8003104: af00 add r7, sp, #0
8003106: 6078 str r0, [r7, #4]
8003108: 6039 str r1, [r7, #0]
uint32_t tickstart = 0U;
800310a: 2300 movs r3, #0
800310c: 60fb str r3, [r7, #12]
/* each conversion: */
/* Particular case is ADC configured in DMA mode and ADC sequencer with */
/* several ranks and polling for end of each conversion. */
/* For code simplicity sake, this particular case is generalized to */
/* ADC configured in DMA mode and polling for end of each conversion. */
if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
800310e: 687b ldr r3, [r7, #4]
8003110: 681b ldr r3, [r3, #0]
8003112: 689b ldr r3, [r3, #8]
8003114: f403 6380 and.w r3, r3, #1024 ; 0x400
8003118: f5b3 6f80 cmp.w r3, #1024 ; 0x400
800311c: d113 bne.n 8003146 <HAL_ADC_PollForConversion+0x46>
HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
800311e: 687b ldr r3, [r7, #4]
8003120: 681b ldr r3, [r3, #0]
8003122: 689b ldr r3, [r3, #8]
8003124: f403 7380 and.w r3, r3, #256 ; 0x100
if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
8003128: f5b3 7f80 cmp.w r3, #256 ; 0x100
800312c: d10b bne.n 8003146 <HAL_ADC_PollForConversion+0x46>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
800312e: 687b ldr r3, [r7, #4]
8003130: 6c1b ldr r3, [r3, #64] ; 0x40
8003132: f043 0220 orr.w r2, r3, #32
8003136: 687b ldr r3, [r7, #4]
8003138: 641a str r2, [r3, #64] ; 0x40
/* Process unlocked */
__HAL_UNLOCK(hadc);
800313a: 687b ldr r3, [r7, #4]
800313c: 2200 movs r2, #0
800313e: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8003142: 2301 movs r3, #1
8003144: e05c b.n 8003200 <HAL_ADC_PollForConversion+0x100>
}
/* Get tick */
tickstart = HAL_GetTick();
8003146: f7ff fea3 bl 8002e90 <HAL_GetTick>
800314a: 60f8 str r0, [r7, #12]
/* Check End of conversion flag */
while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
800314c: e01a b.n 8003184 <HAL_ADC_PollForConversion+0x84>
{
/* Check if timeout is disabled (set to infinite wait) */
if(Timeout != HAL_MAX_DELAY)
800314e: 683b ldr r3, [r7, #0]
8003150: f1b3 3fff cmp.w r3, #4294967295
8003154: d016 beq.n 8003184 <HAL_ADC_PollForConversion+0x84>
{
if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
8003156: 683b ldr r3, [r7, #0]
8003158: 2b00 cmp r3, #0
800315a: d007 beq.n 800316c <HAL_ADC_PollForConversion+0x6c>
800315c: f7ff fe98 bl 8002e90 <HAL_GetTick>
8003160: 4602 mov r2, r0
8003162: 68fb ldr r3, [r7, #12]
8003164: 1ad3 subs r3, r2, r3
8003166: 683a ldr r2, [r7, #0]
8003168: 429a cmp r2, r3
800316a: d20b bcs.n 8003184 <HAL_ADC_PollForConversion+0x84>
{
/* Update ADC state machine to timeout */
SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
800316c: 687b ldr r3, [r7, #4]
800316e: 6c1b ldr r3, [r3, #64] ; 0x40
8003170: f043 0204 orr.w r2, r3, #4
8003174: 687b ldr r3, [r7, #4]
8003176: 641a str r2, [r3, #64] ; 0x40
/* Process unlocked */
__HAL_UNLOCK(hadc);
8003178: 687b ldr r3, [r7, #4]
800317a: 2200 movs r2, #0
800317c: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_TIMEOUT;
8003180: 2303 movs r3, #3
8003182: e03d b.n 8003200 <HAL_ADC_PollForConversion+0x100>
while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
8003184: 687b ldr r3, [r7, #4]
8003186: 681b ldr r3, [r3, #0]
8003188: 681b ldr r3, [r3, #0]
800318a: f003 0302 and.w r3, r3, #2
800318e: 2b02 cmp r3, #2
8003190: d1dd bne.n 800314e <HAL_ADC_PollForConversion+0x4e>
}
}
}
/* Clear regular group conversion flag */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
8003192: 687b ldr r3, [r7, #4]
8003194: 681b ldr r3, [r3, #0]
8003196: f06f 0212 mvn.w r2, #18
800319a: 601a str r2, [r3, #0]
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
800319c: 687b ldr r3, [r7, #4]
800319e: 6c1b ldr r3, [r3, #64] ; 0x40
80031a0: f443 7200 orr.w r2, r3, #512 ; 0x200
80031a4: 687b ldr r3, [r7, #4]
80031a6: 641a str r2, [r3, #64] ; 0x40
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F4, there is no independent flag of end of sequence. */
/* The test of scan sequence on going is done either with scan */
/* sequence disabled or with end of conversion flag set to */
/* of end of sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80031a8: 687b ldr r3, [r7, #4]
80031aa: 681b ldr r3, [r3, #0]
80031ac: 689b ldr r3, [r3, #8]
80031ae: f003 5340 and.w r3, r3, #805306368 ; 0x30000000
80031b2: 2b00 cmp r3, #0
80031b4: d123 bne.n 80031fe <HAL_ADC_PollForConversion+0xfe>
(hadc->Init.ContinuousConvMode == DISABLE) &&
80031b6: 687b ldr r3, [r7, #4]
80031b8: 7e1b ldrb r3, [r3, #24]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80031ba: 2b00 cmp r3, #0
80031bc: d11f bne.n 80031fe <HAL_ADC_PollForConversion+0xfe>
(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
80031be: 687b ldr r3, [r7, #4]
80031c0: 681b ldr r3, [r3, #0]
80031c2: 6adb ldr r3, [r3, #44] ; 0x2c
80031c4: f403 0370 and.w r3, r3, #15728640 ; 0xf00000
(hadc->Init.ContinuousConvMode == DISABLE) &&
80031c8: 2b00 cmp r3, #0
80031ca: d006 beq.n 80031da <HAL_ADC_PollForConversion+0xda>
HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
80031cc: 687b ldr r3, [r7, #4]
80031ce: 681b ldr r3, [r3, #0]
80031d0: 689b ldr r3, [r3, #8]
80031d2: f403 6380 and.w r3, r3, #1024 ; 0x400
(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
80031d6: 2b00 cmp r3, #0
80031d8: d111 bne.n 80031fe <HAL_ADC_PollForConversion+0xfe>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
80031da: 687b ldr r3, [r7, #4]
80031dc: 6c1b ldr r3, [r3, #64] ; 0x40
80031de: f423 7280 bic.w r2, r3, #256 ; 0x100
80031e2: 687b ldr r3, [r7, #4]
80031e4: 641a str r2, [r3, #64] ; 0x40
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
80031e6: 687b ldr r3, [r7, #4]
80031e8: 6c1b ldr r3, [r3, #64] ; 0x40
80031ea: f403 5380 and.w r3, r3, #4096 ; 0x1000
80031ee: 2b00 cmp r3, #0
80031f0: d105 bne.n 80031fe <HAL_ADC_PollForConversion+0xfe>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
80031f2: 687b ldr r3, [r7, #4]
80031f4: 6c1b ldr r3, [r3, #64] ; 0x40
80031f6: f043 0201 orr.w r2, r3, #1
80031fa: 687b ldr r3, [r7, #4]
80031fc: 641a str r2, [r3, #64] ; 0x40
}
}
/* Return ADC state */
return HAL_OK;
80031fe: 2300 movs r3, #0
}
8003200: 4618 mov r0, r3
8003202: 3710 adds r7, #16
8003204: 46bd mov sp, r7
8003206: bd80 pop {r7, pc}
08003208 <HAL_ADC_GetValue>:
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval Converted value
*/
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
{
8003208: b480 push {r7}
800320a: b083 sub sp, #12
800320c: af00 add r7, sp, #0
800320e: 6078 str r0, [r7, #4]
/* Return the selected ADC converted value */
return hadc->Instance->DR;
8003210: 687b ldr r3, [r7, #4]
8003212: 681b ldr r3, [r3, #0]
8003214: 6cdb ldr r3, [r3, #76] ; 0x4c
}
8003216: 4618 mov r0, r3
8003218: 370c adds r7, #12
800321a: 46bd mov sp, r7
800321c: f85d 7b04 ldr.w r7, [sp], #4
8003220: 4770 bx lr
...
08003224 <HAL_ADC_ConfigChannel>:
* the configuration information for the specified ADC.
* @param sConfig ADC configuration structure.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8003224: b480 push {r7}
8003226: b085 sub sp, #20
8003228: af00 add r7, sp, #0
800322a: 6078 str r0, [r7, #4]
800322c: 6039 str r1, [r7, #0]
__IO uint32_t counter = 0U;
800322e: 2300 movs r3, #0
8003230: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8003232: 687b ldr r3, [r7, #4]
8003234: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
8003238: 2b01 cmp r3, #1
800323a: d101 bne.n 8003240 <HAL_ADC_ConfigChannel+0x1c>
800323c: 2302 movs r3, #2
800323e: e113 b.n 8003468 <HAL_ADC_ConfigChannel+0x244>
8003240: 687b ldr r3, [r7, #4]
8003242: 2201 movs r2, #1
8003244: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
if (sConfig->Channel > ADC_CHANNEL_9)
8003248: 683b ldr r3, [r7, #0]
800324a: 681b ldr r3, [r3, #0]
800324c: 2b09 cmp r3, #9
800324e: d925 bls.n 800329c <HAL_ADC_ConfigChannel+0x78>
{
/* Clear the old sample time */
hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
8003250: 687b ldr r3, [r7, #4]
8003252: 681b ldr r3, [r3, #0]
8003254: 68d9 ldr r1, [r3, #12]
8003256: 683b ldr r3, [r7, #0]
8003258: 681b ldr r3, [r3, #0]
800325a: b29b uxth r3, r3
800325c: 461a mov r2, r3
800325e: 4613 mov r3, r2
8003260: 005b lsls r3, r3, #1
8003262: 4413 add r3, r2
8003264: 3b1e subs r3, #30
8003266: 2207 movs r2, #7
8003268: fa02 f303 lsl.w r3, r2, r3
800326c: 43da mvns r2, r3
800326e: 687b ldr r3, [r7, #4]
8003270: 681b ldr r3, [r3, #0]
8003272: 400a ands r2, r1
8003274: 60da str r2, [r3, #12]
/* Set the new sample time */
hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
8003276: 687b ldr r3, [r7, #4]
8003278: 681b ldr r3, [r3, #0]
800327a: 68d9 ldr r1, [r3, #12]
800327c: 683b ldr r3, [r7, #0]
800327e: 689a ldr r2, [r3, #8]
8003280: 683b ldr r3, [r7, #0]
8003282: 681b ldr r3, [r3, #0]
8003284: b29b uxth r3, r3
8003286: 4618 mov r0, r3
8003288: 4603 mov r3, r0
800328a: 005b lsls r3, r3, #1
800328c: 4403 add r3, r0
800328e: 3b1e subs r3, #30
8003290: 409a lsls r2, r3
8003292: 687b ldr r3, [r7, #4]
8003294: 681b ldr r3, [r3, #0]
8003296: 430a orrs r2, r1
8003298: 60da str r2, [r3, #12]
800329a: e022 b.n 80032e2 <HAL_ADC_ConfigChannel+0xbe>
}
else /* ADC_Channel include in ADC_Channel_[0..9] */
{
/* Clear the old sample time */
hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
800329c: 687b ldr r3, [r7, #4]
800329e: 681b ldr r3, [r3, #0]
80032a0: 6919 ldr r1, [r3, #16]
80032a2: 683b ldr r3, [r7, #0]
80032a4: 681b ldr r3, [r3, #0]
80032a6: b29b uxth r3, r3
80032a8: 461a mov r2, r3
80032aa: 4613 mov r3, r2
80032ac: 005b lsls r3, r3, #1
80032ae: 4413 add r3, r2
80032b0: 2207 movs r2, #7
80032b2: fa02 f303 lsl.w r3, r2, r3
80032b6: 43da mvns r2, r3
80032b8: 687b ldr r3, [r7, #4]
80032ba: 681b ldr r3, [r3, #0]
80032bc: 400a ands r2, r1
80032be: 611a str r2, [r3, #16]
/* Set the new sample time */
hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
80032c0: 687b ldr r3, [r7, #4]
80032c2: 681b ldr r3, [r3, #0]
80032c4: 6919 ldr r1, [r3, #16]
80032c6: 683b ldr r3, [r7, #0]
80032c8: 689a ldr r2, [r3, #8]
80032ca: 683b ldr r3, [r7, #0]
80032cc: 681b ldr r3, [r3, #0]
80032ce: b29b uxth r3, r3
80032d0: 4618 mov r0, r3
80032d2: 4603 mov r3, r0
80032d4: 005b lsls r3, r3, #1
80032d6: 4403 add r3, r0
80032d8: 409a lsls r2, r3
80032da: 687b ldr r3, [r7, #4]
80032dc: 681b ldr r3, [r3, #0]
80032de: 430a orrs r2, r1
80032e0: 611a str r2, [r3, #16]
}
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
80032e2: 683b ldr r3, [r7, #0]
80032e4: 685b ldr r3, [r3, #4]
80032e6: 2b06 cmp r3, #6
80032e8: d824 bhi.n 8003334 <HAL_ADC_ConfigChannel+0x110>
{
/* Clear the old SQx bits for the selected rank */
hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
80032ea: 687b ldr r3, [r7, #4]
80032ec: 681b ldr r3, [r3, #0]
80032ee: 6b59 ldr r1, [r3, #52] ; 0x34
80032f0: 683b ldr r3, [r7, #0]
80032f2: 685a ldr r2, [r3, #4]
80032f4: 4613 mov r3, r2
80032f6: 009b lsls r3, r3, #2
80032f8: 4413 add r3, r2
80032fa: 3b05 subs r3, #5
80032fc: 221f movs r2, #31
80032fe: fa02 f303 lsl.w r3, r2, r3
8003302: 43da mvns r2, r3
8003304: 687b ldr r3, [r7, #4]
8003306: 681b ldr r3, [r3, #0]
8003308: 400a ands r2, r1
800330a: 635a str r2, [r3, #52] ; 0x34
/* Set the SQx bits for the selected rank */
hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
800330c: 687b ldr r3, [r7, #4]
800330e: 681b ldr r3, [r3, #0]
8003310: 6b59 ldr r1, [r3, #52] ; 0x34
8003312: 683b ldr r3, [r7, #0]
8003314: 681b ldr r3, [r3, #0]
8003316: b29b uxth r3, r3
8003318: 4618 mov r0, r3
800331a: 683b ldr r3, [r7, #0]
800331c: 685a ldr r2, [r3, #4]
800331e: 4613 mov r3, r2
8003320: 009b lsls r3, r3, #2
8003322: 4413 add r3, r2
8003324: 3b05 subs r3, #5
8003326: fa00 f203 lsl.w r2, r0, r3
800332a: 687b ldr r3, [r7, #4]
800332c: 681b ldr r3, [r3, #0]
800332e: 430a orrs r2, r1
8003330: 635a str r2, [r3, #52] ; 0x34
8003332: e04c b.n 80033ce <HAL_ADC_ConfigChannel+0x1aa>
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8003334: 683b ldr r3, [r7, #0]
8003336: 685b ldr r3, [r3, #4]
8003338: 2b0c cmp r3, #12
800333a: d824 bhi.n 8003386 <HAL_ADC_ConfigChannel+0x162>
{
/* Clear the old SQx bits for the selected rank */
hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
800333c: 687b ldr r3, [r7, #4]
800333e: 681b ldr r3, [r3, #0]
8003340: 6b19 ldr r1, [r3, #48] ; 0x30
8003342: 683b ldr r3, [r7, #0]
8003344: 685a ldr r2, [r3, #4]
8003346: 4613 mov r3, r2
8003348: 009b lsls r3, r3, #2
800334a: 4413 add r3, r2
800334c: 3b23 subs r3, #35 ; 0x23
800334e: 221f movs r2, #31
8003350: fa02 f303 lsl.w r3, r2, r3
8003354: 43da mvns r2, r3
8003356: 687b ldr r3, [r7, #4]
8003358: 681b ldr r3, [r3, #0]
800335a: 400a ands r2, r1
800335c: 631a str r2, [r3, #48] ; 0x30
/* Set the SQx bits for the selected rank */
hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
800335e: 687b ldr r3, [r7, #4]
8003360: 681b ldr r3, [r3, #0]
8003362: 6b19 ldr r1, [r3, #48] ; 0x30
8003364: 683b ldr r3, [r7, #0]
8003366: 681b ldr r3, [r3, #0]
8003368: b29b uxth r3, r3
800336a: 4618 mov r0, r3
800336c: 683b ldr r3, [r7, #0]
800336e: 685a ldr r2, [r3, #4]
8003370: 4613 mov r3, r2
8003372: 009b lsls r3, r3, #2
8003374: 4413 add r3, r2
8003376: 3b23 subs r3, #35 ; 0x23
8003378: fa00 f203 lsl.w r2, r0, r3
800337c: 687b ldr r3, [r7, #4]
800337e: 681b ldr r3, [r3, #0]
8003380: 430a orrs r2, r1
8003382: 631a str r2, [r3, #48] ; 0x30
8003384: e023 b.n 80033ce <HAL_ADC_ConfigChannel+0x1aa>
}
/* For Rank 13 to 16 */
else
{
/* Clear the old SQx bits for the selected rank */
hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
8003386: 687b ldr r3, [r7, #4]
8003388: 681b ldr r3, [r3, #0]
800338a: 6ad9 ldr r1, [r3, #44] ; 0x2c
800338c: 683b ldr r3, [r7, #0]
800338e: 685a ldr r2, [r3, #4]
8003390: 4613 mov r3, r2
8003392: 009b lsls r3, r3, #2
8003394: 4413 add r3, r2
8003396: 3b41 subs r3, #65 ; 0x41
8003398: 221f movs r2, #31
800339a: fa02 f303 lsl.w r3, r2, r3
800339e: 43da mvns r2, r3
80033a0: 687b ldr r3, [r7, #4]
80033a2: 681b ldr r3, [r3, #0]
80033a4: 400a ands r2, r1
80033a6: 62da str r2, [r3, #44] ; 0x2c
/* Set the SQx bits for the selected rank */
hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
80033a8: 687b ldr r3, [r7, #4]
80033aa: 681b ldr r3, [r3, #0]
80033ac: 6ad9 ldr r1, [r3, #44] ; 0x2c
80033ae: 683b ldr r3, [r7, #0]
80033b0: 681b ldr r3, [r3, #0]
80033b2: b29b uxth r3, r3
80033b4: 4618 mov r0, r3
80033b6: 683b ldr r3, [r7, #0]
80033b8: 685a ldr r2, [r3, #4]
80033ba: 4613 mov r3, r2
80033bc: 009b lsls r3, r3, #2
80033be: 4413 add r3, r2
80033c0: 3b41 subs r3, #65 ; 0x41
80033c2: fa00 f203 lsl.w r2, r0, r3
80033c6: 687b ldr r3, [r7, #4]
80033c8: 681b ldr r3, [r3, #0]
80033ca: 430a orrs r2, r1
80033cc: 62da str r2, [r3, #44] ; 0x2c
}
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
/* control register) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
80033ce: 4b29 ldr r3, [pc, #164] ; (8003474 <HAL_ADC_ConfigChannel+0x250>)
80033d0: 60fb str r3, [r7, #12]
/* if ADC1 Channel_18 is selected for VBAT Channel ennable VBATE */
if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
80033d2: 687b ldr r3, [r7, #4]
80033d4: 681b ldr r3, [r3, #0]
80033d6: 4a28 ldr r2, [pc, #160] ; (8003478 <HAL_ADC_ConfigChannel+0x254>)
80033d8: 4293 cmp r3, r2
80033da: d10f bne.n 80033fc <HAL_ADC_ConfigChannel+0x1d8>
80033dc: 683b ldr r3, [r7, #0]
80033de: 681b ldr r3, [r3, #0]
80033e0: 2b12 cmp r3, #18
80033e2: d10b bne.n 80033fc <HAL_ADC_ConfigChannel+0x1d8>
{
/* Disable the TEMPSENSOR channel in case of using board with multiplixed ADC_CHANNEL_VBAT & ADC_CHANNEL_TEMPSENSOR*/
if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT)
{
tmpADC_Common->CCR &= ~ADC_CCR_TSVREFE;
80033e4: 68fb ldr r3, [r7, #12]
80033e6: 685b ldr r3, [r3, #4]
80033e8: f423 0200 bic.w r2, r3, #8388608 ; 0x800000
80033ec: 68fb ldr r3, [r7, #12]
80033ee: 605a str r2, [r3, #4]
}
/* Enable the VBAT channel*/
tmpADC_Common->CCR |= ADC_CCR_VBATE;
80033f0: 68fb ldr r3, [r7, #12]
80033f2: 685b ldr r3, [r3, #4]
80033f4: f443 0280 orr.w r2, r3, #4194304 ; 0x400000
80033f8: 68fb ldr r3, [r7, #12]
80033fa: 605a str r2, [r3, #4]
}
/* if ADC1 Channel_16 or Channel_18 is selected for Temperature sensor or
Channel_17 is selected for VREFINT enable TSVREFE */
if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
80033fc: 687b ldr r3, [r7, #4]
80033fe: 681b ldr r3, [r3, #0]
8003400: 4a1d ldr r2, [pc, #116] ; (8003478 <HAL_ADC_ConfigChannel+0x254>)
8003402: 4293 cmp r3, r2
8003404: d12b bne.n 800345e <HAL_ADC_ConfigChannel+0x23a>
8003406: 683b ldr r3, [r7, #0]
8003408: 681b ldr r3, [r3, #0]
800340a: 4a1c ldr r2, [pc, #112] ; (800347c <HAL_ADC_ConfigChannel+0x258>)
800340c: 4293 cmp r3, r2
800340e: d003 beq.n 8003418 <HAL_ADC_ConfigChannel+0x1f4>
8003410: 683b ldr r3, [r7, #0]
8003412: 681b ldr r3, [r3, #0]
8003414: 2b11 cmp r3, #17
8003416: d122 bne.n 800345e <HAL_ADC_ConfigChannel+0x23a>
{
/* Disable the VBAT channel in case of using board with multiplixed ADC_CHANNEL_VBAT & ADC_CHANNEL_TEMPSENSOR*/
if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT)
{
tmpADC_Common->CCR &= ~ADC_CCR_VBATE;
8003418: 68fb ldr r3, [r7, #12]
800341a: 685b ldr r3, [r3, #4]
800341c: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
8003420: 68fb ldr r3, [r7, #12]
8003422: 605a str r2, [r3, #4]
}
/* Enable the Temperature sensor and VREFINT channel*/
tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
8003424: 68fb ldr r3, [r7, #12]
8003426: 685b ldr r3, [r3, #4]
8003428: f443 0200 orr.w r2, r3, #8388608 ; 0x800000
800342c: 68fb ldr r3, [r7, #12]
800342e: 605a str r2, [r3, #4]
if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
8003430: 683b ldr r3, [r7, #0]
8003432: 681b ldr r3, [r3, #0]
8003434: 4a11 ldr r2, [pc, #68] ; (800347c <HAL_ADC_ConfigChannel+0x258>)
8003436: 4293 cmp r3, r2
8003438: d111 bne.n 800345e <HAL_ADC_ConfigChannel+0x23a>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
800343a: 4b11 ldr r3, [pc, #68] ; (8003480 <HAL_ADC_ConfigChannel+0x25c>)
800343c: 681b ldr r3, [r3, #0]
800343e: 4a11 ldr r2, [pc, #68] ; (8003484 <HAL_ADC_ConfigChannel+0x260>)
8003440: fba2 2303 umull r2, r3, r2, r3
8003444: 0c9a lsrs r2, r3, #18
8003446: 4613 mov r3, r2
8003448: 009b lsls r3, r3, #2
800344a: 4413 add r3, r2
800344c: 005b lsls r3, r3, #1
800344e: 60bb str r3, [r7, #8]
while(counter != 0U)
8003450: e002 b.n 8003458 <HAL_ADC_ConfigChannel+0x234>
{
counter--;
8003452: 68bb ldr r3, [r7, #8]
8003454: 3b01 subs r3, #1
8003456: 60bb str r3, [r7, #8]
while(counter != 0U)
8003458: 68bb ldr r3, [r7, #8]
800345a: 2b00 cmp r3, #0
800345c: d1f9 bne.n 8003452 <HAL_ADC_ConfigChannel+0x22e>
}
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
800345e: 687b ldr r3, [r7, #4]
8003460: 2200 movs r2, #0
8003462: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Return function status */
return HAL_OK;
8003466: 2300 movs r3, #0
}
8003468: 4618 mov r0, r3
800346a: 3714 adds r7, #20
800346c: 46bd mov sp, r7
800346e: f85d 7b04 ldr.w r7, [sp], #4
8003472: 4770 bx lr
8003474: 40012300 .word 0x40012300
8003478: 40012000 .word 0x40012000
800347c: 10000012 .word 0x10000012
8003480: 20000004 .word 0x20000004
8003484: 431bde83 .word 0x431bde83
08003488 <ADC_Init>:
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
static void ADC_Init(ADC_HandleTypeDef* hadc)
{
8003488: b480 push {r7}
800348a: b085 sub sp, #20
800348c: af00 add r7, sp, #0
800348e: 6078 str r0, [r7, #4]
/* Set ADC parameters */
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
/* control register) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
8003490: 4b79 ldr r3, [pc, #484] ; (8003678 <ADC_Init+0x1f0>)
8003492: 60fb str r3, [r7, #12]
/* Set the ADC clock prescaler */
tmpADC_Common->CCR &= ~(ADC_CCR_ADCPRE);
8003494: 68fb ldr r3, [r7, #12]
8003496: 685b ldr r3, [r3, #4]
8003498: f423 3240 bic.w r2, r3, #196608 ; 0x30000
800349c: 68fb ldr r3, [r7, #12]
800349e: 605a str r2, [r3, #4]
tmpADC_Common->CCR |= hadc->Init.ClockPrescaler;
80034a0: 68fb ldr r3, [r7, #12]
80034a2: 685a ldr r2, [r3, #4]
80034a4: 687b ldr r3, [r7, #4]
80034a6: 685b ldr r3, [r3, #4]
80034a8: 431a orrs r2, r3
80034aa: 68fb ldr r3, [r7, #12]
80034ac: 605a str r2, [r3, #4]
/* Set ADC scan mode */
hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
80034ae: 687b ldr r3, [r7, #4]
80034b0: 681b ldr r3, [r3, #0]
80034b2: 685a ldr r2, [r3, #4]
80034b4: 687b ldr r3, [r7, #4]
80034b6: 681b ldr r3, [r3, #0]
80034b8: f422 7280 bic.w r2, r2, #256 ; 0x100
80034bc: 605a str r2, [r3, #4]
hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
80034be: 687b ldr r3, [r7, #4]
80034c0: 681b ldr r3, [r3, #0]
80034c2: 6859 ldr r1, [r3, #4]
80034c4: 687b ldr r3, [r7, #4]
80034c6: 691b ldr r3, [r3, #16]
80034c8: 021a lsls r2, r3, #8
80034ca: 687b ldr r3, [r7, #4]
80034cc: 681b ldr r3, [r3, #0]
80034ce: 430a orrs r2, r1
80034d0: 605a str r2, [r3, #4]
/* Set ADC resolution */
hadc->Instance->CR1 &= ~(ADC_CR1_RES);
80034d2: 687b ldr r3, [r7, #4]
80034d4: 681b ldr r3, [r3, #0]
80034d6: 685a ldr r2, [r3, #4]
80034d8: 687b ldr r3, [r7, #4]
80034da: 681b ldr r3, [r3, #0]
80034dc: f022 7240 bic.w r2, r2, #50331648 ; 0x3000000
80034e0: 605a str r2, [r3, #4]
hadc->Instance->CR1 |= hadc->Init.Resolution;
80034e2: 687b ldr r3, [r7, #4]
80034e4: 681b ldr r3, [r3, #0]
80034e6: 6859 ldr r1, [r3, #4]
80034e8: 687b ldr r3, [r7, #4]
80034ea: 689a ldr r2, [r3, #8]
80034ec: 687b ldr r3, [r7, #4]
80034ee: 681b ldr r3, [r3, #0]
80034f0: 430a orrs r2, r1
80034f2: 605a str r2, [r3, #4]
/* Set ADC data alignment */
hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
80034f4: 687b ldr r3, [r7, #4]
80034f6: 681b ldr r3, [r3, #0]
80034f8: 689a ldr r2, [r3, #8]
80034fa: 687b ldr r3, [r7, #4]
80034fc: 681b ldr r3, [r3, #0]
80034fe: f422 6200 bic.w r2, r2, #2048 ; 0x800
8003502: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= hadc->Init.DataAlign;
8003504: 687b ldr r3, [r7, #4]
8003506: 681b ldr r3, [r3, #0]
8003508: 6899 ldr r1, [r3, #8]
800350a: 687b ldr r3, [r7, #4]
800350c: 68da ldr r2, [r3, #12]
800350e: 687b ldr r3, [r7, #4]
8003510: 681b ldr r3, [r3, #0]
8003512: 430a orrs r2, r1
8003514: 609a str r2, [r3, #8]
/* Enable external trigger if trigger selection is different of software */
/* start. */
/* Note: This configuration keeps the hardware feature of parameter */
/* ExternalTrigConvEdge "trigger edge none" equivalent to */
/* software start. */
if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
8003516: 687b ldr r3, [r7, #4]
8003518: 6a9b ldr r3, [r3, #40] ; 0x28
800351a: 4a58 ldr r2, [pc, #352] ; (800367c <ADC_Init+0x1f4>)
800351c: 4293 cmp r3, r2
800351e: d022 beq.n 8003566 <ADC_Init+0xde>
{
/* Select external trigger to start conversion */
hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
8003520: 687b ldr r3, [r7, #4]
8003522: 681b ldr r3, [r3, #0]
8003524: 689a ldr r2, [r3, #8]
8003526: 687b ldr r3, [r7, #4]
8003528: 681b ldr r3, [r3, #0]
800352a: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000
800352e: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
8003530: 687b ldr r3, [r7, #4]
8003532: 681b ldr r3, [r3, #0]
8003534: 6899 ldr r1, [r3, #8]
8003536: 687b ldr r3, [r7, #4]
8003538: 6a9a ldr r2, [r3, #40] ; 0x28
800353a: 687b ldr r3, [r7, #4]
800353c: 681b ldr r3, [r3, #0]
800353e: 430a orrs r2, r1
8003540: 609a str r2, [r3, #8]
/* Select external trigger polarity */
hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
8003542: 687b ldr r3, [r7, #4]
8003544: 681b ldr r3, [r3, #0]
8003546: 689a ldr r2, [r3, #8]
8003548: 687b ldr r3, [r7, #4]
800354a: 681b ldr r3, [r3, #0]
800354c: f022 5240 bic.w r2, r2, #805306368 ; 0x30000000
8003550: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
8003552: 687b ldr r3, [r7, #4]
8003554: 681b ldr r3, [r3, #0]
8003556: 6899 ldr r1, [r3, #8]
8003558: 687b ldr r3, [r7, #4]
800355a: 6ada ldr r2, [r3, #44] ; 0x2c
800355c: 687b ldr r3, [r7, #4]
800355e: 681b ldr r3, [r3, #0]
8003560: 430a orrs r2, r1
8003562: 609a str r2, [r3, #8]
8003564: e00f b.n 8003586 <ADC_Init+0xfe>
}
else
{
/* Reset the external trigger */
hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
8003566: 687b ldr r3, [r7, #4]
8003568: 681b ldr r3, [r3, #0]
800356a: 689a ldr r2, [r3, #8]
800356c: 687b ldr r3, [r7, #4]
800356e: 681b ldr r3, [r3, #0]
8003570: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000
8003574: 609a str r2, [r3, #8]
hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
8003576: 687b ldr r3, [r7, #4]
8003578: 681b ldr r3, [r3, #0]
800357a: 689a ldr r2, [r3, #8]
800357c: 687b ldr r3, [r7, #4]
800357e: 681b ldr r3, [r3, #0]
8003580: f022 5240 bic.w r2, r2, #805306368 ; 0x30000000
8003584: 609a str r2, [r3, #8]
}
/* Enable or disable ADC continuous conversion mode */
hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
8003586: 687b ldr r3, [r7, #4]
8003588: 681b ldr r3, [r3, #0]
800358a: 689a ldr r2, [r3, #8]
800358c: 687b ldr r3, [r7, #4]
800358e: 681b ldr r3, [r3, #0]
8003590: f022 0202 bic.w r2, r2, #2
8003594: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode);
8003596: 687b ldr r3, [r7, #4]
8003598: 681b ldr r3, [r3, #0]
800359a: 6899 ldr r1, [r3, #8]
800359c: 687b ldr r3, [r7, #4]
800359e: 7e1b ldrb r3, [r3, #24]
80035a0: 005a lsls r2, r3, #1
80035a2: 687b ldr r3, [r7, #4]
80035a4: 681b ldr r3, [r3, #0]
80035a6: 430a orrs r2, r1
80035a8: 609a str r2, [r3, #8]
if(hadc->Init.DiscontinuousConvMode != DISABLE)
80035aa: 687b ldr r3, [r7, #4]
80035ac: f893 3020 ldrb.w r3, [r3, #32]
80035b0: 2b00 cmp r3, #0
80035b2: d01b beq.n 80035ec <ADC_Init+0x164>
{
assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
/* Enable the selected ADC regular discontinuous mode */
hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
80035b4: 687b ldr r3, [r7, #4]
80035b6: 681b ldr r3, [r3, #0]
80035b8: 685a ldr r2, [r3, #4]
80035ba: 687b ldr r3, [r7, #4]
80035bc: 681b ldr r3, [r3, #0]
80035be: f442 6200 orr.w r2, r2, #2048 ; 0x800
80035c2: 605a str r2, [r3, #4]
/* Set the number of channels to be converted in discontinuous mode */
hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
80035c4: 687b ldr r3, [r7, #4]
80035c6: 681b ldr r3, [r3, #0]
80035c8: 685a ldr r2, [r3, #4]
80035ca: 687b ldr r3, [r7, #4]
80035cc: 681b ldr r3, [r3, #0]
80035ce: f422 4260 bic.w r2, r2, #57344 ; 0xe000
80035d2: 605a str r2, [r3, #4]
hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
80035d4: 687b ldr r3, [r7, #4]
80035d6: 681b ldr r3, [r3, #0]
80035d8: 6859 ldr r1, [r3, #4]
80035da: 687b ldr r3, [r7, #4]
80035dc: 6a5b ldr r3, [r3, #36] ; 0x24
80035de: 3b01 subs r3, #1
80035e0: 035a lsls r2, r3, #13
80035e2: 687b ldr r3, [r7, #4]
80035e4: 681b ldr r3, [r3, #0]
80035e6: 430a orrs r2, r1
80035e8: 605a str r2, [r3, #4]
80035ea: e007 b.n 80035fc <ADC_Init+0x174>
}
else
{
/* Disable the selected ADC regular discontinuous mode */
hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
80035ec: 687b ldr r3, [r7, #4]
80035ee: 681b ldr r3, [r3, #0]
80035f0: 685a ldr r2, [r3, #4]
80035f2: 687b ldr r3, [r7, #4]
80035f4: 681b ldr r3, [r3, #0]
80035f6: f422 6200 bic.w r2, r2, #2048 ; 0x800
80035fa: 605a str r2, [r3, #4]
}
/* Set ADC number of conversion */
hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
80035fc: 687b ldr r3, [r7, #4]
80035fe: 681b ldr r3, [r3, #0]
8003600: 6ada ldr r2, [r3, #44] ; 0x2c
8003602: 687b ldr r3, [r7, #4]
8003604: 681b ldr r3, [r3, #0]
8003606: f422 0270 bic.w r2, r2, #15728640 ; 0xf00000
800360a: 62da str r2, [r3, #44] ; 0x2c
hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion);
800360c: 687b ldr r3, [r7, #4]
800360e: 681b ldr r3, [r3, #0]
8003610: 6ad9 ldr r1, [r3, #44] ; 0x2c
8003612: 687b ldr r3, [r7, #4]
8003614: 69db ldr r3, [r3, #28]
8003616: 3b01 subs r3, #1
8003618: 051a lsls r2, r3, #20
800361a: 687b ldr r3, [r7, #4]
800361c: 681b ldr r3, [r3, #0]
800361e: 430a orrs r2, r1
8003620: 62da str r2, [r3, #44] ; 0x2c
/* Enable or disable ADC DMA continuous request */
hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
8003622: 687b ldr r3, [r7, #4]
8003624: 681b ldr r3, [r3, #0]
8003626: 689a ldr r2, [r3, #8]
8003628: 687b ldr r3, [r7, #4]
800362a: 681b ldr r3, [r3, #0]
800362c: f422 7200 bic.w r2, r2, #512 ; 0x200
8003630: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= ADC_CR2_DMAContReq((uint32_t)hadc->Init.DMAContinuousRequests);
8003632: 687b ldr r3, [r7, #4]
8003634: 681b ldr r3, [r3, #0]
8003636: 6899 ldr r1, [r3, #8]
8003638: 687b ldr r3, [r7, #4]
800363a: f893 3030 ldrb.w r3, [r3, #48] ; 0x30
800363e: 025a lsls r2, r3, #9
8003640: 687b ldr r3, [r7, #4]
8003642: 681b ldr r3, [r3, #0]
8003644: 430a orrs r2, r1
8003646: 609a str r2, [r3, #8]
/* Enable or disable ADC end of conversion selection */
hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
8003648: 687b ldr r3, [r7, #4]
800364a: 681b ldr r3, [r3, #0]
800364c: 689a ldr r2, [r3, #8]
800364e: 687b ldr r3, [r7, #4]
8003650: 681b ldr r3, [r3, #0]
8003652: f422 6280 bic.w r2, r2, #1024 ; 0x400
8003656: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
8003658: 687b ldr r3, [r7, #4]
800365a: 681b ldr r3, [r3, #0]
800365c: 6899 ldr r1, [r3, #8]
800365e: 687b ldr r3, [r7, #4]
8003660: 695b ldr r3, [r3, #20]
8003662: 029a lsls r2, r3, #10
8003664: 687b ldr r3, [r7, #4]
8003666: 681b ldr r3, [r3, #0]
8003668: 430a orrs r2, r1
800366a: 609a str r2, [r3, #8]
}
800366c: bf00 nop
800366e: 3714 adds r7, #20
8003670: 46bd mov sp, r7
8003672: f85d 7b04 ldr.w r7, [sp], #4
8003676: 4770 bx lr
8003678: 40012300 .word 0x40012300
800367c: 0f000001 .word 0x0f000001
08003680 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8003680: b480 push {r7}
8003682: b085 sub sp, #20
8003684: af00 add r7, sp, #0
8003686: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8003688: 687b ldr r3, [r7, #4]
800368a: f003 0307 and.w r3, r3, #7
800368e: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8003690: 4b0c ldr r3, [pc, #48] ; (80036c4 <__NVIC_SetPriorityGrouping+0x44>)
8003692: 68db ldr r3, [r3, #12]
8003694: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8003696: 68ba ldr r2, [r7, #8]
8003698: f64f 03ff movw r3, #63743 ; 0xf8ff
800369c: 4013 ands r3, r2
800369e: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
80036a0: 68fb ldr r3, [r7, #12]
80036a2: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
80036a4: 68bb ldr r3, [r7, #8]
80036a6: 4313 orrs r3, r2
reg_value = (reg_value |
80036a8: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
80036ac: f443 3300 orr.w r3, r3, #131072 ; 0x20000
80036b0: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
80036b2: 4a04 ldr r2, [pc, #16] ; (80036c4 <__NVIC_SetPriorityGrouping+0x44>)
80036b4: 68bb ldr r3, [r7, #8]
80036b6: 60d3 str r3, [r2, #12]
}
80036b8: bf00 nop
80036ba: 3714 adds r7, #20
80036bc: 46bd mov sp, r7
80036be: f85d 7b04 ldr.w r7, [sp], #4
80036c2: 4770 bx lr
80036c4: e000ed00 .word 0xe000ed00
080036c8 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
80036c8: b480 push {r7}
80036ca: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
80036cc: 4b04 ldr r3, [pc, #16] ; (80036e0 <__NVIC_GetPriorityGrouping+0x18>)
80036ce: 68db ldr r3, [r3, #12]
80036d0: 0a1b lsrs r3, r3, #8
80036d2: f003 0307 and.w r3, r3, #7
}
80036d6: 4618 mov r0, r3
80036d8: 46bd mov sp, r7
80036da: f85d 7b04 ldr.w r7, [sp], #4
80036de: 4770 bx lr
80036e0: e000ed00 .word 0xe000ed00
080036e4 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
80036e4: b480 push {r7}
80036e6: b083 sub sp, #12
80036e8: af00 add r7, sp, #0
80036ea: 4603 mov r3, r0
80036ec: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80036ee: f997 3007 ldrsb.w r3, [r7, #7]
80036f2: 2b00 cmp r3, #0
80036f4: db0b blt.n 800370e <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
80036f6: 79fb ldrb r3, [r7, #7]
80036f8: f003 021f and.w r2, r3, #31
80036fc: 4907 ldr r1, [pc, #28] ; (800371c <__NVIC_EnableIRQ+0x38>)
80036fe: f997 3007 ldrsb.w r3, [r7, #7]
8003702: 095b lsrs r3, r3, #5
8003704: 2001 movs r0, #1
8003706: fa00 f202 lsl.w r2, r0, r2
800370a: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
800370e: bf00 nop
8003710: 370c adds r7, #12
8003712: 46bd mov sp, r7
8003714: f85d 7b04 ldr.w r7, [sp], #4
8003718: 4770 bx lr
800371a: bf00 nop
800371c: e000e100 .word 0xe000e100
08003720 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8003720: b480 push {r7}
8003722: b083 sub sp, #12
8003724: af00 add r7, sp, #0
8003726: 4603 mov r3, r0
8003728: 6039 str r1, [r7, #0]
800372a: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
800372c: f997 3007 ldrsb.w r3, [r7, #7]
8003730: 2b00 cmp r3, #0
8003732: db0a blt.n 800374a <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8003734: 683b ldr r3, [r7, #0]
8003736: b2da uxtb r2, r3
8003738: 490c ldr r1, [pc, #48] ; (800376c <__NVIC_SetPriority+0x4c>)
800373a: f997 3007 ldrsb.w r3, [r7, #7]
800373e: 0112 lsls r2, r2, #4
8003740: b2d2 uxtb r2, r2
8003742: 440b add r3, r1
8003744: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8003748: e00a b.n 8003760 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800374a: 683b ldr r3, [r7, #0]
800374c: b2da uxtb r2, r3
800374e: 4908 ldr r1, [pc, #32] ; (8003770 <__NVIC_SetPriority+0x50>)
8003750: 79fb ldrb r3, [r7, #7]
8003752: f003 030f and.w r3, r3, #15
8003756: 3b04 subs r3, #4
8003758: 0112 lsls r2, r2, #4
800375a: b2d2 uxtb r2, r2
800375c: 440b add r3, r1
800375e: 761a strb r2, [r3, #24]
}
8003760: bf00 nop
8003762: 370c adds r7, #12
8003764: 46bd mov sp, r7
8003766: f85d 7b04 ldr.w r7, [sp], #4
800376a: 4770 bx lr
800376c: e000e100 .word 0xe000e100
8003770: e000ed00 .word 0xe000ed00
08003774 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8003774: b480 push {r7}
8003776: b089 sub sp, #36 ; 0x24
8003778: af00 add r7, sp, #0
800377a: 60f8 str r0, [r7, #12]
800377c: 60b9 str r1, [r7, #8]
800377e: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8003780: 68fb ldr r3, [r7, #12]
8003782: f003 0307 and.w r3, r3, #7
8003786: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8003788: 69fb ldr r3, [r7, #28]
800378a: f1c3 0307 rsb r3, r3, #7
800378e: 2b04 cmp r3, #4
8003790: bf28 it cs
8003792: 2304 movcs r3, #4
8003794: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8003796: 69fb ldr r3, [r7, #28]
8003798: 3304 adds r3, #4
800379a: 2b06 cmp r3, #6
800379c: d902 bls.n 80037a4 <NVIC_EncodePriority+0x30>
800379e: 69fb ldr r3, [r7, #28]
80037a0: 3b03 subs r3, #3
80037a2: e000 b.n 80037a6 <NVIC_EncodePriority+0x32>
80037a4: 2300 movs r3, #0
80037a6: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80037a8: f04f 32ff mov.w r2, #4294967295
80037ac: 69bb ldr r3, [r7, #24]
80037ae: fa02 f303 lsl.w r3, r2, r3
80037b2: 43da mvns r2, r3
80037b4: 68bb ldr r3, [r7, #8]
80037b6: 401a ands r2, r3
80037b8: 697b ldr r3, [r7, #20]
80037ba: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
80037bc: f04f 31ff mov.w r1, #4294967295
80037c0: 697b ldr r3, [r7, #20]
80037c2: fa01 f303 lsl.w r3, r1, r3
80037c6: 43d9 mvns r1, r3
80037c8: 687b ldr r3, [r7, #4]
80037ca: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80037cc: 4313 orrs r3, r2
);
}
80037ce: 4618 mov r0, r3
80037d0: 3724 adds r7, #36 ; 0x24
80037d2: 46bd mov sp, r7
80037d4: f85d 7b04 ldr.w r7, [sp], #4
80037d8: 4770 bx lr
...
080037dc <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
80037dc: b580 push {r7, lr}
80037de: b082 sub sp, #8
80037e0: af00 add r7, sp, #0
80037e2: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
80037e4: 687b ldr r3, [r7, #4]
80037e6: 3b01 subs r3, #1
80037e8: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
80037ec: d301 bcc.n 80037f2 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
80037ee: 2301 movs r3, #1
80037f0: e00f b.n 8003812 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
80037f2: 4a0a ldr r2, [pc, #40] ; (800381c <SysTick_Config+0x40>)
80037f4: 687b ldr r3, [r7, #4]
80037f6: 3b01 subs r3, #1
80037f8: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
80037fa: 210f movs r1, #15
80037fc: f04f 30ff mov.w r0, #4294967295
8003800: f7ff ff8e bl 8003720 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8003804: 4b05 ldr r3, [pc, #20] ; (800381c <SysTick_Config+0x40>)
8003806: 2200 movs r2, #0
8003808: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
800380a: 4b04 ldr r3, [pc, #16] ; (800381c <SysTick_Config+0x40>)
800380c: 2207 movs r2, #7
800380e: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8003810: 2300 movs r3, #0
}
8003812: 4618 mov r0, r3
8003814: 3708 adds r7, #8
8003816: 46bd mov sp, r7
8003818: bd80 pop {r7, pc}
800381a: bf00 nop
800381c: e000e010 .word 0xe000e010
08003820 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8003820: b580 push {r7, lr}
8003822: b082 sub sp, #8
8003824: af00 add r7, sp, #0
8003826: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8003828: 6878 ldr r0, [r7, #4]
800382a: f7ff ff29 bl 8003680 <__NVIC_SetPriorityGrouping>
}
800382e: bf00 nop
8003830: 3708 adds r7, #8
8003832: 46bd mov sp, r7
8003834: bd80 pop {r7, pc}
08003836 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8003836: b580 push {r7, lr}
8003838: b086 sub sp, #24
800383a: af00 add r7, sp, #0
800383c: 4603 mov r3, r0
800383e: 60b9 str r1, [r7, #8]
8003840: 607a str r2, [r7, #4]
8003842: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8003844: 2300 movs r3, #0
8003846: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8003848: f7ff ff3e bl 80036c8 <__NVIC_GetPriorityGrouping>
800384c: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
800384e: 687a ldr r2, [r7, #4]
8003850: 68b9 ldr r1, [r7, #8]
8003852: 6978 ldr r0, [r7, #20]
8003854: f7ff ff8e bl 8003774 <NVIC_EncodePriority>
8003858: 4602 mov r2, r0
800385a: f997 300f ldrsb.w r3, [r7, #15]
800385e: 4611 mov r1, r2
8003860: 4618 mov r0, r3
8003862: f7ff ff5d bl 8003720 <__NVIC_SetPriority>
}
8003866: bf00 nop
8003868: 3718 adds r7, #24
800386a: 46bd mov sp, r7
800386c: bd80 pop {r7, pc}
0800386e <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
800386e: b580 push {r7, lr}
8003870: b082 sub sp, #8
8003872: af00 add r7, sp, #0
8003874: 4603 mov r3, r0
8003876: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8003878: f997 3007 ldrsb.w r3, [r7, #7]
800387c: 4618 mov r0, r3
800387e: f7ff ff31 bl 80036e4 <__NVIC_EnableIRQ>
}
8003882: bf00 nop
8003884: 3708 adds r7, #8
8003886: 46bd mov sp, r7
8003888: bd80 pop {r7, pc}
0800388a <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
800388a: b580 push {r7, lr}
800388c: b082 sub sp, #8
800388e: af00 add r7, sp, #0
8003890: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8003892: 6878 ldr r0, [r7, #4]
8003894: f7ff ffa2 bl 80037dc <SysTick_Config>
8003898: 4603 mov r3, r0
}
800389a: 4618 mov r0, r3
800389c: 3708 adds r7, #8
800389e: 46bd mov sp, r7
80038a0: bd80 pop {r7, pc}
080038a2 <HAL_DMA_Abort_IT>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
80038a2: b480 push {r7}
80038a4: b083 sub sp, #12
80038a6: af00 add r7, sp, #0
80038a8: 6078 str r0, [r7, #4]
if(hdma->State != HAL_DMA_STATE_BUSY)
80038aa: 687b ldr r3, [r7, #4]
80038ac: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
80038b0: b2db uxtb r3, r3
80038b2: 2b02 cmp r3, #2
80038b4: d004 beq.n 80038c0 <HAL_DMA_Abort_IT+0x1e>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
80038b6: 687b ldr r3, [r7, #4]
80038b8: 2280 movs r2, #128 ; 0x80
80038ba: 655a str r2, [r3, #84] ; 0x54
return HAL_ERROR;
80038bc: 2301 movs r3, #1
80038be: e00c b.n 80038da <HAL_DMA_Abort_IT+0x38>
}
else
{
/* Set Abort State */
hdma->State = HAL_DMA_STATE_ABORT;
80038c0: 687b ldr r3, [r7, #4]
80038c2: 2205 movs r2, #5
80038c4: f883 2035 strb.w r2, [r3, #53] ; 0x35
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
80038c8: 687b ldr r3, [r7, #4]
80038ca: 681b ldr r3, [r3, #0]
80038cc: 681a ldr r2, [r3, #0]
80038ce: 687b ldr r3, [r7, #4]
80038d0: 681b ldr r3, [r3, #0]
80038d2: f022 0201 bic.w r2, r2, #1
80038d6: 601a str r2, [r3, #0]
}
return HAL_OK;
80038d8: 2300 movs r3, #0
}
80038da: 4618 mov r0, r3
80038dc: 370c adds r7, #12
80038de: 46bd mov sp, r7
80038e0: f85d 7b04 ldr.w r7, [sp], #4
80038e4: 4770 bx lr
...
080038e8 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80038e8: b480 push {r7}
80038ea: b089 sub sp, #36 ; 0x24
80038ec: af00 add r7, sp, #0
80038ee: 6078 str r0, [r7, #4]
80038f0: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
80038f2: 2300 movs r3, #0
80038f4: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
80038f6: 2300 movs r3, #0
80038f8: 613b str r3, [r7, #16]
uint32_t temp = 0x00U;
80038fa: 2300 movs r3, #0
80038fc: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
80038fe: 2300 movs r3, #0
8003900: 61fb str r3, [r7, #28]
8003902: e177 b.n 8003bf4 <HAL_GPIO_Init+0x30c>
{
/* Get the IO position */
ioposition = 0x01U << position;
8003904: 2201 movs r2, #1
8003906: 69fb ldr r3, [r7, #28]
8003908: fa02 f303 lsl.w r3, r2, r3
800390c: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
800390e: 683b ldr r3, [r7, #0]
8003910: 681b ldr r3, [r3, #0]
8003912: 697a ldr r2, [r7, #20]
8003914: 4013 ands r3, r2
8003916: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
8003918: 693a ldr r2, [r7, #16]
800391a: 697b ldr r3, [r7, #20]
800391c: 429a cmp r2, r3
800391e: f040 8166 bne.w 8003bee <HAL_GPIO_Init+0x306>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
8003922: 683b ldr r3, [r7, #0]
8003924: 685b ldr r3, [r3, #4]
8003926: 2b01 cmp r3, #1
8003928: d00b beq.n 8003942 <HAL_GPIO_Init+0x5a>
800392a: 683b ldr r3, [r7, #0]
800392c: 685b ldr r3, [r3, #4]
800392e: 2b02 cmp r3, #2
8003930: d007 beq.n 8003942 <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
8003932: 683b ldr r3, [r7, #0]
8003934: 685b ldr r3, [r3, #4]
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
8003936: 2b11 cmp r3, #17
8003938: d003 beq.n 8003942 <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800393a: 683b ldr r3, [r7, #0]
800393c: 685b ldr r3, [r3, #4]
800393e: 2b12 cmp r3, #18
8003940: d130 bne.n 80039a4 <HAL_GPIO_Init+0xbc>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8003942: 687b ldr r3, [r7, #4]
8003944: 689b ldr r3, [r3, #8]
8003946: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
8003948: 69fb ldr r3, [r7, #28]
800394a: 005b lsls r3, r3, #1
800394c: 2203 movs r2, #3
800394e: fa02 f303 lsl.w r3, r2, r3
8003952: 43db mvns r3, r3
8003954: 69ba ldr r2, [r7, #24]
8003956: 4013 ands r3, r2
8003958: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
800395a: 683b ldr r3, [r7, #0]
800395c: 68da ldr r2, [r3, #12]
800395e: 69fb ldr r3, [r7, #28]
8003960: 005b lsls r3, r3, #1
8003962: fa02 f303 lsl.w r3, r2, r3
8003966: 69ba ldr r2, [r7, #24]
8003968: 4313 orrs r3, r2
800396a: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
800396c: 687b ldr r3, [r7, #4]
800396e: 69ba ldr r2, [r7, #24]
8003970: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
8003972: 687b ldr r3, [r7, #4]
8003974: 685b ldr r3, [r3, #4]
8003976: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
8003978: 2201 movs r2, #1
800397a: 69fb ldr r3, [r7, #28]
800397c: fa02 f303 lsl.w r3, r2, r3
8003980: 43db mvns r3, r3
8003982: 69ba ldr r2, [r7, #24]
8003984: 4013 ands r3, r2
8003986: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
8003988: 683b ldr r3, [r7, #0]
800398a: 685b ldr r3, [r3, #4]
800398c: 091b lsrs r3, r3, #4
800398e: f003 0201 and.w r2, r3, #1
8003992: 69fb ldr r3, [r7, #28]
8003994: fa02 f303 lsl.w r3, r2, r3
8003998: 69ba ldr r2, [r7, #24]
800399a: 4313 orrs r3, r2
800399c: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
800399e: 687b ldr r3, [r7, #4]
80039a0: 69ba ldr r2, [r7, #24]
80039a2: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
80039a4: 687b ldr r3, [r7, #4]
80039a6: 68db ldr r3, [r3, #12]
80039a8: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
80039aa: 69fb ldr r3, [r7, #28]
80039ac: 005b lsls r3, r3, #1
80039ae: 2203 movs r2, #3
80039b0: fa02 f303 lsl.w r3, r2, r3
80039b4: 43db mvns r3, r3
80039b6: 69ba ldr r2, [r7, #24]
80039b8: 4013 ands r3, r2
80039ba: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
80039bc: 683b ldr r3, [r7, #0]
80039be: 689a ldr r2, [r3, #8]
80039c0: 69fb ldr r3, [r7, #28]
80039c2: 005b lsls r3, r3, #1
80039c4: fa02 f303 lsl.w r3, r2, r3
80039c8: 69ba ldr r2, [r7, #24]
80039ca: 4313 orrs r3, r2
80039cc: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
80039ce: 687b ldr r3, [r7, #4]
80039d0: 69ba ldr r2, [r7, #24]
80039d2: 60da str r2, [r3, #12]
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
80039d4: 683b ldr r3, [r7, #0]
80039d6: 685b ldr r3, [r3, #4]
80039d8: 2b02 cmp r3, #2
80039da: d003 beq.n 80039e4 <HAL_GPIO_Init+0xfc>
80039dc: 683b ldr r3, [r7, #0]
80039de: 685b ldr r3, [r3, #4]
80039e0: 2b12 cmp r3, #18
80039e2: d123 bne.n 8003a2c <HAL_GPIO_Init+0x144>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
80039e4: 69fb ldr r3, [r7, #28]
80039e6: 08da lsrs r2, r3, #3
80039e8: 687b ldr r3, [r7, #4]
80039ea: 3208 adds r2, #8
80039ec: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80039f0: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
80039f2: 69fb ldr r3, [r7, #28]
80039f4: f003 0307 and.w r3, r3, #7
80039f8: 009b lsls r3, r3, #2
80039fa: 220f movs r2, #15
80039fc: fa02 f303 lsl.w r3, r2, r3
8003a00: 43db mvns r3, r3
8003a02: 69ba ldr r2, [r7, #24]
8003a04: 4013 ands r3, r2
8003a06: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
8003a08: 683b ldr r3, [r7, #0]
8003a0a: 691a ldr r2, [r3, #16]
8003a0c: 69fb ldr r3, [r7, #28]
8003a0e: f003 0307 and.w r3, r3, #7
8003a12: 009b lsls r3, r3, #2
8003a14: fa02 f303 lsl.w r3, r2, r3
8003a18: 69ba ldr r2, [r7, #24]
8003a1a: 4313 orrs r3, r2
8003a1c: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
8003a1e: 69fb ldr r3, [r7, #28]
8003a20: 08da lsrs r2, r3, #3
8003a22: 687b ldr r3, [r7, #4]
8003a24: 3208 adds r2, #8
8003a26: 69b9 ldr r1, [r7, #24]
8003a28: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8003a2c: 687b ldr r3, [r7, #4]
8003a2e: 681b ldr r3, [r3, #0]
8003a30: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
8003a32: 69fb ldr r3, [r7, #28]
8003a34: 005b lsls r3, r3, #1
8003a36: 2203 movs r2, #3
8003a38: fa02 f303 lsl.w r3, r2, r3
8003a3c: 43db mvns r3, r3
8003a3e: 69ba ldr r2, [r7, #24]
8003a40: 4013 ands r3, r2
8003a42: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
8003a44: 683b ldr r3, [r7, #0]
8003a46: 685b ldr r3, [r3, #4]
8003a48: f003 0203 and.w r2, r3, #3
8003a4c: 69fb ldr r3, [r7, #28]
8003a4e: 005b lsls r3, r3, #1
8003a50: fa02 f303 lsl.w r3, r2, r3
8003a54: 69ba ldr r2, [r7, #24]
8003a56: 4313 orrs r3, r2
8003a58: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
8003a5a: 687b ldr r3, [r7, #4]
8003a5c: 69ba ldr r2, [r7, #24]
8003a5e: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8003a60: 683b ldr r3, [r7, #0]
8003a62: 685b ldr r3, [r3, #4]
8003a64: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8003a68: 2b00 cmp r3, #0
8003a6a: f000 80c0 beq.w 8003bee <HAL_GPIO_Init+0x306>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8003a6e: 2300 movs r3, #0
8003a70: 60fb str r3, [r7, #12]
8003a72: 4b65 ldr r3, [pc, #404] ; (8003c08 <HAL_GPIO_Init+0x320>)
8003a74: 6c5b ldr r3, [r3, #68] ; 0x44
8003a76: 4a64 ldr r2, [pc, #400] ; (8003c08 <HAL_GPIO_Init+0x320>)
8003a78: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8003a7c: 6453 str r3, [r2, #68] ; 0x44
8003a7e: 4b62 ldr r3, [pc, #392] ; (8003c08 <HAL_GPIO_Init+0x320>)
8003a80: 6c5b ldr r3, [r3, #68] ; 0x44
8003a82: f403 4380 and.w r3, r3, #16384 ; 0x4000
8003a86: 60fb str r3, [r7, #12]
8003a88: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
8003a8a: 4a60 ldr r2, [pc, #384] ; (8003c0c <HAL_GPIO_Init+0x324>)
8003a8c: 69fb ldr r3, [r7, #28]
8003a8e: 089b lsrs r3, r3, #2
8003a90: 3302 adds r3, #2
8003a92: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8003a96: 61bb str r3, [r7, #24]
temp &= ~(0x0FU << (4U * (position & 0x03U)));
8003a98: 69fb ldr r3, [r7, #28]
8003a9a: f003 0303 and.w r3, r3, #3
8003a9e: 009b lsls r3, r3, #2
8003aa0: 220f movs r2, #15
8003aa2: fa02 f303 lsl.w r3, r2, r3
8003aa6: 43db mvns r3, r3
8003aa8: 69ba ldr r2, [r7, #24]
8003aaa: 4013 ands r3, r2
8003aac: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
8003aae: 687b ldr r3, [r7, #4]
8003ab0: 4a57 ldr r2, [pc, #348] ; (8003c10 <HAL_GPIO_Init+0x328>)
8003ab2: 4293 cmp r3, r2
8003ab4: d037 beq.n 8003b26 <HAL_GPIO_Init+0x23e>
8003ab6: 687b ldr r3, [r7, #4]
8003ab8: 4a56 ldr r2, [pc, #344] ; (8003c14 <HAL_GPIO_Init+0x32c>)
8003aba: 4293 cmp r3, r2
8003abc: d031 beq.n 8003b22 <HAL_GPIO_Init+0x23a>
8003abe: 687b ldr r3, [r7, #4]
8003ac0: 4a55 ldr r2, [pc, #340] ; (8003c18 <HAL_GPIO_Init+0x330>)
8003ac2: 4293 cmp r3, r2
8003ac4: d02b beq.n 8003b1e <HAL_GPIO_Init+0x236>
8003ac6: 687b ldr r3, [r7, #4]
8003ac8: 4a54 ldr r2, [pc, #336] ; (8003c1c <HAL_GPIO_Init+0x334>)
8003aca: 4293 cmp r3, r2
8003acc: d025 beq.n 8003b1a <HAL_GPIO_Init+0x232>
8003ace: 687b ldr r3, [r7, #4]
8003ad0: 4a53 ldr r2, [pc, #332] ; (8003c20 <HAL_GPIO_Init+0x338>)
8003ad2: 4293 cmp r3, r2
8003ad4: d01f beq.n 8003b16 <HAL_GPIO_Init+0x22e>
8003ad6: 687b ldr r3, [r7, #4]
8003ad8: 4a52 ldr r2, [pc, #328] ; (8003c24 <HAL_GPIO_Init+0x33c>)
8003ada: 4293 cmp r3, r2
8003adc: d019 beq.n 8003b12 <HAL_GPIO_Init+0x22a>
8003ade: 687b ldr r3, [r7, #4]
8003ae0: 4a51 ldr r2, [pc, #324] ; (8003c28 <HAL_GPIO_Init+0x340>)
8003ae2: 4293 cmp r3, r2
8003ae4: d013 beq.n 8003b0e <HAL_GPIO_Init+0x226>
8003ae6: 687b ldr r3, [r7, #4]
8003ae8: 4a50 ldr r2, [pc, #320] ; (8003c2c <HAL_GPIO_Init+0x344>)
8003aea: 4293 cmp r3, r2
8003aec: d00d beq.n 8003b0a <HAL_GPIO_Init+0x222>
8003aee: 687b ldr r3, [r7, #4]
8003af0: 4a4f ldr r2, [pc, #316] ; (8003c30 <HAL_GPIO_Init+0x348>)
8003af2: 4293 cmp r3, r2
8003af4: d007 beq.n 8003b06 <HAL_GPIO_Init+0x21e>
8003af6: 687b ldr r3, [r7, #4]
8003af8: 4a4e ldr r2, [pc, #312] ; (8003c34 <HAL_GPIO_Init+0x34c>)
8003afa: 4293 cmp r3, r2
8003afc: d101 bne.n 8003b02 <HAL_GPIO_Init+0x21a>
8003afe: 2309 movs r3, #9
8003b00: e012 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b02: 230a movs r3, #10
8003b04: e010 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b06: 2308 movs r3, #8
8003b08: e00e b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b0a: 2307 movs r3, #7
8003b0c: e00c b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b0e: 2306 movs r3, #6
8003b10: e00a b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b12: 2305 movs r3, #5
8003b14: e008 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b16: 2304 movs r3, #4
8003b18: e006 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b1a: 2303 movs r3, #3
8003b1c: e004 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b1e: 2302 movs r3, #2
8003b20: e002 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b22: 2301 movs r3, #1
8003b24: e000 b.n 8003b28 <HAL_GPIO_Init+0x240>
8003b26: 2300 movs r3, #0
8003b28: 69fa ldr r2, [r7, #28]
8003b2a: f002 0203 and.w r2, r2, #3
8003b2e: 0092 lsls r2, r2, #2
8003b30: 4093 lsls r3, r2
8003b32: 69ba ldr r2, [r7, #24]
8003b34: 4313 orrs r3, r2
8003b36: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
8003b38: 4934 ldr r1, [pc, #208] ; (8003c0c <HAL_GPIO_Init+0x324>)
8003b3a: 69fb ldr r3, [r7, #28]
8003b3c: 089b lsrs r3, r3, #2
8003b3e: 3302 adds r3, #2
8003b40: 69ba ldr r2, [r7, #24]
8003b42: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
8003b46: 4b3c ldr r3, [pc, #240] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003b48: 681b ldr r3, [r3, #0]
8003b4a: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8003b4c: 693b ldr r3, [r7, #16]
8003b4e: 43db mvns r3, r3
8003b50: 69ba ldr r2, [r7, #24]
8003b52: 4013 ands r3, r2
8003b54: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8003b56: 683b ldr r3, [r7, #0]
8003b58: 685b ldr r3, [r3, #4]
8003b5a: f403 3380 and.w r3, r3, #65536 ; 0x10000
8003b5e: 2b00 cmp r3, #0
8003b60: d003 beq.n 8003b6a <HAL_GPIO_Init+0x282>
{
temp |= iocurrent;
8003b62: 69ba ldr r2, [r7, #24]
8003b64: 693b ldr r3, [r7, #16]
8003b66: 4313 orrs r3, r2
8003b68: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
8003b6a: 4a33 ldr r2, [pc, #204] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003b6c: 69bb ldr r3, [r7, #24]
8003b6e: 6013 str r3, [r2, #0]
temp = EXTI->EMR;
8003b70: 4b31 ldr r3, [pc, #196] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003b72: 685b ldr r3, [r3, #4]
8003b74: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8003b76: 693b ldr r3, [r7, #16]
8003b78: 43db mvns r3, r3
8003b7a: 69ba ldr r2, [r7, #24]
8003b7c: 4013 ands r3, r2
8003b7e: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8003b80: 683b ldr r3, [r7, #0]
8003b82: 685b ldr r3, [r3, #4]
8003b84: f403 3300 and.w r3, r3, #131072 ; 0x20000
8003b88: 2b00 cmp r3, #0
8003b8a: d003 beq.n 8003b94 <HAL_GPIO_Init+0x2ac>
{
temp |= iocurrent;
8003b8c: 69ba ldr r2, [r7, #24]
8003b8e: 693b ldr r3, [r7, #16]
8003b90: 4313 orrs r3, r2
8003b92: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
8003b94: 4a28 ldr r2, [pc, #160] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003b96: 69bb ldr r3, [r7, #24]
8003b98: 6053 str r3, [r2, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
8003b9a: 4b27 ldr r3, [pc, #156] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003b9c: 689b ldr r3, [r3, #8]
8003b9e: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8003ba0: 693b ldr r3, [r7, #16]
8003ba2: 43db mvns r3, r3
8003ba4: 69ba ldr r2, [r7, #24]
8003ba6: 4013 ands r3, r2
8003ba8: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8003baa: 683b ldr r3, [r7, #0]
8003bac: 685b ldr r3, [r3, #4]
8003bae: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8003bb2: 2b00 cmp r3, #0
8003bb4: d003 beq.n 8003bbe <HAL_GPIO_Init+0x2d6>
{
temp |= iocurrent;
8003bb6: 69ba ldr r2, [r7, #24]
8003bb8: 693b ldr r3, [r7, #16]
8003bba: 4313 orrs r3, r2
8003bbc: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
8003bbe: 4a1e ldr r2, [pc, #120] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003bc0: 69bb ldr r3, [r7, #24]
8003bc2: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
8003bc4: 4b1c ldr r3, [pc, #112] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003bc6: 68db ldr r3, [r3, #12]
8003bc8: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8003bca: 693b ldr r3, [r7, #16]
8003bcc: 43db mvns r3, r3
8003bce: 69ba ldr r2, [r7, #24]
8003bd0: 4013 ands r3, r2
8003bd2: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8003bd4: 683b ldr r3, [r7, #0]
8003bd6: 685b ldr r3, [r3, #4]
8003bd8: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8003bdc: 2b00 cmp r3, #0
8003bde: d003 beq.n 8003be8 <HAL_GPIO_Init+0x300>
{
temp |= iocurrent;
8003be0: 69ba ldr r2, [r7, #24]
8003be2: 693b ldr r3, [r7, #16]
8003be4: 4313 orrs r3, r2
8003be6: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
8003be8: 4a13 ldr r2, [pc, #76] ; (8003c38 <HAL_GPIO_Init+0x350>)
8003bea: 69bb ldr r3, [r7, #24]
8003bec: 60d3 str r3, [r2, #12]
for(position = 0U; position < GPIO_NUMBER; position++)
8003bee: 69fb ldr r3, [r7, #28]
8003bf0: 3301 adds r3, #1
8003bf2: 61fb str r3, [r7, #28]
8003bf4: 69fb ldr r3, [r7, #28]
8003bf6: 2b0f cmp r3, #15
8003bf8: f67f ae84 bls.w 8003904 <HAL_GPIO_Init+0x1c>
}
}
}
}
8003bfc: bf00 nop
8003bfe: 3724 adds r7, #36 ; 0x24
8003c00: 46bd mov sp, r7
8003c02: f85d 7b04 ldr.w r7, [sp], #4
8003c06: 4770 bx lr
8003c08: 40023800 .word 0x40023800
8003c0c: 40013800 .word 0x40013800
8003c10: 40020000 .word 0x40020000
8003c14: 40020400 .word 0x40020400
8003c18: 40020800 .word 0x40020800
8003c1c: 40020c00 .word 0x40020c00
8003c20: 40021000 .word 0x40021000
8003c24: 40021400 .word 0x40021400
8003c28: 40021800 .word 0x40021800
8003c2c: 40021c00 .word 0x40021c00
8003c30: 40022000 .word 0x40022000
8003c34: 40022400 .word 0x40022400
8003c38: 40013c00 .word 0x40013c00
08003c3c <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8003c3c: b480 push {r7}
8003c3e: b083 sub sp, #12
8003c40: af00 add r7, sp, #0
8003c42: 6078 str r0, [r7, #4]
8003c44: 460b mov r3, r1
8003c46: 807b strh r3, [r7, #2]
8003c48: 4613 mov r3, r2
8003c4a: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
8003c4c: 787b ldrb r3, [r7, #1]
8003c4e: 2b00 cmp r3, #0
8003c50: d003 beq.n 8003c5a <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8003c52: 887a ldrh r2, [r7, #2]
8003c54: 687b ldr r3, [r7, #4]
8003c56: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
8003c58: e003 b.n 8003c62 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
8003c5a: 887b ldrh r3, [r7, #2]
8003c5c: 041a lsls r2, r3, #16
8003c5e: 687b ldr r3, [r7, #4]
8003c60: 619a str r2, [r3, #24]
}
8003c62: bf00 nop
8003c64: 370c adds r7, #12
8003c66: 46bd mov sp, r7
8003c68: f85d 7b04 ldr.w r7, [sp], #4
8003c6c: 4770 bx lr
...
08003c70 <HAL_GPIO_EXTI_IRQHandler>:
* @brief This function handles EXTI interrupt request.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
{
8003c70: b580 push {r7, lr}
8003c72: b082 sub sp, #8
8003c74: af00 add r7, sp, #0
8003c76: 4603 mov r3, r0
8003c78: 80fb strh r3, [r7, #6]
/* EXTI line interrupt detected */
if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
8003c7a: 4b08 ldr r3, [pc, #32] ; (8003c9c <HAL_GPIO_EXTI_IRQHandler+0x2c>)
8003c7c: 695a ldr r2, [r3, #20]
8003c7e: 88fb ldrh r3, [r7, #6]
8003c80: 4013 ands r3, r2
8003c82: 2b00 cmp r3, #0
8003c84: d006 beq.n 8003c94 <HAL_GPIO_EXTI_IRQHandler+0x24>
{
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
8003c86: 4a05 ldr r2, [pc, #20] ; (8003c9c <HAL_GPIO_EXTI_IRQHandler+0x2c>)
8003c88: 88fb ldrh r3, [r7, #6]
8003c8a: 6153 str r3, [r2, #20]
HAL_GPIO_EXTI_Callback(GPIO_Pin);
8003c8c: 88fb ldrh r3, [r7, #6]
8003c8e: 4618 mov r0, r3
8003c90: f000 f806 bl 8003ca0 <HAL_GPIO_EXTI_Callback>
}
}
8003c94: bf00 nop
8003c96: 3708 adds r7, #8
8003c98: 46bd mov sp, r7
8003c9a: bd80 pop {r7, pc}
8003c9c: 40013c00 .word 0x40013c00
08003ca0 <HAL_GPIO_EXTI_Callback>:
* @brief EXTI line detection callbacks.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
8003ca0: b480 push {r7}
8003ca2: b083 sub sp, #12
8003ca4: af00 add r7, sp, #0
8003ca6: 4603 mov r3, r0
8003ca8: 80fb strh r3, [r7, #6]
/* Prevent unused argument(s) compilation warning */
UNUSED(GPIO_Pin);
/* NOTE: This function Should not be modified, when the callback is needed,
the HAL_GPIO_EXTI_Callback could be implemented in the user file
*/
}
8003caa: bf00 nop
8003cac: 370c adds r7, #12
8003cae: 46bd mov sp, r7
8003cb0: f85d 7b04 ldr.w r7, [sp], #4
8003cb4: 4770 bx lr
...
08003cb8 <HAL_RCC_OscConfig>:
* supported by this API. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8003cb8: b580 push {r7, lr}
8003cba: b086 sub sp, #24
8003cbc: af00 add r7, sp, #0
8003cbe: 6078 str r0, [r7, #4]
uint32_t tickstart, pll_config;
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
8003cc0: 687b ldr r3, [r7, #4]
8003cc2: 2b00 cmp r3, #0
8003cc4: d101 bne.n 8003cca <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8003cc6: 2301 movs r3, #1
8003cc8: e25b b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8003cca: 687b ldr r3, [r7, #4]
8003ccc: 681b ldr r3, [r3, #0]
8003cce: f003 0301 and.w r3, r3, #1
8003cd2: 2b00 cmp r3, #0
8003cd4: d075 beq.n 8003dc2 <HAL_RCC_OscConfig+0x10a>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
8003cd6: 4ba3 ldr r3, [pc, #652] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003cd8: 689b ldr r3, [r3, #8]
8003cda: f003 030c and.w r3, r3, #12
8003cde: 2b04 cmp r3, #4
8003ce0: d00c beq.n 8003cfc <HAL_RCC_OscConfig+0x44>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8003ce2: 4ba0 ldr r3, [pc, #640] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003ce4: 689b ldr r3, [r3, #8]
8003ce6: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
8003cea: 2b08 cmp r3, #8
8003cec: d112 bne.n 8003d14 <HAL_RCC_OscConfig+0x5c>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8003cee: 4b9d ldr r3, [pc, #628] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003cf0: 685b ldr r3, [r3, #4]
8003cf2: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8003cf6: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
8003cfa: d10b bne.n 8003d14 <HAL_RCC_OscConfig+0x5c>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003cfc: 4b99 ldr r3, [pc, #612] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003cfe: 681b ldr r3, [r3, #0]
8003d00: f403 3300 and.w r3, r3, #131072 ; 0x20000
8003d04: 2b00 cmp r3, #0
8003d06: d05b beq.n 8003dc0 <HAL_RCC_OscConfig+0x108>
8003d08: 687b ldr r3, [r7, #4]
8003d0a: 685b ldr r3, [r3, #4]
8003d0c: 2b00 cmp r3, #0
8003d0e: d157 bne.n 8003dc0 <HAL_RCC_OscConfig+0x108>
{
return HAL_ERROR;
8003d10: 2301 movs r3, #1
8003d12: e236 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8003d14: 687b ldr r3, [r7, #4]
8003d16: 685b ldr r3, [r3, #4]
8003d18: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8003d1c: d106 bne.n 8003d2c <HAL_RCC_OscConfig+0x74>
8003d1e: 4b91 ldr r3, [pc, #580] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d20: 681b ldr r3, [r3, #0]
8003d22: 4a90 ldr r2, [pc, #576] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d24: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8003d28: 6013 str r3, [r2, #0]
8003d2a: e01d b.n 8003d68 <HAL_RCC_OscConfig+0xb0>
8003d2c: 687b ldr r3, [r7, #4]
8003d2e: 685b ldr r3, [r3, #4]
8003d30: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
8003d34: d10c bne.n 8003d50 <HAL_RCC_OscConfig+0x98>
8003d36: 4b8b ldr r3, [pc, #556] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d38: 681b ldr r3, [r3, #0]
8003d3a: 4a8a ldr r2, [pc, #552] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d3c: f443 2380 orr.w r3, r3, #262144 ; 0x40000
8003d40: 6013 str r3, [r2, #0]
8003d42: 4b88 ldr r3, [pc, #544] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d44: 681b ldr r3, [r3, #0]
8003d46: 4a87 ldr r2, [pc, #540] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d48: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8003d4c: 6013 str r3, [r2, #0]
8003d4e: e00b b.n 8003d68 <HAL_RCC_OscConfig+0xb0>
8003d50: 4b84 ldr r3, [pc, #528] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d52: 681b ldr r3, [r3, #0]
8003d54: 4a83 ldr r2, [pc, #524] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d56: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8003d5a: 6013 str r3, [r2, #0]
8003d5c: 4b81 ldr r3, [pc, #516] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d5e: 681b ldr r3, [r3, #0]
8003d60: 4a80 ldr r2, [pc, #512] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d62: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8003d66: 6013 str r3, [r2, #0]
/* Check the HSE State */
if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
8003d68: 687b ldr r3, [r7, #4]
8003d6a: 685b ldr r3, [r3, #4]
8003d6c: 2b00 cmp r3, #0
8003d6e: d013 beq.n 8003d98 <HAL_RCC_OscConfig+0xe0>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003d70: f7ff f88e bl 8002e90 <HAL_GetTick>
8003d74: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8003d76: e008 b.n 8003d8a <HAL_RCC_OscConfig+0xd2>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8003d78: f7ff f88a bl 8002e90 <HAL_GetTick>
8003d7c: 4602 mov r2, r0
8003d7e: 693b ldr r3, [r7, #16]
8003d80: 1ad3 subs r3, r2, r3
8003d82: 2b64 cmp r3, #100 ; 0x64
8003d84: d901 bls.n 8003d8a <HAL_RCC_OscConfig+0xd2>
{
return HAL_TIMEOUT;
8003d86: 2303 movs r3, #3
8003d88: e1fb b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8003d8a: 4b76 ldr r3, [pc, #472] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003d8c: 681b ldr r3, [r3, #0]
8003d8e: f403 3300 and.w r3, r3, #131072 ; 0x20000
8003d92: 2b00 cmp r3, #0
8003d94: d0f0 beq.n 8003d78 <HAL_RCC_OscConfig+0xc0>
8003d96: e014 b.n 8003dc2 <HAL_RCC_OscConfig+0x10a>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003d98: f7ff f87a bl 8002e90 <HAL_GetTick>
8003d9c: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003d9e: e008 b.n 8003db2 <HAL_RCC_OscConfig+0xfa>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8003da0: f7ff f876 bl 8002e90 <HAL_GetTick>
8003da4: 4602 mov r2, r0
8003da6: 693b ldr r3, [r7, #16]
8003da8: 1ad3 subs r3, r2, r3
8003daa: 2b64 cmp r3, #100 ; 0x64
8003dac: d901 bls.n 8003db2 <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
8003dae: 2303 movs r3, #3
8003db0: e1e7 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003db2: 4b6c ldr r3, [pc, #432] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003db4: 681b ldr r3, [r3, #0]
8003db6: f403 3300 and.w r3, r3, #131072 ; 0x20000
8003dba: 2b00 cmp r3, #0
8003dbc: d1f0 bne.n 8003da0 <HAL_RCC_OscConfig+0xe8>
8003dbe: e000 b.n 8003dc2 <HAL_RCC_OscConfig+0x10a>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003dc0: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8003dc2: 687b ldr r3, [r7, #4]
8003dc4: 681b ldr r3, [r3, #0]
8003dc6: f003 0302 and.w r3, r3, #2
8003dca: 2b00 cmp r3, #0
8003dcc: d063 beq.n 8003e96 <HAL_RCC_OscConfig+0x1de>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
8003dce: 4b65 ldr r3, [pc, #404] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003dd0: 689b ldr r3, [r3, #8]
8003dd2: f003 030c and.w r3, r3, #12
8003dd6: 2b00 cmp r3, #0
8003dd8: d00b beq.n 8003df2 <HAL_RCC_OscConfig+0x13a>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8003dda: 4b62 ldr r3, [pc, #392] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003ddc: 689b ldr r3, [r3, #8]
8003dde: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
8003de2: 2b08 cmp r3, #8
8003de4: d11c bne.n 8003e20 <HAL_RCC_OscConfig+0x168>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8003de6: 4b5f ldr r3, [pc, #380] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003de8: 685b ldr r3, [r3, #4]
8003dea: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8003dee: 2b00 cmp r3, #0
8003df0: d116 bne.n 8003e20 <HAL_RCC_OscConfig+0x168>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003df2: 4b5c ldr r3, [pc, #368] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003df4: 681b ldr r3, [r3, #0]
8003df6: f003 0302 and.w r3, r3, #2
8003dfa: 2b00 cmp r3, #0
8003dfc: d005 beq.n 8003e0a <HAL_RCC_OscConfig+0x152>
8003dfe: 687b ldr r3, [r7, #4]
8003e00: 68db ldr r3, [r3, #12]
8003e02: 2b01 cmp r3, #1
8003e04: d001 beq.n 8003e0a <HAL_RCC_OscConfig+0x152>
{
return HAL_ERROR;
8003e06: 2301 movs r3, #1
8003e08: e1bb b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003e0a: 4b56 ldr r3, [pc, #344] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003e0c: 681b ldr r3, [r3, #0]
8003e0e: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8003e12: 687b ldr r3, [r7, #4]
8003e14: 691b ldr r3, [r3, #16]
8003e16: 00db lsls r3, r3, #3
8003e18: 4952 ldr r1, [pc, #328] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003e1a: 4313 orrs r3, r2
8003e1c: 600b str r3, [r1, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003e1e: e03a b.n 8003e96 <HAL_RCC_OscConfig+0x1de>
}
}
else
{
/* Check the HSI State */
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
8003e20: 687b ldr r3, [r7, #4]
8003e22: 68db ldr r3, [r3, #12]
8003e24: 2b00 cmp r3, #0
8003e26: d020 beq.n 8003e6a <HAL_RCC_OscConfig+0x1b2>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8003e28: 4b4f ldr r3, [pc, #316] ; (8003f68 <HAL_RCC_OscConfig+0x2b0>)
8003e2a: 2201 movs r2, #1
8003e2c: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003e2e: f7ff f82f bl 8002e90 <HAL_GetTick>
8003e32: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003e34: e008 b.n 8003e48 <HAL_RCC_OscConfig+0x190>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8003e36: f7ff f82b bl 8002e90 <HAL_GetTick>
8003e3a: 4602 mov r2, r0
8003e3c: 693b ldr r3, [r7, #16]
8003e3e: 1ad3 subs r3, r2, r3
8003e40: 2b02 cmp r3, #2
8003e42: d901 bls.n 8003e48 <HAL_RCC_OscConfig+0x190>
{
return HAL_TIMEOUT;
8003e44: 2303 movs r3, #3
8003e46: e19c b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003e48: 4b46 ldr r3, [pc, #280] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003e4a: 681b ldr r3, [r3, #0]
8003e4c: f003 0302 and.w r3, r3, #2
8003e50: 2b00 cmp r3, #0
8003e52: d0f0 beq.n 8003e36 <HAL_RCC_OscConfig+0x17e>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003e54: 4b43 ldr r3, [pc, #268] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003e56: 681b ldr r3, [r3, #0]
8003e58: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8003e5c: 687b ldr r3, [r7, #4]
8003e5e: 691b ldr r3, [r3, #16]
8003e60: 00db lsls r3, r3, #3
8003e62: 4940 ldr r1, [pc, #256] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003e64: 4313 orrs r3, r2
8003e66: 600b str r3, [r1, #0]
8003e68: e015 b.n 8003e96 <HAL_RCC_OscConfig+0x1de>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8003e6a: 4b3f ldr r3, [pc, #252] ; (8003f68 <HAL_RCC_OscConfig+0x2b0>)
8003e6c: 2200 movs r2, #0
8003e6e: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003e70: f7ff f80e bl 8002e90 <HAL_GetTick>
8003e74: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8003e76: e008 b.n 8003e8a <HAL_RCC_OscConfig+0x1d2>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8003e78: f7ff f80a bl 8002e90 <HAL_GetTick>
8003e7c: 4602 mov r2, r0
8003e7e: 693b ldr r3, [r7, #16]
8003e80: 1ad3 subs r3, r2, r3
8003e82: 2b02 cmp r3, #2
8003e84: d901 bls.n 8003e8a <HAL_RCC_OscConfig+0x1d2>
{
return HAL_TIMEOUT;
8003e86: 2303 movs r3, #3
8003e88: e17b b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8003e8a: 4b36 ldr r3, [pc, #216] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003e8c: 681b ldr r3, [r3, #0]
8003e8e: f003 0302 and.w r3, r3, #2
8003e92: 2b00 cmp r3, #0
8003e94: d1f0 bne.n 8003e78 <HAL_RCC_OscConfig+0x1c0>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8003e96: 687b ldr r3, [r7, #4]
8003e98: 681b ldr r3, [r3, #0]
8003e9a: f003 0308 and.w r3, r3, #8
8003e9e: 2b00 cmp r3, #0
8003ea0: d030 beq.n 8003f04 <HAL_RCC_OscConfig+0x24c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
8003ea2: 687b ldr r3, [r7, #4]
8003ea4: 695b ldr r3, [r3, #20]
8003ea6: 2b00 cmp r3, #0
8003ea8: d016 beq.n 8003ed8 <HAL_RCC_OscConfig+0x220>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8003eaa: 4b30 ldr r3, [pc, #192] ; (8003f6c <HAL_RCC_OscConfig+0x2b4>)
8003eac: 2201 movs r2, #1
8003eae: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003eb0: f7fe ffee bl 8002e90 <HAL_GetTick>
8003eb4: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8003eb6: e008 b.n 8003eca <HAL_RCC_OscConfig+0x212>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8003eb8: f7fe ffea bl 8002e90 <HAL_GetTick>
8003ebc: 4602 mov r2, r0
8003ebe: 693b ldr r3, [r7, #16]
8003ec0: 1ad3 subs r3, r2, r3
8003ec2: 2b02 cmp r3, #2
8003ec4: d901 bls.n 8003eca <HAL_RCC_OscConfig+0x212>
{
return HAL_TIMEOUT;
8003ec6: 2303 movs r3, #3
8003ec8: e15b b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8003eca: 4b26 ldr r3, [pc, #152] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003ecc: 6f5b ldr r3, [r3, #116] ; 0x74
8003ece: f003 0302 and.w r3, r3, #2
8003ed2: 2b00 cmp r3, #0
8003ed4: d0f0 beq.n 8003eb8 <HAL_RCC_OscConfig+0x200>
8003ed6: e015 b.n 8003f04 <HAL_RCC_OscConfig+0x24c>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8003ed8: 4b24 ldr r3, [pc, #144] ; (8003f6c <HAL_RCC_OscConfig+0x2b4>)
8003eda: 2200 movs r2, #0
8003edc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003ede: f7fe ffd7 bl 8002e90 <HAL_GetTick>
8003ee2: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003ee4: e008 b.n 8003ef8 <HAL_RCC_OscConfig+0x240>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8003ee6: f7fe ffd3 bl 8002e90 <HAL_GetTick>
8003eea: 4602 mov r2, r0
8003eec: 693b ldr r3, [r7, #16]
8003eee: 1ad3 subs r3, r2, r3
8003ef0: 2b02 cmp r3, #2
8003ef2: d901 bls.n 8003ef8 <HAL_RCC_OscConfig+0x240>
{
return HAL_TIMEOUT;
8003ef4: 2303 movs r3, #3
8003ef6: e144 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003ef8: 4b1a ldr r3, [pc, #104] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003efa: 6f5b ldr r3, [r3, #116] ; 0x74
8003efc: f003 0302 and.w r3, r3, #2
8003f00: 2b00 cmp r3, #0
8003f02: d1f0 bne.n 8003ee6 <HAL_RCC_OscConfig+0x22e>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8003f04: 687b ldr r3, [r7, #4]
8003f06: 681b ldr r3, [r3, #0]
8003f08: f003 0304 and.w r3, r3, #4
8003f0c: 2b00 cmp r3, #0
8003f0e: f000 80a0 beq.w 8004052 <HAL_RCC_OscConfig+0x39a>
{
FlagStatus pwrclkchanged = RESET;
8003f12: 2300 movs r3, #0
8003f14: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
8003f16: 4b13 ldr r3, [pc, #76] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003f18: 6c1b ldr r3, [r3, #64] ; 0x40
8003f1a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8003f1e: 2b00 cmp r3, #0
8003f20: d10f bne.n 8003f42 <HAL_RCC_OscConfig+0x28a>
{
__HAL_RCC_PWR_CLK_ENABLE();
8003f22: 2300 movs r3, #0
8003f24: 60bb str r3, [r7, #8]
8003f26: 4b0f ldr r3, [pc, #60] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003f28: 6c1b ldr r3, [r3, #64] ; 0x40
8003f2a: 4a0e ldr r2, [pc, #56] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003f2c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8003f30: 6413 str r3, [r2, #64] ; 0x40
8003f32: 4b0c ldr r3, [pc, #48] ; (8003f64 <HAL_RCC_OscConfig+0x2ac>)
8003f34: 6c1b ldr r3, [r3, #64] ; 0x40
8003f36: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8003f3a: 60bb str r3, [r7, #8]
8003f3c: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8003f3e: 2301 movs r3, #1
8003f40: 75fb strb r3, [r7, #23]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003f42: 4b0b ldr r3, [pc, #44] ; (8003f70 <HAL_RCC_OscConfig+0x2b8>)
8003f44: 681b ldr r3, [r3, #0]
8003f46: f403 7380 and.w r3, r3, #256 ; 0x100
8003f4a: 2b00 cmp r3, #0
8003f4c: d121 bne.n 8003f92 <HAL_RCC_OscConfig+0x2da>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003f4e: 4b08 ldr r3, [pc, #32] ; (8003f70 <HAL_RCC_OscConfig+0x2b8>)
8003f50: 681b ldr r3, [r3, #0]
8003f52: 4a07 ldr r2, [pc, #28] ; (8003f70 <HAL_RCC_OscConfig+0x2b8>)
8003f54: f443 7380 orr.w r3, r3, #256 ; 0x100
8003f58: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8003f5a: f7fe ff99 bl 8002e90 <HAL_GetTick>
8003f5e: 6138 str r0, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003f60: e011 b.n 8003f86 <HAL_RCC_OscConfig+0x2ce>
8003f62: bf00 nop
8003f64: 40023800 .word 0x40023800
8003f68: 42470000 .word 0x42470000
8003f6c: 42470e80 .word 0x42470e80
8003f70: 40007000 .word 0x40007000
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003f74: f7fe ff8c bl 8002e90 <HAL_GetTick>
8003f78: 4602 mov r2, r0
8003f7a: 693b ldr r3, [r7, #16]
8003f7c: 1ad3 subs r3, r2, r3
8003f7e: 2b02 cmp r3, #2
8003f80: d901 bls.n 8003f86 <HAL_RCC_OscConfig+0x2ce>
{
return HAL_TIMEOUT;
8003f82: 2303 movs r3, #3
8003f84: e0fd b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003f86: 4b81 ldr r3, [pc, #516] ; (800418c <HAL_RCC_OscConfig+0x4d4>)
8003f88: 681b ldr r3, [r3, #0]
8003f8a: f403 7380 and.w r3, r3, #256 ; 0x100
8003f8e: 2b00 cmp r3, #0
8003f90: d0f0 beq.n 8003f74 <HAL_RCC_OscConfig+0x2bc>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8003f92: 687b ldr r3, [r7, #4]
8003f94: 689b ldr r3, [r3, #8]
8003f96: 2b01 cmp r3, #1
8003f98: d106 bne.n 8003fa8 <HAL_RCC_OscConfig+0x2f0>
8003f9a: 4b7d ldr r3, [pc, #500] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003f9c: 6f1b ldr r3, [r3, #112] ; 0x70
8003f9e: 4a7c ldr r2, [pc, #496] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fa0: f043 0301 orr.w r3, r3, #1
8003fa4: 6713 str r3, [r2, #112] ; 0x70
8003fa6: e01c b.n 8003fe2 <HAL_RCC_OscConfig+0x32a>
8003fa8: 687b ldr r3, [r7, #4]
8003faa: 689b ldr r3, [r3, #8]
8003fac: 2b05 cmp r3, #5
8003fae: d10c bne.n 8003fca <HAL_RCC_OscConfig+0x312>
8003fb0: 4b77 ldr r3, [pc, #476] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fb2: 6f1b ldr r3, [r3, #112] ; 0x70
8003fb4: 4a76 ldr r2, [pc, #472] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fb6: f043 0304 orr.w r3, r3, #4
8003fba: 6713 str r3, [r2, #112] ; 0x70
8003fbc: 4b74 ldr r3, [pc, #464] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fbe: 6f1b ldr r3, [r3, #112] ; 0x70
8003fc0: 4a73 ldr r2, [pc, #460] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fc2: f043 0301 orr.w r3, r3, #1
8003fc6: 6713 str r3, [r2, #112] ; 0x70
8003fc8: e00b b.n 8003fe2 <HAL_RCC_OscConfig+0x32a>
8003fca: 4b71 ldr r3, [pc, #452] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fcc: 6f1b ldr r3, [r3, #112] ; 0x70
8003fce: 4a70 ldr r2, [pc, #448] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fd0: f023 0301 bic.w r3, r3, #1
8003fd4: 6713 str r3, [r2, #112] ; 0x70
8003fd6: 4b6e ldr r3, [pc, #440] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fd8: 6f1b ldr r3, [r3, #112] ; 0x70
8003fda: 4a6d ldr r2, [pc, #436] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8003fdc: f023 0304 bic.w r3, r3, #4
8003fe0: 6713 str r3, [r2, #112] ; 0x70
/* Check the LSE State */
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
8003fe2: 687b ldr r3, [r7, #4]
8003fe4: 689b ldr r3, [r3, #8]
8003fe6: 2b00 cmp r3, #0
8003fe8: d015 beq.n 8004016 <HAL_RCC_OscConfig+0x35e>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003fea: f7fe ff51 bl 8002e90 <HAL_GetTick>
8003fee: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003ff0: e00a b.n 8004008 <HAL_RCC_OscConfig+0x350>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8003ff2: f7fe ff4d bl 8002e90 <HAL_GetTick>
8003ff6: 4602 mov r2, r0
8003ff8: 693b ldr r3, [r7, #16]
8003ffa: 1ad3 subs r3, r2, r3
8003ffc: f241 3288 movw r2, #5000 ; 0x1388
8004000: 4293 cmp r3, r2
8004002: d901 bls.n 8004008 <HAL_RCC_OscConfig+0x350>
{
return HAL_TIMEOUT;
8004004: 2303 movs r3, #3
8004006: e0bc b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004008: 4b61 ldr r3, [pc, #388] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
800400a: 6f1b ldr r3, [r3, #112] ; 0x70
800400c: f003 0302 and.w r3, r3, #2
8004010: 2b00 cmp r3, #0
8004012: d0ee beq.n 8003ff2 <HAL_RCC_OscConfig+0x33a>
8004014: e014 b.n 8004040 <HAL_RCC_OscConfig+0x388>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004016: f7fe ff3b bl 8002e90 <HAL_GetTick>
800401a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
800401c: e00a b.n 8004034 <HAL_RCC_OscConfig+0x37c>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
800401e: f7fe ff37 bl 8002e90 <HAL_GetTick>
8004022: 4602 mov r2, r0
8004024: 693b ldr r3, [r7, #16]
8004026: 1ad3 subs r3, r2, r3
8004028: f241 3288 movw r2, #5000 ; 0x1388
800402c: 4293 cmp r3, r2
800402e: d901 bls.n 8004034 <HAL_RCC_OscConfig+0x37c>
{
return HAL_TIMEOUT;
8004030: 2303 movs r3, #3
8004032: e0a6 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004034: 4b56 ldr r3, [pc, #344] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8004036: 6f1b ldr r3, [r3, #112] ; 0x70
8004038: f003 0302 and.w r3, r3, #2
800403c: 2b00 cmp r3, #0
800403e: d1ee bne.n 800401e <HAL_RCC_OscConfig+0x366>
}
}
}
/* Restore clock configuration if changed */
if(pwrclkchanged == SET)
8004040: 7dfb ldrb r3, [r7, #23]
8004042: 2b01 cmp r3, #1
8004044: d105 bne.n 8004052 <HAL_RCC_OscConfig+0x39a>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004046: 4b52 ldr r3, [pc, #328] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8004048: 6c1b ldr r3, [r3, #64] ; 0x40
800404a: 4a51 ldr r2, [pc, #324] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
800404c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8004050: 6413 str r3, [r2, #64] ; 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8004052: 687b ldr r3, [r7, #4]
8004054: 699b ldr r3, [r3, #24]
8004056: 2b00 cmp r3, #0
8004058: f000 8092 beq.w 8004180 <HAL_RCC_OscConfig+0x4c8>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
800405c: 4b4c ldr r3, [pc, #304] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
800405e: 689b ldr r3, [r3, #8]
8004060: f003 030c and.w r3, r3, #12
8004064: 2b08 cmp r3, #8
8004066: d05c beq.n 8004122 <HAL_RCC_OscConfig+0x46a>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8004068: 687b ldr r3, [r7, #4]
800406a: 699b ldr r3, [r3, #24]
800406c: 2b02 cmp r3, #2
800406e: d141 bne.n 80040f4 <HAL_RCC_OscConfig+0x43c>
assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004070: 4b48 ldr r3, [pc, #288] ; (8004194 <HAL_RCC_OscConfig+0x4dc>)
8004072: 2200 movs r2, #0
8004074: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004076: f7fe ff0b bl 8002e90 <HAL_GetTick>
800407a: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800407c: e008 b.n 8004090 <HAL_RCC_OscConfig+0x3d8>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
800407e: f7fe ff07 bl 8002e90 <HAL_GetTick>
8004082: 4602 mov r2, r0
8004084: 693b ldr r3, [r7, #16]
8004086: 1ad3 subs r3, r2, r3
8004088: 2b02 cmp r3, #2
800408a: d901 bls.n 8004090 <HAL_RCC_OscConfig+0x3d8>
{
return HAL_TIMEOUT;
800408c: 2303 movs r3, #3
800408e: e078 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004090: 4b3f ldr r3, [pc, #252] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8004092: 681b ldr r3, [r3, #0]
8004094: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8004098: 2b00 cmp r3, #0
800409a: d1f0 bne.n 800407e <HAL_RCC_OscConfig+0x3c6>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
800409c: 687b ldr r3, [r7, #4]
800409e: 69da ldr r2, [r3, #28]
80040a0: 687b ldr r3, [r7, #4]
80040a2: 6a1b ldr r3, [r3, #32]
80040a4: 431a orrs r2, r3
80040a6: 687b ldr r3, [r7, #4]
80040a8: 6a5b ldr r3, [r3, #36] ; 0x24
80040aa: 019b lsls r3, r3, #6
80040ac: 431a orrs r2, r3
80040ae: 687b ldr r3, [r7, #4]
80040b0: 6a9b ldr r3, [r3, #40] ; 0x28
80040b2: 085b lsrs r3, r3, #1
80040b4: 3b01 subs r3, #1
80040b6: 041b lsls r3, r3, #16
80040b8: 431a orrs r2, r3
80040ba: 687b ldr r3, [r7, #4]
80040bc: 6adb ldr r3, [r3, #44] ; 0x2c
80040be: 061b lsls r3, r3, #24
80040c0: 4933 ldr r1, [pc, #204] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
80040c2: 4313 orrs r3, r2
80040c4: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLM | \
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80040c6: 4b33 ldr r3, [pc, #204] ; (8004194 <HAL_RCC_OscConfig+0x4dc>)
80040c8: 2201 movs r2, #1
80040ca: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80040cc: f7fe fee0 bl 8002e90 <HAL_GetTick>
80040d0: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80040d2: e008 b.n 80040e6 <HAL_RCC_OscConfig+0x42e>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
80040d4: f7fe fedc bl 8002e90 <HAL_GetTick>
80040d8: 4602 mov r2, r0
80040da: 693b ldr r3, [r7, #16]
80040dc: 1ad3 subs r3, r2, r3
80040de: 2b02 cmp r3, #2
80040e0: d901 bls.n 80040e6 <HAL_RCC_OscConfig+0x42e>
{
return HAL_TIMEOUT;
80040e2: 2303 movs r3, #3
80040e4: e04d b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80040e6: 4b2a ldr r3, [pc, #168] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
80040e8: 681b ldr r3, [r3, #0]
80040ea: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
80040ee: 2b00 cmp r3, #0
80040f0: d0f0 beq.n 80040d4 <HAL_RCC_OscConfig+0x41c>
80040f2: e045 b.n 8004180 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80040f4: 4b27 ldr r3, [pc, #156] ; (8004194 <HAL_RCC_OscConfig+0x4dc>)
80040f6: 2200 movs r2, #0
80040f8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80040fa: f7fe fec9 bl 8002e90 <HAL_GetTick>
80040fe: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004100: e008 b.n 8004114 <HAL_RCC_OscConfig+0x45c>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8004102: f7fe fec5 bl 8002e90 <HAL_GetTick>
8004106: 4602 mov r2, r0
8004108: 693b ldr r3, [r7, #16]
800410a: 1ad3 subs r3, r2, r3
800410c: 2b02 cmp r3, #2
800410e: d901 bls.n 8004114 <HAL_RCC_OscConfig+0x45c>
{
return HAL_TIMEOUT;
8004110: 2303 movs r3, #3
8004112: e036 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004114: 4b1e ldr r3, [pc, #120] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8004116: 681b ldr r3, [r3, #0]
8004118: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800411c: 2b00 cmp r3, #0
800411e: d1f0 bne.n 8004102 <HAL_RCC_OscConfig+0x44a>
8004120: e02e b.n 8004180 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8004122: 687b ldr r3, [r7, #4]
8004124: 699b ldr r3, [r3, #24]
8004126: 2b01 cmp r3, #1
8004128: d101 bne.n 800412e <HAL_RCC_OscConfig+0x476>
{
return HAL_ERROR;
800412a: 2301 movs r3, #1
800412c: e029 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->PLLCFGR;
800412e: 4b18 ldr r3, [pc, #96] ; (8004190 <HAL_RCC_OscConfig+0x4d8>)
8004130: 685b ldr r3, [r3, #4]
8004132: 60fb str r3, [r7, #12]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004134: 68fb ldr r3, [r7, #12]
8004136: f403 0280 and.w r2, r3, #4194304 ; 0x400000
800413a: 687b ldr r3, [r7, #4]
800413c: 69db ldr r3, [r3, #28]
800413e: 429a cmp r2, r3
8004140: d11c bne.n 800417c <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
8004142: 68fb ldr r3, [r7, #12]
8004144: f003 023f and.w r2, r3, #63 ; 0x3f
8004148: 687b ldr r3, [r7, #4]
800414a: 6a1b ldr r3, [r3, #32]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800414c: 429a cmp r2, r3
800414e: d115 bne.n 800417c <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
8004150: 68fa ldr r2, [r7, #12]
8004152: f647 73c0 movw r3, #32704 ; 0x7fc0
8004156: 4013 ands r3, r2
8004158: 687a ldr r2, [r7, #4]
800415a: 6a52 ldr r2, [r2, #36] ; 0x24
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
800415c: 4293 cmp r3, r2
800415e: d10d bne.n 800417c <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8004160: 68fb ldr r3, [r7, #12]
8004162: f403 3240 and.w r2, r3, #196608 ; 0x30000
8004166: 687b ldr r3, [r7, #4]
8004168: 6a9b ldr r3, [r3, #40] ; 0x28
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
800416a: 429a cmp r2, r3
800416c: d106 bne.n 800417c <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
800416e: 68fb ldr r3, [r7, #12]
8004170: f003 6270 and.w r2, r3, #251658240 ; 0xf000000
8004174: 687b ldr r3, [r7, #4]
8004176: 6adb ldr r3, [r3, #44] ; 0x2c
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8004178: 429a cmp r2, r3
800417a: d001 beq.n 8004180 <HAL_RCC_OscConfig+0x4c8>
{
return HAL_ERROR;
800417c: 2301 movs r3, #1
800417e: e000 b.n 8004182 <HAL_RCC_OscConfig+0x4ca>
}
}
}
}
return HAL_OK;
8004180: 2300 movs r3, #0
}
8004182: 4618 mov r0, r3
8004184: 3718 adds r7, #24
8004186: 46bd mov sp, r7
8004188: bd80 pop {r7, pc}
800418a: bf00 nop
800418c: 40007000 .word 0x40007000
8004190: 40023800 .word 0x40023800
8004194: 42470060 .word 0x42470060
08004198 <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8004198: b580 push {r7, lr}
800419a: b084 sub sp, #16
800419c: af00 add r7, sp, #0
800419e: 6078 str r0, [r7, #4]
80041a0: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
80041a2: 687b ldr r3, [r7, #4]
80041a4: 2b00 cmp r3, #0
80041a6: d101 bne.n 80041ac <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80041a8: 2301 movs r3, #1
80041aa: e0cc b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
80041ac: 4b68 ldr r3, [pc, #416] ; (8004350 <HAL_RCC_ClockConfig+0x1b8>)
80041ae: 681b ldr r3, [r3, #0]
80041b0: f003 030f and.w r3, r3, #15
80041b4: 683a ldr r2, [r7, #0]
80041b6: 429a cmp r2, r3
80041b8: d90c bls.n 80041d4 <HAL_RCC_ClockConfig+0x3c>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80041ba: 4b65 ldr r3, [pc, #404] ; (8004350 <HAL_RCC_ClockConfig+0x1b8>)
80041bc: 683a ldr r2, [r7, #0]
80041be: b2d2 uxtb r2, r2
80041c0: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80041c2: 4b63 ldr r3, [pc, #396] ; (8004350 <HAL_RCC_ClockConfig+0x1b8>)
80041c4: 681b ldr r3, [r3, #0]
80041c6: f003 030f and.w r3, r3, #15
80041ca: 683a ldr r2, [r7, #0]
80041cc: 429a cmp r2, r3
80041ce: d001 beq.n 80041d4 <HAL_RCC_ClockConfig+0x3c>
{
return HAL_ERROR;
80041d0: 2301 movs r3, #1
80041d2: e0b8 b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80041d4: 687b ldr r3, [r7, #4]
80041d6: 681b ldr r3, [r3, #0]
80041d8: f003 0302 and.w r3, r3, #2
80041dc: 2b00 cmp r3, #0
80041de: d020 beq.n 8004222 <HAL_RCC_ClockConfig+0x8a>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80041e0: 687b ldr r3, [r7, #4]
80041e2: 681b ldr r3, [r3, #0]
80041e4: f003 0304 and.w r3, r3, #4
80041e8: 2b00 cmp r3, #0
80041ea: d005 beq.n 80041f8 <HAL_RCC_ClockConfig+0x60>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
80041ec: 4b59 ldr r3, [pc, #356] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
80041ee: 689b ldr r3, [r3, #8]
80041f0: 4a58 ldr r2, [pc, #352] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
80041f2: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
80041f6: 6093 str r3, [r2, #8]
}
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80041f8: 687b ldr r3, [r7, #4]
80041fa: 681b ldr r3, [r3, #0]
80041fc: f003 0308 and.w r3, r3, #8
8004200: 2b00 cmp r3, #0
8004202: d005 beq.n 8004210 <HAL_RCC_ClockConfig+0x78>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8004204: 4b53 ldr r3, [pc, #332] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004206: 689b ldr r3, [r3, #8]
8004208: 4a52 ldr r2, [pc, #328] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
800420a: f443 4360 orr.w r3, r3, #57344 ; 0xe000
800420e: 6093 str r3, [r2, #8]
}
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8004210: 4b50 ldr r3, [pc, #320] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004212: 689b ldr r3, [r3, #8]
8004214: f023 02f0 bic.w r2, r3, #240 ; 0xf0
8004218: 687b ldr r3, [r7, #4]
800421a: 689b ldr r3, [r3, #8]
800421c: 494d ldr r1, [pc, #308] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
800421e: 4313 orrs r3, r2
8004220: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8004222: 687b ldr r3, [r7, #4]
8004224: 681b ldr r3, [r3, #0]
8004226: f003 0301 and.w r3, r3, #1
800422a: 2b00 cmp r3, #0
800422c: d044 beq.n 80042b8 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800422e: 687b ldr r3, [r7, #4]
8004230: 685b ldr r3, [r3, #4]
8004232: 2b01 cmp r3, #1
8004234: d107 bne.n 8004246 <HAL_RCC_ClockConfig+0xae>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004236: 4b47 ldr r3, [pc, #284] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004238: 681b ldr r3, [r3, #0]
800423a: f403 3300 and.w r3, r3, #131072 ; 0x20000
800423e: 2b00 cmp r3, #0
8004240: d119 bne.n 8004276 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004242: 2301 movs r3, #1
8004244: e07f b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
}
}
/* PLL is selected as System Clock Source */
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8004246: 687b ldr r3, [r7, #4]
8004248: 685b ldr r3, [r3, #4]
800424a: 2b02 cmp r3, #2
800424c: d003 beq.n 8004256 <HAL_RCC_ClockConfig+0xbe>
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
800424e: 687b ldr r3, [r7, #4]
8004250: 685b ldr r3, [r3, #4]
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8004252: 2b03 cmp r3, #3
8004254: d107 bne.n 8004266 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004256: 4b3f ldr r3, [pc, #252] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004258: 681b ldr r3, [r3, #0]
800425a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
800425e: 2b00 cmp r3, #0
8004260: d109 bne.n 8004276 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004262: 2301 movs r3, #1
8004264: e06f b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8004266: 4b3b ldr r3, [pc, #236] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004268: 681b ldr r3, [r3, #0]
800426a: f003 0302 and.w r3, r3, #2
800426e: 2b00 cmp r3, #0
8004270: d101 bne.n 8004276 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004272: 2301 movs r3, #1
8004274: e067 b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8004276: 4b37 ldr r3, [pc, #220] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004278: 689b ldr r3, [r3, #8]
800427a: f023 0203 bic.w r2, r3, #3
800427e: 687b ldr r3, [r7, #4]
8004280: 685b ldr r3, [r3, #4]
8004282: 4934 ldr r1, [pc, #208] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004284: 4313 orrs r3, r2
8004286: 608b str r3, [r1, #8]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004288: f7fe fe02 bl 8002e90 <HAL_GetTick>
800428c: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800428e: e00a b.n 80042a6 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8004290: f7fe fdfe bl 8002e90 <HAL_GetTick>
8004294: 4602 mov r2, r0
8004296: 68fb ldr r3, [r7, #12]
8004298: 1ad3 subs r3, r2, r3
800429a: f241 3288 movw r2, #5000 ; 0x1388
800429e: 4293 cmp r3, r2
80042a0: d901 bls.n 80042a6 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80042a2: 2303 movs r3, #3
80042a4: e04f b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80042a6: 4b2b ldr r3, [pc, #172] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
80042a8: 689b ldr r3, [r3, #8]
80042aa: f003 020c and.w r2, r3, #12
80042ae: 687b ldr r3, [r7, #4]
80042b0: 685b ldr r3, [r3, #4]
80042b2: 009b lsls r3, r3, #2
80042b4: 429a cmp r2, r3
80042b6: d1eb bne.n 8004290 <HAL_RCC_ClockConfig+0xf8>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
80042b8: 4b25 ldr r3, [pc, #148] ; (8004350 <HAL_RCC_ClockConfig+0x1b8>)
80042ba: 681b ldr r3, [r3, #0]
80042bc: f003 030f and.w r3, r3, #15
80042c0: 683a ldr r2, [r7, #0]
80042c2: 429a cmp r2, r3
80042c4: d20c bcs.n 80042e0 <HAL_RCC_ClockConfig+0x148>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80042c6: 4b22 ldr r3, [pc, #136] ; (8004350 <HAL_RCC_ClockConfig+0x1b8>)
80042c8: 683a ldr r2, [r7, #0]
80042ca: b2d2 uxtb r2, r2
80042cc: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80042ce: 4b20 ldr r3, [pc, #128] ; (8004350 <HAL_RCC_ClockConfig+0x1b8>)
80042d0: 681b ldr r3, [r3, #0]
80042d2: f003 030f and.w r3, r3, #15
80042d6: 683a ldr r2, [r7, #0]
80042d8: 429a cmp r2, r3
80042da: d001 beq.n 80042e0 <HAL_RCC_ClockConfig+0x148>
{
return HAL_ERROR;
80042dc: 2301 movs r3, #1
80042de: e032 b.n 8004346 <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80042e0: 687b ldr r3, [r7, #4]
80042e2: 681b ldr r3, [r3, #0]
80042e4: f003 0304 and.w r3, r3, #4
80042e8: 2b00 cmp r3, #0
80042ea: d008 beq.n 80042fe <HAL_RCC_ClockConfig+0x166>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80042ec: 4b19 ldr r3, [pc, #100] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
80042ee: 689b ldr r3, [r3, #8]
80042f0: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
80042f4: 687b ldr r3, [r7, #4]
80042f6: 68db ldr r3, [r3, #12]
80042f8: 4916 ldr r1, [pc, #88] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
80042fa: 4313 orrs r3, r2
80042fc: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80042fe: 687b ldr r3, [r7, #4]
8004300: 681b ldr r3, [r3, #0]
8004302: f003 0308 and.w r3, r3, #8
8004306: 2b00 cmp r3, #0
8004308: d009 beq.n 800431e <HAL_RCC_ClockConfig+0x186>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
800430a: 4b12 ldr r3, [pc, #72] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
800430c: 689b ldr r3, [r3, #8]
800430e: f423 4260 bic.w r2, r3, #57344 ; 0xe000
8004312: 687b ldr r3, [r7, #4]
8004314: 691b ldr r3, [r3, #16]
8004316: 00db lsls r3, r3, #3
8004318: 490e ldr r1, [pc, #56] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
800431a: 4313 orrs r3, r2
800431c: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
800431e: f000 f821 bl 8004364 <HAL_RCC_GetSysClockFreq>
8004322: 4601 mov r1, r0
8004324: 4b0b ldr r3, [pc, #44] ; (8004354 <HAL_RCC_ClockConfig+0x1bc>)
8004326: 689b ldr r3, [r3, #8]
8004328: 091b lsrs r3, r3, #4
800432a: f003 030f and.w r3, r3, #15
800432e: 4a0a ldr r2, [pc, #40] ; (8004358 <HAL_RCC_ClockConfig+0x1c0>)
8004330: 5cd3 ldrb r3, [r2, r3]
8004332: fa21 f303 lsr.w r3, r1, r3
8004336: 4a09 ldr r2, [pc, #36] ; (800435c <HAL_RCC_ClockConfig+0x1c4>)
8004338: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings */
HAL_InitTick (uwTickPrio);
800433a: 4b09 ldr r3, [pc, #36] ; (8004360 <HAL_RCC_ClockConfig+0x1c8>)
800433c: 681b ldr r3, [r3, #0]
800433e: 4618 mov r0, r3
8004340: f7fe fd62 bl 8002e08 <HAL_InitTick>
return HAL_OK;
8004344: 2300 movs r3, #0
}
8004346: 4618 mov r0, r3
8004348: 3710 adds r7, #16
800434a: 46bd mov sp, r7
800434c: bd80 pop {r7, pc}
800434e: bf00 nop
8004350: 40023c00 .word 0x40023c00
8004354: 40023800 .word 0x40023800
8004358: 080053a4 .word 0x080053a4
800435c: 20000004 .word 0x20000004
8004360: 20000008 .word 0x20000008
08004364 <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
{
8004364: b5f0 push {r4, r5, r6, r7, lr}
8004366: b085 sub sp, #20
8004368: af00 add r7, sp, #0
uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
800436a: 2300 movs r3, #0
800436c: 607b str r3, [r7, #4]
800436e: 2300 movs r3, #0
8004370: 60fb str r3, [r7, #12]
8004372: 2300 movs r3, #0
8004374: 603b str r3, [r7, #0]
uint32_t sysclockfreq = 0U;
8004376: 2300 movs r3, #0
8004378: 60bb str r3, [r7, #8]
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
800437a: 4b63 ldr r3, [pc, #396] ; (8004508 <HAL_RCC_GetSysClockFreq+0x1a4>)
800437c: 689b ldr r3, [r3, #8]
800437e: f003 030c and.w r3, r3, #12
8004382: 2b04 cmp r3, #4
8004384: d007 beq.n 8004396 <HAL_RCC_GetSysClockFreq+0x32>
8004386: 2b08 cmp r3, #8
8004388: d008 beq.n 800439c <HAL_RCC_GetSysClockFreq+0x38>
800438a: 2b00 cmp r3, #0
800438c: f040 80b4 bne.w 80044f8 <HAL_RCC_GetSysClockFreq+0x194>
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
8004390: 4b5e ldr r3, [pc, #376] ; (800450c <HAL_RCC_GetSysClockFreq+0x1a8>)
8004392: 60bb str r3, [r7, #8]
break;
8004394: e0b3 b.n 80044fe <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
8004396: 4b5e ldr r3, [pc, #376] ; (8004510 <HAL_RCC_GetSysClockFreq+0x1ac>)
8004398: 60bb str r3, [r7, #8]
break;
800439a: e0b0 b.n 80044fe <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
800439c: 4b5a ldr r3, [pc, #360] ; (8004508 <HAL_RCC_GetSysClockFreq+0x1a4>)
800439e: 685b ldr r3, [r3, #4]
80043a0: f003 033f and.w r3, r3, #63 ; 0x3f
80043a4: 607b str r3, [r7, #4]
if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
80043a6: 4b58 ldr r3, [pc, #352] ; (8004508 <HAL_RCC_GetSysClockFreq+0x1a4>)
80043a8: 685b ldr r3, [r3, #4]
80043aa: f403 0380 and.w r3, r3, #4194304 ; 0x400000
80043ae: 2b00 cmp r3, #0
80043b0: d04a beq.n 8004448 <HAL_RCC_GetSysClockFreq+0xe4>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
80043b2: 4b55 ldr r3, [pc, #340] ; (8004508 <HAL_RCC_GetSysClockFreq+0x1a4>)
80043b4: 685b ldr r3, [r3, #4]
80043b6: 099b lsrs r3, r3, #6
80043b8: f04f 0400 mov.w r4, #0
80043bc: f240 11ff movw r1, #511 ; 0x1ff
80043c0: f04f 0200 mov.w r2, #0
80043c4: ea03 0501 and.w r5, r3, r1
80043c8: ea04 0602 and.w r6, r4, r2
80043cc: 4629 mov r1, r5
80043ce: 4632 mov r2, r6
80043d0: f04f 0300 mov.w r3, #0
80043d4: f04f 0400 mov.w r4, #0
80043d8: 0154 lsls r4, r2, #5
80043da: ea44 64d1 orr.w r4, r4, r1, lsr #27
80043de: 014b lsls r3, r1, #5
80043e0: 4619 mov r1, r3
80043e2: 4622 mov r2, r4
80043e4: 1b49 subs r1, r1, r5
80043e6: eb62 0206 sbc.w r2, r2, r6
80043ea: f04f 0300 mov.w r3, #0
80043ee: f04f 0400 mov.w r4, #0
80043f2: 0194 lsls r4, r2, #6
80043f4: ea44 6491 orr.w r4, r4, r1, lsr #26
80043f8: 018b lsls r3, r1, #6
80043fa: 1a5b subs r3, r3, r1
80043fc: eb64 0402 sbc.w r4, r4, r2
8004400: f04f 0100 mov.w r1, #0
8004404: f04f 0200 mov.w r2, #0
8004408: 00e2 lsls r2, r4, #3
800440a: ea42 7253 orr.w r2, r2, r3, lsr #29
800440e: 00d9 lsls r1, r3, #3
8004410: 460b mov r3, r1
8004412: 4614 mov r4, r2
8004414: 195b adds r3, r3, r5
8004416: eb44 0406 adc.w r4, r4, r6
800441a: f04f 0100 mov.w r1, #0
800441e: f04f 0200 mov.w r2, #0
8004422: 0262 lsls r2, r4, #9
8004424: ea42 52d3 orr.w r2, r2, r3, lsr #23
8004428: 0259 lsls r1, r3, #9
800442a: 460b mov r3, r1
800442c: 4614 mov r4, r2
800442e: 4618 mov r0, r3
8004430: 4621 mov r1, r4
8004432: 687b ldr r3, [r7, #4]
8004434: f04f 0400 mov.w r4, #0
8004438: 461a mov r2, r3
800443a: 4623 mov r3, r4
800443c: f7fc fac6 bl 80009cc <__aeabi_uldivmod>
8004440: 4603 mov r3, r0
8004442: 460c mov r4, r1
8004444: 60fb str r3, [r7, #12]
8004446: e049 b.n 80044dc <HAL_RCC_GetSysClockFreq+0x178>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8004448: 4b2f ldr r3, [pc, #188] ; (8004508 <HAL_RCC_GetSysClockFreq+0x1a4>)
800444a: 685b ldr r3, [r3, #4]
800444c: 099b lsrs r3, r3, #6
800444e: f04f 0400 mov.w r4, #0
8004452: f240 11ff movw r1, #511 ; 0x1ff
8004456: f04f 0200 mov.w r2, #0
800445a: ea03 0501 and.w r5, r3, r1
800445e: ea04 0602 and.w r6, r4, r2
8004462: 4629 mov r1, r5
8004464: 4632 mov r2, r6
8004466: f04f 0300 mov.w r3, #0
800446a: f04f 0400 mov.w r4, #0
800446e: 0154 lsls r4, r2, #5
8004470: ea44 64d1 orr.w r4, r4, r1, lsr #27
8004474: 014b lsls r3, r1, #5
8004476: 4619 mov r1, r3
8004478: 4622 mov r2, r4
800447a: 1b49 subs r1, r1, r5
800447c: eb62 0206 sbc.w r2, r2, r6
8004480: f04f 0300 mov.w r3, #0
8004484: f04f 0400 mov.w r4, #0
8004488: 0194 lsls r4, r2, #6
800448a: ea44 6491 orr.w r4, r4, r1, lsr #26
800448e: 018b lsls r3, r1, #6
8004490: 1a5b subs r3, r3, r1
8004492: eb64 0402 sbc.w r4, r4, r2
8004496: f04f 0100 mov.w r1, #0
800449a: f04f 0200 mov.w r2, #0
800449e: 00e2 lsls r2, r4, #3
80044a0: ea42 7253 orr.w r2, r2, r3, lsr #29
80044a4: 00d9 lsls r1, r3, #3
80044a6: 460b mov r3, r1
80044a8: 4614 mov r4, r2
80044aa: 195b adds r3, r3, r5
80044ac: eb44 0406 adc.w r4, r4, r6
80044b0: f04f 0100 mov.w r1, #0
80044b4: f04f 0200 mov.w r2, #0
80044b8: 02a2 lsls r2, r4, #10
80044ba: ea42 5293 orr.w r2, r2, r3, lsr #22
80044be: 0299 lsls r1, r3, #10
80044c0: 460b mov r3, r1
80044c2: 4614 mov r4, r2
80044c4: 4618 mov r0, r3
80044c6: 4621 mov r1, r4
80044c8: 687b ldr r3, [r7, #4]
80044ca: f04f 0400 mov.w r4, #0
80044ce: 461a mov r2, r3
80044d0: 4623 mov r3, r4
80044d2: f7fc fa7b bl 80009cc <__aeabi_uldivmod>
80044d6: 4603 mov r3, r0
80044d8: 460c mov r4, r1
80044da: 60fb str r3, [r7, #12]
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
80044dc: 4b0a ldr r3, [pc, #40] ; (8004508 <HAL_RCC_GetSysClockFreq+0x1a4>)
80044de: 685b ldr r3, [r3, #4]
80044e0: 0c1b lsrs r3, r3, #16
80044e2: f003 0303 and.w r3, r3, #3
80044e6: 3301 adds r3, #1
80044e8: 005b lsls r3, r3, #1
80044ea: 603b str r3, [r7, #0]
sysclockfreq = pllvco/pllp;
80044ec: 68fa ldr r2, [r7, #12]
80044ee: 683b ldr r3, [r7, #0]
80044f0: fbb2 f3f3 udiv r3, r2, r3
80044f4: 60bb str r3, [r7, #8]
break;
80044f6: e002 b.n 80044fe <HAL_RCC_GetSysClockFreq+0x19a>
}
default:
{
sysclockfreq = HSI_VALUE;
80044f8: 4b04 ldr r3, [pc, #16] ; (800450c <HAL_RCC_GetSysClockFreq+0x1a8>)
80044fa: 60bb str r3, [r7, #8]
break;
80044fc: bf00 nop
}
}
return sysclockfreq;
80044fe: 68bb ldr r3, [r7, #8]
}
8004500: 4618 mov r0, r3
8004502: 3714 adds r7, #20
8004504: 46bd mov sp, r7
8004506: bdf0 pop {r4, r5, r6, r7, pc}
8004508: 40023800 .word 0x40023800
800450c: 00f42400 .word 0x00f42400
8004510: 007a1200 .word 0x007a1200
08004514 <HAL_SPI_Init>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
8004514: b580 push {r7, lr}
8004516: b082 sub sp, #8
8004518: af00 add r7, sp, #0
800451a: 6078 str r0, [r7, #4]
/* Check the SPI handle allocation */
if (hspi == NULL)
800451c: 687b ldr r3, [r7, #4]
800451e: 2b00 cmp r3, #0
8004520: d101 bne.n 8004526 <HAL_SPI_Init+0x12>
{
return HAL_ERROR;
8004522: 2301 movs r3, #1
8004524: e056 b.n 80045d4 <HAL_SPI_Init+0xc0>
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
}
#else
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
8004526: 687b ldr r3, [r7, #4]
8004528: 2200 movs r2, #0
800452a: 629a str r2, [r3, #40] ; 0x28
#endif /* USE_SPI_CRC */
if (hspi->State == HAL_SPI_STATE_RESET)
800452c: 687b ldr r3, [r7, #4]
800452e: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
8004532: b2db uxtb r3, r3
8004534: 2b00 cmp r3, #0
8004536: d106 bne.n 8004546 <HAL_SPI_Init+0x32>
{
/* Allocate lock resource and initialize it */
hspi->Lock = HAL_UNLOCKED;
8004538: 687b ldr r3, [r7, #4]
800453a: 2200 movs r2, #0
800453c: f883 2050 strb.w r2, [r3, #80] ; 0x50
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
hspi->MspInitCallback(hspi);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
8004540: 6878 ldr r0, [r7, #4]
8004542: f7fe fadb bl 8002afc <HAL_SPI_MspInit>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
hspi->State = HAL_SPI_STATE_BUSY;
8004546: 687b ldr r3, [r7, #4]
8004548: 2202 movs r2, #2
800454a: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the selected SPI peripheral */
__HAL_SPI_DISABLE(hspi);
800454e: 687b ldr r3, [r7, #4]
8004550: 681b ldr r3, [r3, #0]
8004552: 681a ldr r2, [r3, #0]
8004554: 687b ldr r3, [r7, #4]
8004556: 681b ldr r3, [r3, #0]
8004558: f022 0240 bic.w r2, r2, #64 ; 0x40
800455c: 601a str r2, [r3, #0]
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
Communication speed, First bit and CRC calculation state */
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
800455e: 687b ldr r3, [r7, #4]
8004560: 685a ldr r2, [r3, #4]
8004562: 687b ldr r3, [r7, #4]
8004564: 689b ldr r3, [r3, #8]
8004566: 431a orrs r2, r3
8004568: 687b ldr r3, [r7, #4]
800456a: 68db ldr r3, [r3, #12]
800456c: 431a orrs r2, r3
800456e: 687b ldr r3, [r7, #4]
8004570: 691b ldr r3, [r3, #16]
8004572: 431a orrs r2, r3
8004574: 687b ldr r3, [r7, #4]
8004576: 695b ldr r3, [r3, #20]
8004578: 431a orrs r2, r3
800457a: 687b ldr r3, [r7, #4]
800457c: 699b ldr r3, [r3, #24]
800457e: f403 7300 and.w r3, r3, #512 ; 0x200
8004582: 431a orrs r2, r3
8004584: 687b ldr r3, [r7, #4]
8004586: 69db ldr r3, [r3, #28]
8004588: 431a orrs r2, r3
800458a: 687b ldr r3, [r7, #4]
800458c: 6a1b ldr r3, [r3, #32]
800458e: ea42 0103 orr.w r1, r2, r3
8004592: 687b ldr r3, [r7, #4]
8004594: 6a9a ldr r2, [r3, #40] ; 0x28
8004596: 687b ldr r3, [r7, #4]
8004598: 681b ldr r3, [r3, #0]
800459a: 430a orrs r2, r1
800459c: 601a str r2, [r3, #0]
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation));
/* Configure : NSS management, TI Mode */
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
800459e: 687b ldr r3, [r7, #4]
80045a0: 699b ldr r3, [r3, #24]
80045a2: 0c1b lsrs r3, r3, #16
80045a4: f003 0104 and.w r1, r3, #4
80045a8: 687b ldr r3, [r7, #4]
80045aa: 6a5a ldr r2, [r3, #36] ; 0x24
80045ac: 687b ldr r3, [r7, #4]
80045ae: 681b ldr r3, [r3, #0]
80045b0: 430a orrs r2, r1
80045b2: 605a str r2, [r3, #4]
}
#endif /* USE_SPI_CRC */
#if defined(SPI_I2SCFGR_I2SMOD)
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
80045b4: 687b ldr r3, [r7, #4]
80045b6: 681b ldr r3, [r3, #0]
80045b8: 69da ldr r2, [r3, #28]
80045ba: 687b ldr r3, [r7, #4]
80045bc: 681b ldr r3, [r3, #0]
80045be: f422 6200 bic.w r2, r2, #2048 ; 0x800
80045c2: 61da str r2, [r3, #28]
#endif /* SPI_I2SCFGR_I2SMOD */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
80045c4: 687b ldr r3, [r7, #4]
80045c6: 2200 movs r2, #0
80045c8: 655a str r2, [r3, #84] ; 0x54
hspi->State = HAL_SPI_STATE_READY;
80045ca: 687b ldr r3, [r7, #4]
80045cc: 2201 movs r2, #1
80045ce: f883 2051 strb.w r2, [r3, #81] ; 0x51
return HAL_OK;
80045d2: 2300 movs r3, #0
}
80045d4: 4618 mov r0, r3
80045d6: 3708 adds r7, #8
80045d8: 46bd mov sp, r7
80045da: bd80 pop {r7, pc}
080045dc <HAL_SPI_Transmit_IT>:
* @param pData pointer to data buffer
* @param Size amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
80045dc: b480 push {r7}
80045de: b087 sub sp, #28
80045e0: af00 add r7, sp, #0
80045e2: 60f8 str r0, [r7, #12]
80045e4: 60b9 str r1, [r7, #8]
80045e6: 4613 mov r3, r2
80045e8: 80fb strh r3, [r7, #6]
HAL_StatusTypeDef errorcode = HAL_OK;
80045ea: 2300 movs r3, #0
80045ec: 75fb strb r3, [r7, #23]
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
/* Process Locked */
__HAL_LOCK(hspi);
80045ee: 68fb ldr r3, [r7, #12]
80045f0: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
80045f4: 2b01 cmp r3, #1
80045f6: d101 bne.n 80045fc <HAL_SPI_Transmit_IT+0x20>
80045f8: 2302 movs r3, #2
80045fa: e067 b.n 80046cc <HAL_SPI_Transmit_IT+0xf0>
80045fc: 68fb ldr r3, [r7, #12]
80045fe: 2201 movs r2, #1
8004600: f883 2050 strb.w r2, [r3, #80] ; 0x50
if ((pData == NULL) || (Size == 0U))
8004604: 68bb ldr r3, [r7, #8]
8004606: 2b00 cmp r3, #0
8004608: d002 beq.n 8004610 <HAL_SPI_Transmit_IT+0x34>
800460a: 88fb ldrh r3, [r7, #6]
800460c: 2b00 cmp r3, #0
800460e: d102 bne.n 8004616 <HAL_SPI_Transmit_IT+0x3a>
{
errorcode = HAL_ERROR;
8004610: 2301 movs r3, #1
8004612: 75fb strb r3, [r7, #23]
goto error;
8004614: e055 b.n 80046c2 <HAL_SPI_Transmit_IT+0xe6>
}
if (hspi->State != HAL_SPI_STATE_READY)
8004616: 68fb ldr r3, [r7, #12]
8004618: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
800461c: b2db uxtb r3, r3
800461e: 2b01 cmp r3, #1
8004620: d002 beq.n 8004628 <HAL_SPI_Transmit_IT+0x4c>
{
errorcode = HAL_BUSY;
8004622: 2302 movs r3, #2
8004624: 75fb strb r3, [r7, #23]
goto error;
8004626: e04c b.n 80046c2 <HAL_SPI_Transmit_IT+0xe6>
}
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
8004628: 68fb ldr r3, [r7, #12]
800462a: 2203 movs r2, #3
800462c: f883 2051 strb.w r2, [r3, #81] ; 0x51
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
8004630: 68fb ldr r3, [r7, #12]
8004632: 2200 movs r2, #0
8004634: 655a str r2, [r3, #84] ; 0x54
hspi->pTxBuffPtr = (uint8_t *)pData;
8004636: 68fb ldr r3, [r7, #12]
8004638: 68ba ldr r2, [r7, #8]
800463a: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferSize = Size;
800463c: 68fb ldr r3, [r7, #12]
800463e: 88fa ldrh r2, [r7, #6]
8004640: 869a strh r2, [r3, #52] ; 0x34
hspi->TxXferCount = Size;
8004642: 68fb ldr r3, [r7, #12]
8004644: 88fa ldrh r2, [r7, #6]
8004646: 86da strh r2, [r3, #54] ; 0x36
/* Init field not used in handle to zero */
hspi->pRxBuffPtr = (uint8_t *)NULL;
8004648: 68fb ldr r3, [r7, #12]
800464a: 2200 movs r2, #0
800464c: 639a str r2, [r3, #56] ; 0x38
hspi->RxXferSize = 0U;
800464e: 68fb ldr r3, [r7, #12]
8004650: 2200 movs r2, #0
8004652: 879a strh r2, [r3, #60] ; 0x3c
hspi->RxXferCount = 0U;
8004654: 68fb ldr r3, [r7, #12]
8004656: 2200 movs r2, #0
8004658: 87da strh r2, [r3, #62] ; 0x3e
hspi->RxISR = NULL;
800465a: 68fb ldr r3, [r7, #12]
800465c: 2200 movs r2, #0
800465e: 641a str r2, [r3, #64] ; 0x40
/* Set the function for IT treatment */
if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
8004660: 68fb ldr r3, [r7, #12]
8004662: 68db ldr r3, [r3, #12]
8004664: 2b00 cmp r3, #0
8004666: d003 beq.n 8004670 <HAL_SPI_Transmit_IT+0x94>
{
hspi->TxISR = SPI_TxISR_16BIT;
8004668: 68fb ldr r3, [r7, #12]
800466a: 4a1b ldr r2, [pc, #108] ; (80046d8 <HAL_SPI_Transmit_IT+0xfc>)
800466c: 645a str r2, [r3, #68] ; 0x44
800466e: e002 b.n 8004676 <HAL_SPI_Transmit_IT+0x9a>
}
else
{
hspi->TxISR = SPI_TxISR_8BIT;
8004670: 68fb ldr r3, [r7, #12]
8004672: 4a1a ldr r2, [pc, #104] ; (80046dc <HAL_SPI_Transmit_IT+0x100>)
8004674: 645a str r2, [r3, #68] ; 0x44
}
/* Configure communication direction : 1Line */
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
8004676: 68fb ldr r3, [r7, #12]
8004678: 689b ldr r3, [r3, #8]
800467a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
800467e: d107 bne.n 8004690 <HAL_SPI_Transmit_IT+0xb4>
{
SPI_1LINE_TX(hspi);
8004680: 68fb ldr r3, [r7, #12]
8004682: 681b ldr r3, [r3, #0]
8004684: 681a ldr r2, [r3, #0]
8004686: 68fb ldr r3, [r7, #12]
8004688: 681b ldr r3, [r3, #0]
800468a: f442 4280 orr.w r2, r2, #16384 ; 0x4000
800468e: 601a str r2, [r3, #0]
SPI_RESET_CRC(hspi);
}
#endif /* USE_SPI_CRC */
/* Enable TXE and ERR interrupt */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
8004690: 68fb ldr r3, [r7, #12]
8004692: 681b ldr r3, [r3, #0]
8004694: 685a ldr r2, [r3, #4]
8004696: 68fb ldr r3, [r7, #12]
8004698: 681b ldr r3, [r3, #0]
800469a: f042 02a0 orr.w r2, r2, #160 ; 0xa0
800469e: 605a str r2, [r3, #4]
/* Check if the SPI is already enabled */
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
80046a0: 68fb ldr r3, [r7, #12]
80046a2: 681b ldr r3, [r3, #0]
80046a4: 681b ldr r3, [r3, #0]
80046a6: f003 0340 and.w r3, r3, #64 ; 0x40
80046aa: 2b40 cmp r3, #64 ; 0x40
80046ac: d008 beq.n 80046c0 <HAL_SPI_Transmit_IT+0xe4>
{
/* Enable SPI peripheral */
__HAL_SPI_ENABLE(hspi);
80046ae: 68fb ldr r3, [r7, #12]
80046b0: 681b ldr r3, [r3, #0]
80046b2: 681a ldr r2, [r3, #0]
80046b4: 68fb ldr r3, [r7, #12]
80046b6: 681b ldr r3, [r3, #0]
80046b8: f042 0240 orr.w r2, r2, #64 ; 0x40
80046bc: 601a str r2, [r3, #0]
80046be: e000 b.n 80046c2 <HAL_SPI_Transmit_IT+0xe6>
}
error :
80046c0: bf00 nop
__HAL_UNLOCK(hspi);
80046c2: 68fb ldr r3, [r7, #12]
80046c4: 2200 movs r2, #0
80046c6: f883 2050 strb.w r2, [r3, #80] ; 0x50
return errorcode;
80046ca: 7dfb ldrb r3, [r7, #23]
}
80046cc: 4618 mov r0, r3
80046ce: 371c adds r7, #28
80046d0: 46bd mov sp, r7
80046d2: f85d 7b04 ldr.w r7, [sp], #4
80046d6: 4770 bx lr
80046d8: 08004977 .word 0x08004977
80046dc: 08004931 .word 0x08004931
080046e0 <HAL_SPI_IRQHandler>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for the specified SPI module.
* @retval None
*/
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
{
80046e0: b580 push {r7, lr}
80046e2: b088 sub sp, #32
80046e4: af00 add r7, sp, #0
80046e6: 6078 str r0, [r7, #4]
uint32_t itsource = hspi->Instance->CR2;
80046e8: 687b ldr r3, [r7, #4]
80046ea: 681b ldr r3, [r3, #0]
80046ec: 685b ldr r3, [r3, #4]
80046ee: 61fb str r3, [r7, #28]
uint32_t itflag = hspi->Instance->SR;
80046f0: 687b ldr r3, [r7, #4]
80046f2: 681b ldr r3, [r3, #0]
80046f4: 689b ldr r3, [r3, #8]
80046f6: 61bb str r3, [r7, #24]
/* SPI in mode Receiver ----------------------------------------------------*/
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
80046f8: 69bb ldr r3, [r7, #24]
80046fa: 099b lsrs r3, r3, #6
80046fc: f003 0301 and.w r3, r3, #1
8004700: 2b00 cmp r3, #0
8004702: d10f bne.n 8004724 <HAL_SPI_IRQHandler+0x44>
(SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
8004704: 69bb ldr r3, [r7, #24]
8004706: f003 0301 and.w r3, r3, #1
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
800470a: 2b00 cmp r3, #0
800470c: d00a beq.n 8004724 <HAL_SPI_IRQHandler+0x44>
(SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
800470e: 69fb ldr r3, [r7, #28]
8004710: 099b lsrs r3, r3, #6
8004712: f003 0301 and.w r3, r3, #1
8004716: 2b00 cmp r3, #0
8004718: d004 beq.n 8004724 <HAL_SPI_IRQHandler+0x44>
{
hspi->RxISR(hspi);
800471a: 687b ldr r3, [r7, #4]
800471c: 6c1b ldr r3, [r3, #64] ; 0x40
800471e: 6878 ldr r0, [r7, #4]
8004720: 4798 blx r3
return;
8004722: e0d8 b.n 80048d6 <HAL_SPI_IRQHandler+0x1f6>
}
/* SPI in mode Transmitter -------------------------------------------------*/
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET))
8004724: 69bb ldr r3, [r7, #24]
8004726: 085b lsrs r3, r3, #1
8004728: f003 0301 and.w r3, r3, #1
800472c: 2b00 cmp r3, #0
800472e: d00a beq.n 8004746 <HAL_SPI_IRQHandler+0x66>
8004730: 69fb ldr r3, [r7, #28]
8004732: 09db lsrs r3, r3, #7
8004734: f003 0301 and.w r3, r3, #1
8004738: 2b00 cmp r3, #0
800473a: d004 beq.n 8004746 <HAL_SPI_IRQHandler+0x66>
{
hspi->TxISR(hspi);
800473c: 687b ldr r3, [r7, #4]
800473e: 6c5b ldr r3, [r3, #68] ; 0x44
8004740: 6878 ldr r0, [r7, #4]
8004742: 4798 blx r3
return;
8004744: e0c7 b.n 80048d6 <HAL_SPI_IRQHandler+0x1f6>
}
/* SPI in Error Treatment --------------------------------------------------*/
if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
8004746: 69bb ldr r3, [r7, #24]
8004748: 095b lsrs r3, r3, #5
800474a: f003 0301 and.w r3, r3, #1
800474e: 2b00 cmp r3, #0
8004750: d10c bne.n 800476c <HAL_SPI_IRQHandler+0x8c>
8004752: 69bb ldr r3, [r7, #24]
8004754: 099b lsrs r3, r3, #6
8004756: f003 0301 and.w r3, r3, #1
800475a: 2b00 cmp r3, #0
800475c: d106 bne.n 800476c <HAL_SPI_IRQHandler+0x8c>
|| (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
800475e: 69bb ldr r3, [r7, #24]
8004760: 0a1b lsrs r3, r3, #8
8004762: f003 0301 and.w r3, r3, #1
8004766: 2b00 cmp r3, #0
8004768: f000 80b5 beq.w 80048d6 <HAL_SPI_IRQHandler+0x1f6>
800476c: 69fb ldr r3, [r7, #28]
800476e: 095b lsrs r3, r3, #5
8004770: f003 0301 and.w r3, r3, #1
8004774: 2b00 cmp r3, #0
8004776: f000 80ae beq.w 80048d6 <HAL_SPI_IRQHandler+0x1f6>
{
/* SPI Overrun error interrupt occurred ----------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
800477a: 69bb ldr r3, [r7, #24]
800477c: 099b lsrs r3, r3, #6
800477e: f003 0301 and.w r3, r3, #1
8004782: 2b00 cmp r3, #0
8004784: d023 beq.n 80047ce <HAL_SPI_IRQHandler+0xee>
{
if (hspi->State != HAL_SPI_STATE_BUSY_TX)
8004786: 687b ldr r3, [r7, #4]
8004788: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
800478c: b2db uxtb r3, r3
800478e: 2b03 cmp r3, #3
8004790: d011 beq.n 80047b6 <HAL_SPI_IRQHandler+0xd6>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
8004792: 687b ldr r3, [r7, #4]
8004794: 6d5b ldr r3, [r3, #84] ; 0x54
8004796: f043 0204 orr.w r2, r3, #4
800479a: 687b ldr r3, [r7, #4]
800479c: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_OVRFLAG(hspi);
800479e: 2300 movs r3, #0
80047a0: 617b str r3, [r7, #20]
80047a2: 687b ldr r3, [r7, #4]
80047a4: 681b ldr r3, [r3, #0]
80047a6: 68db ldr r3, [r3, #12]
80047a8: 617b str r3, [r7, #20]
80047aa: 687b ldr r3, [r7, #4]
80047ac: 681b ldr r3, [r3, #0]
80047ae: 689b ldr r3, [r3, #8]
80047b0: 617b str r3, [r7, #20]
80047b2: 697b ldr r3, [r7, #20]
80047b4: e00b b.n 80047ce <HAL_SPI_IRQHandler+0xee>
}
else
{
__HAL_SPI_CLEAR_OVRFLAG(hspi);
80047b6: 2300 movs r3, #0
80047b8: 613b str r3, [r7, #16]
80047ba: 687b ldr r3, [r7, #4]
80047bc: 681b ldr r3, [r3, #0]
80047be: 68db ldr r3, [r3, #12]
80047c0: 613b str r3, [r7, #16]
80047c2: 687b ldr r3, [r7, #4]
80047c4: 681b ldr r3, [r3, #0]
80047c6: 689b ldr r3, [r3, #8]
80047c8: 613b str r3, [r7, #16]
80047ca: 693b ldr r3, [r7, #16]
return;
80047cc: e083 b.n 80048d6 <HAL_SPI_IRQHandler+0x1f6>
}
}
/* SPI Mode Fault error interrupt occurred -------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET)
80047ce: 69bb ldr r3, [r7, #24]
80047d0: 095b lsrs r3, r3, #5
80047d2: f003 0301 and.w r3, r3, #1
80047d6: 2b00 cmp r3, #0
80047d8: d014 beq.n 8004804 <HAL_SPI_IRQHandler+0x124>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
80047da: 687b ldr r3, [r7, #4]
80047dc: 6d5b ldr r3, [r3, #84] ; 0x54
80047de: f043 0201 orr.w r2, r3, #1
80047e2: 687b ldr r3, [r7, #4]
80047e4: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_MODFFLAG(hspi);
80047e6: 2300 movs r3, #0
80047e8: 60fb str r3, [r7, #12]
80047ea: 687b ldr r3, [r7, #4]
80047ec: 681b ldr r3, [r3, #0]
80047ee: 689b ldr r3, [r3, #8]
80047f0: 60fb str r3, [r7, #12]
80047f2: 687b ldr r3, [r7, #4]
80047f4: 681b ldr r3, [r3, #0]
80047f6: 681a ldr r2, [r3, #0]
80047f8: 687b ldr r3, [r7, #4]
80047fa: 681b ldr r3, [r3, #0]
80047fc: f022 0240 bic.w r2, r2, #64 ; 0x40
8004800: 601a str r2, [r3, #0]
8004802: 68fb ldr r3, [r7, #12]
}
/* SPI Frame error interrupt occurred ------------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)
8004804: 69bb ldr r3, [r7, #24]
8004806: 0a1b lsrs r3, r3, #8
8004808: f003 0301 and.w r3, r3, #1
800480c: 2b00 cmp r3, #0
800480e: d00c beq.n 800482a <HAL_SPI_IRQHandler+0x14a>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
8004810: 687b ldr r3, [r7, #4]
8004812: 6d5b ldr r3, [r3, #84] ; 0x54
8004814: f043 0208 orr.w r2, r3, #8
8004818: 687b ldr r3, [r7, #4]
800481a: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_FREFLAG(hspi);
800481c: 2300 movs r3, #0
800481e: 60bb str r3, [r7, #8]
8004820: 687b ldr r3, [r7, #4]
8004822: 681b ldr r3, [r3, #0]
8004824: 689b ldr r3, [r3, #8]
8004826: 60bb str r3, [r7, #8]
8004828: 68bb ldr r3, [r7, #8]
}
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
800482a: 687b ldr r3, [r7, #4]
800482c: 6d5b ldr r3, [r3, #84] ; 0x54
800482e: 2b00 cmp r3, #0
8004830: d050 beq.n 80048d4 <HAL_SPI_IRQHandler+0x1f4>
{
/* Disable all interrupts */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
8004832: 687b ldr r3, [r7, #4]
8004834: 681b ldr r3, [r3, #0]
8004836: 685a ldr r2, [r3, #4]
8004838: 687b ldr r3, [r7, #4]
800483a: 681b ldr r3, [r3, #0]
800483c: f022 02e0 bic.w r2, r2, #224 ; 0xe0
8004840: 605a str r2, [r3, #4]
hspi->State = HAL_SPI_STATE_READY;
8004842: 687b ldr r3, [r7, #4]
8004844: 2201 movs r2, #1
8004846: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the SPI DMA requests if enabled */
if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
800484a: 69fb ldr r3, [r7, #28]
800484c: f003 0302 and.w r3, r3, #2
8004850: 2b00 cmp r3, #0
8004852: d104 bne.n 800485e <HAL_SPI_IRQHandler+0x17e>
8004854: 69fb ldr r3, [r7, #28]
8004856: f003 0301 and.w r3, r3, #1
800485a: 2b00 cmp r3, #0
800485c: d034 beq.n 80048c8 <HAL_SPI_IRQHandler+0x1e8>
{
CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
800485e: 687b ldr r3, [r7, #4]
8004860: 681b ldr r3, [r3, #0]
8004862: 685a ldr r2, [r3, #4]
8004864: 687b ldr r3, [r7, #4]
8004866: 681b ldr r3, [r3, #0]
8004868: f022 0203 bic.w r2, r2, #3
800486c: 605a str r2, [r3, #4]
/* Abort the SPI DMA Rx channel */
if (hspi->hdmarx != NULL)
800486e: 687b ldr r3, [r7, #4]
8004870: 6cdb ldr r3, [r3, #76] ; 0x4c
8004872: 2b00 cmp r3, #0
8004874: d011 beq.n 800489a <HAL_SPI_IRQHandler+0x1ba>
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
8004876: 687b ldr r3, [r7, #4]
8004878: 6cdb ldr r3, [r3, #76] ; 0x4c
800487a: 4a18 ldr r2, [pc, #96] ; (80048dc <HAL_SPI_IRQHandler+0x1fc>)
800487c: 651a str r2, [r3, #80] ; 0x50
if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx))
800487e: 687b ldr r3, [r7, #4]
8004880: 6cdb ldr r3, [r3, #76] ; 0x4c
8004882: 4618 mov r0, r3
8004884: f7ff f80d bl 80038a2 <HAL_DMA_Abort_IT>
8004888: 4603 mov r3, r0
800488a: 2b00 cmp r3, #0
800488c: d005 beq.n 800489a <HAL_SPI_IRQHandler+0x1ba>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
800488e: 687b ldr r3, [r7, #4]
8004890: 6d5b ldr r3, [r3, #84] ; 0x54
8004892: f043 0240 orr.w r2, r3, #64 ; 0x40
8004896: 687b ldr r3, [r7, #4]
8004898: 655a str r2, [r3, #84] ; 0x54
}
}
/* Abort the SPI DMA Tx channel */
if (hspi->hdmatx != NULL)
800489a: 687b ldr r3, [r7, #4]
800489c: 6c9b ldr r3, [r3, #72] ; 0x48
800489e: 2b00 cmp r3, #0
80048a0: d016 beq.n 80048d0 <HAL_SPI_IRQHandler+0x1f0>
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
80048a2: 687b ldr r3, [r7, #4]
80048a4: 6c9b ldr r3, [r3, #72] ; 0x48
80048a6: 4a0d ldr r2, [pc, #52] ; (80048dc <HAL_SPI_IRQHandler+0x1fc>)
80048a8: 651a str r2, [r3, #80] ; 0x50
if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx))
80048aa: 687b ldr r3, [r7, #4]
80048ac: 6c9b ldr r3, [r3, #72] ; 0x48
80048ae: 4618 mov r0, r3
80048b0: f7fe fff7 bl 80038a2 <HAL_DMA_Abort_IT>
80048b4: 4603 mov r3, r0
80048b6: 2b00 cmp r3, #0
80048b8: d00a beq.n 80048d0 <HAL_SPI_IRQHandler+0x1f0>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
80048ba: 687b ldr r3, [r7, #4]
80048bc: 6d5b ldr r3, [r3, #84] ; 0x54
80048be: f043 0240 orr.w r2, r3, #64 ; 0x40
80048c2: 687b ldr r3, [r7, #4]
80048c4: 655a str r2, [r3, #84] ; 0x54
if (hspi->hdmatx != NULL)
80048c6: e003 b.n 80048d0 <HAL_SPI_IRQHandler+0x1f0>
{
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
80048c8: 6878 ldr r0, [r7, #4]
80048ca: f000 f813 bl 80048f4 <HAL_SPI_ErrorCallback>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
}
return;
80048ce: e000 b.n 80048d2 <HAL_SPI_IRQHandler+0x1f2>
if (hspi->hdmatx != NULL)
80048d0: bf00 nop
return;
80048d2: bf00 nop
80048d4: bf00 nop
}
}
80048d6: 3720 adds r7, #32
80048d8: 46bd mov sp, r7
80048da: bd80 pop {r7, pc}
80048dc: 08004909 .word 0x08004909
080048e0 <HAL_SPI_TxCpltCallback>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
{
80048e0: b480 push {r7}
80048e2: b083 sub sp, #12
80048e4: af00 add r7, sp, #0
80048e6: 6078 str r0, [r7, #4]
UNUSED(hspi);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SPI_TxCpltCallback should be implemented in the user file
*/
}
80048e8: bf00 nop
80048ea: 370c adds r7, #12
80048ec: 46bd mov sp, r7
80048ee: f85d 7b04 ldr.w r7, [sp], #4
80048f2: 4770 bx lr
080048f4 <HAL_SPI_ErrorCallback>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
{
80048f4: b480 push {r7}
80048f6: b083 sub sp, #12
80048f8: af00 add r7, sp, #0
80048fa: 6078 str r0, [r7, #4]
the HAL_SPI_ErrorCallback should be implemented in the user file
*/
/* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
and user can use HAL_SPI_GetError() API to check the latest error occurred
*/
}
80048fc: bf00 nop
80048fe: 370c adds r7, #12
8004900: 46bd mov sp, r7
8004902: f85d 7b04 ldr.w r7, [sp], #4
8004906: 4770 bx lr
08004908 <SPI_DMAAbortOnError>:
* (To be called at end of DMA Abort procedure following error occurrence).
* @param hdma DMA handle.
* @retval None
*/
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
8004908: b580 push {r7, lr}
800490a: b084 sub sp, #16
800490c: af00 add r7, sp, #0
800490e: 6078 str r0, [r7, #4]
SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
8004910: 687b ldr r3, [r7, #4]
8004912: 6b9b ldr r3, [r3, #56] ; 0x38
8004914: 60fb str r3, [r7, #12]
hspi->RxXferCount = 0U;
8004916: 68fb ldr r3, [r7, #12]
8004918: 2200 movs r2, #0
800491a: 87da strh r2, [r3, #62] ; 0x3e
hspi->TxXferCount = 0U;
800491c: 68fb ldr r3, [r7, #12]
800491e: 2200 movs r2, #0
8004920: 86da strh r2, [r3, #54] ; 0x36
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
8004922: 68f8 ldr r0, [r7, #12]
8004924: f7ff ffe6 bl 80048f4 <HAL_SPI_ErrorCallback>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
8004928: bf00 nop
800492a: 3710 adds r7, #16
800492c: 46bd mov sp, r7
800492e: bd80 pop {r7, pc}
08004930 <SPI_TxISR_8BIT>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
8004930: b580 push {r7, lr}
8004932: b082 sub sp, #8
8004934: af00 add r7, sp, #0
8004936: 6078 str r0, [r7, #4]
*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
8004938: 687b ldr r3, [r7, #4]
800493a: 6b1a ldr r2, [r3, #48] ; 0x30
800493c: 687b ldr r3, [r7, #4]
800493e: 681b ldr r3, [r3, #0]
8004940: 330c adds r3, #12
8004942: 7812 ldrb r2, [r2, #0]
8004944: 701a strb r2, [r3, #0]
hspi->pTxBuffPtr++;
8004946: 687b ldr r3, [r7, #4]
8004948: 6b1b ldr r3, [r3, #48] ; 0x30
800494a: 1c5a adds r2, r3, #1
800494c: 687b ldr r3, [r7, #4]
800494e: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferCount--;
8004950: 687b ldr r3, [r7, #4]
8004952: 8edb ldrh r3, [r3, #54] ; 0x36
8004954: b29b uxth r3, r3
8004956: 3b01 subs r3, #1
8004958: b29a uxth r2, r3
800495a: 687b ldr r3, [r7, #4]
800495c: 86da strh r2, [r3, #54] ; 0x36
if (hspi->TxXferCount == 0U)
800495e: 687b ldr r3, [r7, #4]
8004960: 8edb ldrh r3, [r3, #54] ; 0x36
8004962: b29b uxth r3, r3
8004964: 2b00 cmp r3, #0
8004966: d102 bne.n 800496e <SPI_TxISR_8BIT+0x3e>
{
/* Enable CRC Transmission */
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
}
#endif /* USE_SPI_CRC */
SPI_CloseTx_ISR(hspi);
8004968: 6878 ldr r0, [r7, #4]
800496a: f000 f8d3 bl 8004b14 <SPI_CloseTx_ISR>
}
}
800496e: bf00 nop
8004970: 3708 adds r7, #8
8004972: 46bd mov sp, r7
8004974: bd80 pop {r7, pc}
08004976 <SPI_TxISR_16BIT>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
8004976: b580 push {r7, lr}
8004978: b082 sub sp, #8
800497a: af00 add r7, sp, #0
800497c: 6078 str r0, [r7, #4]
/* Transmit data in 16 Bit mode */
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
800497e: 687b ldr r3, [r7, #4]
8004980: 6b1b ldr r3, [r3, #48] ; 0x30
8004982: 881a ldrh r2, [r3, #0]
8004984: 687b ldr r3, [r7, #4]
8004986: 681b ldr r3, [r3, #0]
8004988: 60da str r2, [r3, #12]
hspi->pTxBuffPtr += sizeof(uint16_t);
800498a: 687b ldr r3, [r7, #4]
800498c: 6b1b ldr r3, [r3, #48] ; 0x30
800498e: 1c9a adds r2, r3, #2
8004990: 687b ldr r3, [r7, #4]
8004992: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferCount--;
8004994: 687b ldr r3, [r7, #4]
8004996: 8edb ldrh r3, [r3, #54] ; 0x36
8004998: b29b uxth r3, r3
800499a: 3b01 subs r3, #1
800499c: b29a uxth r2, r3
800499e: 687b ldr r3, [r7, #4]
80049a0: 86da strh r2, [r3, #54] ; 0x36
if (hspi->TxXferCount == 0U)
80049a2: 687b ldr r3, [r7, #4]
80049a4: 8edb ldrh r3, [r3, #54] ; 0x36
80049a6: b29b uxth r3, r3
80049a8: 2b00 cmp r3, #0
80049aa: d102 bne.n 80049b2 <SPI_TxISR_16BIT+0x3c>
{
/* Enable CRC Transmission */
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
}
#endif /* USE_SPI_CRC */
SPI_CloseTx_ISR(hspi);
80049ac: 6878 ldr r0, [r7, #4]
80049ae: f000 f8b1 bl 8004b14 <SPI_CloseTx_ISR>
}
}
80049b2: bf00 nop
80049b4: 3708 adds r7, #8
80049b6: 46bd mov sp, r7
80049b8: bd80 pop {r7, pc}
080049ba <SPI_WaitFlagStateUntilTimeout>:
* @param Tickstart tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
uint32_t Timeout, uint32_t Tickstart)
{
80049ba: b580 push {r7, lr}
80049bc: b084 sub sp, #16
80049be: af00 add r7, sp, #0
80049c0: 60f8 str r0, [r7, #12]
80049c2: 60b9 str r1, [r7, #8]
80049c4: 603b str r3, [r7, #0]
80049c6: 4613 mov r3, r2
80049c8: 71fb strb r3, [r7, #7]
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
80049ca: e04c b.n 8004a66 <SPI_WaitFlagStateUntilTimeout+0xac>
{
if (Timeout != HAL_MAX_DELAY)
80049cc: 683b ldr r3, [r7, #0]
80049ce: f1b3 3fff cmp.w r3, #4294967295
80049d2: d048 beq.n 8004a66 <SPI_WaitFlagStateUntilTimeout+0xac>
{
if (((HAL_GetTick() - Tickstart) >= Timeout) || (Timeout == 0U))
80049d4: f7fe fa5c bl 8002e90 <HAL_GetTick>
80049d8: 4602 mov r2, r0
80049da: 69bb ldr r3, [r7, #24]
80049dc: 1ad3 subs r3, r2, r3
80049de: 683a ldr r2, [r7, #0]
80049e0: 429a cmp r2, r3
80049e2: d902 bls.n 80049ea <SPI_WaitFlagStateUntilTimeout+0x30>
80049e4: 683b ldr r3, [r7, #0]
80049e6: 2b00 cmp r3, #0
80049e8: d13d bne.n 8004a66 <SPI_WaitFlagStateUntilTimeout+0xac>
/* Disable the SPI and reset the CRC: the CRC value should be cleared
on both master and slave sides in order to resynchronize the master
and slave for their respective CRC calculation */
/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
80049ea: 68fb ldr r3, [r7, #12]
80049ec: 681b ldr r3, [r3, #0]
80049ee: 685a ldr r2, [r3, #4]
80049f0: 68fb ldr r3, [r7, #12]
80049f2: 681b ldr r3, [r3, #0]
80049f4: f022 02e0 bic.w r2, r2, #224 ; 0xe0
80049f8: 605a str r2, [r3, #4]
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
80049fa: 68fb ldr r3, [r7, #12]
80049fc: 685b ldr r3, [r3, #4]
80049fe: f5b3 7f82 cmp.w r3, #260 ; 0x104
8004a02: d111 bne.n 8004a28 <SPI_WaitFlagStateUntilTimeout+0x6e>
8004a04: 68fb ldr r3, [r7, #12]
8004a06: 689b ldr r3, [r3, #8]
8004a08: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8004a0c: d004 beq.n 8004a18 <SPI_WaitFlagStateUntilTimeout+0x5e>
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
8004a0e: 68fb ldr r3, [r7, #12]
8004a10: 689b ldr r3, [r3, #8]
8004a12: f5b3 6f80 cmp.w r3, #1024 ; 0x400
8004a16: d107 bne.n 8004a28 <SPI_WaitFlagStateUntilTimeout+0x6e>
{
/* Disable SPI peripheral */
__HAL_SPI_DISABLE(hspi);
8004a18: 68fb ldr r3, [r7, #12]
8004a1a: 681b ldr r3, [r3, #0]
8004a1c: 681a ldr r2, [r3, #0]
8004a1e: 68fb ldr r3, [r7, #12]
8004a20: 681b ldr r3, [r3, #0]
8004a22: f022 0240 bic.w r2, r2, #64 ; 0x40
8004a26: 601a str r2, [r3, #0]
}
/* Reset CRC Calculation */
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
8004a28: 68fb ldr r3, [r7, #12]
8004a2a: 6a9b ldr r3, [r3, #40] ; 0x28
8004a2c: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
8004a30: d10f bne.n 8004a52 <SPI_WaitFlagStateUntilTimeout+0x98>
{
SPI_RESET_CRC(hspi);
8004a32: 68fb ldr r3, [r7, #12]
8004a34: 681b ldr r3, [r3, #0]
8004a36: 681a ldr r2, [r3, #0]
8004a38: 68fb ldr r3, [r7, #12]
8004a3a: 681b ldr r3, [r3, #0]
8004a3c: f422 5200 bic.w r2, r2, #8192 ; 0x2000
8004a40: 601a str r2, [r3, #0]
8004a42: 68fb ldr r3, [r7, #12]
8004a44: 681b ldr r3, [r3, #0]
8004a46: 681a ldr r2, [r3, #0]
8004a48: 68fb ldr r3, [r7, #12]
8004a4a: 681b ldr r3, [r3, #0]
8004a4c: f442 5200 orr.w r2, r2, #8192 ; 0x2000
8004a50: 601a str r2, [r3, #0]
}
hspi->State = HAL_SPI_STATE_READY;
8004a52: 68fb ldr r3, [r7, #12]
8004a54: 2201 movs r2, #1
8004a56: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Process Unlocked */
__HAL_UNLOCK(hspi);
8004a5a: 68fb ldr r3, [r7, #12]
8004a5c: 2200 movs r2, #0
8004a5e: f883 2050 strb.w r2, [r3, #80] ; 0x50
return HAL_TIMEOUT;
8004a62: 2303 movs r3, #3
8004a64: e00f b.n 8004a86 <SPI_WaitFlagStateUntilTimeout+0xcc>
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
8004a66: 68fb ldr r3, [r7, #12]
8004a68: 681b ldr r3, [r3, #0]
8004a6a: 689a ldr r2, [r3, #8]
8004a6c: 68bb ldr r3, [r7, #8]
8004a6e: 4013 ands r3, r2
8004a70: 68ba ldr r2, [r7, #8]
8004a72: 429a cmp r2, r3
8004a74: bf0c ite eq
8004a76: 2301 moveq r3, #1
8004a78: 2300 movne r3, #0
8004a7a: b2db uxtb r3, r3
8004a7c: 461a mov r2, r3
8004a7e: 79fb ldrb r3, [r7, #7]
8004a80: 429a cmp r2, r3
8004a82: d1a3 bne.n 80049cc <SPI_WaitFlagStateUntilTimeout+0x12>
}
}
}
return HAL_OK;
8004a84: 2300 movs r3, #0
}
8004a86: 4618 mov r0, r3
8004a88: 3710 adds r7, #16
8004a8a: 46bd mov sp, r7
8004a8c: bd80 pop {r7, pc}
...
08004a90 <SPI_EndRxTxTransaction>:
* @param Timeout Timeout duration
* @param Tickstart tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
{
8004a90: b580 push {r7, lr}
8004a92: b088 sub sp, #32
8004a94: af02 add r7, sp, #8
8004a96: 60f8 str r0, [r7, #12]
8004a98: 60b9 str r1, [r7, #8]
8004a9a: 607a str r2, [r7, #4]
/* Timeout in µs */
__IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
8004a9c: 4b1b ldr r3, [pc, #108] ; (8004b0c <SPI_EndRxTxTransaction+0x7c>)
8004a9e: 681b ldr r3, [r3, #0]
8004aa0: 4a1b ldr r2, [pc, #108] ; (8004b10 <SPI_EndRxTxTransaction+0x80>)
8004aa2: fba2 2303 umull r2, r3, r2, r3
8004aa6: 0d5b lsrs r3, r3, #21
8004aa8: f44f 727a mov.w r2, #1000 ; 0x3e8
8004aac: fb02 f303 mul.w r3, r2, r3
8004ab0: 617b str r3, [r7, #20]
/* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
if (hspi->Init.Mode == SPI_MODE_MASTER)
8004ab2: 68fb ldr r3, [r7, #12]
8004ab4: 685b ldr r3, [r3, #4]
8004ab6: f5b3 7f82 cmp.w r3, #260 ; 0x104
8004aba: d112 bne.n 8004ae2 <SPI_EndRxTxTransaction+0x52>
{
/* Control the BSY flag */
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
8004abc: 687b ldr r3, [r7, #4]
8004abe: 9300 str r3, [sp, #0]
8004ac0: 68bb ldr r3, [r7, #8]
8004ac2: 2200 movs r2, #0
8004ac4: 2180 movs r1, #128 ; 0x80
8004ac6: 68f8 ldr r0, [r7, #12]
8004ac8: f7ff ff77 bl 80049ba <SPI_WaitFlagStateUntilTimeout>
8004acc: 4603 mov r3, r0
8004ace: 2b00 cmp r3, #0
8004ad0: d016 beq.n 8004b00 <SPI_EndRxTxTransaction+0x70>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8004ad2: 68fb ldr r3, [r7, #12]
8004ad4: 6d5b ldr r3, [r3, #84] ; 0x54
8004ad6: f043 0220 orr.w r2, r3, #32
8004ada: 68fb ldr r3, [r7, #12]
8004adc: 655a str r2, [r3, #84] ; 0x54
return HAL_TIMEOUT;
8004ade: 2303 movs r3, #3
8004ae0: e00f b.n 8004b02 <SPI_EndRxTxTransaction+0x72>
* User have to calculate the timeout value to fit with the time of 1 byte transfer.
* This time is directly link with the SPI clock from Master device.
*/
do
{
if (count == 0U)
8004ae2: 697b ldr r3, [r7, #20]
8004ae4: 2b00 cmp r3, #0
8004ae6: d00a beq.n 8004afe <SPI_EndRxTxTransaction+0x6e>
{
break;
}
count--;
8004ae8: 697b ldr r3, [r7, #20]
8004aea: 3b01 subs r3, #1
8004aec: 617b str r3, [r7, #20]
} while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
8004aee: 68fb ldr r3, [r7, #12]
8004af0: 681b ldr r3, [r3, #0]
8004af2: 689b ldr r3, [r3, #8]
8004af4: f003 0380 and.w r3, r3, #128 ; 0x80
8004af8: 2b80 cmp r3, #128 ; 0x80
8004afa: d0f2 beq.n 8004ae2 <SPI_EndRxTxTransaction+0x52>
8004afc: e000 b.n 8004b00 <SPI_EndRxTxTransaction+0x70>
break;
8004afe: bf00 nop
}
return HAL_OK;
8004b00: 2300 movs r3, #0
}
8004b02: 4618 mov r0, r3
8004b04: 3718 adds r7, #24
8004b06: 46bd mov sp, r7
8004b08: bd80 pop {r7, pc}
8004b0a: bf00 nop
8004b0c: 20000004 .word 0x20000004
8004b10: 165e9f81 .word 0x165e9f81
08004b14 <SPI_CloseTx_ISR>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
{
8004b14: b580 push {r7, lr}
8004b16: b086 sub sp, #24
8004b18: af00 add r7, sp, #0
8004b1a: 6078 str r0, [r7, #4]
uint32_t tickstart;
__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
8004b1c: 4b2c ldr r3, [pc, #176] ; (8004bd0 <SPI_CloseTx_ISR+0xbc>)
8004b1e: 681b ldr r3, [r3, #0]
8004b20: 4a2c ldr r2, [pc, #176] ; (8004bd4 <SPI_CloseTx_ISR+0xc0>)
8004b22: fba2 2303 umull r2, r3, r2, r3
8004b26: 0a5b lsrs r3, r3, #9
8004b28: 2264 movs r2, #100 ; 0x64
8004b2a: fb02 f303 mul.w r3, r2, r3
8004b2e: 613b str r3, [r7, #16]
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
8004b30: f7fe f9ae bl 8002e90 <HAL_GetTick>
8004b34: 6178 str r0, [r7, #20]
/* Wait until TXE flag is set */
do
{
if (count == 0U)
8004b36: 693b ldr r3, [r7, #16]
8004b38: 2b00 cmp r3, #0
8004b3a: d106 bne.n 8004b4a <SPI_CloseTx_ISR+0x36>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8004b3c: 687b ldr r3, [r7, #4]
8004b3e: 6d5b ldr r3, [r3, #84] ; 0x54
8004b40: f043 0220 orr.w r2, r3, #32
8004b44: 687b ldr r3, [r7, #4]
8004b46: 655a str r2, [r3, #84] ; 0x54
break;
8004b48: e009 b.n 8004b5e <SPI_CloseTx_ISR+0x4a>
}
count--;
8004b4a: 693b ldr r3, [r7, #16]
8004b4c: 3b01 subs r3, #1
8004b4e: 613b str r3, [r7, #16]
} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
8004b50: 687b ldr r3, [r7, #4]
8004b52: 681b ldr r3, [r3, #0]
8004b54: 689b ldr r3, [r3, #8]
8004b56: f003 0302 and.w r3, r3, #2
8004b5a: 2b00 cmp r3, #0
8004b5c: d0eb beq.n 8004b36 <SPI_CloseTx_ISR+0x22>
/* Disable TXE and ERR interrupt */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
8004b5e: 687b ldr r3, [r7, #4]
8004b60: 681b ldr r3, [r3, #0]
8004b62: 685a ldr r2, [r3, #4]
8004b64: 687b ldr r3, [r7, #4]
8004b66: 681b ldr r3, [r3, #0]
8004b68: f022 02a0 bic.w r2, r2, #160 ; 0xa0
8004b6c: 605a str r2, [r3, #4]
/* Check the end of the transaction */
if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
8004b6e: 697a ldr r2, [r7, #20]
8004b70: 2164 movs r1, #100 ; 0x64
8004b72: 6878 ldr r0, [r7, #4]
8004b74: f7ff ff8c bl 8004a90 <SPI_EndRxTxTransaction>
8004b78: 4603 mov r3, r0
8004b7a: 2b00 cmp r3, #0
8004b7c: d005 beq.n 8004b8a <SPI_CloseTx_ISR+0x76>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8004b7e: 687b ldr r3, [r7, #4]
8004b80: 6d5b ldr r3, [r3, #84] ; 0x54
8004b82: f043 0220 orr.w r2, r3, #32
8004b86: 687b ldr r3, [r7, #4]
8004b88: 655a str r2, [r3, #84] ; 0x54
}
/* Clear overrun flag in 2 Lines communication mode because received is not read */
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
8004b8a: 687b ldr r3, [r7, #4]
8004b8c: 689b ldr r3, [r3, #8]
8004b8e: 2b00 cmp r3, #0
8004b90: d10a bne.n 8004ba8 <SPI_CloseTx_ISR+0x94>
{
__HAL_SPI_CLEAR_OVRFLAG(hspi);
8004b92: 2300 movs r3, #0
8004b94: 60fb str r3, [r7, #12]
8004b96: 687b ldr r3, [r7, #4]
8004b98: 681b ldr r3, [r3, #0]
8004b9a: 68db ldr r3, [r3, #12]
8004b9c: 60fb str r3, [r7, #12]
8004b9e: 687b ldr r3, [r7, #4]
8004ba0: 681b ldr r3, [r3, #0]
8004ba2: 689b ldr r3, [r3, #8]
8004ba4: 60fb str r3, [r7, #12]
8004ba6: 68fb ldr r3, [r7, #12]
}
hspi->State = HAL_SPI_STATE_READY;
8004ba8: 687b ldr r3, [r7, #4]
8004baa: 2201 movs r2, #1
8004bac: f883 2051 strb.w r2, [r3, #81] ; 0x51
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
8004bb0: 687b ldr r3, [r7, #4]
8004bb2: 6d5b ldr r3, [r3, #84] ; 0x54
8004bb4: 2b00 cmp r3, #0
8004bb6: d003 beq.n 8004bc0 <SPI_CloseTx_ISR+0xac>
{
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
8004bb8: 6878 ldr r0, [r7, #4]
8004bba: f7ff fe9b bl 80048f4 <HAL_SPI_ErrorCallback>
hspi->TxCpltCallback(hspi);
#else
HAL_SPI_TxCpltCallback(hspi);
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
}
8004bbe: e002 b.n 8004bc6 <SPI_CloseTx_ISR+0xb2>
HAL_SPI_TxCpltCallback(hspi);
8004bc0: 6878 ldr r0, [r7, #4]
8004bc2: f7ff fe8d bl 80048e0 <HAL_SPI_TxCpltCallback>
}
8004bc6: bf00 nop
8004bc8: 3718 adds r7, #24
8004bca: 46bd mov sp, r7
8004bcc: bd80 pop {r7, pc}
8004bce: bf00 nop
8004bd0: 20000004 .word 0x20000004
8004bd4: 057619f1 .word 0x057619f1
08004bd8 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8004bd8: b580 push {r7, lr}
8004bda: b082 sub sp, #8
8004bdc: af00 add r7, sp, #0
8004bde: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8004be0: 687b ldr r3, [r7, #4]
8004be2: 2b00 cmp r3, #0
8004be4: d101 bne.n 8004bea <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8004be6: 2301 movs r3, #1
8004be8: e01d b.n 8004c26 <HAL_TIM_Base_Init+0x4e>
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8004bea: 687b ldr r3, [r7, #4]
8004bec: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8004bf0: b2db uxtb r3, r3
8004bf2: 2b00 cmp r3, #0
8004bf4: d106 bne.n 8004c04 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8004bf6: 687b ldr r3, [r7, #4]
8004bf8: 2200 movs r2, #0
8004bfa: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8004bfe: 6878 ldr r0, [r7, #4]
8004c00: f7fd ffcc bl 8002b9c <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8004c04: 687b ldr r3, [r7, #4]
8004c06: 2202 movs r2, #2
8004c08: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8004c0c: 687b ldr r3, [r7, #4]
8004c0e: 681a ldr r2, [r3, #0]
8004c10: 687b ldr r3, [r7, #4]
8004c12: 3304 adds r3, #4
8004c14: 4619 mov r1, r3
8004c16: 4610 mov r0, r2
8004c18: f000 f9ae bl 8004f78 <TIM_Base_SetConfig>
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8004c1c: 687b ldr r3, [r7, #4]
8004c1e: 2201 movs r2, #1
8004c20: f883 203d strb.w r2, [r3, #61] ; 0x3d
return HAL_OK;
8004c24: 2300 movs r3, #0
}
8004c26: 4618 mov r0, r3
8004c28: 3708 adds r7, #8
8004c2a: 46bd mov sp, r7
8004c2c: bd80 pop {r7, pc}
08004c2e <HAL_TIM_Base_Start_IT>:
* @brief Starts the TIM Base generation in interrupt mode.
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
8004c2e: b480 push {r7}
8004c30: b085 sub sp, #20
8004c32: af00 add r7, sp, #0
8004c34: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_INSTANCE(htim->Instance));
/* Enable the TIM Update interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
8004c36: 687b ldr r3, [r7, #4]
8004c38: 681b ldr r3, [r3, #0]
8004c3a: 68da ldr r2, [r3, #12]
8004c3c: 687b ldr r3, [r7, #4]
8004c3e: 681b ldr r3, [r3, #0]
8004c40: f042 0201 orr.w r2, r2, #1
8004c44: 60da str r2, [r3, #12]
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8004c46: 687b ldr r3, [r7, #4]
8004c48: 681b ldr r3, [r3, #0]
8004c4a: 689b ldr r3, [r3, #8]
8004c4c: f003 0307 and.w r3, r3, #7
8004c50: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8004c52: 68fb ldr r3, [r7, #12]
8004c54: 2b06 cmp r3, #6
8004c56: d007 beq.n 8004c68 <HAL_TIM_Base_Start_IT+0x3a>
{
__HAL_TIM_ENABLE(htim);
8004c58: 687b ldr r3, [r7, #4]
8004c5a: 681b ldr r3, [r3, #0]
8004c5c: 681a ldr r2, [r3, #0]
8004c5e: 687b ldr r3, [r7, #4]
8004c60: 681b ldr r3, [r3, #0]
8004c62: f042 0201 orr.w r2, r2, #1
8004c66: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8004c68: 2300 movs r3, #0
}
8004c6a: 4618 mov r0, r3
8004c6c: 3714 adds r7, #20
8004c6e: 46bd mov sp, r7
8004c70: f85d 7b04 ldr.w r7, [sp], #4
8004c74: 4770 bx lr
08004c76 <HAL_TIM_OnePulse_Init>:
* @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
* @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
{
8004c76: b580 push {r7, lr}
8004c78: b082 sub sp, #8
8004c7a: af00 add r7, sp, #0
8004c7c: 6078 str r0, [r7, #4]
8004c7e: 6039 str r1, [r7, #0]
/* Check the TIM handle allocation */
if (htim == NULL)
8004c80: 687b ldr r3, [r7, #4]
8004c82: 2b00 cmp r3, #0
8004c84: d101 bne.n 8004c8a <HAL_TIM_OnePulse_Init+0x14>
{
return HAL_ERROR;
8004c86: 2301 movs r3, #1
8004c88: e02d b.n 8004ce6 <HAL_TIM_OnePulse_Init+0x70>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_OPM_MODE(OnePulseMode));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8004c8a: 687b ldr r3, [r7, #4]
8004c8c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8004c90: b2db uxtb r3, r3
8004c92: 2b00 cmp r3, #0
8004c94: d106 bne.n 8004ca4 <HAL_TIM_OnePulse_Init+0x2e>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8004c96: 687b ldr r3, [r7, #4]
8004c98: 2200 movs r2, #0
8004c9a: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->OnePulse_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_OnePulse_MspInit(htim);
8004c9e: 6878 ldr r0, [r7, #4]
8004ca0: f000 f825 bl 8004cee <HAL_TIM_OnePulse_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8004ca4: 687b ldr r3, [r7, #4]
8004ca6: 2202 movs r2, #2
8004ca8: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Configure the Time base in the One Pulse Mode */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8004cac: 687b ldr r3, [r7, #4]
8004cae: 681a ldr r2, [r3, #0]
8004cb0: 687b ldr r3, [r7, #4]
8004cb2: 3304 adds r3, #4
8004cb4: 4619 mov r1, r3
8004cb6: 4610 mov r0, r2
8004cb8: f000 f95e bl 8004f78 <TIM_Base_SetConfig>
/* Reset the OPM Bit */
htim->Instance->CR1 &= ~TIM_CR1_OPM;
8004cbc: 687b ldr r3, [r7, #4]
8004cbe: 681b ldr r3, [r3, #0]
8004cc0: 681a ldr r2, [r3, #0]
8004cc2: 687b ldr r3, [r7, #4]
8004cc4: 681b ldr r3, [r3, #0]
8004cc6: f022 0208 bic.w r2, r2, #8
8004cca: 601a str r2, [r3, #0]
/* Configure the OPM Mode */
htim->Instance->CR1 |= OnePulseMode;
8004ccc: 687b ldr r3, [r7, #4]
8004cce: 681b ldr r3, [r3, #0]
8004cd0: 6819 ldr r1, [r3, #0]
8004cd2: 687b ldr r3, [r7, #4]
8004cd4: 681b ldr r3, [r3, #0]
8004cd6: 683a ldr r2, [r7, #0]
8004cd8: 430a orrs r2, r1
8004cda: 601a str r2, [r3, #0]
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8004cdc: 687b ldr r3, [r7, #4]
8004cde: 2201 movs r2, #1
8004ce0: f883 203d strb.w r2, [r3, #61] ; 0x3d
return HAL_OK;
8004ce4: 2300 movs r3, #0
}
8004ce6: 4618 mov r0, r3
8004ce8: 3708 adds r7, #8
8004cea: 46bd mov sp, r7
8004cec: bd80 pop {r7, pc}
08004cee <HAL_TIM_OnePulse_MspInit>:
* @brief Initializes the TIM One Pulse MSP.
* @param htim TIM One Pulse handle
* @retval None
*/
__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
{
8004cee: b480 push {r7}
8004cf0: b083 sub sp, #12
8004cf2: af00 add r7, sp, #0
8004cf4: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OnePulse_MspInit could be implemented in the user file
*/
}
8004cf6: bf00 nop
8004cf8: 370c adds r7, #12
8004cfa: 46bd mov sp, r7
8004cfc: f85d 7b04 ldr.w r7, [sp], #4
8004d00: 4770 bx lr
08004d02 <HAL_TIM_IRQHandler>:
* @brief This function handles TIM interrupts requests.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
8004d02: b580 push {r7, lr}
8004d04: b082 sub sp, #8
8004d06: af00 add r7, sp, #0
8004d08: 6078 str r0, [r7, #4]
/* Capture compare 1 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
8004d0a: 687b ldr r3, [r7, #4]
8004d0c: 681b ldr r3, [r3, #0]
8004d0e: 691b ldr r3, [r3, #16]
8004d10: f003 0302 and.w r3, r3, #2
8004d14: 2b02 cmp r3, #2
8004d16: d122 bne.n 8004d5e <HAL_TIM_IRQHandler+0x5c>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
8004d18: 687b ldr r3, [r7, #4]
8004d1a: 681b ldr r3, [r3, #0]
8004d1c: 68db ldr r3, [r3, #12]
8004d1e: f003 0302 and.w r3, r3, #2
8004d22: 2b02 cmp r3, #2
8004d24: d11b bne.n 8004d5e <HAL_TIM_IRQHandler+0x5c>
{
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
8004d26: 687b ldr r3, [r7, #4]
8004d28: 681b ldr r3, [r3, #0]
8004d2a: f06f 0202 mvn.w r2, #2
8004d2e: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
8004d30: 687b ldr r3, [r7, #4]
8004d32: 2201 movs r2, #1
8004d34: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
8004d36: 687b ldr r3, [r7, #4]
8004d38: 681b ldr r3, [r3, #0]
8004d3a: 699b ldr r3, [r3, #24]
8004d3c: f003 0303 and.w r3, r3, #3
8004d40: 2b00 cmp r3, #0
8004d42: d003 beq.n 8004d4c <HAL_TIM_IRQHandler+0x4a>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8004d44: 6878 ldr r0, [r7, #4]
8004d46: f000 f8f8 bl 8004f3a <HAL_TIM_IC_CaptureCallback>
8004d4a: e005 b.n 8004d58 <HAL_TIM_IRQHandler+0x56>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8004d4c: 6878 ldr r0, [r7, #4]
8004d4e: f000 f8ea bl 8004f26 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8004d52: 6878 ldr r0, [r7, #4]
8004d54: f000 f8fb bl 8004f4e <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8004d58: 687b ldr r3, [r7, #4]
8004d5a: 2200 movs r2, #0
8004d5c: 771a strb r2, [r3, #28]
}
}
}
/* Capture compare 2 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
8004d5e: 687b ldr r3, [r7, #4]
8004d60: 681b ldr r3, [r3, #0]
8004d62: 691b ldr r3, [r3, #16]
8004d64: f003 0304 and.w r3, r3, #4
8004d68: 2b04 cmp r3, #4
8004d6a: d122 bne.n 8004db2 <HAL_TIM_IRQHandler+0xb0>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
8004d6c: 687b ldr r3, [r7, #4]
8004d6e: 681b ldr r3, [r3, #0]
8004d70: 68db ldr r3, [r3, #12]
8004d72: f003 0304 and.w r3, r3, #4
8004d76: 2b04 cmp r3, #4
8004d78: d11b bne.n 8004db2 <HAL_TIM_IRQHandler+0xb0>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
8004d7a: 687b ldr r3, [r7, #4]
8004d7c: 681b ldr r3, [r3, #0]
8004d7e: f06f 0204 mvn.w r2, #4
8004d82: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
8004d84: 687b ldr r3, [r7, #4]
8004d86: 2202 movs r2, #2
8004d88: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
8004d8a: 687b ldr r3, [r7, #4]
8004d8c: 681b ldr r3, [r3, #0]
8004d8e: 699b ldr r3, [r3, #24]
8004d90: f403 7340 and.w r3, r3, #768 ; 0x300
8004d94: 2b00 cmp r3, #0
8004d96: d003 beq.n 8004da0 <HAL_TIM_IRQHandler+0x9e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8004d98: 6878 ldr r0, [r7, #4]
8004d9a: f000 f8ce bl 8004f3a <HAL_TIM_IC_CaptureCallback>
8004d9e: e005 b.n 8004dac <HAL_TIM_IRQHandler+0xaa>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8004da0: 6878 ldr r0, [r7, #4]
8004da2: f000 f8c0 bl 8004f26 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8004da6: 6878 ldr r0, [r7, #4]
8004da8: f000 f8d1 bl 8004f4e <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8004dac: 687b ldr r3, [r7, #4]
8004dae: 2200 movs r2, #0
8004db0: 771a strb r2, [r3, #28]
}
}
/* Capture compare 3 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
8004db2: 687b ldr r3, [r7, #4]
8004db4: 681b ldr r3, [r3, #0]
8004db6: 691b ldr r3, [r3, #16]
8004db8: f003 0308 and.w r3, r3, #8
8004dbc: 2b08 cmp r3, #8
8004dbe: d122 bne.n 8004e06 <HAL_TIM_IRQHandler+0x104>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
8004dc0: 687b ldr r3, [r7, #4]
8004dc2: 681b ldr r3, [r3, #0]
8004dc4: 68db ldr r3, [r3, #12]
8004dc6: f003 0308 and.w r3, r3, #8
8004dca: 2b08 cmp r3, #8
8004dcc: d11b bne.n 8004e06 <HAL_TIM_IRQHandler+0x104>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
8004dce: 687b ldr r3, [r7, #4]
8004dd0: 681b ldr r3, [r3, #0]
8004dd2: f06f 0208 mvn.w r2, #8
8004dd6: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
8004dd8: 687b ldr r3, [r7, #4]
8004dda: 2204 movs r2, #4
8004ddc: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
8004dde: 687b ldr r3, [r7, #4]
8004de0: 681b ldr r3, [r3, #0]
8004de2: 69db ldr r3, [r3, #28]
8004de4: f003 0303 and.w r3, r3, #3
8004de8: 2b00 cmp r3, #0
8004dea: d003 beq.n 8004df4 <HAL_TIM_IRQHandler+0xf2>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8004dec: 6878 ldr r0, [r7, #4]
8004dee: f000 f8a4 bl 8004f3a <HAL_TIM_IC_CaptureCallback>
8004df2: e005 b.n 8004e00 <HAL_TIM_IRQHandler+0xfe>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8004df4: 6878 ldr r0, [r7, #4]
8004df6: f000 f896 bl 8004f26 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8004dfa: 6878 ldr r0, [r7, #4]
8004dfc: f000 f8a7 bl 8004f4e <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8004e00: 687b ldr r3, [r7, #4]
8004e02: 2200 movs r2, #0
8004e04: 771a strb r2, [r3, #28]
}
}
/* Capture compare 4 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
8004e06: 687b ldr r3, [r7, #4]
8004e08: 681b ldr r3, [r3, #0]
8004e0a: 691b ldr r3, [r3, #16]
8004e0c: f003 0310 and.w r3, r3, #16
8004e10: 2b10 cmp r3, #16
8004e12: d122 bne.n 8004e5a <HAL_TIM_IRQHandler+0x158>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
8004e14: 687b ldr r3, [r7, #4]
8004e16: 681b ldr r3, [r3, #0]
8004e18: 68db ldr r3, [r3, #12]
8004e1a: f003 0310 and.w r3, r3, #16
8004e1e: 2b10 cmp r3, #16
8004e20: d11b bne.n 8004e5a <HAL_TIM_IRQHandler+0x158>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
8004e22: 687b ldr r3, [r7, #4]
8004e24: 681b ldr r3, [r3, #0]
8004e26: f06f 0210 mvn.w r2, #16
8004e2a: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
8004e2c: 687b ldr r3, [r7, #4]
8004e2e: 2208 movs r2, #8
8004e30: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
8004e32: 687b ldr r3, [r7, #4]
8004e34: 681b ldr r3, [r3, #0]
8004e36: 69db ldr r3, [r3, #28]
8004e38: f403 7340 and.w r3, r3, #768 ; 0x300
8004e3c: 2b00 cmp r3, #0
8004e3e: d003 beq.n 8004e48 <HAL_TIM_IRQHandler+0x146>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8004e40: 6878 ldr r0, [r7, #4]
8004e42: f000 f87a bl 8004f3a <HAL_TIM_IC_CaptureCallback>
8004e46: e005 b.n 8004e54 <HAL_TIM_IRQHandler+0x152>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8004e48: 6878 ldr r0, [r7, #4]
8004e4a: f000 f86c bl 8004f26 <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8004e4e: 6878 ldr r0, [r7, #4]
8004e50: f000 f87d bl 8004f4e <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8004e54: 687b ldr r3, [r7, #4]
8004e56: 2200 movs r2, #0
8004e58: 771a strb r2, [r3, #28]
}
}
/* TIM Update event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
8004e5a: 687b ldr r3, [r7, #4]
8004e5c: 681b ldr r3, [r3, #0]
8004e5e: 691b ldr r3, [r3, #16]
8004e60: f003 0301 and.w r3, r3, #1
8004e64: 2b01 cmp r3, #1
8004e66: d10e bne.n 8004e86 <HAL_TIM_IRQHandler+0x184>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
8004e68: 687b ldr r3, [r7, #4]
8004e6a: 681b ldr r3, [r3, #0]
8004e6c: 68db ldr r3, [r3, #12]
8004e6e: f003 0301 and.w r3, r3, #1
8004e72: 2b01 cmp r3, #1
8004e74: d107 bne.n 8004e86 <HAL_TIM_IRQHandler+0x184>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
8004e76: 687b ldr r3, [r7, #4]
8004e78: 681b ldr r3, [r3, #0]
8004e7a: f06f 0201 mvn.w r2, #1
8004e7e: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
HAL_TIM_PeriodElapsedCallback(htim);
8004e80: 6878 ldr r0, [r7, #4]
8004e82: f000 f846 bl 8004f12 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Break input event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
8004e86: 687b ldr r3, [r7, #4]
8004e88: 681b ldr r3, [r3, #0]
8004e8a: 691b ldr r3, [r3, #16]
8004e8c: f003 0380 and.w r3, r3, #128 ; 0x80
8004e90: 2b80 cmp r3, #128 ; 0x80
8004e92: d10e bne.n 8004eb2 <HAL_TIM_IRQHandler+0x1b0>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
8004e94: 687b ldr r3, [r7, #4]
8004e96: 681b ldr r3, [r3, #0]
8004e98: 68db ldr r3, [r3, #12]
8004e9a: f003 0380 and.w r3, r3, #128 ; 0x80
8004e9e: 2b80 cmp r3, #128 ; 0x80
8004ea0: d107 bne.n 8004eb2 <HAL_TIM_IRQHandler+0x1b0>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
8004ea2: 687b ldr r3, [r7, #4]
8004ea4: 681b ldr r3, [r3, #0]
8004ea6: f06f 0280 mvn.w r2, #128 ; 0x80
8004eaa: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
HAL_TIMEx_BreakCallback(htim);
8004eac: 6878 ldr r0, [r7, #4]
8004eae: f000 f989 bl 80051c4 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Trigger detection event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
8004eb2: 687b ldr r3, [r7, #4]
8004eb4: 681b ldr r3, [r3, #0]
8004eb6: 691b ldr r3, [r3, #16]
8004eb8: f003 0340 and.w r3, r3, #64 ; 0x40
8004ebc: 2b40 cmp r3, #64 ; 0x40
8004ebe: d10e bne.n 8004ede <HAL_TIM_IRQHandler+0x1dc>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
8004ec0: 687b ldr r3, [r7, #4]
8004ec2: 681b ldr r3, [r3, #0]
8004ec4: 68db ldr r3, [r3, #12]
8004ec6: f003 0340 and.w r3, r3, #64 ; 0x40
8004eca: 2b40 cmp r3, #64 ; 0x40
8004ecc: d107 bne.n 8004ede <HAL_TIM_IRQHandler+0x1dc>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
8004ece: 687b ldr r3, [r7, #4]
8004ed0: 681b ldr r3, [r3, #0]
8004ed2: f06f 0240 mvn.w r2, #64 ; 0x40
8004ed6: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
HAL_TIM_TriggerCallback(htim);
8004ed8: 6878 ldr r0, [r7, #4]
8004eda: f000 f842 bl 8004f62 <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM commutation event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
8004ede: 687b ldr r3, [r7, #4]
8004ee0: 681b ldr r3, [r3, #0]
8004ee2: 691b ldr r3, [r3, #16]
8004ee4: f003 0320 and.w r3, r3, #32
8004ee8: 2b20 cmp r3, #32
8004eea: d10e bne.n 8004f0a <HAL_TIM_IRQHandler+0x208>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
8004eec: 687b ldr r3, [r7, #4]
8004eee: 681b ldr r3, [r3, #0]
8004ef0: 68db ldr r3, [r3, #12]
8004ef2: f003 0320 and.w r3, r3, #32
8004ef6: 2b20 cmp r3, #32
8004ef8: d107 bne.n 8004f0a <HAL_TIM_IRQHandler+0x208>
{
__HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
8004efa: 687b ldr r3, [r7, #4]
8004efc: 681b ldr r3, [r3, #0]
8004efe: f06f 0220 mvn.w r2, #32
8004f02: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
HAL_TIMEx_CommutCallback(htim);
8004f04: 6878 ldr r0, [r7, #4]
8004f06: f000 f953 bl 80051b0 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
}
8004f0a: bf00 nop
8004f0c: 3708 adds r7, #8
8004f0e: 46bd mov sp, r7
8004f10: bd80 pop {r7, pc}
08004f12 <HAL_TIM_PeriodElapsedCallback>:
* @brief Period elapsed callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
8004f12: b480 push {r7}
8004f14: b083 sub sp, #12
8004f16: af00 add r7, sp, #0
8004f18: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PeriodElapsedCallback could be implemented in the user file
*/
}
8004f1a: bf00 nop
8004f1c: 370c adds r7, #12
8004f1e: 46bd mov sp, r7
8004f20: f85d 7b04 ldr.w r7, [sp], #4
8004f24: 4770 bx lr
08004f26 <HAL_TIM_OC_DelayElapsedCallback>:
* @brief Output Compare callback in non-blocking mode
* @param htim TIM OC handle
* @retval None
*/
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
8004f26: b480 push {r7}
8004f28: b083 sub sp, #12
8004f2a: af00 add r7, sp, #0
8004f2c: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
*/
}
8004f2e: bf00 nop
8004f30: 370c adds r7, #12
8004f32: 46bd mov sp, r7
8004f34: f85d 7b04 ldr.w r7, [sp], #4
8004f38: 4770 bx lr
08004f3a <HAL_TIM_IC_CaptureCallback>:
* @brief Input Capture callback in non-blocking mode
* @param htim TIM IC handle
* @retval None
*/
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
8004f3a: b480 push {r7}
8004f3c: b083 sub sp, #12
8004f3e: af00 add r7, sp, #0
8004f40: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_IC_CaptureCallback could be implemented in the user file
*/
}
8004f42: bf00 nop
8004f44: 370c adds r7, #12
8004f46: 46bd mov sp, r7
8004f48: f85d 7b04 ldr.w r7, [sp], #4
8004f4c: 4770 bx lr
08004f4e <HAL_TIM_PWM_PulseFinishedCallback>:
* @brief PWM Pulse finished callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
8004f4e: b480 push {r7}
8004f50: b083 sub sp, #12
8004f52: af00 add r7, sp, #0
8004f54: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
*/
}
8004f56: bf00 nop
8004f58: 370c adds r7, #12
8004f5a: 46bd mov sp, r7
8004f5c: f85d 7b04 ldr.w r7, [sp], #4
8004f60: 4770 bx lr
08004f62 <HAL_TIM_TriggerCallback>:
* @brief Hall Trigger detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
8004f62: b480 push {r7}
8004f64: b083 sub sp, #12
8004f66: af00 add r7, sp, #0
8004f68: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_TriggerCallback could be implemented in the user file
*/
}
8004f6a: bf00 nop
8004f6c: 370c adds r7, #12
8004f6e: 46bd mov sp, r7
8004f70: f85d 7b04 ldr.w r7, [sp], #4
8004f74: 4770 bx lr
...
08004f78 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
{
8004f78: b480 push {r7}
8004f7a: b085 sub sp, #20
8004f7c: af00 add r7, sp, #0
8004f7e: 6078 str r0, [r7, #4]
8004f80: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8004f82: 687b ldr r3, [r7, #4]
8004f84: 681b ldr r3, [r3, #0]
8004f86: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8004f88: 687b ldr r3, [r7, #4]
8004f8a: 4a40 ldr r2, [pc, #256] ; (800508c <TIM_Base_SetConfig+0x114>)
8004f8c: 4293 cmp r3, r2
8004f8e: d013 beq.n 8004fb8 <TIM_Base_SetConfig+0x40>
8004f90: 687b ldr r3, [r7, #4]
8004f92: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
8004f96: d00f beq.n 8004fb8 <TIM_Base_SetConfig+0x40>
8004f98: 687b ldr r3, [r7, #4]
8004f9a: 4a3d ldr r2, [pc, #244] ; (8005090 <TIM_Base_SetConfig+0x118>)
8004f9c: 4293 cmp r3, r2
8004f9e: d00b beq.n 8004fb8 <TIM_Base_SetConfig+0x40>
8004fa0: 687b ldr r3, [r7, #4]
8004fa2: 4a3c ldr r2, [pc, #240] ; (8005094 <TIM_Base_SetConfig+0x11c>)
8004fa4: 4293 cmp r3, r2
8004fa6: d007 beq.n 8004fb8 <TIM_Base_SetConfig+0x40>
8004fa8: 687b ldr r3, [r7, #4]
8004faa: 4a3b ldr r2, [pc, #236] ; (8005098 <TIM_Base_SetConfig+0x120>)
8004fac: 4293 cmp r3, r2
8004fae: d003 beq.n 8004fb8 <TIM_Base_SetConfig+0x40>
8004fb0: 687b ldr r3, [r7, #4]
8004fb2: 4a3a ldr r2, [pc, #232] ; (800509c <TIM_Base_SetConfig+0x124>)
8004fb4: 4293 cmp r3, r2
8004fb6: d108 bne.n 8004fca <TIM_Base_SetConfig+0x52>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8004fb8: 68fb ldr r3, [r7, #12]
8004fba: f023 0370 bic.w r3, r3, #112 ; 0x70
8004fbe: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8004fc0: 683b ldr r3, [r7, #0]
8004fc2: 685b ldr r3, [r3, #4]
8004fc4: 68fa ldr r2, [r7, #12]
8004fc6: 4313 orrs r3, r2
8004fc8: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8004fca: 687b ldr r3, [r7, #4]
8004fcc: 4a2f ldr r2, [pc, #188] ; (800508c <TIM_Base_SetConfig+0x114>)
8004fce: 4293 cmp r3, r2
8004fd0: d02b beq.n 800502a <TIM_Base_SetConfig+0xb2>
8004fd2: 687b ldr r3, [r7, #4]
8004fd4: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
8004fd8: d027 beq.n 800502a <TIM_Base_SetConfig+0xb2>
8004fda: 687b ldr r3, [r7, #4]
8004fdc: 4a2c ldr r2, [pc, #176] ; (8005090 <TIM_Base_SetConfig+0x118>)
8004fde: 4293 cmp r3, r2
8004fe0: d023 beq.n 800502a <TIM_Base_SetConfig+0xb2>
8004fe2: 687b ldr r3, [r7, #4]
8004fe4: 4a2b ldr r2, [pc, #172] ; (8005094 <TIM_Base_SetConfig+0x11c>)
8004fe6: 4293 cmp r3, r2
8004fe8: d01f beq.n 800502a <TIM_Base_SetConfig+0xb2>
8004fea: 687b ldr r3, [r7, #4]
8004fec: 4a2a ldr r2, [pc, #168] ; (8005098 <TIM_Base_SetConfig+0x120>)
8004fee: 4293 cmp r3, r2
8004ff0: d01b beq.n 800502a <TIM_Base_SetConfig+0xb2>
8004ff2: 687b ldr r3, [r7, #4]
8004ff4: 4a29 ldr r2, [pc, #164] ; (800509c <TIM_Base_SetConfig+0x124>)
8004ff6: 4293 cmp r3, r2
8004ff8: d017 beq.n 800502a <TIM_Base_SetConfig+0xb2>
8004ffa: 687b ldr r3, [r7, #4]
8004ffc: 4a28 ldr r2, [pc, #160] ; (80050a0 <TIM_Base_SetConfig+0x128>)
8004ffe: 4293 cmp r3, r2
8005000: d013 beq.n 800502a <TIM_Base_SetConfig+0xb2>
8005002: 687b ldr r3, [r7, #4]
8005004: 4a27 ldr r2, [pc, #156] ; (80050a4 <TIM_Base_SetConfig+0x12c>)
8005006: 4293 cmp r3, r2
8005008: d00f beq.n 800502a <TIM_Base_SetConfig+0xb2>
800500a: 687b ldr r3, [r7, #4]
800500c: 4a26 ldr r2, [pc, #152] ; (80050a8 <TIM_Base_SetConfig+0x130>)
800500e: 4293 cmp r3, r2
8005010: d00b beq.n 800502a <TIM_Base_SetConfig+0xb2>
8005012: 687b ldr r3, [r7, #4]
8005014: 4a25 ldr r2, [pc, #148] ; (80050ac <TIM_Base_SetConfig+0x134>)
8005016: 4293 cmp r3, r2
8005018: d007 beq.n 800502a <TIM_Base_SetConfig+0xb2>
800501a: 687b ldr r3, [r7, #4]
800501c: 4a24 ldr r2, [pc, #144] ; (80050b0 <TIM_Base_SetConfig+0x138>)
800501e: 4293 cmp r3, r2
8005020: d003 beq.n 800502a <TIM_Base_SetConfig+0xb2>
8005022: 687b ldr r3, [r7, #4]
8005024: 4a23 ldr r2, [pc, #140] ; (80050b4 <TIM_Base_SetConfig+0x13c>)
8005026: 4293 cmp r3, r2
8005028: d108 bne.n 800503c <TIM_Base_SetConfig+0xc4>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800502a: 68fb ldr r3, [r7, #12]
800502c: f423 7340 bic.w r3, r3, #768 ; 0x300
8005030: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8005032: 683b ldr r3, [r7, #0]
8005034: 68db ldr r3, [r3, #12]
8005036: 68fa ldr r2, [r7, #12]
8005038: 4313 orrs r3, r2
800503a: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
800503c: 68fb ldr r3, [r7, #12]
800503e: f023 0280 bic.w r2, r3, #128 ; 0x80
8005042: 683b ldr r3, [r7, #0]
8005044: 695b ldr r3, [r3, #20]
8005046: 4313 orrs r3, r2
8005048: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800504a: 687b ldr r3, [r7, #4]
800504c: 68fa ldr r2, [r7, #12]
800504e: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8005050: 683b ldr r3, [r7, #0]
8005052: 689a ldr r2, [r3, #8]
8005054: 687b ldr r3, [r7, #4]
8005056: 62da str r2, [r3, #44] ; 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8005058: 683b ldr r3, [r7, #0]
800505a: 681a ldr r2, [r3, #0]
800505c: 687b ldr r3, [r7, #4]
800505e: 629a str r2, [r3, #40] ; 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8005060: 687b ldr r3, [r7, #4]
8005062: 4a0a ldr r2, [pc, #40] ; (800508c <TIM_Base_SetConfig+0x114>)
8005064: 4293 cmp r3, r2
8005066: d003 beq.n 8005070 <TIM_Base_SetConfig+0xf8>
8005068: 687b ldr r3, [r7, #4]
800506a: 4a0c ldr r2, [pc, #48] ; (800509c <TIM_Base_SetConfig+0x124>)
800506c: 4293 cmp r3, r2
800506e: d103 bne.n 8005078 <TIM_Base_SetConfig+0x100>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8005070: 683b ldr r3, [r7, #0]
8005072: 691a ldr r2, [r3, #16]
8005074: 687b ldr r3, [r7, #4]
8005076: 631a str r2, [r3, #48] ; 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8005078: 687b ldr r3, [r7, #4]
800507a: 2201 movs r2, #1
800507c: 615a str r2, [r3, #20]
}
800507e: bf00 nop
8005080: 3714 adds r7, #20
8005082: 46bd mov sp, r7
8005084: f85d 7b04 ldr.w r7, [sp], #4
8005088: 4770 bx lr
800508a: bf00 nop
800508c: 40010000 .word 0x40010000
8005090: 40000400 .word 0x40000400
8005094: 40000800 .word 0x40000800
8005098: 40000c00 .word 0x40000c00
800509c: 40010400 .word 0x40010400
80050a0: 40014000 .word 0x40014000
80050a4: 40014400 .word 0x40014400
80050a8: 40014800 .word 0x40014800
80050ac: 40001800 .word 0x40001800
80050b0: 40001c00 .word 0x40001c00
80050b4: 40002000 .word 0x40002000
080050b8 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
TIM_MasterConfigTypeDef *sMasterConfig)
{
80050b8: b480 push {r7}
80050ba: b085 sub sp, #20
80050bc: af00 add r7, sp, #0
80050be: 6078 str r0, [r7, #4]
80050c0: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
80050c2: 687b ldr r3, [r7, #4]
80050c4: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
80050c8: 2b01 cmp r3, #1
80050ca: d101 bne.n 80050d0 <HAL_TIMEx_MasterConfigSynchronization+0x18>
80050cc: 2302 movs r3, #2
80050ce: e05a b.n 8005186 <HAL_TIMEx_MasterConfigSynchronization+0xce>
80050d0: 687b ldr r3, [r7, #4]
80050d2: 2201 movs r2, #1
80050d4: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
80050d8: 687b ldr r3, [r7, #4]
80050da: 2202 movs r2, #2
80050dc: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
80050e0: 687b ldr r3, [r7, #4]
80050e2: 681b ldr r3, [r3, #0]
80050e4: 685b ldr r3, [r3, #4]
80050e6: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
80050e8: 687b ldr r3, [r7, #4]
80050ea: 681b ldr r3, [r3, #0]
80050ec: 689b ldr r3, [r3, #8]
80050ee: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
80050f0: 68fb ldr r3, [r7, #12]
80050f2: f023 0370 bic.w r3, r3, #112 ; 0x70
80050f6: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
80050f8: 683b ldr r3, [r7, #0]
80050fa: 681b ldr r3, [r3, #0]
80050fc: 68fa ldr r2, [r7, #12]
80050fe: 4313 orrs r3, r2
8005100: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8005102: 687b ldr r3, [r7, #4]
8005104: 681b ldr r3, [r3, #0]
8005106: 68fa ldr r2, [r7, #12]
8005108: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800510a: 687b ldr r3, [r7, #4]
800510c: 681b ldr r3, [r3, #0]
800510e: 4a21 ldr r2, [pc, #132] ; (8005194 <HAL_TIMEx_MasterConfigSynchronization+0xdc>)
8005110: 4293 cmp r3, r2
8005112: d022 beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8005114: 687b ldr r3, [r7, #4]
8005116: 681b ldr r3, [r3, #0]
8005118: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
800511c: d01d beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
800511e: 687b ldr r3, [r7, #4]
8005120: 681b ldr r3, [r3, #0]
8005122: 4a1d ldr r2, [pc, #116] ; (8005198 <HAL_TIMEx_MasterConfigSynchronization+0xe0>)
8005124: 4293 cmp r3, r2
8005126: d018 beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8005128: 687b ldr r3, [r7, #4]
800512a: 681b ldr r3, [r3, #0]
800512c: 4a1b ldr r2, [pc, #108] ; (800519c <HAL_TIMEx_MasterConfigSynchronization+0xe4>)
800512e: 4293 cmp r3, r2
8005130: d013 beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8005132: 687b ldr r3, [r7, #4]
8005134: 681b ldr r3, [r3, #0]
8005136: 4a1a ldr r2, [pc, #104] ; (80051a0 <HAL_TIMEx_MasterConfigSynchronization+0xe8>)
8005138: 4293 cmp r3, r2
800513a: d00e beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
800513c: 687b ldr r3, [r7, #4]
800513e: 681b ldr r3, [r3, #0]
8005140: 4a18 ldr r2, [pc, #96] ; (80051a4 <HAL_TIMEx_MasterConfigSynchronization+0xec>)
8005142: 4293 cmp r3, r2
8005144: d009 beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8005146: 687b ldr r3, [r7, #4]
8005148: 681b ldr r3, [r3, #0]
800514a: 4a17 ldr r2, [pc, #92] ; (80051a8 <HAL_TIMEx_MasterConfigSynchronization+0xf0>)
800514c: 4293 cmp r3, r2
800514e: d004 beq.n 800515a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8005150: 687b ldr r3, [r7, #4]
8005152: 681b ldr r3, [r3, #0]
8005154: 4a15 ldr r2, [pc, #84] ; (80051ac <HAL_TIMEx_MasterConfigSynchronization+0xf4>)
8005156: 4293 cmp r3, r2
8005158: d10c bne.n 8005174 <HAL_TIMEx_MasterConfigSynchronization+0xbc>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
800515a: 68bb ldr r3, [r7, #8]
800515c: f023 0380 bic.w r3, r3, #128 ; 0x80
8005160: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8005162: 683b ldr r3, [r7, #0]
8005164: 685b ldr r3, [r3, #4]
8005166: 68ba ldr r2, [r7, #8]
8005168: 4313 orrs r3, r2
800516a: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
800516c: 687b ldr r3, [r7, #4]
800516e: 681b ldr r3, [r3, #0]
8005170: 68ba ldr r2, [r7, #8]
8005172: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8005174: 687b ldr r3, [r7, #4]
8005176: 2201 movs r2, #1
8005178: f883 203d strb.w r2, [r3, #61] ; 0x3d
__HAL_UNLOCK(htim);
800517c: 687b ldr r3, [r7, #4]
800517e: 2200 movs r2, #0
8005180: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_OK;
8005184: 2300 movs r3, #0
}
8005186: 4618 mov r0, r3
8005188: 3714 adds r7, #20
800518a: 46bd mov sp, r7
800518c: f85d 7b04 ldr.w r7, [sp], #4
8005190: 4770 bx lr
8005192: bf00 nop
8005194: 40010000 .word 0x40010000
8005198: 40000400 .word 0x40000400
800519c: 40000800 .word 0x40000800
80051a0: 40000c00 .word 0x40000c00
80051a4: 40010400 .word 0x40010400
80051a8: 40014000 .word 0x40014000
80051ac: 40001800 .word 0x40001800
080051b0 <HAL_TIMEx_CommutCallback>:
* @brief Hall commutation changed callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
80051b0: b480 push {r7}
80051b2: b083 sub sp, #12
80051b4: af00 add r7, sp, #0
80051b6: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_CommutCallback could be implemented in the user file
*/
}
80051b8: bf00 nop
80051ba: 370c adds r7, #12
80051bc: 46bd mov sp, r7
80051be: f85d 7b04 ldr.w r7, [sp], #4
80051c2: 4770 bx lr
080051c4 <HAL_TIMEx_BreakCallback>:
* @brief Hall Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
80051c4: b480 push {r7}
80051c6: b083 sub sp, #12
80051c8: af00 add r7, sp, #0
80051ca: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_BreakCallback could be implemented in the user file
*/
}
80051cc: bf00 nop
80051ce: 370c adds r7, #12
80051d0: 46bd mov sp, r7
80051d2: f85d 7b04 ldr.w r7, [sp], #4
80051d6: 4770 bx lr
080051d8 <__errno>:
80051d8: 4b01 ldr r3, [pc, #4] ; (80051e0 <__errno+0x8>)
80051da: 6818 ldr r0, [r3, #0]
80051dc: 4770 bx lr
80051de: bf00 nop
80051e0: 20000010 .word 0x20000010
080051e4 <__libc_init_array>:
80051e4: b570 push {r4, r5, r6, lr}
80051e6: 4e0d ldr r6, [pc, #52] ; (800521c <__libc_init_array+0x38>)
80051e8: 4c0d ldr r4, [pc, #52] ; (8005220 <__libc_init_array+0x3c>)
80051ea: 1ba4 subs r4, r4, r6
80051ec: 10a4 asrs r4, r4, #2
80051ee: 2500 movs r5, #0
80051f0: 42a5 cmp r5, r4
80051f2: d109 bne.n 8005208 <__libc_init_array+0x24>
80051f4: 4e0b ldr r6, [pc, #44] ; (8005224 <__libc_init_array+0x40>)
80051f6: 4c0c ldr r4, [pc, #48] ; (8005228 <__libc_init_array+0x44>)
80051f8: f000 f8c8 bl 800538c <_init>
80051fc: 1ba4 subs r4, r4, r6
80051fe: 10a4 asrs r4, r4, #2
8005200: 2500 movs r5, #0
8005202: 42a5 cmp r5, r4
8005204: d105 bne.n 8005212 <__libc_init_array+0x2e>
8005206: bd70 pop {r4, r5, r6, pc}
8005208: f856 3025 ldr.w r3, [r6, r5, lsl #2]
800520c: 4798 blx r3
800520e: 3501 adds r5, #1
8005210: e7ee b.n 80051f0 <__libc_init_array+0xc>
8005212: f856 3025 ldr.w r3, [r6, r5, lsl #2]
8005216: 4798 blx r3
8005218: 3501 adds r5, #1
800521a: e7f2 b.n 8005202 <__libc_init_array+0x1e>
800521c: 080053bc .word 0x080053bc
8005220: 080053bc .word 0x080053bc
8005224: 080053bc .word 0x080053bc
8005228: 080053c0 .word 0x080053c0
0800522c <memset>:
800522c: 4402 add r2, r0
800522e: 4603 mov r3, r0
8005230: 4293 cmp r3, r2
8005232: d100 bne.n 8005236 <memset+0xa>
8005234: 4770 bx lr
8005236: f803 1b01 strb.w r1, [r3], #1
800523a: e7f9 b.n 8005230 <memset+0x4>
0800523c <rand>:
800523c: b538 push {r3, r4, r5, lr}
800523e: 4b13 ldr r3, [pc, #76] ; (800528c <rand+0x50>)
8005240: 681c ldr r4, [r3, #0]
8005242: 6ba3 ldr r3, [r4, #56] ; 0x38
8005244: b97b cbnz r3, 8005266 <rand+0x2a>
8005246: 2018 movs r0, #24
8005248: f000 f82c bl 80052a4 <malloc>
800524c: 4a10 ldr r2, [pc, #64] ; (8005290 <rand+0x54>)
800524e: 4b11 ldr r3, [pc, #68] ; (8005294 <rand+0x58>)
8005250: 63a0 str r0, [r4, #56] ; 0x38
8005252: e9c0 2300 strd r2, r3, [r0]
8005256: 4b10 ldr r3, [pc, #64] ; (8005298 <rand+0x5c>)
8005258: 6083 str r3, [r0, #8]
800525a: 230b movs r3, #11
800525c: 8183 strh r3, [r0, #12]
800525e: 2201 movs r2, #1
8005260: 2300 movs r3, #0
8005262: e9c0 2304 strd r2, r3, [r0, #16]
8005266: 6ba1 ldr r1, [r4, #56] ; 0x38
8005268: 480c ldr r0, [pc, #48] ; (800529c <rand+0x60>)
800526a: 690a ldr r2, [r1, #16]
800526c: 694b ldr r3, [r1, #20]
800526e: 4c0c ldr r4, [pc, #48] ; (80052a0 <rand+0x64>)
8005270: 4350 muls r0, r2
8005272: fb04 0003 mla r0, r4, r3, r0
8005276: fba2 2304 umull r2, r3, r2, r4
800527a: 4403 add r3, r0
800527c: 1c54 adds r4, r2, #1
800527e: f143 0500 adc.w r5, r3, #0
8005282: e9c1 4504 strd r4, r5, [r1, #16]
8005286: f025 4000 bic.w r0, r5, #2147483648 ; 0x80000000
800528a: bd38 pop {r3, r4, r5, pc}
800528c: 20000010 .word 0x20000010
8005290: abcd330e .word 0xabcd330e
8005294: e66d1234 .word 0xe66d1234
8005298: 0005deec .word 0x0005deec
800529c: 5851f42d .word 0x5851f42d
80052a0: 4c957f2d .word 0x4c957f2d
080052a4 <malloc>:
80052a4: 4b02 ldr r3, [pc, #8] ; (80052b0 <malloc+0xc>)
80052a6: 4601 mov r1, r0
80052a8: 6818 ldr r0, [r3, #0]
80052aa: f000 b803 b.w 80052b4 <_malloc_r>
80052ae: bf00 nop
80052b0: 20000010 .word 0x20000010
080052b4 <_malloc_r>:
80052b4: b570 push {r4, r5, r6, lr}
80052b6: 1ccd adds r5, r1, #3
80052b8: f025 0503 bic.w r5, r5, #3
80052bc: 3508 adds r5, #8
80052be: 2d0c cmp r5, #12
80052c0: bf38 it cc
80052c2: 250c movcc r5, #12
80052c4: 2d00 cmp r5, #0
80052c6: 4606 mov r6, r0
80052c8: db01 blt.n 80052ce <_malloc_r+0x1a>
80052ca: 42a9 cmp r1, r5
80052cc: d903 bls.n 80052d6 <_malloc_r+0x22>
80052ce: 230c movs r3, #12
80052d0: 6033 str r3, [r6, #0]
80052d2: 2000 movs r0, #0
80052d4: bd70 pop {r4, r5, r6, pc}
80052d6: f000 f857 bl 8005388 <__malloc_lock>
80052da: 4a21 ldr r2, [pc, #132] ; (8005360 <_malloc_r+0xac>)
80052dc: 6814 ldr r4, [r2, #0]
80052de: 4621 mov r1, r4
80052e0: b991 cbnz r1, 8005308 <_malloc_r+0x54>
80052e2: 4c20 ldr r4, [pc, #128] ; (8005364 <_malloc_r+0xb0>)
80052e4: 6823 ldr r3, [r4, #0]
80052e6: b91b cbnz r3, 80052f0 <_malloc_r+0x3c>
80052e8: 4630 mov r0, r6
80052ea: f000 f83d bl 8005368 <_sbrk_r>
80052ee: 6020 str r0, [r4, #0]
80052f0: 4629 mov r1, r5
80052f2: 4630 mov r0, r6
80052f4: f000 f838 bl 8005368 <_sbrk_r>
80052f8: 1c43 adds r3, r0, #1
80052fa: d124 bne.n 8005346 <_malloc_r+0x92>
80052fc: 230c movs r3, #12
80052fe: 6033 str r3, [r6, #0]
8005300: 4630 mov r0, r6
8005302: f000 f842 bl 800538a <__malloc_unlock>
8005306: e7e4 b.n 80052d2 <_malloc_r+0x1e>
8005308: 680b ldr r3, [r1, #0]
800530a: 1b5b subs r3, r3, r5
800530c: d418 bmi.n 8005340 <_malloc_r+0x8c>
800530e: 2b0b cmp r3, #11
8005310: d90f bls.n 8005332 <_malloc_r+0x7e>
8005312: 600b str r3, [r1, #0]
8005314: 50cd str r5, [r1, r3]
8005316: 18cc adds r4, r1, r3
8005318: 4630 mov r0, r6
800531a: f000 f836 bl 800538a <__malloc_unlock>
800531e: f104 000b add.w r0, r4, #11
8005322: 1d23 adds r3, r4, #4
8005324: f020 0007 bic.w r0, r0, #7
8005328: 1ac3 subs r3, r0, r3
800532a: d0d3 beq.n 80052d4 <_malloc_r+0x20>
800532c: 425a negs r2, r3
800532e: 50e2 str r2, [r4, r3]
8005330: e7d0 b.n 80052d4 <_malloc_r+0x20>
8005332: 428c cmp r4, r1
8005334: 684b ldr r3, [r1, #4]
8005336: bf16 itet ne
8005338: 6063 strne r3, [r4, #4]
800533a: 6013 streq r3, [r2, #0]
800533c: 460c movne r4, r1
800533e: e7eb b.n 8005318 <_malloc_r+0x64>
8005340: 460c mov r4, r1
8005342: 6849 ldr r1, [r1, #4]
8005344: e7cc b.n 80052e0 <_malloc_r+0x2c>
8005346: 1cc4 adds r4, r0, #3
8005348: f024 0403 bic.w r4, r4, #3
800534c: 42a0 cmp r0, r4
800534e: d005 beq.n 800535c <_malloc_r+0xa8>
8005350: 1a21 subs r1, r4, r0
8005352: 4630 mov r0, r6
8005354: f000 f808 bl 8005368 <_sbrk_r>
8005358: 3001 adds r0, #1
800535a: d0cf beq.n 80052fc <_malloc_r+0x48>
800535c: 6025 str r5, [r4, #0]
800535e: e7db b.n 8005318 <_malloc_r+0x64>
8005360: 200003ac .word 0x200003ac
8005364: 200003b0 .word 0x200003b0
08005368 <_sbrk_r>:
8005368: b538 push {r3, r4, r5, lr}
800536a: 4c06 ldr r4, [pc, #24] ; (8005384 <_sbrk_r+0x1c>)
800536c: 2300 movs r3, #0
800536e: 4605 mov r5, r0
8005370: 4608 mov r0, r1
8005372: 6023 str r3, [r4, #0]
8005374: f7fd fcb0 bl 8002cd8 <_sbrk>
8005378: 1c43 adds r3, r0, #1
800537a: d102 bne.n 8005382 <_sbrk_r+0x1a>
800537c: 6823 ldr r3, [r4, #0]
800537e: b103 cbz r3, 8005382 <_sbrk_r+0x1a>
8005380: 602b str r3, [r5, #0]
8005382: bd38 pop {r3, r4, r5, pc}
8005384: 2000049c .word 0x2000049c
08005388 <__malloc_lock>:
8005388: 4770 bx lr
0800538a <__malloc_unlock>:
800538a: 4770 bx lr
0800538c <_init>:
800538c: b5f8 push {r3, r4, r5, r6, r7, lr}
800538e: bf00 nop
8005390: bcf8 pop {r3, r4, r5, r6, r7}
8005392: bc08 pop {r3}
8005394: 469e mov lr, r3
8005396: 4770 bx lr
08005398 <_fini>:
8005398: b5f8 push {r3, r4, r5, r6, r7, lr}
800539a: bf00 nop
800539c: bcf8 pop {r3, r4, r5, r6, r7}
800539e: bc08 pop {r3}
80053a0: 469e mov lr, r3
80053a2: 4770 bx lr
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