William/LED-Face-Mask-Rough
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5e9b8f80d7e1ff0caa667f8be0df5bd23b8664ef
LED-Face-Mask-Rough/Debug/STM32F429I-DISC1_LEDFaceMask-Rough.list
William Miceli 5e9b8f80d7 Small tweaks
2020-08-25 21:03:40 -04:00

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STM32F429I-DISC1_LEDFaceMask-Rough.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001ac 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00004db8 080001b0 080001b0 000101b0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000b0 08004f68 08004f68 00014f68 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08005018 08005018 00020070 2**0
CONTENTS
4 .ARM 00000008 08005018 08005018 00015018 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 08005020 08005020 00020070 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08005020 08005020 00015020 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 08005024 08005024 00015024 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 00000070 20000000 08005028 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 0000042c 20000070 08005098 00020070 2**2
ALLOC
10 ._user_heap_stack 00000604 2000049c 08005098 0002049c 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 00020070 2**0
CONTENTS, READONLY
12 .debug_info 0000e73e 00000000 00000000 000200a0 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_abbrev 00001f4d 00000000 00000000 0002e7de 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_aranges 00000dc0 00000000 00000000 00030730 2**3
CONTENTS, READONLY, DEBUGGING
15 .debug_ranges 00000cc8 00000000 00000000 000314f0 2**3
CONTENTS, READONLY, DEBUGGING
16 .debug_macro 00025156 00000000 00000000 000321b8 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_line 0000ae4a 00000000 00000000 0005730e 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_str 000def41 00000000 00000000 00062158 2**0
CONTENTS, READONLY, DEBUGGING
19 .comment 0000007b 00000000 00000000 00141099 2**0
CONTENTS, READONLY
20 .debug_frame 00004104 00000000 00000000 00141114 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080001b0 <__do_global_dtors_aux>:
80001b0: b510 push {r4, lr}
80001b2: 4c05 ldr r4, [pc, #20] ; (80001c8 <__do_global_dtors_aux+0x18>)
80001b4: 7823 ldrb r3, [r4, #0]
80001b6: b933 cbnz r3, 80001c6 <__do_global_dtors_aux+0x16>
80001b8: 4b04 ldr r3, [pc, #16] ; (80001cc <__do_global_dtors_aux+0x1c>)
80001ba: b113 cbz r3, 80001c2 <__do_global_dtors_aux+0x12>
80001bc: 4804 ldr r0, [pc, #16] ; (80001d0 <__do_global_dtors_aux+0x20>)
80001be: f3af 8000 nop.w
80001c2: 2301 movs r3, #1
80001c4: 7023 strb r3, [r4, #0]
80001c6: bd10 pop {r4, pc}
80001c8: 20000070 .word 0x20000070
80001cc: 00000000 .word 0x00000000
80001d0: 08004f50 .word 0x08004f50
080001d4 <frame_dummy>:
80001d4: b508 push {r3, lr}
80001d6: 4b03 ldr r3, [pc, #12] ; (80001e4 <frame_dummy+0x10>)
80001d8: b11b cbz r3, 80001e2 <frame_dummy+0xe>
80001da: 4903 ldr r1, [pc, #12] ; (80001e8 <frame_dummy+0x14>)
80001dc: 4803 ldr r0, [pc, #12] ; (80001ec <frame_dummy+0x18>)
80001de: f3af 8000 nop.w
80001e2: bd08 pop {r3, pc}
80001e4: 00000000 .word 0x00000000
80001e8: 20000074 .word 0x20000074
80001ec: 08004f50 .word 0x08004f50
080001f0 <memchr>:
80001f0: f001 01ff and.w r1, r1, #255 ; 0xff
80001f4: 2a10 cmp r2, #16
80001f6: db2b blt.n 8000250 <memchr+0x60>
80001f8: f010 0f07 tst.w r0, #7
80001fc: d008 beq.n 8000210 <memchr+0x20>
80001fe: f810 3b01 ldrb.w r3, [r0], #1
8000202: 3a01 subs r2, #1
8000204: 428b cmp r3, r1
8000206: d02d beq.n 8000264 <memchr+0x74>
8000208: f010 0f07 tst.w r0, #7
800020c: b342 cbz r2, 8000260 <memchr+0x70>
800020e: d1f6 bne.n 80001fe <memchr+0xe>
8000210: b4f0 push {r4, r5, r6, r7}
8000212: ea41 2101 orr.w r1, r1, r1, lsl #8
8000216: ea41 4101 orr.w r1, r1, r1, lsl #16
800021a: f022 0407 bic.w r4, r2, #7
800021e: f07f 0700 mvns.w r7, #0
8000222: 2300 movs r3, #0
8000224: e8f0 5602 ldrd r5, r6, [r0], #8
8000228: 3c08 subs r4, #8
800022a: ea85 0501 eor.w r5, r5, r1
800022e: ea86 0601 eor.w r6, r6, r1
8000232: fa85 f547 uadd8 r5, r5, r7
8000236: faa3 f587 sel r5, r3, r7
800023a: fa86 f647 uadd8 r6, r6, r7
800023e: faa5 f687 sel r6, r5, r7
8000242: b98e cbnz r6, 8000268 <memchr+0x78>
8000244: d1ee bne.n 8000224 <memchr+0x34>
8000246: bcf0 pop {r4, r5, r6, r7}
8000248: f001 01ff and.w r1, r1, #255 ; 0xff
800024c: f002 0207 and.w r2, r2, #7
8000250: b132 cbz r2, 8000260 <memchr+0x70>
8000252: f810 3b01 ldrb.w r3, [r0], #1
8000256: 3a01 subs r2, #1
8000258: ea83 0301 eor.w r3, r3, r1
800025c: b113 cbz r3, 8000264 <memchr+0x74>
800025e: d1f8 bne.n 8000252 <memchr+0x62>
8000260: 2000 movs r0, #0
8000262: 4770 bx lr
8000264: 3801 subs r0, #1
8000266: 4770 bx lr
8000268: 2d00 cmp r5, #0
800026a: bf06 itte eq
800026c: 4635 moveq r5, r6
800026e: 3803 subeq r0, #3
8000270: 3807 subne r0, #7
8000272: f015 0f01 tst.w r5, #1
8000276: d107 bne.n 8000288 <memchr+0x98>
8000278: 3001 adds r0, #1
800027a: f415 7f80 tst.w r5, #256 ; 0x100
800027e: bf02 ittt eq
8000280: 3001 addeq r0, #1
8000282: f415 3fc0 tsteq.w r5, #98304 ; 0x18000
8000286: 3001 addeq r0, #1
8000288: bcf0 pop {r4, r5, r6, r7}
800028a: 3801 subs r0, #1
800028c: 4770 bx lr
800028e: bf00 nop
08000290 <__aeabi_uldivmod>:
8000290: b953 cbnz r3, 80002a8 <__aeabi_uldivmod+0x18>
8000292: b94a cbnz r2, 80002a8 <__aeabi_uldivmod+0x18>
8000294: 2900 cmp r1, #0
8000296: bf08 it eq
8000298: 2800 cmpeq r0, #0
800029a: bf1c itt ne
800029c: f04f 31ff movne.w r1, #4294967295
80002a0: f04f 30ff movne.w r0, #4294967295
80002a4: f000 b972 b.w 800058c <__aeabi_idiv0>
80002a8: f1ad 0c08 sub.w ip, sp, #8
80002ac: e96d ce04 strd ip, lr, [sp, #-16]!
80002b0: f000 f806 bl 80002c0 <__udivmoddi4>
80002b4: f8dd e004 ldr.w lr, [sp, #4]
80002b8: e9dd 2302 ldrd r2, r3, [sp, #8]
80002bc: b004 add sp, #16
80002be: 4770 bx lr
080002c0 <__udivmoddi4>:
80002c0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
80002c4: 9e08 ldr r6, [sp, #32]
80002c6: 4604 mov r4, r0
80002c8: 4688 mov r8, r1
80002ca: 2b00 cmp r3, #0
80002cc: d14b bne.n 8000366 <__udivmoddi4+0xa6>
80002ce: 428a cmp r2, r1
80002d0: 4615 mov r5, r2
80002d2: d967 bls.n 80003a4 <__udivmoddi4+0xe4>
80002d4: fab2 f282 clz r2, r2
80002d8: b14a cbz r2, 80002ee <__udivmoddi4+0x2e>
80002da: f1c2 0720 rsb r7, r2, #32
80002de: fa01 f302 lsl.w r3, r1, r2
80002e2: fa20 f707 lsr.w r7, r0, r7
80002e6: 4095 lsls r5, r2
80002e8: ea47 0803 orr.w r8, r7, r3
80002ec: 4094 lsls r4, r2
80002ee: ea4f 4e15 mov.w lr, r5, lsr #16
80002f2: 0c23 lsrs r3, r4, #16
80002f4: fbb8 f7fe udiv r7, r8, lr
80002f8: fa1f fc85 uxth.w ip, r5
80002fc: fb0e 8817 mls r8, lr, r7, r8
8000300: ea43 4308 orr.w r3, r3, r8, lsl #16
8000304: fb07 f10c mul.w r1, r7, ip
8000308: 4299 cmp r1, r3
800030a: d909 bls.n 8000320 <__udivmoddi4+0x60>
800030c: 18eb adds r3, r5, r3
800030e: f107 30ff add.w r0, r7, #4294967295
8000312: f080 811b bcs.w 800054c <__udivmoddi4+0x28c>
8000316: 4299 cmp r1, r3
8000318: f240 8118 bls.w 800054c <__udivmoddi4+0x28c>
800031c: 3f02 subs r7, #2
800031e: 442b add r3, r5
8000320: 1a5b subs r3, r3, r1
8000322: b2a4 uxth r4, r4
8000324: fbb3 f0fe udiv r0, r3, lr
8000328: fb0e 3310 mls r3, lr, r0, r3
800032c: ea44 4403 orr.w r4, r4, r3, lsl #16
8000330: fb00 fc0c mul.w ip, r0, ip
8000334: 45a4 cmp ip, r4
8000336: d909 bls.n 800034c <__udivmoddi4+0x8c>
8000338: 192c adds r4, r5, r4
800033a: f100 33ff add.w r3, r0, #4294967295
800033e: f080 8107 bcs.w 8000550 <__udivmoddi4+0x290>
8000342: 45a4 cmp ip, r4
8000344: f240 8104 bls.w 8000550 <__udivmoddi4+0x290>
8000348: 3802 subs r0, #2
800034a: 442c add r4, r5
800034c: ea40 4007 orr.w r0, r0, r7, lsl #16
8000350: eba4 040c sub.w r4, r4, ip
8000354: 2700 movs r7, #0
8000356: b11e cbz r6, 8000360 <__udivmoddi4+0xa0>
8000358: 40d4 lsrs r4, r2
800035a: 2300 movs r3, #0
800035c: e9c6 4300 strd r4, r3, [r6]
8000360: 4639 mov r1, r7
8000362: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8000366: 428b cmp r3, r1
8000368: d909 bls.n 800037e <__udivmoddi4+0xbe>
800036a: 2e00 cmp r6, #0
800036c: f000 80eb beq.w 8000546 <__udivmoddi4+0x286>
8000370: 2700 movs r7, #0
8000372: e9c6 0100 strd r0, r1, [r6]
8000376: 4638 mov r0, r7
8000378: 4639 mov r1, r7
800037a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800037e: fab3 f783 clz r7, r3
8000382: 2f00 cmp r7, #0
8000384: d147 bne.n 8000416 <__udivmoddi4+0x156>
8000386: 428b cmp r3, r1
8000388: d302 bcc.n 8000390 <__udivmoddi4+0xd0>
800038a: 4282 cmp r2, r0
800038c: f200 80fa bhi.w 8000584 <__udivmoddi4+0x2c4>
8000390: 1a84 subs r4, r0, r2
8000392: eb61 0303 sbc.w r3, r1, r3
8000396: 2001 movs r0, #1
8000398: 4698 mov r8, r3
800039a: 2e00 cmp r6, #0
800039c: d0e0 beq.n 8000360 <__udivmoddi4+0xa0>
800039e: e9c6 4800 strd r4, r8, [r6]
80003a2: e7dd b.n 8000360 <__udivmoddi4+0xa0>
80003a4: b902 cbnz r2, 80003a8 <__udivmoddi4+0xe8>
80003a6: deff udf #255 ; 0xff
80003a8: fab2 f282 clz r2, r2
80003ac: 2a00 cmp r2, #0
80003ae: f040 808f bne.w 80004d0 <__udivmoddi4+0x210>
80003b2: 1b49 subs r1, r1, r5
80003b4: ea4f 4e15 mov.w lr, r5, lsr #16
80003b8: fa1f f885 uxth.w r8, r5
80003bc: 2701 movs r7, #1
80003be: fbb1 fcfe udiv ip, r1, lr
80003c2: 0c23 lsrs r3, r4, #16
80003c4: fb0e 111c mls r1, lr, ip, r1
80003c8: ea43 4301 orr.w r3, r3, r1, lsl #16
80003cc: fb08 f10c mul.w r1, r8, ip
80003d0: 4299 cmp r1, r3
80003d2: d907 bls.n 80003e4 <__udivmoddi4+0x124>
80003d4: 18eb adds r3, r5, r3
80003d6: f10c 30ff add.w r0, ip, #4294967295
80003da: d202 bcs.n 80003e2 <__udivmoddi4+0x122>
80003dc: 4299 cmp r1, r3
80003de: f200 80cd bhi.w 800057c <__udivmoddi4+0x2bc>
80003e2: 4684 mov ip, r0
80003e4: 1a59 subs r1, r3, r1
80003e6: b2a3 uxth r3, r4
80003e8: fbb1 f0fe udiv r0, r1, lr
80003ec: fb0e 1410 mls r4, lr, r0, r1
80003f0: ea43 4404 orr.w r4, r3, r4, lsl #16
80003f4: fb08 f800 mul.w r8, r8, r0
80003f8: 45a0 cmp r8, r4
80003fa: d907 bls.n 800040c <__udivmoddi4+0x14c>
80003fc: 192c adds r4, r5, r4
80003fe: f100 33ff add.w r3, r0, #4294967295
8000402: d202 bcs.n 800040a <__udivmoddi4+0x14a>
8000404: 45a0 cmp r8, r4
8000406: f200 80b6 bhi.w 8000576 <__udivmoddi4+0x2b6>
800040a: 4618 mov r0, r3
800040c: eba4 0408 sub.w r4, r4, r8
8000410: ea40 400c orr.w r0, r0, ip, lsl #16
8000414: e79f b.n 8000356 <__udivmoddi4+0x96>
8000416: f1c7 0c20 rsb ip, r7, #32
800041a: 40bb lsls r3, r7
800041c: fa22 fe0c lsr.w lr, r2, ip
8000420: ea4e 0e03 orr.w lr, lr, r3
8000424: fa01 f407 lsl.w r4, r1, r7
8000428: fa20 f50c lsr.w r5, r0, ip
800042c: fa21 f30c lsr.w r3, r1, ip
8000430: ea4f 481e mov.w r8, lr, lsr #16
8000434: 4325 orrs r5, r4
8000436: fbb3 f9f8 udiv r9, r3, r8
800043a: 0c2c lsrs r4, r5, #16
800043c: fb08 3319 mls r3, r8, r9, r3
8000440: fa1f fa8e uxth.w sl, lr
8000444: ea44 4303 orr.w r3, r4, r3, lsl #16
8000448: fb09 f40a mul.w r4, r9, sl
800044c: 429c cmp r4, r3
800044e: fa02 f207 lsl.w r2, r2, r7
8000452: fa00 f107 lsl.w r1, r0, r7
8000456: d90b bls.n 8000470 <__udivmoddi4+0x1b0>
8000458: eb1e 0303 adds.w r3, lr, r3
800045c: f109 30ff add.w r0, r9, #4294967295
8000460: f080 8087 bcs.w 8000572 <__udivmoddi4+0x2b2>
8000464: 429c cmp r4, r3
8000466: f240 8084 bls.w 8000572 <__udivmoddi4+0x2b2>
800046a: f1a9 0902 sub.w r9, r9, #2
800046e: 4473 add r3, lr
8000470: 1b1b subs r3, r3, r4
8000472: b2ad uxth r5, r5
8000474: fbb3 f0f8 udiv r0, r3, r8
8000478: fb08 3310 mls r3, r8, r0, r3
800047c: ea45 4403 orr.w r4, r5, r3, lsl #16
8000480: fb00 fa0a mul.w sl, r0, sl
8000484: 45a2 cmp sl, r4
8000486: d908 bls.n 800049a <__udivmoddi4+0x1da>
8000488: eb1e 0404 adds.w r4, lr, r4
800048c: f100 33ff add.w r3, r0, #4294967295
8000490: d26b bcs.n 800056a <__udivmoddi4+0x2aa>
8000492: 45a2 cmp sl, r4
8000494: d969 bls.n 800056a <__udivmoddi4+0x2aa>
8000496: 3802 subs r0, #2
8000498: 4474 add r4, lr
800049a: ea40 4009 orr.w r0, r0, r9, lsl #16
800049e: fba0 8902 umull r8, r9, r0, r2
80004a2: eba4 040a sub.w r4, r4, sl
80004a6: 454c cmp r4, r9
80004a8: 46c2 mov sl, r8
80004aa: 464b mov r3, r9
80004ac: d354 bcc.n 8000558 <__udivmoddi4+0x298>
80004ae: d051 beq.n 8000554 <__udivmoddi4+0x294>
80004b0: 2e00 cmp r6, #0
80004b2: d069 beq.n 8000588 <__udivmoddi4+0x2c8>
80004b4: ebb1 050a subs.w r5, r1, sl
80004b8: eb64 0403 sbc.w r4, r4, r3
80004bc: fa04 fc0c lsl.w ip, r4, ip
80004c0: 40fd lsrs r5, r7
80004c2: 40fc lsrs r4, r7
80004c4: ea4c 0505 orr.w r5, ip, r5
80004c8: e9c6 5400 strd r5, r4, [r6]
80004cc: 2700 movs r7, #0
80004ce: e747 b.n 8000360 <__udivmoddi4+0xa0>
80004d0: f1c2 0320 rsb r3, r2, #32
80004d4: fa20 f703 lsr.w r7, r0, r3
80004d8: 4095 lsls r5, r2
80004da: fa01 f002 lsl.w r0, r1, r2
80004de: fa21 f303 lsr.w r3, r1, r3
80004e2: ea4f 4e15 mov.w lr, r5, lsr #16
80004e6: 4338 orrs r0, r7
80004e8: 0c01 lsrs r1, r0, #16
80004ea: fbb3 f7fe udiv r7, r3, lr
80004ee: fa1f f885 uxth.w r8, r5
80004f2: fb0e 3317 mls r3, lr, r7, r3
80004f6: ea41 4103 orr.w r1, r1, r3, lsl #16
80004fa: fb07 f308 mul.w r3, r7, r8
80004fe: 428b cmp r3, r1
8000500: fa04 f402 lsl.w r4, r4, r2
8000504: d907 bls.n 8000516 <__udivmoddi4+0x256>
8000506: 1869 adds r1, r5, r1
8000508: f107 3cff add.w ip, r7, #4294967295
800050c: d22f bcs.n 800056e <__udivmoddi4+0x2ae>
800050e: 428b cmp r3, r1
8000510: d92d bls.n 800056e <__udivmoddi4+0x2ae>
8000512: 3f02 subs r7, #2
8000514: 4429 add r1, r5
8000516: 1acb subs r3, r1, r3
8000518: b281 uxth r1, r0
800051a: fbb3 f0fe udiv r0, r3, lr
800051e: fb0e 3310 mls r3, lr, r0, r3
8000522: ea41 4103 orr.w r1, r1, r3, lsl #16
8000526: fb00 f308 mul.w r3, r0, r8
800052a: 428b cmp r3, r1
800052c: d907 bls.n 800053e <__udivmoddi4+0x27e>
800052e: 1869 adds r1, r5, r1
8000530: f100 3cff add.w ip, r0, #4294967295
8000534: d217 bcs.n 8000566 <__udivmoddi4+0x2a6>
8000536: 428b cmp r3, r1
8000538: d915 bls.n 8000566 <__udivmoddi4+0x2a6>
800053a: 3802 subs r0, #2
800053c: 4429 add r1, r5
800053e: 1ac9 subs r1, r1, r3
8000540: ea40 4707 orr.w r7, r0, r7, lsl #16
8000544: e73b b.n 80003be <__udivmoddi4+0xfe>
8000546: 4637 mov r7, r6
8000548: 4630 mov r0, r6
800054a: e709 b.n 8000360 <__udivmoddi4+0xa0>
800054c: 4607 mov r7, r0
800054e: e6e7 b.n 8000320 <__udivmoddi4+0x60>
8000550: 4618 mov r0, r3
8000552: e6fb b.n 800034c <__udivmoddi4+0x8c>
8000554: 4541 cmp r1, r8
8000556: d2ab bcs.n 80004b0 <__udivmoddi4+0x1f0>
8000558: ebb8 0a02 subs.w sl, r8, r2
800055c: eb69 020e sbc.w r2, r9, lr
8000560: 3801 subs r0, #1
8000562: 4613 mov r3, r2
8000564: e7a4 b.n 80004b0 <__udivmoddi4+0x1f0>
8000566: 4660 mov r0, ip
8000568: e7e9 b.n 800053e <__udivmoddi4+0x27e>
800056a: 4618 mov r0, r3
800056c: e795 b.n 800049a <__udivmoddi4+0x1da>
800056e: 4667 mov r7, ip
8000570: e7d1 b.n 8000516 <__udivmoddi4+0x256>
8000572: 4681 mov r9, r0
8000574: e77c b.n 8000470 <__udivmoddi4+0x1b0>
8000576: 3802 subs r0, #2
8000578: 442c add r4, r5
800057a: e747 b.n 800040c <__udivmoddi4+0x14c>
800057c: f1ac 0c02 sub.w ip, ip, #2
8000580: 442b add r3, r5
8000582: e72f b.n 80003e4 <__udivmoddi4+0x124>
8000584: 4638 mov r0, r7
8000586: e708 b.n 800039a <__udivmoddi4+0xda>
8000588: 4637 mov r7, r6
800058a: e6e9 b.n 8000360 <__udivmoddi4+0xa0>
0800058c <__aeabi_idiv0>:
800058c: 4770 bx lr
800058e: bf00 nop
08000590 <ITM_SendChar>:
\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
\param [in] ch Character to transmit.
\returns Character to transmit.
*/
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
{
8000590: b480 push {r7}
8000592: b083 sub sp, #12
8000594: af00 add r7, sp, #0
8000596: 6078 str r0, [r7, #4]
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
8000598: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
800059c: f8d3 3e80 ldr.w r3, [r3, #3712] ; 0xe80
80005a0: f003 0301 and.w r3, r3, #1
80005a4: 2b00 cmp r3, #0
80005a6: d013 beq.n 80005d0 <ITM_SendChar+0x40>
((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
80005a8: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
80005ac: f8d3 3e00 ldr.w r3, [r3, #3584] ; 0xe00
80005b0: f003 0301 and.w r3, r3, #1
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
80005b4: 2b00 cmp r3, #0
80005b6: d00b beq.n 80005d0 <ITM_SendChar+0x40>
{
while (ITM->PORT[0U].u32 == 0UL)
80005b8: e000 b.n 80005bc <ITM_SendChar+0x2c>
{
__NOP();
80005ba: bf00 nop
while (ITM->PORT[0U].u32 == 0UL)
80005bc: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
80005c0: 681b ldr r3, [r3, #0]
80005c2: 2b00 cmp r3, #0
80005c4: d0f9 beq.n 80005ba <ITM_SendChar+0x2a>
}
ITM->PORT[0U].u8 = (uint8_t)ch;
80005c6: f04f 4360 mov.w r3, #3758096384 ; 0xe0000000
80005ca: 687a ldr r2, [r7, #4]
80005cc: b2d2 uxtb r2, r2
80005ce: 701a strb r2, [r3, #0]
}
return (ch);
80005d0: 687b ldr r3, [r7, #4]
}
80005d2: 4618 mov r0, r3
80005d4: 370c adds r7, #12
80005d6: 46bd mov sp, r7
80005d8: f85d 7b04 ldr.w r7, [sp], #4
80005dc: 4770 bx lr
080005de <_write>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
int _write(int32_t file, uint8_t *ptr, int32_t len)
{
80005de: b580 push {r7, lr}
80005e0: b086 sub sp, #24
80005e2: af00 add r7, sp, #0
80005e4: 60f8 str r0, [r7, #12]
80005e6: 60b9 str r1, [r7, #8]
80005e8: 607a str r2, [r7, #4]
for (int i = 0; i < len; i++)
80005ea: 2300 movs r3, #0
80005ec: 617b str r3, [r7, #20]
80005ee: e009 b.n 8000604 <_write+0x26>
{
ITM_SendChar(*ptr++);
80005f0: 68bb ldr r3, [r7, #8]
80005f2: 1c5a adds r2, r3, #1
80005f4: 60ba str r2, [r7, #8]
80005f6: 781b ldrb r3, [r3, #0]
80005f8: 4618 mov r0, r3
80005fa: f7ff ffc9 bl 8000590 <ITM_SendChar>
for (int i = 0; i < len; i++)
80005fe: 697b ldr r3, [r7, #20]
8000600: 3301 adds r3, #1
8000602: 617b str r3, [r7, #20]
8000604: 697a ldr r2, [r7, #20]
8000606: 687b ldr r3, [r7, #4]
8000608: 429a cmp r2, r3
800060a: dbf1 blt.n 80005f0 <_write+0x12>
}
return len;
800060c: 687b ldr r3, [r7, #4]
}
800060e: 4618 mov r0, r3
8000610: 3718 adds r7, #24
8000612: 46bd mov sp, r7
8000614: bd80 pop {r7, pc}
...
08000618 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000618: b580 push {r7, lr}
800061a: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
800061c: f001 fc94 bl 8001f48 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000620: f000 f854 bl 80006cc <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000624: f000 f986 bl 8000934 <MX_GPIO_Init>
MX_SPI4_Init();
8000628: f000 f90e bl 8000848 <MX_SPI4_Init>
MX_TIM6_Init();
800062c: f000 f942 bl 80008b4 <MX_TIM6_Init>
MX_ADC3_Init();
8000630: f000 f8b6 bl 80007a0 <MX_ADC3_Init>
/* USER CODE BEGIN 2 */
updateWS2812BData();
8000634: f000 fbfe bl 8000e34 <updateWS2812BData>
HAL_SPI_Transmit_IT(&hspi4, (uint8_t*) &LEDData, (uint16_t) 66 * 3 * 3);
8000638: f240 2252 movw r2, #594 ; 0x252
800063c: 491e ldr r1, [pc, #120] ; (80006b8 <main+0xa0>)
800063e: 481f ldr r0, [pc, #124] ; (80006bc <main+0xa4>)
8000640: f002 ff36 bl 80034b0 <HAL_SPI_Transmit_IT>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1) {
printf("Test");
8000644: 481e ldr r0, [pc, #120] ; (80006c0 <main+0xa8>)
8000646: f003 fd63 bl 8004110 <iprintf>
if(LEDDesign_PendingChange){
800064a: 4b1e ldr r3, [pc, #120] ; (80006c4 <main+0xac>)
800064c: 781b ldrb r3, [r3, #0]
800064e: 2b00 cmp r3, #0
8000650: d002 beq.n 8000658 <main+0x40>
LEDDesign_Off();
8000652: f000 fd8f bl 8001174 <LEDDesign_Off>
8000656: e02c b.n 80006b2 <main+0x9a>
}else{
switch (LEDMode) {
8000658: 4b1b ldr r3, [pc, #108] ; (80006c8 <main+0xb0>)
800065a: 781b ldrb r3, [r3, #0]
800065c: 2b06 cmp r3, #6
800065e: d826 bhi.n 80006ae <main+0x96>
8000660: a201 add r2, pc, #4 ; (adr r2, 8000668 <main+0x50>)
8000662: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000666: bf00 nop
8000668: 08000685 .word 0x08000685
800066c: 0800068b .word 0x0800068b
8000670: 08000691 .word 0x08000691
8000674: 08000697 .word 0x08000697
8000678: 0800069d .word 0x0800069d
800067c: 080006a3 .word 0x080006a3
8000680: 080006a9 .word 0x080006a9
case 0:
LEDDesign_Smile();
8000684: f000 fec6 bl 8001414 <LEDDesign_Smile>
break;
8000688: e013 b.n 80006b2 <main+0x9a>
case 1:
LEDDesign_Crazy();
800068a: f000 fe83 bl 8001394 <LEDDesign_Crazy>
break;
800068e: e010 b.n 80006b2 <main+0x9a>
case 2:
LEDDesign_SuperCrazy();
8000690: f001 f9ae bl 80019f0 <LEDDesign_SuperCrazy>
break;
8000694: e00d b.n 80006b2 <main+0x9a>
case 3:
LEDDesign_ColorWhite();
8000696: f000 fd95 bl 80011c4 <LEDDesign_ColorWhite>
break;
800069a: e00a b.n 80006b2 <main+0x9a>
case 4:
LEDDesign_ColorRed();
800069c: f000 fe3a bl 8001314 <LEDDesign_ColorRed>
break;
80006a0: e007 b.n 80006b2 <main+0x9a>
case 5:
LEDDesign_ColorGreen();
80006a2: f000 fdf7 bl 8001294 <LEDDesign_ColorGreen>
break;
80006a6: e004 b.n 80006b2 <main+0x9a>
case 6:
LEDDesign_ColorBlue();
80006a8: f000 fdb4 bl 8001214 <LEDDesign_ColorBlue>
break;
80006ac: e001 b.n 80006b2 <main+0x9a>
default:
LEDDesign_Off();
80006ae: f000 fd61 bl 8001174 <LEDDesign_Off>
}
}
updateWS2812BData();
80006b2: f000 fbbf bl 8000e34 <updateWS2812BData>
printf("Test");
80006b6: e7c5 b.n 8000644 <main+0x2c>
80006b8: 20000090 .word 0x20000090
80006bc: 200003fc .word 0x200003fc
80006c0: 08004f68 .word 0x08004f68
80006c4: 2000008d .word 0x2000008d
80006c8: 2000008c .word 0x2000008c
080006cc <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
80006cc: b580 push {r7, lr}
80006ce: b094 sub sp, #80 ; 0x50
80006d0: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80006d2: f107 0320 add.w r3, r7, #32
80006d6: 2230 movs r2, #48 ; 0x30
80006d8: 2100 movs r1, #0
80006da: 4618 mov r0, r3
80006dc: f003 fd10 bl 8004100 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80006e0: f107 030c add.w r3, r7, #12
80006e4: 2200 movs r2, #0
80006e6: 601a str r2, [r3, #0]
80006e8: 605a str r2, [r3, #4]
80006ea: 609a str r2, [r3, #8]
80006ec: 60da str r2, [r3, #12]
80006ee: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
80006f0: 2300 movs r3, #0
80006f2: 60bb str r3, [r7, #8]
80006f4: 4b28 ldr r3, [pc, #160] ; (8000798 <SystemClock_Config+0xcc>)
80006f6: 6c1b ldr r3, [r3, #64] ; 0x40
80006f8: 4a27 ldr r2, [pc, #156] ; (8000798 <SystemClock_Config+0xcc>)
80006fa: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
80006fe: 6413 str r3, [r2, #64] ; 0x40
8000700: 4b25 ldr r3, [pc, #148] ; (8000798 <SystemClock_Config+0xcc>)
8000702: 6c1b ldr r3, [r3, #64] ; 0x40
8000704: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000708: 60bb str r3, [r7, #8]
800070a: 68bb ldr r3, [r7, #8]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
800070c: 2300 movs r3, #0
800070e: 607b str r3, [r7, #4]
8000710: 4b22 ldr r3, [pc, #136] ; (800079c <SystemClock_Config+0xd0>)
8000712: 681b ldr r3, [r3, #0]
8000714: 4a21 ldr r2, [pc, #132] ; (800079c <SystemClock_Config+0xd0>)
8000716: f443 4340 orr.w r3, r3, #49152 ; 0xc000
800071a: 6013 str r3, [r2, #0]
800071c: 4b1f ldr r3, [pc, #124] ; (800079c <SystemClock_Config+0xd0>)
800071e: 681b ldr r3, [r3, #0]
8000720: f403 4340 and.w r3, r3, #49152 ; 0xc000
8000724: 607b str r3, [r7, #4]
8000726: 687b ldr r3, [r7, #4]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8000728: 2301 movs r3, #1
800072a: 623b str r3, [r7, #32]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
800072c: f44f 3380 mov.w r3, #65536 ; 0x10000
8000730: 627b str r3, [r7, #36] ; 0x24
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8000732: 2302 movs r3, #2
8000734: 63bb str r3, [r7, #56] ; 0x38
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8000736: f44f 0380 mov.w r3, #4194304 ; 0x400000
800073a: 63fb str r3, [r7, #60] ; 0x3c
RCC_OscInitStruct.PLL.PLLM = 4;
800073c: 2304 movs r3, #4
800073e: 643b str r3, [r7, #64] ; 0x40
RCC_OscInitStruct.PLL.PLLN = 160;
8000740: 23a0 movs r3, #160 ; 0xa0
8000742: 647b str r3, [r7, #68] ; 0x44
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
8000744: 2302 movs r3, #2
8000746: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.PLL.PLLQ = 7;
8000748: 2307 movs r3, #7
800074a: 64fb str r3, [r7, #76] ; 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
800074c: f107 0320 add.w r3, r7, #32
8000750: 4618 mov r0, r3
8000752: f002 fa1b bl 8002b8c <HAL_RCC_OscConfig>
8000756: 4603 mov r3, r0
8000758: 2b00 cmp r3, #0
800075a: d001 beq.n 8000760 <SystemClock_Config+0x94>
{
Error_Handler();
800075c: f001 f9ca bl 8001af4 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000760: 230f movs r3, #15
8000762: 60fb str r3, [r7, #12]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000764: 2302 movs r3, #2
8000766: 613b str r3, [r7, #16]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8000768: 2300 movs r3, #0
800076a: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
800076c: f44f 53a0 mov.w r3, #5120 ; 0x1400
8000770: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
8000772: f44f 5380 mov.w r3, #4096 ; 0x1000
8000776: 61fb str r3, [r7, #28]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
8000778: f107 030c add.w r3, r7, #12
800077c: 2105 movs r1, #5
800077e: 4618 mov r0, r3
8000780: f002 fc74 bl 800306c <HAL_RCC_ClockConfig>
8000784: 4603 mov r3, r0
8000786: 2b00 cmp r3, #0
8000788: d001 beq.n 800078e <SystemClock_Config+0xc2>
{
Error_Handler();
800078a: f001 f9b3 bl 8001af4 <Error_Handler>
}
}
800078e: bf00 nop
8000790: 3750 adds r7, #80 ; 0x50
8000792: 46bd mov sp, r7
8000794: bd80 pop {r7, pc}
8000796: bf00 nop
8000798: 40023800 .word 0x40023800
800079c: 40007000 .word 0x40007000
080007a0 <MX_ADC3_Init>:
* @brief ADC3 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC3_Init(void)
{
80007a0: b580 push {r7, lr}
80007a2: b084 sub sp, #16
80007a4: af00 add r7, sp, #0
/* USER CODE BEGIN ADC3_Init 0 */
/* USER CODE END ADC3_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
80007a6: 463b mov r3, r7
80007a8: 2200 movs r2, #0
80007aa: 601a str r2, [r3, #0]
80007ac: 605a str r2, [r3, #4]
80007ae: 609a str r2, [r3, #8]
80007b0: 60da str r2, [r3, #12]
/* USER CODE BEGIN ADC3_Init 1 */
/* USER CODE END ADC3_Init 1 */
/** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
*/
hadc3.Instance = ADC3;
80007b2: 4b22 ldr r3, [pc, #136] ; (800083c <MX_ADC3_Init+0x9c>)
80007b4: 4a22 ldr r2, [pc, #136] ; (8000840 <MX_ADC3_Init+0xa0>)
80007b6: 601a str r2, [r3, #0]
hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
80007b8: 4b20 ldr r3, [pc, #128] ; (800083c <MX_ADC3_Init+0x9c>)
80007ba: f44f 3280 mov.w r2, #65536 ; 0x10000
80007be: 605a str r2, [r3, #4]
hadc3.Init.Resolution = ADC_RESOLUTION_8B;
80007c0: 4b1e ldr r3, [pc, #120] ; (800083c <MX_ADC3_Init+0x9c>)
80007c2: f04f 7200 mov.w r2, #33554432 ; 0x2000000
80007c6: 609a str r2, [r3, #8]
hadc3.Init.ScanConvMode = DISABLE;
80007c8: 4b1c ldr r3, [pc, #112] ; (800083c <MX_ADC3_Init+0x9c>)
80007ca: 2200 movs r2, #0
80007cc: 611a str r2, [r3, #16]
hadc3.Init.ContinuousConvMode = ENABLE;
80007ce: 4b1b ldr r3, [pc, #108] ; (800083c <MX_ADC3_Init+0x9c>)
80007d0: 2201 movs r2, #1
80007d2: 761a strb r2, [r3, #24]
hadc3.Init.DiscontinuousConvMode = DISABLE;
80007d4: 4b19 ldr r3, [pc, #100] ; (800083c <MX_ADC3_Init+0x9c>)
80007d6: 2200 movs r2, #0
80007d8: f883 2020 strb.w r2, [r3, #32]
hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
80007dc: 4b17 ldr r3, [pc, #92] ; (800083c <MX_ADC3_Init+0x9c>)
80007de: 2200 movs r2, #0
80007e0: 62da str r2, [r3, #44] ; 0x2c
hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
80007e2: 4b16 ldr r3, [pc, #88] ; (800083c <MX_ADC3_Init+0x9c>)
80007e4: 4a17 ldr r2, [pc, #92] ; (8000844 <MX_ADC3_Init+0xa4>)
80007e6: 629a str r2, [r3, #40] ; 0x28
hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
80007e8: 4b14 ldr r3, [pc, #80] ; (800083c <MX_ADC3_Init+0x9c>)
80007ea: 2200 movs r2, #0
80007ec: 60da str r2, [r3, #12]
hadc3.Init.NbrOfConversion = 1;
80007ee: 4b13 ldr r3, [pc, #76] ; (800083c <MX_ADC3_Init+0x9c>)
80007f0: 2201 movs r2, #1
80007f2: 61da str r2, [r3, #28]
hadc3.Init.DMAContinuousRequests = DISABLE;
80007f4: 4b11 ldr r3, [pc, #68] ; (800083c <MX_ADC3_Init+0x9c>)
80007f6: 2200 movs r2, #0
80007f8: f883 2030 strb.w r2, [r3, #48] ; 0x30
hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
80007fc: 4b0f ldr r3, [pc, #60] ; (800083c <MX_ADC3_Init+0x9c>)
80007fe: 2201 movs r2, #1
8000800: 615a str r2, [r3, #20]
if (HAL_ADC_Init(&hadc3) != HAL_OK)
8000802: 480e ldr r0, [pc, #56] ; (800083c <MX_ADC3_Init+0x9c>)
8000804: f001 fc34 bl 8002070 <HAL_ADC_Init>
8000808: 4603 mov r3, r0
800080a: 2b00 cmp r3, #0
800080c: d001 beq.n 8000812 <MX_ADC3_Init+0x72>
{
Error_Handler();
800080e: f001 f971 bl 8001af4 <Error_Handler>
}
/** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
*/
sConfig.Channel = ADC_CHANNEL_4;
8000812: 2304 movs r3, #4
8000814: 603b str r3, [r7, #0]
sConfig.Rank = 1;
8000816: 2301 movs r3, #1
8000818: 607b str r3, [r7, #4]
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
800081a: 2300 movs r3, #0
800081c: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
800081e: 463b mov r3, r7
8000820: 4619 mov r1, r3
8000822: 4806 ldr r0, [pc, #24] ; (800083c <MX_ADC3_Init+0x9c>)
8000824: f001 fc68 bl 80020f8 <HAL_ADC_ConfigChannel>
8000828: 4603 mov r3, r0
800082a: 2b00 cmp r3, #0
800082c: d001 beq.n 8000832 <MX_ADC3_Init+0x92>
{
Error_Handler();
800082e: f001 f961 bl 8001af4 <Error_Handler>
}
/* USER CODE BEGIN ADC3_Init 2 */
/* USER CODE END ADC3_Init 2 */
}
8000832: bf00 nop
8000834: 3710 adds r7, #16
8000836: 46bd mov sp, r7
8000838: bd80 pop {r7, pc}
800083a: bf00 nop
800083c: 200003b4 .word 0x200003b4
8000840: 40012200 .word 0x40012200
8000844: 0f000001 .word 0x0f000001
08000848 <MX_SPI4_Init>:
* @brief SPI4 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI4_Init(void)
{
8000848: b580 push {r7, lr}
800084a: af00 add r7, sp, #0
/* USER CODE BEGIN SPI4_Init 1 */
/* USER CODE END SPI4_Init 1 */
/* SPI4 parameter configuration*/
hspi4.Instance = SPI4;
800084c: 4b17 ldr r3, [pc, #92] ; (80008ac <MX_SPI4_Init+0x64>)
800084e: 4a18 ldr r2, [pc, #96] ; (80008b0 <MX_SPI4_Init+0x68>)
8000850: 601a str r2, [r3, #0]
hspi4.Init.Mode = SPI_MODE_MASTER;
8000852: 4b16 ldr r3, [pc, #88] ; (80008ac <MX_SPI4_Init+0x64>)
8000854: f44f 7282 mov.w r2, #260 ; 0x104
8000858: 605a str r2, [r3, #4]
hspi4.Init.Direction = SPI_DIRECTION_2LINES;
800085a: 4b14 ldr r3, [pc, #80] ; (80008ac <MX_SPI4_Init+0x64>)
800085c: 2200 movs r2, #0
800085e: 609a str r2, [r3, #8]
hspi4.Init.DataSize = SPI_DATASIZE_8BIT;
8000860: 4b12 ldr r3, [pc, #72] ; (80008ac <MX_SPI4_Init+0x64>)
8000862: 2200 movs r2, #0
8000864: 60da str r2, [r3, #12]
hspi4.Init.CLKPolarity = SPI_POLARITY_LOW;
8000866: 4b11 ldr r3, [pc, #68] ; (80008ac <MX_SPI4_Init+0x64>)
8000868: 2200 movs r2, #0
800086a: 611a str r2, [r3, #16]
hspi4.Init.CLKPhase = SPI_PHASE_1EDGE;
800086c: 4b0f ldr r3, [pc, #60] ; (80008ac <MX_SPI4_Init+0x64>)
800086e: 2200 movs r2, #0
8000870: 615a str r2, [r3, #20]
hspi4.Init.NSS = SPI_NSS_SOFT;
8000872: 4b0e ldr r3, [pc, #56] ; (80008ac <MX_SPI4_Init+0x64>)
8000874: f44f 7200 mov.w r2, #512 ; 0x200
8000878: 619a str r2, [r3, #24]
hspi4.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
800087a: 4b0c ldr r3, [pc, #48] ; (80008ac <MX_SPI4_Init+0x64>)
800087c: 2220 movs r2, #32
800087e: 61da str r2, [r3, #28]
hspi4.Init.FirstBit = SPI_FIRSTBIT_MSB;
8000880: 4b0a ldr r3, [pc, #40] ; (80008ac <MX_SPI4_Init+0x64>)
8000882: 2200 movs r2, #0
8000884: 621a str r2, [r3, #32]
hspi4.Init.TIMode = SPI_TIMODE_DISABLE;
8000886: 4b09 ldr r3, [pc, #36] ; (80008ac <MX_SPI4_Init+0x64>)
8000888: 2200 movs r2, #0
800088a: 625a str r2, [r3, #36] ; 0x24
hspi4.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
800088c: 4b07 ldr r3, [pc, #28] ; (80008ac <MX_SPI4_Init+0x64>)
800088e: 2200 movs r2, #0
8000890: 629a str r2, [r3, #40] ; 0x28
hspi4.Init.CRCPolynomial = 10;
8000892: 4b06 ldr r3, [pc, #24] ; (80008ac <MX_SPI4_Init+0x64>)
8000894: 220a movs r2, #10
8000896: 62da str r2, [r3, #44] ; 0x2c
if (HAL_SPI_Init(&hspi4) != HAL_OK)
8000898: 4804 ldr r0, [pc, #16] ; (80008ac <MX_SPI4_Init+0x64>)
800089a: f002 fda5 bl 80033e8 <HAL_SPI_Init>
800089e: 4603 mov r3, r0
80008a0: 2b00 cmp r3, #0
80008a2: d001 beq.n 80008a8 <MX_SPI4_Init+0x60>
{
Error_Handler();
80008a4: f001 f926 bl 8001af4 <Error_Handler>
}
/* USER CODE BEGIN SPI4_Init 2 */
/* USER CODE END SPI4_Init 2 */
}
80008a8: bf00 nop
80008aa: bd80 pop {r7, pc}
80008ac: 200003fc .word 0x200003fc
80008b0: 40013400 .word 0x40013400
080008b4 <MX_TIM6_Init>:
* @brief TIM6 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM6_Init(void)
{
80008b4: b580 push {r7, lr}
80008b6: b082 sub sp, #8
80008b8: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
80008ba: 463b mov r3, r7
80008bc: 2200 movs r2, #0
80008be: 601a str r2, [r3, #0]
80008c0: 605a str r2, [r3, #4]
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
80008c2: 4b1a ldr r3, [pc, #104] ; (800092c <MX_TIM6_Init+0x78>)
80008c4: 4a1a ldr r2, [pc, #104] ; (8000930 <MX_TIM6_Init+0x7c>)
80008c6: 601a str r2, [r3, #0]
htim6.Init.Prescaler = 4000;
80008c8: 4b18 ldr r3, [pc, #96] ; (800092c <MX_TIM6_Init+0x78>)
80008ca: f44f 627a mov.w r2, #4000 ; 0xfa0
80008ce: 605a str r2, [r3, #4]
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
80008d0: 4b16 ldr r3, [pc, #88] ; (800092c <MX_TIM6_Init+0x78>)
80008d2: 2200 movs r2, #0
80008d4: 609a str r2, [r3, #8]
htim6.Init.Period = 10000;
80008d6: 4b15 ldr r3, [pc, #84] ; (800092c <MX_TIM6_Init+0x78>)
80008d8: f242 7210 movw r2, #10000 ; 0x2710
80008dc: 60da str r2, [r3, #12]
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
80008de: 4b13 ldr r3, [pc, #76] ; (800092c <MX_TIM6_Init+0x78>)
80008e0: 2280 movs r2, #128 ; 0x80
80008e2: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
80008e4: 4811 ldr r0, [pc, #68] ; (800092c <MX_TIM6_Init+0x78>)
80008e6: f003 f8e1 bl 8003aac <HAL_TIM_Base_Init>
80008ea: 4603 mov r3, r0
80008ec: 2b00 cmp r3, #0
80008ee: d001 beq.n 80008f4 <MX_TIM6_Init+0x40>
{
Error_Handler();
80008f0: f001 f900 bl 8001af4 <Error_Handler>
}
if (HAL_TIM_OnePulse_Init(&htim6, TIM_OPMODE_SINGLE) != HAL_OK)
80008f4: 2108 movs r1, #8
80008f6: 480d ldr r0, [pc, #52] ; (800092c <MX_TIM6_Init+0x78>)
80008f8: f003 f927 bl 8003b4a <HAL_TIM_OnePulse_Init>
80008fc: 4603 mov r3, r0
80008fe: 2b00 cmp r3, #0
8000900: d001 beq.n 8000906 <MX_TIM6_Init+0x52>
{
Error_Handler();
8000902: f001 f8f7 bl 8001af4 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000906: 2300 movs r3, #0
8000908: 603b str r3, [r7, #0]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800090a: 2300 movs r3, #0
800090c: 607b str r3, [r7, #4]
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
800090e: 463b mov r3, r7
8000910: 4619 mov r1, r3
8000912: 4806 ldr r0, [pc, #24] ; (800092c <MX_TIM6_Init+0x78>)
8000914: f003 fb3a bl 8003f8c <HAL_TIMEx_MasterConfigSynchronization>
8000918: 4603 mov r3, r0
800091a: 2b00 cmp r3, #0
800091c: d001 beq.n 8000922 <MX_TIM6_Init+0x6e>
{
Error_Handler();
800091e: f001 f8e9 bl 8001af4 <Error_Handler>
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
8000922: bf00 nop
8000924: 3708 adds r7, #8
8000926: 46bd mov sp, r7
8000928: bd80 pop {r7, pc}
800092a: bf00 nop
800092c: 20000454 .word 0x20000454
8000930: 40001000 .word 0x40001000
08000934 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000934: b580 push {r7, lr}
8000936: b08e sub sp, #56 ; 0x38
8000938: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
800093a: f107 0324 add.w r3, r7, #36 ; 0x24
800093e: 2200 movs r2, #0
8000940: 601a str r2, [r3, #0]
8000942: 605a str r2, [r3, #4]
8000944: 609a str r2, [r3, #8]
8000946: 60da str r2, [r3, #12]
8000948: 611a str r2, [r3, #16]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
800094a: 2300 movs r3, #0
800094c: 623b str r3, [r7, #32]
800094e: 4bb0 ldr r3, [pc, #704] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000950: 6b1b ldr r3, [r3, #48] ; 0x30
8000952: 4aaf ldr r2, [pc, #700] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000954: f043 0310 orr.w r3, r3, #16
8000958: 6313 str r3, [r2, #48] ; 0x30
800095a: 4bad ldr r3, [pc, #692] ; (8000c10 <MX_GPIO_Init+0x2dc>)
800095c: 6b1b ldr r3, [r3, #48] ; 0x30
800095e: f003 0310 and.w r3, r3, #16
8000962: 623b str r3, [r7, #32]
8000964: 6a3b ldr r3, [r7, #32]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000966: 2300 movs r3, #0
8000968: 61fb str r3, [r7, #28]
800096a: 4ba9 ldr r3, [pc, #676] ; (8000c10 <MX_GPIO_Init+0x2dc>)
800096c: 6b1b ldr r3, [r3, #48] ; 0x30
800096e: 4aa8 ldr r2, [pc, #672] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000970: f043 0304 orr.w r3, r3, #4
8000974: 6313 str r3, [r2, #48] ; 0x30
8000976: 4ba6 ldr r3, [pc, #664] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000978: 6b1b ldr r3, [r3, #48] ; 0x30
800097a: f003 0304 and.w r3, r3, #4
800097e: 61fb str r3, [r7, #28]
8000980: 69fb ldr r3, [r7, #28]
__HAL_RCC_GPIOF_CLK_ENABLE();
8000982: 2300 movs r3, #0
8000984: 61bb str r3, [r7, #24]
8000986: 4ba2 ldr r3, [pc, #648] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000988: 6b1b ldr r3, [r3, #48] ; 0x30
800098a: 4aa1 ldr r2, [pc, #644] ; (8000c10 <MX_GPIO_Init+0x2dc>)
800098c: f043 0320 orr.w r3, r3, #32
8000990: 6313 str r3, [r2, #48] ; 0x30
8000992: 4b9f ldr r3, [pc, #636] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000994: 6b1b ldr r3, [r3, #48] ; 0x30
8000996: f003 0320 and.w r3, r3, #32
800099a: 61bb str r3, [r7, #24]
800099c: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOH_CLK_ENABLE();
800099e: 2300 movs r3, #0
80009a0: 617b str r3, [r7, #20]
80009a2: 4b9b ldr r3, [pc, #620] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009a4: 6b1b ldr r3, [r3, #48] ; 0x30
80009a6: 4a9a ldr r2, [pc, #616] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009a8: f043 0380 orr.w r3, r3, #128 ; 0x80
80009ac: 6313 str r3, [r2, #48] ; 0x30
80009ae: 4b98 ldr r3, [pc, #608] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009b0: 6b1b ldr r3, [r3, #48] ; 0x30
80009b2: f003 0380 and.w r3, r3, #128 ; 0x80
80009b6: 617b str r3, [r7, #20]
80009b8: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
80009ba: 2300 movs r3, #0
80009bc: 613b str r3, [r7, #16]
80009be: 4b94 ldr r3, [pc, #592] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009c0: 6b1b ldr r3, [r3, #48] ; 0x30
80009c2: 4a93 ldr r2, [pc, #588] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009c4: f043 0301 orr.w r3, r3, #1
80009c8: 6313 str r3, [r2, #48] ; 0x30
80009ca: 4b91 ldr r3, [pc, #580] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009cc: 6b1b ldr r3, [r3, #48] ; 0x30
80009ce: f003 0301 and.w r3, r3, #1
80009d2: 613b str r3, [r7, #16]
80009d4: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
80009d6: 2300 movs r3, #0
80009d8: 60fb str r3, [r7, #12]
80009da: 4b8d ldr r3, [pc, #564] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009dc: 6b1b ldr r3, [r3, #48] ; 0x30
80009de: 4a8c ldr r2, [pc, #560] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009e0: f043 0302 orr.w r3, r3, #2
80009e4: 6313 str r3, [r2, #48] ; 0x30
80009e6: 4b8a ldr r3, [pc, #552] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009e8: 6b1b ldr r3, [r3, #48] ; 0x30
80009ea: f003 0302 and.w r3, r3, #2
80009ee: 60fb str r3, [r7, #12]
80009f0: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOG_CLK_ENABLE();
80009f2: 2300 movs r3, #0
80009f4: 60bb str r3, [r7, #8]
80009f6: 4b86 ldr r3, [pc, #536] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009f8: 6b1b ldr r3, [r3, #48] ; 0x30
80009fa: 4a85 ldr r2, [pc, #532] ; (8000c10 <MX_GPIO_Init+0x2dc>)
80009fc: f043 0340 orr.w r3, r3, #64 ; 0x40
8000a00: 6313 str r3, [r2, #48] ; 0x30
8000a02: 4b83 ldr r3, [pc, #524] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000a04: 6b1b ldr r3, [r3, #48] ; 0x30
8000a06: f003 0340 and.w r3, r3, #64 ; 0x40
8000a0a: 60bb str r3, [r7, #8]
8000a0c: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOD_CLK_ENABLE();
8000a0e: 2300 movs r3, #0
8000a10: 607b str r3, [r7, #4]
8000a12: 4b7f ldr r3, [pc, #508] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000a14: 6b1b ldr r3, [r3, #48] ; 0x30
8000a16: 4a7e ldr r2, [pc, #504] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000a18: f043 0308 orr.w r3, r3, #8
8000a1c: 6313 str r3, [r2, #48] ; 0x30
8000a1e: 4b7c ldr r3, [pc, #496] ; (8000c10 <MX_GPIO_Init+0x2dc>)
8000a20: 6b1b ldr r3, [r3, #48] ; 0x30
8000a22: f003 0308 and.w r3, r3, #8
8000a26: 607b str r3, [r7, #4]
8000a28: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
8000a2a: 2200 movs r2, #0
8000a2c: 2116 movs r1, #22
8000a2e: 4879 ldr r0, [pc, #484] ; (8000c14 <MX_GPIO_Init+0x2e0>)
8000a30: f002 f86e bl 8002b10 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
8000a34: 2200 movs r2, #0
8000a36: 2180 movs r1, #128 ; 0x80
8000a38: 4877 ldr r0, [pc, #476] ; (8000c18 <MX_GPIO_Init+0x2e4>)
8000a3a: f002 f869 bl 8002b10 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
8000a3e: 2200 movs r2, #0
8000a40: f44f 5140 mov.w r1, #12288 ; 0x3000
8000a44: 4875 ldr r0, [pc, #468] ; (8000c1c <MX_GPIO_Init+0x2e8>)
8000a46: f002 f863 bl 8002b10 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
8000a4a: 2200 movs r2, #0
8000a4c: f44f 41c0 mov.w r1, #24576 ; 0x6000
8000a50: 4873 ldr r0, [pc, #460] ; (8000c20 <MX_GPIO_Init+0x2ec>)
8000a52: f002 f85d bl 8002b10 <HAL_GPIO_WritePin>
/*Configure GPIO pins : A0_Pin A1_Pin A2_Pin A3_Pin
A4_Pin A5_Pin SDNRAS_Pin A6_Pin
A7_Pin A8_Pin A9_Pin */
GPIO_InitStruct.Pin = A0_Pin|A1_Pin|A2_Pin|A3_Pin
8000a56: f64f 033f movw r3, #63551 ; 0xf83f
8000a5a: 627b str r3, [r7, #36] ; 0x24
|A4_Pin|A5_Pin|SDNRAS_Pin|A6_Pin
|A7_Pin|A8_Pin|A9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000a5c: 2302 movs r3, #2
8000a5e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a60: 2300 movs r3, #0
8000a62: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000a64: 2303 movs r3, #3
8000a66: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000a68: 230c movs r3, #12
8000a6a: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8000a6c: f107 0324 add.w r3, r7, #36 ; 0x24
8000a70: 4619 mov r1, r3
8000a72: 486c ldr r0, [pc, #432] ; (8000c24 <MX_GPIO_Init+0x2f0>)
8000a74: f001 fea2 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : SPI5_SCK_Pin SPI5_MISO_Pin SPI5_MOSI_Pin */
GPIO_InitStruct.Pin = SPI5_SCK_Pin|SPI5_MISO_Pin|SPI5_MOSI_Pin;
8000a78: f44f 7360 mov.w r3, #896 ; 0x380
8000a7c: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000a7e: 2302 movs r3, #2
8000a80: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a82: 2300 movs r3, #0
8000a84: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000a86: 2300 movs r3, #0
8000a88: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
8000a8a: 2305 movs r3, #5
8000a8c: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8000a8e: f107 0324 add.w r3, r7, #36 ; 0x24
8000a92: 4619 mov r1, r3
8000a94: 4863 ldr r0, [pc, #396] ; (8000c24 <MX_GPIO_Init+0x2f0>)
8000a96: f001 fe91 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : ENABLE_Pin */
GPIO_InitStruct.Pin = ENABLE_Pin;
8000a9a: f44f 6380 mov.w r3, #1024 ; 0x400
8000a9e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000aa0: 2302 movs r3, #2
8000aa2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000aa4: 2300 movs r3, #0
8000aa6: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000aa8: 2300 movs r3, #0
8000aaa: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000aac: 230e movs r3, #14
8000aae: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(ENABLE_GPIO_Port, &GPIO_InitStruct);
8000ab0: f107 0324 add.w r3, r7, #36 ; 0x24
8000ab4: 4619 mov r1, r3
8000ab6: 485b ldr r0, [pc, #364] ; (8000c24 <MX_GPIO_Init+0x2f0>)
8000ab8: f001 fe80 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : SDNWE_Pin */
GPIO_InitStruct.Pin = SDNWE_Pin;
8000abc: 2301 movs r3, #1
8000abe: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000ac0: 2302 movs r3, #2
8000ac2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ac4: 2300 movs r3, #0
8000ac6: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000ac8: 2303 movs r3, #3
8000aca: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000acc: 230c movs r3, #12
8000ace: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(SDNWE_GPIO_Port, &GPIO_InitStruct);
8000ad0: f107 0324 add.w r3, r7, #36 ; 0x24
8000ad4: 4619 mov r1, r3
8000ad6: 484f ldr r0, [pc, #316] ; (8000c14 <MX_GPIO_Init+0x2e0>)
8000ad8: f001 fe70 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
8000adc: 2316 movs r3, #22
8000ade: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000ae0: 2301 movs r3, #1
8000ae2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ae4: 2300 movs r3, #0
8000ae6: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000ae8: 2300 movs r3, #0
8000aea: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000aec: f107 0324 add.w r3, r7, #36 ; 0x24
8000af0: 4619 mov r1, r3
8000af2: 4848 ldr r0, [pc, #288] ; (8000c14 <MX_GPIO_Init+0x2e0>)
8000af4: f001 fe62 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : B1_Pin */
GPIO_InitStruct.Pin = B1_Pin;
8000af8: 2301 movs r3, #1
8000afa: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
8000afc: 4b4a ldr r3, [pc, #296] ; (8000c28 <MX_GPIO_Init+0x2f4>)
8000afe: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b00: 2300 movs r3, #0
8000b02: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
8000b04: f107 0324 add.w r3, r7, #36 ; 0x24
8000b08: 4619 mov r1, r3
8000b0a: 4843 ldr r0, [pc, #268] ; (8000c18 <MX_GPIO_Init+0x2e4>)
8000b0c: f001 fe56 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
GPIO_InitStruct.Pin = MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
8000b10: f248 0306 movw r3, #32774 ; 0x8006
8000b14: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
8000b16: 4b45 ldr r3, [pc, #276] ; (8000c2c <MX_GPIO_Init+0x2f8>)
8000b18: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b1a: 2300 movs r3, #0
8000b1c: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000b1e: f107 0324 add.w r3, r7, #36 ; 0x24
8000b22: 4619 mov r1, r3
8000b24: 483c ldr r0, [pc, #240] ; (8000c18 <MX_GPIO_Init+0x2e4>)
8000b26: f001 fe49 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : B5_Pin VSYNC_Pin G2_Pin R4_Pin
R5_Pin */
GPIO_InitStruct.Pin = B5_Pin|VSYNC_Pin|G2_Pin|R4_Pin
8000b2a: f641 0358 movw r3, #6232 ; 0x1858
8000b2e: 627b str r3, [r7, #36] ; 0x24
|R5_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b30: 2302 movs r3, #2
8000b32: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b34: 2300 movs r3, #0
8000b36: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b38: 2300 movs r3, #0
8000b3a: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000b3c: 230e movs r3, #14
8000b3e: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000b40: f107 0324 add.w r3, r7, #36 ; 0x24
8000b44: 4619 mov r1, r3
8000b46: 4834 ldr r0, [pc, #208] ; (8000c18 <MX_GPIO_Init+0x2e4>)
8000b48: f001 fe38 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : ACP_RST_Pin */
GPIO_InitStruct.Pin = ACP_RST_Pin;
8000b4c: 2380 movs r3, #128 ; 0x80
8000b4e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000b50: 2301 movs r3, #1
8000b52: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b54: 2300 movs r3, #0
8000b56: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b58: 2300 movs r3, #0
8000b5a: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
8000b5c: f107 0324 add.w r3, r7, #36 ; 0x24
8000b60: 4619 mov r1, r3
8000b62: 482d ldr r0, [pc, #180] ; (8000c18 <MX_GPIO_Init+0x2e4>)
8000b64: f001 fe2a bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : OTG_FS_OC_Pin */
GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
8000b68: 2320 movs r3, #32
8000b6a: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
8000b6c: 4b2f ldr r3, [pc, #188] ; (8000c2c <MX_GPIO_Init+0x2f8>)
8000b6e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b70: 2300 movs r3, #0
8000b72: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
8000b74: f107 0324 add.w r3, r7, #36 ; 0x24
8000b78: 4619 mov r1, r3
8000b7a: 4826 ldr r0, [pc, #152] ; (8000c14 <MX_GPIO_Init+0x2e0>)
8000b7c: f001 fe1e bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : R3_Pin R6_Pin */
GPIO_InitStruct.Pin = R3_Pin|R6_Pin;
8000b80: 2303 movs r3, #3
8000b82: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b84: 2302 movs r3, #2
8000b86: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000b88: 2300 movs r3, #0
8000b8a: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b8c: 2300 movs r3, #0
8000b8e: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
8000b90: 2309 movs r3, #9
8000b92: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000b94: f107 0324 add.w r3, r7, #36 ; 0x24
8000b98: 4619 mov r1, r3
8000b9a: 4825 ldr r0, [pc, #148] ; (8000c30 <MX_GPIO_Init+0x2fc>)
8000b9c: f001 fe0e bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : BOOT1_Pin */
GPIO_InitStruct.Pin = BOOT1_Pin;
8000ba0: 2304 movs r3, #4
8000ba2: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000ba4: 2300 movs r3, #0
8000ba6: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ba8: 2300 movs r3, #0
8000baa: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
8000bac: f107 0324 add.w r3, r7, #36 ; 0x24
8000bb0: 4619 mov r1, r3
8000bb2: 481f ldr r0, [pc, #124] ; (8000c30 <MX_GPIO_Init+0x2fc>)
8000bb4: f001 fe02 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : A10_Pin A11_Pin BA0_Pin BA1_Pin
SDCLK_Pin SDNCAS_Pin */
GPIO_InitStruct.Pin = A10_Pin|A11_Pin|BA0_Pin|BA1_Pin
8000bb8: f248 1333 movw r3, #33075 ; 0x8133
8000bbc: 627b str r3, [r7, #36] ; 0x24
|SDCLK_Pin|SDNCAS_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000bbe: 2302 movs r3, #2
8000bc0: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000bc2: 2300 movs r3, #0
8000bc4: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000bc6: 2303 movs r3, #3
8000bc8: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000bca: 230c movs r3, #12
8000bcc: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000bce: f107 0324 add.w r3, r7, #36 ; 0x24
8000bd2: 4619 mov r1, r3
8000bd4: 4812 ldr r0, [pc, #72] ; (8000c20 <MX_GPIO_Init+0x2ec>)
8000bd6: f001 fdf1 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : D4_Pin D5_Pin D6_Pin D7_Pin
D8_Pin D9_Pin D10_Pin D11_Pin
D12_Pin NBL0_Pin NBL1_Pin */
GPIO_InitStruct.Pin = D4_Pin|D5_Pin|D6_Pin|D7_Pin
8000bda: f64f 7383 movw r3, #65411 ; 0xff83
8000bde: 627b str r3, [r7, #36] ; 0x24
|D8_Pin|D9_Pin|D10_Pin|D11_Pin
|D12_Pin|NBL0_Pin|NBL1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000be0: 2302 movs r3, #2
8000be2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000be4: 2300 movs r3, #0
8000be6: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000be8: 2303 movs r3, #3
8000bea: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000bec: 230c movs r3, #12
8000bee: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8000bf0: f107 0324 add.w r3, r7, #36 ; 0x24
8000bf4: 4619 mov r1, r3
8000bf6: 480f ldr r0, [pc, #60] ; (8000c34 <MX_GPIO_Init+0x300>)
8000bf8: f001 fde0 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : G4_Pin G5_Pin B6_Pin B7_Pin */
GPIO_InitStruct.Pin = G4_Pin|G5_Pin|B6_Pin|B7_Pin;
8000bfc: f44f 6370 mov.w r3, #3840 ; 0xf00
8000c00: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c02: 2302 movs r3, #2
8000c04: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c06: 2300 movs r3, #0
8000c08: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c0a: 2300 movs r3, #0
8000c0c: 633b str r3, [r7, #48] ; 0x30
8000c0e: e013 b.n 8000c38 <MX_GPIO_Init+0x304>
8000c10: 40023800 .word 0x40023800
8000c14: 40020800 .word 0x40020800
8000c18: 40020000 .word 0x40020000
8000c1c: 40020c00 .word 0x40020c00
8000c20: 40021800 .word 0x40021800
8000c24: 40021400 .word 0x40021400
8000c28: 10110000 .word 0x10110000
8000c2c: 10120000 .word 0x10120000
8000c30: 40020400 .word 0x40020400
8000c34: 40021000 .word 0x40021000
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000c38: 230e movs r3, #14
8000c3a: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000c3c: f107 0324 add.w r3, r7, #36 ; 0x24
8000c40: 4619 mov r1, r3
8000c42: 4877 ldr r0, [pc, #476] ; (8000e20 <MX_GPIO_Init+0x4ec>)
8000c44: f001 fdba bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : OTG_HS_ID_Pin OTG_HS_DM_Pin OTG_HS_DP_Pin */
GPIO_InitStruct.Pin = OTG_HS_ID_Pin|OTG_HS_DM_Pin|OTG_HS_DP_Pin;
8000c48: f44f 4350 mov.w r3, #53248 ; 0xd000
8000c4c: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c4e: 2302 movs r3, #2
8000c50: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c52: 2300 movs r3, #0
8000c54: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c56: 2300 movs r3, #0
8000c58: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
8000c5a: 230c movs r3, #12
8000c5c: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000c5e: f107 0324 add.w r3, r7, #36 ; 0x24
8000c62: 4619 mov r1, r3
8000c64: 486e ldr r0, [pc, #440] ; (8000e20 <MX_GPIO_Init+0x4ec>)
8000c66: f001 fda9 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : VBUS_HS_Pin */
GPIO_InitStruct.Pin = VBUS_HS_Pin;
8000c6a: f44f 5300 mov.w r3, #8192 ; 0x2000
8000c6e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000c70: 2300 movs r3, #0
8000c72: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c74: 2300 movs r3, #0
8000c76: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(VBUS_HS_GPIO_Port, &GPIO_InitStruct);
8000c78: f107 0324 add.w r3, r7, #36 ; 0x24
8000c7c: 4619 mov r1, r3
8000c7e: 4868 ldr r0, [pc, #416] ; (8000e20 <MX_GPIO_Init+0x4ec>)
8000c80: f001 fd9c bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : D13_Pin D14_Pin D15_Pin D0_Pin
D1_Pin D2_Pin D3_Pin */
GPIO_InitStruct.Pin = D13_Pin|D14_Pin|D15_Pin|D0_Pin
8000c84: f24c 7303 movw r3, #50947 ; 0xc703
8000c88: 627b str r3, [r7, #36] ; 0x24
|D1_Pin|D2_Pin|D3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c8a: 2302 movs r3, #2
8000c8c: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c8e: 2300 movs r3, #0
8000c90: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000c92: 2303 movs r3, #3
8000c94: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000c96: 230c movs r3, #12
8000c98: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000c9a: f107 0324 add.w r3, r7, #36 ; 0x24
8000c9e: 4619 mov r1, r3
8000ca0: 4860 ldr r0, [pc, #384] ; (8000e24 <MX_GPIO_Init+0x4f0>)
8000ca2: f001 fd8b bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : TE_Pin */
GPIO_InitStruct.Pin = TE_Pin;
8000ca6: f44f 6300 mov.w r3, #2048 ; 0x800
8000caa: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000cac: 2300 movs r3, #0
8000cae: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000cb0: 2300 movs r3, #0
8000cb2: 62fb str r3, [r7, #44] ; 0x2c
HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
8000cb4: f107 0324 add.w r3, r7, #36 ; 0x24
8000cb8: 4619 mov r1, r3
8000cba: 485a ldr r0, [pc, #360] ; (8000e24 <MX_GPIO_Init+0x4f0>)
8000cbc: f001 fd7e bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
8000cc0: f44f 5340 mov.w r3, #12288 ; 0x3000
8000cc4: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000cc6: 2301 movs r3, #1
8000cc8: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000cca: 2300 movs r3, #0
8000ccc: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000cce: 2300 movs r3, #0
8000cd0: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000cd2: f107 0324 add.w r3, r7, #36 ; 0x24
8000cd6: 4619 mov r1, r3
8000cd8: 4852 ldr r0, [pc, #328] ; (8000e24 <MX_GPIO_Init+0x4f0>)
8000cda: f001 fd6f bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : R7_Pin DOTCLK_Pin B3_Pin */
GPIO_InitStruct.Pin = R7_Pin|DOTCLK_Pin|B3_Pin;
8000cde: f44f 630c mov.w r3, #2240 ; 0x8c0
8000ce2: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000ce4: 2302 movs r3, #2
8000ce6: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ce8: 2300 movs r3, #0
8000cea: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000cec: 2300 movs r3, #0
8000cee: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000cf0: 230e movs r3, #14
8000cf2: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000cf4: f107 0324 add.w r3, r7, #36 ; 0x24
8000cf8: 4619 mov r1, r3
8000cfa: 484b ldr r0, [pc, #300] ; (8000e28 <MX_GPIO_Init+0x4f4>)
8000cfc: f001 fd5e bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : HSYNC_Pin G6_Pin R2_Pin */
GPIO_InitStruct.Pin = HSYNC_Pin|G6_Pin|R2_Pin;
8000d00: f44f 6398 mov.w r3, #1216 ; 0x4c0
8000d04: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000d06: 2302 movs r3, #2
8000d08: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000d0a: 2300 movs r3, #0
8000d0c: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000d0e: 2300 movs r3, #0
8000d10: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000d12: 230e movs r3, #14
8000d14: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000d16: f107 0324 add.w r3, r7, #36 ; 0x24
8000d1a: 4619 mov r1, r3
8000d1c: 4843 ldr r0, [pc, #268] ; (8000e2c <MX_GPIO_Init+0x4f8>)
8000d1e: f001 fd4d bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : I2C3_SDA_Pin */
GPIO_InitStruct.Pin = I2C3_SDA_Pin;
8000d22: f44f 7300 mov.w r3, #512 ; 0x200
8000d26: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000d28: 2312 movs r3, #18
8000d2a: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_PULLUP;
8000d2c: 2301 movs r3, #1
8000d2e: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000d30: 2300 movs r3, #0
8000d32: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
8000d34: 2304 movs r3, #4
8000d36: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2C3_SDA_GPIO_Port, &GPIO_InitStruct);
8000d38: f107 0324 add.w r3, r7, #36 ; 0x24
8000d3c: 4619 mov r1, r3
8000d3e: 483b ldr r0, [pc, #236] ; (8000e2c <MX_GPIO_Init+0x4f8>)
8000d40: f001 fd3c bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pin : I2C3_SCL_Pin */
GPIO_InitStruct.Pin = I2C3_SCL_Pin;
8000d44: f44f 7380 mov.w r3, #256 ; 0x100
8000d48: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000d4a: 2312 movs r3, #18
8000d4c: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_PULLUP;
8000d4e: 2301 movs r3, #1
8000d50: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000d52: 2300 movs r3, #0
8000d54: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
8000d56: 2304 movs r3, #4
8000d58: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2C3_SCL_GPIO_Port, &GPIO_InitStruct);
8000d5a: f107 0324 add.w r3, r7, #36 ; 0x24
8000d5e: 4619 mov r1, r3
8000d60: 4833 ldr r0, [pc, #204] ; (8000e30 <MX_GPIO_Init+0x4fc>)
8000d62: f001 fd2b bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : STLINK_RX_Pin STLINK_TX_Pin */
GPIO_InitStruct.Pin = STLINK_RX_Pin|STLINK_TX_Pin;
8000d66: f44f 63c0 mov.w r3, #1536 ; 0x600
8000d6a: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000d6c: 2302 movs r3, #2
8000d6e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000d70: 2300 movs r3, #0
8000d72: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000d74: 2303 movs r3, #3
8000d76: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
8000d78: 2307 movs r3, #7
8000d7a: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000d7c: f107 0324 add.w r3, r7, #36 ; 0x24
8000d80: 4619 mov r1, r3
8000d82: 482b ldr r0, [pc, #172] ; (8000e30 <MX_GPIO_Init+0x4fc>)
8000d84: f001 fd1a bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : G7_Pin B2_Pin */
GPIO_InitStruct.Pin = G7_Pin|B2_Pin;
8000d88: 2348 movs r3, #72 ; 0x48
8000d8a: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000d8c: 2302 movs r3, #2
8000d8e: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000d90: 2300 movs r3, #0
8000d92: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000d94: 2300 movs r3, #0
8000d96: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
8000d98: 230e movs r3, #14
8000d9a: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000d9c: f107 0324 add.w r3, r7, #36 ; 0x24
8000da0: 4619 mov r1, r3
8000da2: 4820 ldr r0, [pc, #128] ; (8000e24 <MX_GPIO_Init+0x4f0>)
8000da4: f001 fd0a bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : G3_Pin B4_Pin */
GPIO_InitStruct.Pin = G3_Pin|B4_Pin;
8000da8: f44f 53a0 mov.w r3, #5120 ; 0x1400
8000dac: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000dae: 2302 movs r3, #2
8000db0: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000db2: 2300 movs r3, #0
8000db4: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000db6: 2300 movs r3, #0
8000db8: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
8000dba: 2309 movs r3, #9
8000dbc: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000dbe: f107 0324 add.w r3, r7, #36 ; 0x24
8000dc2: 4619 mov r1, r3
8000dc4: 4818 ldr r0, [pc, #96] ; (8000e28 <MX_GPIO_Init+0x4f4>)
8000dc6: f001 fcf9 bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : LD3_Pin LD4_Pin */
GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
8000dca: f44f 43c0 mov.w r3, #24576 ; 0x6000
8000dce: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000dd0: 2301 movs r3, #1
8000dd2: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000dd4: 2300 movs r3, #0
8000dd6: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000dd8: 2300 movs r3, #0
8000dda: 633b str r3, [r7, #48] ; 0x30
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
8000ddc: f107 0324 add.w r3, r7, #36 ; 0x24
8000de0: 4619 mov r1, r3
8000de2: 4811 ldr r0, [pc, #68] ; (8000e28 <MX_GPIO_Init+0x4f4>)
8000de4: f001 fcea bl 80027bc <HAL_GPIO_Init>
/*Configure GPIO pins : SDCKE1_Pin SDNE1_Pin */
GPIO_InitStruct.Pin = SDCKE1_Pin|SDNE1_Pin;
8000de8: 2360 movs r3, #96 ; 0x60
8000dea: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000dec: 2302 movs r3, #2
8000dee: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000df0: 2300 movs r3, #0
8000df2: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000df4: 2303 movs r3, #3
8000df6: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
8000df8: 230c movs r3, #12
8000dfa: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000dfc: f107 0324 add.w r3, r7, #36 ; 0x24
8000e00: 4619 mov r1, r3
8000e02: 4807 ldr r0, [pc, #28] ; (8000e20 <MX_GPIO_Init+0x4ec>)
8000e04: f001 fcda bl 80027bc <HAL_GPIO_Init>
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);
8000e08: 2200 movs r2, #0
8000e0a: 2100 movs r1, #0
8000e0c: 2006 movs r0, #6
8000e0e: f001 fc7c bl 800270a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(EXTI0_IRQn);
8000e12: 2006 movs r0, #6
8000e14: f001 fc95 bl 8002742 <HAL_NVIC_EnableIRQ>
}
8000e18: bf00 nop
8000e1a: 3738 adds r7, #56 ; 0x38
8000e1c: 46bd mov sp, r7
8000e1e: bd80 pop {r7, pc}
8000e20: 40020400 .word 0x40020400
8000e24: 40020c00 .word 0x40020c00
8000e28: 40021800 .word 0x40021800
8000e2c: 40020800 .word 0x40020800
8000e30: 40020000 .word 0x40020000
08000e34 <updateWS2812BData>:
/* USER CODE BEGIN 4 */
void updateWS2812BData(void){
8000e34: b490 push {r4, r7}
8000e36: b082 sub sp, #8
8000e38: af00 add r7, sp, #0
uint8_t byteToConvert;
for (uint8_t i = 0; i < 64; ++i) {
8000e3a: 2300 movs r3, #0
8000e3c: 71fb strb r3, [r7, #7]
8000e3e: e18b b.n 8001158 <updateWS2812BData+0x324>
for (uint8_t j = 0; j < 3; ++j) {
8000e40: 2300 movs r3, #0
8000e42: 71bb strb r3, [r7, #6]
8000e44: e181 b.n 800114a <updateWS2812BData+0x316>
byteToConvert = LEDData[i][j];
8000e46: 79fa ldrb r2, [r7, #7]
8000e48: 79b9 ldrb r1, [r7, #6]
8000e4a: 488e ldr r0, [pc, #568] ; (8001084 <updateWS2812BData+0x250>)
8000e4c: 4613 mov r3, r2
8000e4e: 005b lsls r3, r3, #1
8000e50: 4413 add r3, r2
8000e52: 4403 add r3, r0
8000e54: 440b add r3, r1
8000e56: 781b ldrb r3, [r3, #0]
8000e58: 717b strb r3, [r7, #5]
switch((byteToConvert & 0xF0) >> 4){
8000e5a: 797b ldrb r3, [r7, #5]
8000e5c: 091b lsrs r3, r3, #4
8000e5e: b2db uxtb r3, r3
8000e60: 2b0e cmp r3, #14
8000e62: d85d bhi.n 8000f20 <updateWS2812BData+0xec>
8000e64: a201 add r2, pc, #4 ; (adr r2, 8000e6c <updateWS2812BData+0x38>)
8000e66: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000e6a: bf00 nop
8000e6c: 08000ea9 .word 0x08000ea9
8000e70: 08000eb1 .word 0x08000eb1
8000e74: 08000eb9 .word 0x08000eb9
8000e78: 08000ec1 .word 0x08000ec1
8000e7c: 08000ec9 .word 0x08000ec9
8000e80: 08000ed1 .word 0x08000ed1
8000e84: 08000ed9 .word 0x08000ed9
8000e88: 08000ee1 .word 0x08000ee1
8000e8c: 08000ee9 .word 0x08000ee9
8000e90: 08000ef1 .word 0x08000ef1
8000e94: 08000ef9 .word 0x08000ef9
8000e98: 08000f01 .word 0x08000f01
8000e9c: 08000f09 .word 0x08000f09
8000ea0: 08000f11 .word 0x08000f11
8000ea4: 08000f19 .word 0x08000f19
case 0x00:
WS2812BConvertedData = 0x00924000;
8000ea8: 4b77 ldr r3, [pc, #476] ; (8001088 <updateWS2812BData+0x254>)
8000eaa: 4a78 ldr r2, [pc, #480] ; (800108c <updateWS2812BData+0x258>)
8000eac: 601a str r2, [r3, #0]
break;
8000eae: e03a b.n 8000f26 <updateWS2812BData+0xf2>
case 0x01:
WS2812BConvertedData = 0x00926000;
8000eb0: 4b75 ldr r3, [pc, #468] ; (8001088 <updateWS2812BData+0x254>)
8000eb2: 4a77 ldr r2, [pc, #476] ; (8001090 <updateWS2812BData+0x25c>)
8000eb4: 601a str r2, [r3, #0]
break;
8000eb6: e036 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x02:
WS2812BConvertedData = 0x00934000;
8000eb8: 4b73 ldr r3, [pc, #460] ; (8001088 <updateWS2812BData+0x254>)
8000eba: 4a76 ldr r2, [pc, #472] ; (8001094 <updateWS2812BData+0x260>)
8000ebc: 601a str r2, [r3, #0]
break;
8000ebe: e032 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x03:
WS2812BConvertedData = 0x00936000;
8000ec0: 4b71 ldr r3, [pc, #452] ; (8001088 <updateWS2812BData+0x254>)
8000ec2: 4a75 ldr r2, [pc, #468] ; (8001098 <updateWS2812BData+0x264>)
8000ec4: 601a str r2, [r3, #0]
break;
8000ec6: e02e b.n 8000f26 <updateWS2812BData+0xf2>
case 0x04:
WS2812BConvertedData = 0x009A4000;
8000ec8: 4b6f ldr r3, [pc, #444] ; (8001088 <updateWS2812BData+0x254>)
8000eca: 4a74 ldr r2, [pc, #464] ; (800109c <updateWS2812BData+0x268>)
8000ecc: 601a str r2, [r3, #0]
break;
8000ece: e02a b.n 8000f26 <updateWS2812BData+0xf2>
case 0x05:
WS2812BConvertedData = 0x009A6000;
8000ed0: 4b6d ldr r3, [pc, #436] ; (8001088 <updateWS2812BData+0x254>)
8000ed2: 4a73 ldr r2, [pc, #460] ; (80010a0 <updateWS2812BData+0x26c>)
8000ed4: 601a str r2, [r3, #0]
break;
8000ed6: e026 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x06:
WS2812BConvertedData = 0x009B4000;
8000ed8: 4b6b ldr r3, [pc, #428] ; (8001088 <updateWS2812BData+0x254>)
8000eda: 4a72 ldr r2, [pc, #456] ; (80010a4 <updateWS2812BData+0x270>)
8000edc: 601a str r2, [r3, #0]
break;
8000ede: e022 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x07:
WS2812BConvertedData = 0x009B6000;
8000ee0: 4b69 ldr r3, [pc, #420] ; (8001088 <updateWS2812BData+0x254>)
8000ee2: 4a71 ldr r2, [pc, #452] ; (80010a8 <updateWS2812BData+0x274>)
8000ee4: 601a str r2, [r3, #0]
break;
8000ee6: e01e b.n 8000f26 <updateWS2812BData+0xf2>
case 0x08:
WS2812BConvertedData = 0x00D24000;
8000ee8: 4b67 ldr r3, [pc, #412] ; (8001088 <updateWS2812BData+0x254>)
8000eea: 4a70 ldr r2, [pc, #448] ; (80010ac <updateWS2812BData+0x278>)
8000eec: 601a str r2, [r3, #0]
break;
8000eee: e01a b.n 8000f26 <updateWS2812BData+0xf2>
case 0x09:
WS2812BConvertedData = 0x00D26000;
8000ef0: 4b65 ldr r3, [pc, #404] ; (8001088 <updateWS2812BData+0x254>)
8000ef2: 4a6f ldr r2, [pc, #444] ; (80010b0 <updateWS2812BData+0x27c>)
8000ef4: 601a str r2, [r3, #0]
break;
8000ef6: e016 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x0A:
WS2812BConvertedData = 0x00D34000;
8000ef8: 4b63 ldr r3, [pc, #396] ; (8001088 <updateWS2812BData+0x254>)
8000efa: 4a6e ldr r2, [pc, #440] ; (80010b4 <updateWS2812BData+0x280>)
8000efc: 601a str r2, [r3, #0]
break;
8000efe: e012 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x0B:
WS2812BConvertedData = 0x00D36000;
8000f00: 4b61 ldr r3, [pc, #388] ; (8001088 <updateWS2812BData+0x254>)
8000f02: 4a6d ldr r2, [pc, #436] ; (80010b8 <updateWS2812BData+0x284>)
8000f04: 601a str r2, [r3, #0]
break;
8000f06: e00e b.n 8000f26 <updateWS2812BData+0xf2>
case 0x0C:
WS2812BConvertedData = 0x00DA4000;
8000f08: 4b5f ldr r3, [pc, #380] ; (8001088 <updateWS2812BData+0x254>)
8000f0a: 4a6c ldr r2, [pc, #432] ; (80010bc <updateWS2812BData+0x288>)
8000f0c: 601a str r2, [r3, #0]
break;
8000f0e: e00a b.n 8000f26 <updateWS2812BData+0xf2>
case 0x0D:
WS2812BConvertedData = 0x00DA6000;
8000f10: 4b5d ldr r3, [pc, #372] ; (8001088 <updateWS2812BData+0x254>)
8000f12: 4a6b ldr r2, [pc, #428] ; (80010c0 <updateWS2812BData+0x28c>)
8000f14: 601a str r2, [r3, #0]
break;
8000f16: e006 b.n 8000f26 <updateWS2812BData+0xf2>
case 0x0E:
WS2812BConvertedData = 0x00DB4000;
8000f18: 4b5b ldr r3, [pc, #364] ; (8001088 <updateWS2812BData+0x254>)
8000f1a: 4a6a ldr r2, [pc, #424] ; (80010c4 <updateWS2812BData+0x290>)
8000f1c: 601a str r2, [r3, #0]
break;
8000f1e: e002 b.n 8000f26 <updateWS2812BData+0xf2>
default: // 0x0F
WS2812BConvertedData = 0x00DB6000;
8000f20: 4b59 ldr r3, [pc, #356] ; (8001088 <updateWS2812BData+0x254>)
8000f22: 4a69 ldr r2, [pc, #420] ; (80010c8 <updateWS2812BData+0x294>)
8000f24: 601a str r2, [r3, #0]
}
switch(byteToConvert & 0x0F){
8000f26: 797b ldrb r3, [r7, #5]
8000f28: f003 030f and.w r3, r3, #15
8000f2c: 2b0e cmp r3, #14
8000f2e: f200 80cd bhi.w 80010cc <updateWS2812BData+0x298>
8000f32: a201 add r2, pc, #4 ; (adr r2, 8000f38 <updateWS2812BData+0x104>)
8000f34: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000f38: 08000f75 .word 0x08000f75
8000f3c: 08000f87 .word 0x08000f87
8000f40: 08000f99 .word 0x08000f99
8000f44: 08000fab .word 0x08000fab
8000f48: 08000fbd .word 0x08000fbd
8000f4c: 08000fcf .word 0x08000fcf
8000f50: 08000fe1 .word 0x08000fe1
8000f54: 08000ff3 .word 0x08000ff3
8000f58: 08001005 .word 0x08001005
8000f5c: 08001017 .word 0x08001017
8000f60: 08001029 .word 0x08001029
8000f64: 0800103b .word 0x0800103b
8000f68: 0800104d .word 0x0800104d
8000f6c: 0800105f .word 0x0800105f
8000f70: 08001071 .word 0x08001071
case 0x00:
WS2812BConvertedData |= 0x00000924;
8000f74: 4b44 ldr r3, [pc, #272] ; (8001088 <updateWS2812BData+0x254>)
8000f76: 681b ldr r3, [r3, #0]
8000f78: f443 6312 orr.w r3, r3, #2336 ; 0x920
8000f7c: f043 0304 orr.w r3, r3, #4
8000f80: 4a41 ldr r2, [pc, #260] ; (8001088 <updateWS2812BData+0x254>)
8000f82: 6013 str r3, [r2, #0]
break;
8000f84: e0aa b.n 80010dc <updateWS2812BData+0x2a8>
case 0x01:
WS2812BConvertedData |= 0x00000926;
8000f86: 4b40 ldr r3, [pc, #256] ; (8001088 <updateWS2812BData+0x254>)
8000f88: 681b ldr r3, [r3, #0]
8000f8a: f443 6312 orr.w r3, r3, #2336 ; 0x920
8000f8e: f043 0306 orr.w r3, r3, #6
8000f92: 4a3d ldr r2, [pc, #244] ; (8001088 <updateWS2812BData+0x254>)
8000f94: 6013 str r3, [r2, #0]
break;
8000f96: e0a1 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x02:
WS2812BConvertedData |= 0x00000934;
8000f98: 4b3b ldr r3, [pc, #236] ; (8001088 <updateWS2812BData+0x254>)
8000f9a: 681b ldr r3, [r3, #0]
8000f9c: f443 6313 orr.w r3, r3, #2352 ; 0x930
8000fa0: f043 0304 orr.w r3, r3, #4
8000fa4: 4a38 ldr r2, [pc, #224] ; (8001088 <updateWS2812BData+0x254>)
8000fa6: 6013 str r3, [r2, #0]
break;
8000fa8: e098 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x03:
WS2812BConvertedData |= 0x00000936;
8000faa: 4b37 ldr r3, [pc, #220] ; (8001088 <updateWS2812BData+0x254>)
8000fac: 681b ldr r3, [r3, #0]
8000fae: f443 6313 orr.w r3, r3, #2352 ; 0x930
8000fb2: f043 0306 orr.w r3, r3, #6
8000fb6: 4a34 ldr r2, [pc, #208] ; (8001088 <updateWS2812BData+0x254>)
8000fb8: 6013 str r3, [r2, #0]
break;
8000fba: e08f b.n 80010dc <updateWS2812BData+0x2a8>
case 0x04:
WS2812BConvertedData |= 0x000009A4;
8000fbc: 4b32 ldr r3, [pc, #200] ; (8001088 <updateWS2812BData+0x254>)
8000fbe: 681b ldr r3, [r3, #0]
8000fc0: f443 631a orr.w r3, r3, #2464 ; 0x9a0
8000fc4: f043 0304 orr.w r3, r3, #4
8000fc8: 4a2f ldr r2, [pc, #188] ; (8001088 <updateWS2812BData+0x254>)
8000fca: 6013 str r3, [r2, #0]
break;
8000fcc: e086 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x05:
WS2812BConvertedData |= 0x000009A6;
8000fce: 4b2e ldr r3, [pc, #184] ; (8001088 <updateWS2812BData+0x254>)
8000fd0: 681b ldr r3, [r3, #0]
8000fd2: f443 631a orr.w r3, r3, #2464 ; 0x9a0
8000fd6: f043 0306 orr.w r3, r3, #6
8000fda: 4a2b ldr r2, [pc, #172] ; (8001088 <updateWS2812BData+0x254>)
8000fdc: 6013 str r3, [r2, #0]
break;
8000fde: e07d b.n 80010dc <updateWS2812BData+0x2a8>
case 0x06:
WS2812BConvertedData |= 0x000009B4;
8000fe0: 4b29 ldr r3, [pc, #164] ; (8001088 <updateWS2812BData+0x254>)
8000fe2: 681b ldr r3, [r3, #0]
8000fe4: f443 631b orr.w r3, r3, #2480 ; 0x9b0
8000fe8: f043 0304 orr.w r3, r3, #4
8000fec: 4a26 ldr r2, [pc, #152] ; (8001088 <updateWS2812BData+0x254>)
8000fee: 6013 str r3, [r2, #0]
break;
8000ff0: e074 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x07:
WS2812BConvertedData |= 0x000009B6;
8000ff2: 4b25 ldr r3, [pc, #148] ; (8001088 <updateWS2812BData+0x254>)
8000ff4: 681b ldr r3, [r3, #0]
8000ff6: f443 631b orr.w r3, r3, #2480 ; 0x9b0
8000ffa: f043 0306 orr.w r3, r3, #6
8000ffe: 4a22 ldr r2, [pc, #136] ; (8001088 <updateWS2812BData+0x254>)
8001000: 6013 str r3, [r2, #0]
break;
8001002: e06b b.n 80010dc <updateWS2812BData+0x2a8>
case 0x08:
WS2812BConvertedData |= 0x00000D24;
8001004: 4b20 ldr r3, [pc, #128] ; (8001088 <updateWS2812BData+0x254>)
8001006: 681b ldr r3, [r3, #0]
8001008: f443 6352 orr.w r3, r3, #3360 ; 0xd20
800100c: f043 0304 orr.w r3, r3, #4
8001010: 4a1d ldr r2, [pc, #116] ; (8001088 <updateWS2812BData+0x254>)
8001012: 6013 str r3, [r2, #0]
break;
8001014: e062 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x09:
WS2812BConvertedData |= 0x00000D26;
8001016: 4b1c ldr r3, [pc, #112] ; (8001088 <updateWS2812BData+0x254>)
8001018: 681b ldr r3, [r3, #0]
800101a: f443 6352 orr.w r3, r3, #3360 ; 0xd20
800101e: f043 0306 orr.w r3, r3, #6
8001022: 4a19 ldr r2, [pc, #100] ; (8001088 <updateWS2812BData+0x254>)
8001024: 6013 str r3, [r2, #0]
break;
8001026: e059 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x0A:
WS2812BConvertedData |= 0x00000D34;
8001028: 4b17 ldr r3, [pc, #92] ; (8001088 <updateWS2812BData+0x254>)
800102a: 681b ldr r3, [r3, #0]
800102c: f443 6353 orr.w r3, r3, #3376 ; 0xd30
8001030: f043 0304 orr.w r3, r3, #4
8001034: 4a14 ldr r2, [pc, #80] ; (8001088 <updateWS2812BData+0x254>)
8001036: 6013 str r3, [r2, #0]
break;
8001038: e050 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x0B:
WS2812BConvertedData |= 0x00000D36;
800103a: 4b13 ldr r3, [pc, #76] ; (8001088 <updateWS2812BData+0x254>)
800103c: 681b ldr r3, [r3, #0]
800103e: f443 6353 orr.w r3, r3, #3376 ; 0xd30
8001042: f043 0306 orr.w r3, r3, #6
8001046: 4a10 ldr r2, [pc, #64] ; (8001088 <updateWS2812BData+0x254>)
8001048: 6013 str r3, [r2, #0]
break;
800104a: e047 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x0C:
WS2812BConvertedData |= 0x00000DA4;
800104c: 4b0e ldr r3, [pc, #56] ; (8001088 <updateWS2812BData+0x254>)
800104e: 681b ldr r3, [r3, #0]
8001050: f443 635a orr.w r3, r3, #3488 ; 0xda0
8001054: f043 0304 orr.w r3, r3, #4
8001058: 4a0b ldr r2, [pc, #44] ; (8001088 <updateWS2812BData+0x254>)
800105a: 6013 str r3, [r2, #0]
break;
800105c: e03e b.n 80010dc <updateWS2812BData+0x2a8>
case 0x0D:
WS2812BConvertedData |= 0x00000DA6;
800105e: 4b0a ldr r3, [pc, #40] ; (8001088 <updateWS2812BData+0x254>)
8001060: 681b ldr r3, [r3, #0]
8001062: f443 635a orr.w r3, r3, #3488 ; 0xda0
8001066: f043 0306 orr.w r3, r3, #6
800106a: 4a07 ldr r2, [pc, #28] ; (8001088 <updateWS2812BData+0x254>)
800106c: 6013 str r3, [r2, #0]
break;
800106e: e035 b.n 80010dc <updateWS2812BData+0x2a8>
case 0x0E:
WS2812BConvertedData |= 0x00000DB4;
8001070: 4b05 ldr r3, [pc, #20] ; (8001088 <updateWS2812BData+0x254>)
8001072: 681b ldr r3, [r3, #0]
8001074: f443 635b orr.w r3, r3, #3504 ; 0xdb0
8001078: f043 0304 orr.w r3, r3, #4
800107c: 4a02 ldr r2, [pc, #8] ; (8001088 <updateWS2812BData+0x254>)
800107e: 6013 str r3, [r2, #0]
break;
8001080: e02c b.n 80010dc <updateWS2812BData+0x2a8>
8001082: bf00 nop
8001084: 20000090 .word 0x20000090
8001088: 200003a4 .word 0x200003a4
800108c: 00924000 .word 0x00924000
8001090: 00926000 .word 0x00926000
8001094: 00934000 .word 0x00934000
8001098: 00936000 .word 0x00936000
800109c: 009a4000 .word 0x009a4000
80010a0: 009a6000 .word 0x009a6000
80010a4: 009b4000 .word 0x009b4000
80010a8: 009b6000 .word 0x009b6000
80010ac: 00d24000 .word 0x00d24000
80010b0: 00d26000 .word 0x00d26000
80010b4: 00d34000 .word 0x00d34000
80010b8: 00d36000 .word 0x00d36000
80010bc: 00da4000 .word 0x00da4000
80010c0: 00da6000 .word 0x00da6000
80010c4: 00db4000 .word 0x00db4000
80010c8: 00db6000 .word 0x00db6000
default: // 0x0F
WS2812BConvertedData |= 0x00000DB6;
80010cc: 4b27 ldr r3, [pc, #156] ; (800116c <updateWS2812BData+0x338>)
80010ce: 681b ldr r3, [r3, #0]
80010d0: f443 635b orr.w r3, r3, #3504 ; 0xdb0
80010d4: f043 0306 orr.w r3, r3, #6
80010d8: 4a24 ldr r2, [pc, #144] ; (800116c <updateWS2812BData+0x338>)
80010da: 6013 str r3, [r2, #0]
}
LEDData_WS2812B[i][j][0] = (WS2812BConvertedData & 0x00FF0000) >> 16;
80010dc: 4b23 ldr r3, [pc, #140] ; (800116c <updateWS2812BData+0x338>)
80010de: 681b ldr r3, [r3, #0]
80010e0: 0c1a lsrs r2, r3, #16
80010e2: 79f9 ldrb r1, [r7, #7]
80010e4: 79bb ldrb r3, [r7, #6]
80010e6: b2d4 uxtb r4, r2
80010e8: 4821 ldr r0, [pc, #132] ; (8001170 <updateWS2812BData+0x33c>)
80010ea: 461a mov r2, r3
80010ec: 0052 lsls r2, r2, #1
80010ee: 441a add r2, r3
80010f0: 460b mov r3, r1
80010f2: 00db lsls r3, r3, #3
80010f4: 440b add r3, r1
80010f6: 4413 add r3, r2
80010f8: 4403 add r3, r0
80010fa: 4622 mov r2, r4
80010fc: 701a strb r2, [r3, #0]
LEDData_WS2812B[i][j][1] = (WS2812BConvertedData & 0x0000FF00) >> 8;
80010fe: 4b1b ldr r3, [pc, #108] ; (800116c <updateWS2812BData+0x338>)
8001100: 681b ldr r3, [r3, #0]
8001102: 0a1a lsrs r2, r3, #8
8001104: 79f9 ldrb r1, [r7, #7]
8001106: 79bb ldrb r3, [r7, #6]
8001108: b2d4 uxtb r4, r2
800110a: 4819 ldr r0, [pc, #100] ; (8001170 <updateWS2812BData+0x33c>)
800110c: 461a mov r2, r3
800110e: 0052 lsls r2, r2, #1
8001110: 441a add r2, r3
8001112: 460b mov r3, r1
8001114: 00db lsls r3, r3, #3
8001116: 440b add r3, r1
8001118: 4413 add r3, r2
800111a: 4403 add r3, r0
800111c: 3301 adds r3, #1
800111e: 4622 mov r2, r4
8001120: 701a strb r2, [r3, #0]
LEDData_WS2812B[i][j][2] = WS2812BConvertedData & 0x000000FF;
8001122: 4b12 ldr r3, [pc, #72] ; (800116c <updateWS2812BData+0x338>)
8001124: 681a ldr r2, [r3, #0]
8001126: 79f9 ldrb r1, [r7, #7]
8001128: 79bb ldrb r3, [r7, #6]
800112a: b2d4 uxtb r4, r2
800112c: 4810 ldr r0, [pc, #64] ; (8001170 <updateWS2812BData+0x33c>)
800112e: 461a mov r2, r3
8001130: 0052 lsls r2, r2, #1
8001132: 441a add r2, r3
8001134: 460b mov r3, r1
8001136: 00db lsls r3, r3, #3
8001138: 440b add r3, r1
800113a: 4413 add r3, r2
800113c: 4403 add r3, r0
800113e: 3302 adds r3, #2
8001140: 4622 mov r2, r4
8001142: 701a strb r2, [r3, #0]
for (uint8_t j = 0; j < 3; ++j) {
8001144: 79bb ldrb r3, [r7, #6]
8001146: 3301 adds r3, #1
8001148: 71bb strb r3, [r7, #6]
800114a: 79bb ldrb r3, [r7, #6]
800114c: 2b02 cmp r3, #2
800114e: f67f ae7a bls.w 8000e46 <updateWS2812BData+0x12>
for (uint8_t i = 0; i < 64; ++i) {
8001152: 79fb ldrb r3, [r7, #7]
8001154: 3301 adds r3, #1
8001156: 71fb strb r3, [r7, #7]
8001158: 79fb ldrb r3, [r7, #7]
800115a: 2b3f cmp r3, #63 ; 0x3f
800115c: f67f ae70 bls.w 8000e40 <updateWS2812BData+0xc>
}
}
}
8001160: bf00 nop
8001162: 3708 adds r7, #8
8001164: 46bd mov sp, r7
8001166: bc90 pop {r4, r7}
8001168: 4770 bx lr
800116a: bf00 nop
800116c: 200003a4 .word 0x200003a4
8001170: 20000150 .word 0x20000150
08001174 <LEDDesign_Off>:
void LEDDesign_Off(void){
8001174: b480 push {r7}
8001176: b083 sub sp, #12
8001178: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
800117a: 2300 movs r3, #0
800117c: 71fb strb r3, [r7, #7]
800117e: e015 b.n 80011ac <LEDDesign_Off+0x38>
for(uint8_t j = 0; j < 3; ++j){
8001180: 2300 movs r3, #0
8001182: 71bb strb r3, [r7, #6]
8001184: e00c b.n 80011a0 <LEDDesign_Off+0x2c>
LEDData[i][j] = 0x00;
8001186: 79fa ldrb r2, [r7, #7]
8001188: 79b9 ldrb r1, [r7, #6]
800118a: 480d ldr r0, [pc, #52] ; (80011c0 <LEDDesign_Off+0x4c>)
800118c: 4613 mov r3, r2
800118e: 005b lsls r3, r3, #1
8001190: 4413 add r3, r2
8001192: 4403 add r3, r0
8001194: 440b add r3, r1
8001196: 2200 movs r2, #0
8001198: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
800119a: 79bb ldrb r3, [r7, #6]
800119c: 3301 adds r3, #1
800119e: 71bb strb r3, [r7, #6]
80011a0: 79bb ldrb r3, [r7, #6]
80011a2: 2b02 cmp r3, #2
80011a4: d9ef bls.n 8001186 <LEDDesign_Off+0x12>
for(uint8_t i = 0; i < 64; ++i){
80011a6: 79fb ldrb r3, [r7, #7]
80011a8: 3301 adds r3, #1
80011aa: 71fb strb r3, [r7, #7]
80011ac: 79fb ldrb r3, [r7, #7]
80011ae: 2b3f cmp r3, #63 ; 0x3f
80011b0: d9e6 bls.n 8001180 <LEDDesign_Off+0xc>
}
}
}
80011b2: bf00 nop
80011b4: 370c adds r7, #12
80011b6: 46bd mov sp, r7
80011b8: f85d 7b04 ldr.w r7, [sp], #4
80011bc: 4770 bx lr
80011be: bf00 nop
80011c0: 20000090 .word 0x20000090
080011c4 <LEDDesign_ColorWhite>:
void LEDDesign_ColorWhite(void){
80011c4: b480 push {r7}
80011c6: b083 sub sp, #12
80011c8: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
80011ca: 2300 movs r3, #0
80011cc: 71fb strb r3, [r7, #7]
80011ce: e015 b.n 80011fc <LEDDesign_ColorWhite+0x38>
for(uint8_t j = 0; j < 3; ++j){
80011d0: 2300 movs r3, #0
80011d2: 71bb strb r3, [r7, #6]
80011d4: e00c b.n 80011f0 <LEDDesign_ColorWhite+0x2c>
LEDData[i][j] = 0xFF;
80011d6: 79fa ldrb r2, [r7, #7]
80011d8: 79b9 ldrb r1, [r7, #6]
80011da: 480d ldr r0, [pc, #52] ; (8001210 <LEDDesign_ColorWhite+0x4c>)
80011dc: 4613 mov r3, r2
80011de: 005b lsls r3, r3, #1
80011e0: 4413 add r3, r2
80011e2: 4403 add r3, r0
80011e4: 440b add r3, r1
80011e6: 22ff movs r2, #255 ; 0xff
80011e8: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
80011ea: 79bb ldrb r3, [r7, #6]
80011ec: 3301 adds r3, #1
80011ee: 71bb strb r3, [r7, #6]
80011f0: 79bb ldrb r3, [r7, #6]
80011f2: 2b02 cmp r3, #2
80011f4: d9ef bls.n 80011d6 <LEDDesign_ColorWhite+0x12>
for(uint8_t i = 0; i < 64; ++i){
80011f6: 79fb ldrb r3, [r7, #7]
80011f8: 3301 adds r3, #1
80011fa: 71fb strb r3, [r7, #7]
80011fc: 79fb ldrb r3, [r7, #7]
80011fe: 2b3f cmp r3, #63 ; 0x3f
8001200: d9e6 bls.n 80011d0 <LEDDesign_ColorWhite+0xc>
}
}
}
8001202: bf00 nop
8001204: 370c adds r7, #12
8001206: 46bd mov sp, r7
8001208: f85d 7b04 ldr.w r7, [sp], #4
800120c: 4770 bx lr
800120e: bf00 nop
8001210: 20000090 .word 0x20000090
08001214 <LEDDesign_ColorBlue>:
void LEDDesign_ColorBlue(void){
8001214: b480 push {r7}
8001216: b083 sub sp, #12
8001218: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
800121a: 2300 movs r3, #0
800121c: 71fb strb r3, [r7, #7]
800121e: e00a b.n 8001236 <LEDDesign_ColorBlue+0x22>
LEDData[i][0] = 0x00;
8001220: 79fa ldrb r2, [r7, #7]
8001222: 491b ldr r1, [pc, #108] ; (8001290 <LEDDesign_ColorBlue+0x7c>)
8001224: 4613 mov r3, r2
8001226: 005b lsls r3, r3, #1
8001228: 4413 add r3, r2
800122a: 440b add r3, r1
800122c: 2200 movs r2, #0
800122e: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001230: 79fb ldrb r3, [r7, #7]
8001232: 3301 adds r3, #1
8001234: 71fb strb r3, [r7, #7]
8001236: 79fb ldrb r3, [r7, #7]
8001238: 2b3f cmp r3, #63 ; 0x3f
800123a: d9f1 bls.n 8001220 <LEDDesign_ColorBlue+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
800123c: 2300 movs r3, #0
800123e: 71bb strb r3, [r7, #6]
8001240: e00b b.n 800125a <LEDDesign_ColorBlue+0x46>
LEDData[i][1] = 0x00;
8001242: 79ba ldrb r2, [r7, #6]
8001244: 4912 ldr r1, [pc, #72] ; (8001290 <LEDDesign_ColorBlue+0x7c>)
8001246: 4613 mov r3, r2
8001248: 005b lsls r3, r3, #1
800124a: 4413 add r3, r2
800124c: 440b add r3, r1
800124e: 3301 adds r3, #1
8001250: 2200 movs r2, #0
8001252: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001254: 79bb ldrb r3, [r7, #6]
8001256: 3301 adds r3, #1
8001258: 71bb strb r3, [r7, #6]
800125a: 79bb ldrb r3, [r7, #6]
800125c: 2b3f cmp r3, #63 ; 0x3f
800125e: d9f0 bls.n 8001242 <LEDDesign_ColorBlue+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
8001260: 2300 movs r3, #0
8001262: 717b strb r3, [r7, #5]
8001264: e00b b.n 800127e <LEDDesign_ColorBlue+0x6a>
LEDData[i][2] = 0xFF;
8001266: 797a ldrb r2, [r7, #5]
8001268: 4909 ldr r1, [pc, #36] ; (8001290 <LEDDesign_ColorBlue+0x7c>)
800126a: 4613 mov r3, r2
800126c: 005b lsls r3, r3, #1
800126e: 4413 add r3, r2
8001270: 440b add r3, r1
8001272: 3302 adds r3, #2
8001274: 22ff movs r2, #255 ; 0xff
8001276: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001278: 797b ldrb r3, [r7, #5]
800127a: 3301 adds r3, #1
800127c: 717b strb r3, [r7, #5]
800127e: 797b ldrb r3, [r7, #5]
8001280: 2b3f cmp r3, #63 ; 0x3f
8001282: d9f0 bls.n 8001266 <LEDDesign_ColorBlue+0x52>
}
}
8001284: bf00 nop
8001286: 370c adds r7, #12
8001288: 46bd mov sp, r7
800128a: f85d 7b04 ldr.w r7, [sp], #4
800128e: 4770 bx lr
8001290: 20000090 .word 0x20000090
08001294 <LEDDesign_ColorGreen>:
void LEDDesign_ColorGreen(void){
8001294: b480 push {r7}
8001296: b083 sub sp, #12
8001298: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
800129a: 2300 movs r3, #0
800129c: 71fb strb r3, [r7, #7]
800129e: e00a b.n 80012b6 <LEDDesign_ColorGreen+0x22>
LEDData[i][0] = 0xFF;
80012a0: 79fa ldrb r2, [r7, #7]
80012a2: 491b ldr r1, [pc, #108] ; (8001310 <LEDDesign_ColorGreen+0x7c>)
80012a4: 4613 mov r3, r2
80012a6: 005b lsls r3, r3, #1
80012a8: 4413 add r3, r2
80012aa: 440b add r3, r1
80012ac: 22ff movs r2, #255 ; 0xff
80012ae: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80012b0: 79fb ldrb r3, [r7, #7]
80012b2: 3301 adds r3, #1
80012b4: 71fb strb r3, [r7, #7]
80012b6: 79fb ldrb r3, [r7, #7]
80012b8: 2b3f cmp r3, #63 ; 0x3f
80012ba: d9f1 bls.n 80012a0 <LEDDesign_ColorGreen+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
80012bc: 2300 movs r3, #0
80012be: 71bb strb r3, [r7, #6]
80012c0: e00b b.n 80012da <LEDDesign_ColorGreen+0x46>
LEDData[i][1] = 0x00;
80012c2: 79ba ldrb r2, [r7, #6]
80012c4: 4912 ldr r1, [pc, #72] ; (8001310 <LEDDesign_ColorGreen+0x7c>)
80012c6: 4613 mov r3, r2
80012c8: 005b lsls r3, r3, #1
80012ca: 4413 add r3, r2
80012cc: 440b add r3, r1
80012ce: 3301 adds r3, #1
80012d0: 2200 movs r2, #0
80012d2: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80012d4: 79bb ldrb r3, [r7, #6]
80012d6: 3301 adds r3, #1
80012d8: 71bb strb r3, [r7, #6]
80012da: 79bb ldrb r3, [r7, #6]
80012dc: 2b3f cmp r3, #63 ; 0x3f
80012de: d9f0 bls.n 80012c2 <LEDDesign_ColorGreen+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
80012e0: 2300 movs r3, #0
80012e2: 717b strb r3, [r7, #5]
80012e4: e00b b.n 80012fe <LEDDesign_ColorGreen+0x6a>
LEDData[i][2] = 0x00;
80012e6: 797a ldrb r2, [r7, #5]
80012e8: 4909 ldr r1, [pc, #36] ; (8001310 <LEDDesign_ColorGreen+0x7c>)
80012ea: 4613 mov r3, r2
80012ec: 005b lsls r3, r3, #1
80012ee: 4413 add r3, r2
80012f0: 440b add r3, r1
80012f2: 3302 adds r3, #2
80012f4: 2200 movs r2, #0
80012f6: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
80012f8: 797b ldrb r3, [r7, #5]
80012fa: 3301 adds r3, #1
80012fc: 717b strb r3, [r7, #5]
80012fe: 797b ldrb r3, [r7, #5]
8001300: 2b3f cmp r3, #63 ; 0x3f
8001302: d9f0 bls.n 80012e6 <LEDDesign_ColorGreen+0x52>
}
}
8001304: bf00 nop
8001306: 370c adds r7, #12
8001308: 46bd mov sp, r7
800130a: f85d 7b04 ldr.w r7, [sp], #4
800130e: 4770 bx lr
8001310: 20000090 .word 0x20000090
08001314 <LEDDesign_ColorRed>:
void LEDDesign_ColorRed(void){
8001314: b480 push {r7}
8001316: b083 sub sp, #12
8001318: af00 add r7, sp, #0
for(uint8_t i = 0; i < 64; ++i){
800131a: 2300 movs r3, #0
800131c: 71fb strb r3, [r7, #7]
800131e: e00a b.n 8001336 <LEDDesign_ColorRed+0x22>
LEDData[i][0] = 0x00;
8001320: 79fa ldrb r2, [r7, #7]
8001322: 491b ldr r1, [pc, #108] ; (8001390 <LEDDesign_ColorRed+0x7c>)
8001324: 4613 mov r3, r2
8001326: 005b lsls r3, r3, #1
8001328: 4413 add r3, r2
800132a: 440b add r3, r1
800132c: 2200 movs r2, #0
800132e: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001330: 79fb ldrb r3, [r7, #7]
8001332: 3301 adds r3, #1
8001334: 71fb strb r3, [r7, #7]
8001336: 79fb ldrb r3, [r7, #7]
8001338: 2b3f cmp r3, #63 ; 0x3f
800133a: d9f1 bls.n 8001320 <LEDDesign_ColorRed+0xc>
}
for(uint8_t i = 0; i < 64; ++i){
800133c: 2300 movs r3, #0
800133e: 71bb strb r3, [r7, #6]
8001340: e00b b.n 800135a <LEDDesign_ColorRed+0x46>
LEDData[i][1] = 0xFF;
8001342: 79ba ldrb r2, [r7, #6]
8001344: 4912 ldr r1, [pc, #72] ; (8001390 <LEDDesign_ColorRed+0x7c>)
8001346: 4613 mov r3, r2
8001348: 005b lsls r3, r3, #1
800134a: 4413 add r3, r2
800134c: 440b add r3, r1
800134e: 3301 adds r3, #1
8001350: 22ff movs r2, #255 ; 0xff
8001352: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001354: 79bb ldrb r3, [r7, #6]
8001356: 3301 adds r3, #1
8001358: 71bb strb r3, [r7, #6]
800135a: 79bb ldrb r3, [r7, #6]
800135c: 2b3f cmp r3, #63 ; 0x3f
800135e: d9f0 bls.n 8001342 <LEDDesign_ColorRed+0x2e>
}
for(uint8_t i = 0; i < 64; ++i){
8001360: 2300 movs r3, #0
8001362: 717b strb r3, [r7, #5]
8001364: e00b b.n 800137e <LEDDesign_ColorRed+0x6a>
LEDData[i][2] = 0x00;
8001366: 797a ldrb r2, [r7, #5]
8001368: 4909 ldr r1, [pc, #36] ; (8001390 <LEDDesign_ColorRed+0x7c>)
800136a: 4613 mov r3, r2
800136c: 005b lsls r3, r3, #1
800136e: 4413 add r3, r2
8001370: 440b add r3, r1
8001372: 3302 adds r3, #2
8001374: 2200 movs r2, #0
8001376: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001378: 797b ldrb r3, [r7, #5]
800137a: 3301 adds r3, #1
800137c: 717b strb r3, [r7, #5]
800137e: 797b ldrb r3, [r7, #5]
8001380: 2b3f cmp r3, #63 ; 0x3f
8001382: d9f0 bls.n 8001366 <LEDDesign_ColorRed+0x52>
}
}
8001384: bf00 nop
8001386: 370c adds r7, #12
8001388: 46bd mov sp, r7
800138a: f85d 7b04 ldr.w r7, [sp], #4
800138e: 4770 bx lr
8001390: 20000090 .word 0x20000090
08001394 <LEDDesign_Crazy>:
void LEDDesign_Crazy(void){
8001394: b590 push {r4, r7, lr}
8001396: b085 sub sp, #20
8001398: af00 add r7, sp, #0
HAL_Delay(50);
800139a: 2032 movs r0, #50 ; 0x32
800139c: f000 fe46 bl 800202c <HAL_Delay>
for(uint8_t i = 0; i < 64; ++i){
80013a0: 2300 movs r3, #0
80013a2: 73fb strb r3, [r7, #15]
80013a4: e029 b.n 80013fa <LEDDesign_Crazy+0x66>
for(uint8_t j = 0; j < 3; ++j){
80013a6: 2300 movs r3, #0
80013a8: 73bb strb r3, [r7, #14]
80013aa: e020 b.n 80013ee <LEDDesign_Crazy+0x5a>
LEDData[i][j] = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
80013ac: f002 fec8 bl 8004140 <rand>
80013b0: ee07 0a90 vmov s15, r0
80013b4: eeb8 7ae7 vcvt.f32.s32 s14, s15
80013b8: eddf 6a13 vldr s13, [pc, #76] ; 8001408 <LEDDesign_Crazy+0x74>
80013bc: eec7 7a26 vdiv.f32 s15, s14, s13
80013c0: ed9f 7a12 vldr s14, [pc, #72] ; 800140c <LEDDesign_Crazy+0x78>
80013c4: ee67 7a87 vmul.f32 s15, s15, s14
80013c8: 7bfa ldrb r2, [r7, #15]
80013ca: 7bb9 ldrb r1, [r7, #14]
80013cc: eefc 7ae7 vcvt.u32.f32 s15, s15
80013d0: edc7 7a01 vstr s15, [r7, #4]
80013d4: 793b ldrb r3, [r7, #4]
80013d6: b2dc uxtb r4, r3
80013d8: 480d ldr r0, [pc, #52] ; (8001410 <LEDDesign_Crazy+0x7c>)
80013da: 4613 mov r3, r2
80013dc: 005b lsls r3, r3, #1
80013de: 4413 add r3, r2
80013e0: 4403 add r3, r0
80013e2: 440b add r3, r1
80013e4: 4622 mov r2, r4
80013e6: 701a strb r2, [r3, #0]
for(uint8_t j = 0; j < 3; ++j){
80013e8: 7bbb ldrb r3, [r7, #14]
80013ea: 3301 adds r3, #1
80013ec: 73bb strb r3, [r7, #14]
80013ee: 7bbb ldrb r3, [r7, #14]
80013f0: 2b02 cmp r3, #2
80013f2: d9db bls.n 80013ac <LEDDesign_Crazy+0x18>
for(uint8_t i = 0; i < 64; ++i){
80013f4: 7bfb ldrb r3, [r7, #15]
80013f6: 3301 adds r3, #1
80013f8: 73fb strb r3, [r7, #15]
80013fa: 7bfb ldrb r3, [r7, #15]
80013fc: 2b3f cmp r3, #63 ; 0x3f
80013fe: d9d2 bls.n 80013a6 <LEDDesign_Crazy+0x12>
}
}
}
8001400: bf00 nop
8001402: 3714 adds r7, #20
8001404: 46bd mov sp, r7
8001406: bd90 pop {r4, r7, pc}
8001408: 4f000000 .word 0x4f000000
800140c: 437f0000 .word 0x437f0000
8001410: 20000090 .word 0x20000090
08001414 <LEDDesign_Smile>:
void LEDDesign_Smile(void){
8001414: b480 push {r7}
8001416: af00 add r7, sp, #0
LEDData[0][0] = 0x00;
8001418: 4bc8 ldr r3, [pc, #800] ; (800173c <LEDDesign_Smile+0x328>)
800141a: 2200 movs r2, #0
800141c: 701a strb r2, [r3, #0]
LEDData[0][1] = 0x00;
800141e: 4bc7 ldr r3, [pc, #796] ; (800173c <LEDDesign_Smile+0x328>)
8001420: 2200 movs r2, #0
8001422: 705a strb r2, [r3, #1]
LEDData[0][2] = 0x00;
8001424: 4bc5 ldr r3, [pc, #788] ; (800173c <LEDDesign_Smile+0x328>)
8001426: 2200 movs r2, #0
8001428: 709a strb r2, [r3, #2]
LEDData[1][0] = 0x00;
800142a: 4bc4 ldr r3, [pc, #784] ; (800173c <LEDDesign_Smile+0x328>)
800142c: 2200 movs r2, #0
800142e: 70da strb r2, [r3, #3]
LEDData[1][1] = 0x00;
8001430: 4bc2 ldr r3, [pc, #776] ; (800173c <LEDDesign_Smile+0x328>)
8001432: 2200 movs r2, #0
8001434: 711a strb r2, [r3, #4]
LEDData[1][2] = 0x00;
8001436: 4bc1 ldr r3, [pc, #772] ; (800173c <LEDDesign_Smile+0x328>)
8001438: 2200 movs r2, #0
800143a: 715a strb r2, [r3, #5]
LEDData[2][0] = 0x00;
800143c: 4bbf ldr r3, [pc, #764] ; (800173c <LEDDesign_Smile+0x328>)
800143e: 2200 movs r2, #0
8001440: 719a strb r2, [r3, #6]
LEDData[2][1] = 0x00;
8001442: 4bbe ldr r3, [pc, #760] ; (800173c <LEDDesign_Smile+0x328>)
8001444: 2200 movs r2, #0
8001446: 71da strb r2, [r3, #7]
LEDData[2][2] = 0x00;
8001448: 4bbc ldr r3, [pc, #752] ; (800173c <LEDDesign_Smile+0x328>)
800144a: 2200 movs r2, #0
800144c: 721a strb r2, [r3, #8]
LEDData[3][0] = 0x00;
800144e: 4bbb ldr r3, [pc, #748] ; (800173c <LEDDesign_Smile+0x328>)
8001450: 2200 movs r2, #0
8001452: 725a strb r2, [r3, #9]
LEDData[3][1] = 0x00;
8001454: 4bb9 ldr r3, [pc, #740] ; (800173c <LEDDesign_Smile+0x328>)
8001456: 2200 movs r2, #0
8001458: 729a strb r2, [r3, #10]
LEDData[3][2] = 0x00;
800145a: 4bb8 ldr r3, [pc, #736] ; (800173c <LEDDesign_Smile+0x328>)
800145c: 2200 movs r2, #0
800145e: 72da strb r2, [r3, #11]
LEDData[4][0] = 0x00;
8001460: 4bb6 ldr r3, [pc, #728] ; (800173c <LEDDesign_Smile+0x328>)
8001462: 2200 movs r2, #0
8001464: 731a strb r2, [r3, #12]
LEDData[4][1] = 0x00;
8001466: 4bb5 ldr r3, [pc, #724] ; (800173c <LEDDesign_Smile+0x328>)
8001468: 2200 movs r2, #0
800146a: 735a strb r2, [r3, #13]
LEDData[4][2] = 0x7F;
800146c: 4bb3 ldr r3, [pc, #716] ; (800173c <LEDDesign_Smile+0x328>)
800146e: 227f movs r2, #127 ; 0x7f
8001470: 739a strb r2, [r3, #14]
LEDData[5][0] = 0x00;
8001472: 4bb2 ldr r3, [pc, #712] ; (800173c <LEDDesign_Smile+0x328>)
8001474: 2200 movs r2, #0
8001476: 73da strb r2, [r3, #15]
LEDData[5][1] = 0x00;
8001478: 4bb0 ldr r3, [pc, #704] ; (800173c <LEDDesign_Smile+0x328>)
800147a: 2200 movs r2, #0
800147c: 741a strb r2, [r3, #16]
LEDData[5][2] = 0x00;
800147e: 4baf ldr r3, [pc, #700] ; (800173c <LEDDesign_Smile+0x328>)
8001480: 2200 movs r2, #0
8001482: 745a strb r2, [r3, #17]
LEDData[6][0] = 0x00;
8001484: 4bad ldr r3, [pc, #692] ; (800173c <LEDDesign_Smile+0x328>)
8001486: 2200 movs r2, #0
8001488: 749a strb r2, [r3, #18]
LEDData[6][1] = 0x00;
800148a: 4bac ldr r3, [pc, #688] ; (800173c <LEDDesign_Smile+0x328>)
800148c: 2200 movs r2, #0
800148e: 74da strb r2, [r3, #19]
LEDData[6][2] = 0x00;
8001490: 4baa ldr r3, [pc, #680] ; (800173c <LEDDesign_Smile+0x328>)
8001492: 2200 movs r2, #0
8001494: 751a strb r2, [r3, #20]
LEDData[7][0] = 0x00;
8001496: 4ba9 ldr r3, [pc, #676] ; (800173c <LEDDesign_Smile+0x328>)
8001498: 2200 movs r2, #0
800149a: 755a strb r2, [r3, #21]
LEDData[7][1] = 0x00;
800149c: 4ba7 ldr r3, [pc, #668] ; (800173c <LEDDesign_Smile+0x328>)
800149e: 2200 movs r2, #0
80014a0: 759a strb r2, [r3, #22]
LEDData[7][2] = 0x00;
80014a2: 4ba6 ldr r3, [pc, #664] ; (800173c <LEDDesign_Smile+0x328>)
80014a4: 2200 movs r2, #0
80014a6: 75da strb r2, [r3, #23]
LEDData[8][0] = 0x00;
80014a8: 4ba4 ldr r3, [pc, #656] ; (800173c <LEDDesign_Smile+0x328>)
80014aa: 2200 movs r2, #0
80014ac: 761a strb r2, [r3, #24]
LEDData[8][1] = 0x00;
80014ae: 4ba3 ldr r3, [pc, #652] ; (800173c <LEDDesign_Smile+0x328>)
80014b0: 2200 movs r2, #0
80014b2: 765a strb r2, [r3, #25]
LEDData[8][2] = 0x00;
80014b4: 4ba1 ldr r3, [pc, #644] ; (800173c <LEDDesign_Smile+0x328>)
80014b6: 2200 movs r2, #0
80014b8: 769a strb r2, [r3, #26]
LEDData[9][0] = 0x00;
80014ba: 4ba0 ldr r3, [pc, #640] ; (800173c <LEDDesign_Smile+0x328>)
80014bc: 2200 movs r2, #0
80014be: 76da strb r2, [r3, #27]
LEDData[9][1] = 0x00;
80014c0: 4b9e ldr r3, [pc, #632] ; (800173c <LEDDesign_Smile+0x328>)
80014c2: 2200 movs r2, #0
80014c4: 771a strb r2, [r3, #28]
LEDData[9][2] = 0x00;
80014c6: 4b9d ldr r3, [pc, #628] ; (800173c <LEDDesign_Smile+0x328>)
80014c8: 2200 movs r2, #0
80014ca: 775a strb r2, [r3, #29]
LEDData[10][0] = 0x00;
80014cc: 4b9b ldr r3, [pc, #620] ; (800173c <LEDDesign_Smile+0x328>)
80014ce: 2200 movs r2, #0
80014d0: 779a strb r2, [r3, #30]
LEDData[10][1] = 0x00;
80014d2: 4b9a ldr r3, [pc, #616] ; (800173c <LEDDesign_Smile+0x328>)
80014d4: 2200 movs r2, #0
80014d6: 77da strb r2, [r3, #31]
LEDData[10][2] = 0x7F;
80014d8: 4b98 ldr r3, [pc, #608] ; (800173c <LEDDesign_Smile+0x328>)
80014da: 227f movs r2, #127 ; 0x7f
80014dc: f883 2020 strb.w r2, [r3, #32]
LEDData[11][0] = 0x00;
80014e0: 4b96 ldr r3, [pc, #600] ; (800173c <LEDDesign_Smile+0x328>)
80014e2: 2200 movs r2, #0
80014e4: f883 2021 strb.w r2, [r3, #33] ; 0x21
LEDData[11][1] = 0x00;
80014e8: 4b94 ldr r3, [pc, #592] ; (800173c <LEDDesign_Smile+0x328>)
80014ea: 2200 movs r2, #0
80014ec: f883 2022 strb.w r2, [r3, #34] ; 0x22
LEDData[11][2] = 0x00;
80014f0: 4b92 ldr r3, [pc, #584] ; (800173c <LEDDesign_Smile+0x328>)
80014f2: 2200 movs r2, #0
80014f4: f883 2023 strb.w r2, [r3, #35] ; 0x23
LEDData[12][0] = 0x00;
80014f8: 4b90 ldr r3, [pc, #576] ; (800173c <LEDDesign_Smile+0x328>)
80014fa: 2200 movs r2, #0
80014fc: f883 2024 strb.w r2, [r3, #36] ; 0x24
LEDData[12][1] = 0x00;
8001500: 4b8e ldr r3, [pc, #568] ; (800173c <LEDDesign_Smile+0x328>)
8001502: 2200 movs r2, #0
8001504: f883 2025 strb.w r2, [r3, #37] ; 0x25
LEDData[12][2] = 0x00;
8001508: 4b8c ldr r3, [pc, #560] ; (800173c <LEDDesign_Smile+0x328>)
800150a: 2200 movs r2, #0
800150c: f883 2026 strb.w r2, [r3, #38] ; 0x26
LEDData[13][0] = 0x00;
8001510: 4b8a ldr r3, [pc, #552] ; (800173c <LEDDesign_Smile+0x328>)
8001512: 2200 movs r2, #0
8001514: f883 2027 strb.w r2, [r3, #39] ; 0x27
LEDData[13][1] = 0x00;
8001518: 4b88 ldr r3, [pc, #544] ; (800173c <LEDDesign_Smile+0x328>)
800151a: 2200 movs r2, #0
800151c: f883 2028 strb.w r2, [r3, #40] ; 0x28
LEDData[13][2] = 0x00;
8001520: 4b86 ldr r3, [pc, #536] ; (800173c <LEDDesign_Smile+0x328>)
8001522: 2200 movs r2, #0
8001524: f883 2029 strb.w r2, [r3, #41] ; 0x29
LEDData[14][0] = 0x00;
8001528: 4b84 ldr r3, [pc, #528] ; (800173c <LEDDesign_Smile+0x328>)
800152a: 2200 movs r2, #0
800152c: f883 202a strb.w r2, [r3, #42] ; 0x2a
LEDData[14][1] = 0x00;
8001530: 4b82 ldr r3, [pc, #520] ; (800173c <LEDDesign_Smile+0x328>)
8001532: 2200 movs r2, #0
8001534: f883 202b strb.w r2, [r3, #43] ; 0x2b
LEDData[14][2] = 0x00;
8001538: 4b80 ldr r3, [pc, #512] ; (800173c <LEDDesign_Smile+0x328>)
800153a: 2200 movs r2, #0
800153c: f883 202c strb.w r2, [r3, #44] ; 0x2c
LEDData[15][0] = 0x00;
8001540: 4b7e ldr r3, [pc, #504] ; (800173c <LEDDesign_Smile+0x328>)
8001542: 2200 movs r2, #0
8001544: f883 202d strb.w r2, [r3, #45] ; 0x2d
LEDData[15][1] = 0x00;
8001548: 4b7c ldr r3, [pc, #496] ; (800173c <LEDDesign_Smile+0x328>)
800154a: 2200 movs r2, #0
800154c: f883 202e strb.w r2, [r3, #46] ; 0x2e
LEDData[15][2] = 0x00;
8001550: 4b7a ldr r3, [pc, #488] ; (800173c <LEDDesign_Smile+0x328>)
8001552: 2200 movs r2, #0
8001554: f883 202f strb.w r2, [r3, #47] ; 0x2f
LEDData[16][0] = 0x00;
8001558: 4b78 ldr r3, [pc, #480] ; (800173c <LEDDesign_Smile+0x328>)
800155a: 2200 movs r2, #0
800155c: f883 2030 strb.w r2, [r3, #48] ; 0x30
LEDData[16][1] = 0x00;
8001560: 4b76 ldr r3, [pc, #472] ; (800173c <LEDDesign_Smile+0x328>)
8001562: 2200 movs r2, #0
8001564: f883 2031 strb.w r2, [r3, #49] ; 0x31
LEDData[16][2] = 0x00;
8001568: 4b74 ldr r3, [pc, #464] ; (800173c <LEDDesign_Smile+0x328>)
800156a: 2200 movs r2, #0
800156c: f883 2032 strb.w r2, [r3, #50] ; 0x32
LEDData[17][0] = 0x00;
8001570: 4b72 ldr r3, [pc, #456] ; (800173c <LEDDesign_Smile+0x328>)
8001572: 2200 movs r2, #0
8001574: f883 2033 strb.w r2, [r3, #51] ; 0x33
LEDData[17][1] = 0x00;
8001578: 4b70 ldr r3, [pc, #448] ; (800173c <LEDDesign_Smile+0x328>)
800157a: 2200 movs r2, #0
800157c: f883 2034 strb.w r2, [r3, #52] ; 0x34
LEDData[17][2] = 0x00;
8001580: 4b6e ldr r3, [pc, #440] ; (800173c <LEDDesign_Smile+0x328>)
8001582: 2200 movs r2, #0
8001584: f883 2035 strb.w r2, [r3, #53] ; 0x35
LEDData[18][0] = 0x00;
8001588: 4b6c ldr r3, [pc, #432] ; (800173c <LEDDesign_Smile+0x328>)
800158a: 2200 movs r2, #0
800158c: f883 2036 strb.w r2, [r3, #54] ; 0x36
LEDData[18][1] = 0x00;
8001590: 4b6a ldr r3, [pc, #424] ; (800173c <LEDDesign_Smile+0x328>)
8001592: 2200 movs r2, #0
8001594: f883 2037 strb.w r2, [r3, #55] ; 0x37
LEDData[18][2] = 0x00;
8001598: 4b68 ldr r3, [pc, #416] ; (800173c <LEDDesign_Smile+0x328>)
800159a: 2200 movs r2, #0
800159c: f883 2038 strb.w r2, [r3, #56] ; 0x38
LEDData[19][0] = 0x00;
80015a0: 4b66 ldr r3, [pc, #408] ; (800173c <LEDDesign_Smile+0x328>)
80015a2: 2200 movs r2, #0
80015a4: f883 2039 strb.w r2, [r3, #57] ; 0x39
LEDData[19][1] = 0x00;
80015a8: 4b64 ldr r3, [pc, #400] ; (800173c <LEDDesign_Smile+0x328>)
80015aa: 2200 movs r2, #0
80015ac: f883 203a strb.w r2, [r3, #58] ; 0x3a
LEDData[19][2] = 0x00;
80015b0: 4b62 ldr r3, [pc, #392] ; (800173c <LEDDesign_Smile+0x328>)
80015b2: 2200 movs r2, #0
80015b4: f883 203b strb.w r2, [r3, #59] ; 0x3b
LEDData[20][0] = 0x00;
80015b8: 4b60 ldr r3, [pc, #384] ; (800173c <LEDDesign_Smile+0x328>)
80015ba: 2200 movs r2, #0
80015bc: f883 203c strb.w r2, [r3, #60] ; 0x3c
LEDData[20][1] = 0x00;
80015c0: 4b5e ldr r3, [pc, #376] ; (800173c <LEDDesign_Smile+0x328>)
80015c2: 2200 movs r2, #0
80015c4: f883 203d strb.w r2, [r3, #61] ; 0x3d
LEDData[20][2] = 0x00;
80015c8: 4b5c ldr r3, [pc, #368] ; (800173c <LEDDesign_Smile+0x328>)
80015ca: 2200 movs r2, #0
80015cc: f883 203e strb.w r2, [r3, #62] ; 0x3e
LEDData[21][0] = 0x00;
80015d0: 4b5a ldr r3, [pc, #360] ; (800173c <LEDDesign_Smile+0x328>)
80015d2: 2200 movs r2, #0
80015d4: f883 203f strb.w r2, [r3, #63] ; 0x3f
LEDData[21][1] = 0x00;
80015d8: 4b58 ldr r3, [pc, #352] ; (800173c <LEDDesign_Smile+0x328>)
80015da: 2200 movs r2, #0
80015dc: f883 2040 strb.w r2, [r3, #64] ; 0x40
LEDData[21][2] = 0x7F;
80015e0: 4b56 ldr r3, [pc, #344] ; (800173c <LEDDesign_Smile+0x328>)
80015e2: 227f movs r2, #127 ; 0x7f
80015e4: f883 2041 strb.w r2, [r3, #65] ; 0x41
LEDData[22][0] = 0x00;
80015e8: 4b54 ldr r3, [pc, #336] ; (800173c <LEDDesign_Smile+0x328>)
80015ea: 2200 movs r2, #0
80015ec: f883 2042 strb.w r2, [r3, #66] ; 0x42
LEDData[22][1] = 0x00;
80015f0: 4b52 ldr r3, [pc, #328] ; (800173c <LEDDesign_Smile+0x328>)
80015f2: 2200 movs r2, #0
80015f4: f883 2043 strb.w r2, [r3, #67] ; 0x43
LEDData[22][2] = 0x00;
80015f8: 4b50 ldr r3, [pc, #320] ; (800173c <LEDDesign_Smile+0x328>)
80015fa: 2200 movs r2, #0
80015fc: f883 2044 strb.w r2, [r3, #68] ; 0x44
LEDData[23][0] = 0x00;
8001600: 4b4e ldr r3, [pc, #312] ; (800173c <LEDDesign_Smile+0x328>)
8001602: 2200 movs r2, #0
8001604: f883 2045 strb.w r2, [r3, #69] ; 0x45
LEDData[23][1] = 0x00;
8001608: 4b4c ldr r3, [pc, #304] ; (800173c <LEDDesign_Smile+0x328>)
800160a: 2200 movs r2, #0
800160c: f883 2046 strb.w r2, [r3, #70] ; 0x46
LEDData[23][2] = 0x00;
8001610: 4b4a ldr r3, [pc, #296] ; (800173c <LEDDesign_Smile+0x328>)
8001612: 2200 movs r2, #0
8001614: f883 2047 strb.w r2, [r3, #71] ; 0x47
LEDData[24][0] = 0x00;
8001618: 4b48 ldr r3, [pc, #288] ; (800173c <LEDDesign_Smile+0x328>)
800161a: 2200 movs r2, #0
800161c: f883 2048 strb.w r2, [r3, #72] ; 0x48
LEDData[24][1] = 0x00;
8001620: 4b46 ldr r3, [pc, #280] ; (800173c <LEDDesign_Smile+0x328>)
8001622: 2200 movs r2, #0
8001624: f883 2049 strb.w r2, [r3, #73] ; 0x49
LEDData[24][2] = 0x00;
8001628: 4b44 ldr r3, [pc, #272] ; (800173c <LEDDesign_Smile+0x328>)
800162a: 2200 movs r2, #0
800162c: f883 204a strb.w r2, [r3, #74] ; 0x4a
LEDData[25][0] = 0x00;
8001630: 4b42 ldr r3, [pc, #264] ; (800173c <LEDDesign_Smile+0x328>)
8001632: 2200 movs r2, #0
8001634: f883 204b strb.w r2, [r3, #75] ; 0x4b
LEDData[25][1] = 0x00;
8001638: 4b40 ldr r3, [pc, #256] ; (800173c <LEDDesign_Smile+0x328>)
800163a: 2200 movs r2, #0
800163c: f883 204c strb.w r2, [r3, #76] ; 0x4c
LEDData[25][2] = 0x00;
8001640: 4b3e ldr r3, [pc, #248] ; (800173c <LEDDesign_Smile+0x328>)
8001642: 2200 movs r2, #0
8001644: f883 204d strb.w r2, [r3, #77] ; 0x4d
LEDData[26][0] = 0x00;
8001648: 4b3c ldr r3, [pc, #240] ; (800173c <LEDDesign_Smile+0x328>)
800164a: 2200 movs r2, #0
800164c: f883 204e strb.w r2, [r3, #78] ; 0x4e
LEDData[26][1] = 0x00;
8001650: 4b3a ldr r3, [pc, #232] ; (800173c <LEDDesign_Smile+0x328>)
8001652: 2200 movs r2, #0
8001654: f883 204f strb.w r2, [r3, #79] ; 0x4f
LEDData[26][2] = 0x7F;
8001658: 4b38 ldr r3, [pc, #224] ; (800173c <LEDDesign_Smile+0x328>)
800165a: 227f movs r2, #127 ; 0x7f
800165c: f883 2050 strb.w r2, [r3, #80] ; 0x50
LEDData[27][0] = 0x00;
8001660: 4b36 ldr r3, [pc, #216] ; (800173c <LEDDesign_Smile+0x328>)
8001662: 2200 movs r2, #0
8001664: f883 2051 strb.w r2, [r3, #81] ; 0x51
LEDData[27][1] = 0x00;
8001668: 4b34 ldr r3, [pc, #208] ; (800173c <LEDDesign_Smile+0x328>)
800166a: 2200 movs r2, #0
800166c: f883 2052 strb.w r2, [r3, #82] ; 0x52
LEDData[27][2] = 0x00;
8001670: 4b32 ldr r3, [pc, #200] ; (800173c <LEDDesign_Smile+0x328>)
8001672: 2200 movs r2, #0
8001674: f883 2053 strb.w r2, [r3, #83] ; 0x53
LEDData[28][0] = 0x00;
8001678: 4b30 ldr r3, [pc, #192] ; (800173c <LEDDesign_Smile+0x328>)
800167a: 2200 movs r2, #0
800167c: f883 2054 strb.w r2, [r3, #84] ; 0x54
LEDData[28][1] = 0x00;
8001680: 4b2e ldr r3, [pc, #184] ; (800173c <LEDDesign_Smile+0x328>)
8001682: 2200 movs r2, #0
8001684: f883 2055 strb.w r2, [r3, #85] ; 0x55
LEDData[28][2] = 0x00;
8001688: 4b2c ldr r3, [pc, #176] ; (800173c <LEDDesign_Smile+0x328>)
800168a: 2200 movs r2, #0
800168c: f883 2056 strb.w r2, [r3, #86] ; 0x56
LEDData[29][0] = 0x00;
8001690: 4b2a ldr r3, [pc, #168] ; (800173c <LEDDesign_Smile+0x328>)
8001692: 2200 movs r2, #0
8001694: f883 2057 strb.w r2, [r3, #87] ; 0x57
LEDData[29][1] = 0x00;
8001698: 4b28 ldr r3, [pc, #160] ; (800173c <LEDDesign_Smile+0x328>)
800169a: 2200 movs r2, #0
800169c: f883 2058 strb.w r2, [r3, #88] ; 0x58
LEDData[29][2] = 0x00;
80016a0: 4b26 ldr r3, [pc, #152] ; (800173c <LEDDesign_Smile+0x328>)
80016a2: 2200 movs r2, #0
80016a4: f883 2059 strb.w r2, [r3, #89] ; 0x59
LEDData[30][0] = 0x00;
80016a8: 4b24 ldr r3, [pc, #144] ; (800173c <LEDDesign_Smile+0x328>)
80016aa: 2200 movs r2, #0
80016ac: f883 205a strb.w r2, [r3, #90] ; 0x5a
LEDData[30][1] = 0x00;
80016b0: 4b22 ldr r3, [pc, #136] ; (800173c <LEDDesign_Smile+0x328>)
80016b2: 2200 movs r2, #0
80016b4: f883 205b strb.w r2, [r3, #91] ; 0x5b
LEDData[30][2] = 0x00;
80016b8: 4b20 ldr r3, [pc, #128] ; (800173c <LEDDesign_Smile+0x328>)
80016ba: 2200 movs r2, #0
80016bc: f883 205c strb.w r2, [r3, #92] ; 0x5c
LEDData[31][0] = 0x00;
80016c0: 4b1e ldr r3, [pc, #120] ; (800173c <LEDDesign_Smile+0x328>)
80016c2: 2200 movs r2, #0
80016c4: f883 205d strb.w r2, [r3, #93] ; 0x5d
LEDData[31][1] = 0x00;
80016c8: 4b1c ldr r3, [pc, #112] ; (800173c <LEDDesign_Smile+0x328>)
80016ca: 2200 movs r2, #0
80016cc: f883 205e strb.w r2, [r3, #94] ; 0x5e
LEDData[31][2] = 0x00;
80016d0: 4b1a ldr r3, [pc, #104] ; (800173c <LEDDesign_Smile+0x328>)
80016d2: 2200 movs r2, #0
80016d4: f883 205f strb.w r2, [r3, #95] ; 0x5f
LEDData[32][0] = 0x00;
80016d8: 4b18 ldr r3, [pc, #96] ; (800173c <LEDDesign_Smile+0x328>)
80016da: 2200 movs r2, #0
80016dc: f883 2060 strb.w r2, [r3, #96] ; 0x60
LEDData[32][1] = 0x00;
80016e0: 4b16 ldr r3, [pc, #88] ; (800173c <LEDDesign_Smile+0x328>)
80016e2: 2200 movs r2, #0
80016e4: f883 2061 strb.w r2, [r3, #97] ; 0x61
LEDData[32][2] = 0x00;
80016e8: 4b14 ldr r3, [pc, #80] ; (800173c <LEDDesign_Smile+0x328>)
80016ea: 2200 movs r2, #0
80016ec: f883 2062 strb.w r2, [r3, #98] ; 0x62
LEDData[33][0] = 0x00;
80016f0: 4b12 ldr r3, [pc, #72] ; (800173c <LEDDesign_Smile+0x328>)
80016f2: 2200 movs r2, #0
80016f4: f883 2063 strb.w r2, [r3, #99] ; 0x63
LEDData[33][1] = 0x00;
80016f8: 4b10 ldr r3, [pc, #64] ; (800173c <LEDDesign_Smile+0x328>)
80016fa: 2200 movs r2, #0
80016fc: f883 2064 strb.w r2, [r3, #100] ; 0x64
LEDData[33][2] = 0x00;
8001700: 4b0e ldr r3, [pc, #56] ; (800173c <LEDDesign_Smile+0x328>)
8001702: 2200 movs r2, #0
8001704: f883 2065 strb.w r2, [r3, #101] ; 0x65
LEDData[34][0] = 0x00;
8001708: 4b0c ldr r3, [pc, #48] ; (800173c <LEDDesign_Smile+0x328>)
800170a: 2200 movs r2, #0
800170c: f883 2066 strb.w r2, [r3, #102] ; 0x66
LEDData[34][1] = 0x00;
8001710: 4b0a ldr r3, [pc, #40] ; (800173c <LEDDesign_Smile+0x328>)
8001712: 2200 movs r2, #0
8001714: f883 2067 strb.w r2, [r3, #103] ; 0x67
LEDData[34][2] = 0x00;
8001718: 4b08 ldr r3, [pc, #32] ; (800173c <LEDDesign_Smile+0x328>)
800171a: 2200 movs r2, #0
800171c: f883 2068 strb.w r2, [r3, #104] ; 0x68
LEDData[35][0] = 0x00;
8001720: 4b06 ldr r3, [pc, #24] ; (800173c <LEDDesign_Smile+0x328>)
8001722: 2200 movs r2, #0
8001724: f883 2069 strb.w r2, [r3, #105] ; 0x69
LEDData[35][1] = 0x00;
8001728: 4b04 ldr r3, [pc, #16] ; (800173c <LEDDesign_Smile+0x328>)
800172a: 2200 movs r2, #0
800172c: f883 206a strb.w r2, [r3, #106] ; 0x6a
LEDData[35][2] = 0x00;
8001730: 4b02 ldr r3, [pc, #8] ; (800173c <LEDDesign_Smile+0x328>)
8001732: 2200 movs r2, #0
8001734: f883 206b strb.w r2, [r3, #107] ; 0x6b
8001738: e002 b.n 8001740 <LEDDesign_Smile+0x32c>
800173a: bf00 nop
800173c: 20000090 .word 0x20000090
LEDData[36][0] = 0x00;
8001740: 4baa ldr r3, [pc, #680] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001742: 2200 movs r2, #0
8001744: f883 206c strb.w r2, [r3, #108] ; 0x6c
LEDData[36][1] = 0x00;
8001748: 4ba8 ldr r3, [pc, #672] ; (80019ec <LEDDesign_Smile+0x5d8>)
800174a: 2200 movs r2, #0
800174c: f883 206d strb.w r2, [r3, #109] ; 0x6d
LEDData[36][2] = 0x00;
8001750: 4ba6 ldr r3, [pc, #664] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001752: 2200 movs r2, #0
8001754: f883 206e strb.w r2, [r3, #110] ; 0x6e
LEDData[37][0] = 0x00;
8001758: 4ba4 ldr r3, [pc, #656] ; (80019ec <LEDDesign_Smile+0x5d8>)
800175a: 2200 movs r2, #0
800175c: f883 206f strb.w r2, [r3, #111] ; 0x6f
LEDData[37][1] = 0x00;
8001760: 4ba2 ldr r3, [pc, #648] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001762: 2200 movs r2, #0
8001764: f883 2070 strb.w r2, [r3, #112] ; 0x70
LEDData[37][2] = 0x7F;
8001768: 4ba0 ldr r3, [pc, #640] ; (80019ec <LEDDesign_Smile+0x5d8>)
800176a: 227f movs r2, #127 ; 0x7f
800176c: f883 2071 strb.w r2, [r3, #113] ; 0x71
LEDData[38][0] = 0x00;
8001770: 4b9e ldr r3, [pc, #632] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001772: 2200 movs r2, #0
8001774: f883 2072 strb.w r2, [r3, #114] ; 0x72
LEDData[38][1] = 0x00;
8001778: 4b9c ldr r3, [pc, #624] ; (80019ec <LEDDesign_Smile+0x5d8>)
800177a: 2200 movs r2, #0
800177c: f883 2073 strb.w r2, [r3, #115] ; 0x73
LEDData[38][2] = 0x00;
8001780: 4b9a ldr r3, [pc, #616] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001782: 2200 movs r2, #0
8001784: f883 2074 strb.w r2, [r3, #116] ; 0x74
LEDData[39][0] = 0x00;
8001788: 4b98 ldr r3, [pc, #608] ; (80019ec <LEDDesign_Smile+0x5d8>)
800178a: 2200 movs r2, #0
800178c: f883 2075 strb.w r2, [r3, #117] ; 0x75
LEDData[39][1] = 0x00;
8001790: 4b96 ldr r3, [pc, #600] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001792: 2200 movs r2, #0
8001794: f883 2076 strb.w r2, [r3, #118] ; 0x76
LEDData[39][2] = 0x00;
8001798: 4b94 ldr r3, [pc, #592] ; (80019ec <LEDDesign_Smile+0x5d8>)
800179a: 2200 movs r2, #0
800179c: f883 2077 strb.w r2, [r3, #119] ; 0x77
LEDData[40][0] = 0x00;
80017a0: 4b92 ldr r3, [pc, #584] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017a2: 2200 movs r2, #0
80017a4: f883 2078 strb.w r2, [r3, #120] ; 0x78
LEDData[40][1] = 0x00;
80017a8: 4b90 ldr r3, [pc, #576] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017aa: 2200 movs r2, #0
80017ac: f883 2079 strb.w r2, [r3, #121] ; 0x79
LEDData[40][2] = 0x00;
80017b0: 4b8e ldr r3, [pc, #568] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017b2: 2200 movs r2, #0
80017b4: f883 207a strb.w r2, [r3, #122] ; 0x7a
LEDData[41][0] = 0x00;
80017b8: 4b8c ldr r3, [pc, #560] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017ba: 2200 movs r2, #0
80017bc: f883 207b strb.w r2, [r3, #123] ; 0x7b
LEDData[41][1] = 0x00;
80017c0: 4b8a ldr r3, [pc, #552] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017c2: 2200 movs r2, #0
80017c4: f883 207c strb.w r2, [r3, #124] ; 0x7c
LEDData[41][2] = 0x00;
80017c8: 4b88 ldr r3, [pc, #544] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017ca: 2200 movs r2, #0
80017cc: f883 207d strb.w r2, [r3, #125] ; 0x7d
LEDData[42][0] = 0x00;
80017d0: 4b86 ldr r3, [pc, #536] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017d2: 2200 movs r2, #0
80017d4: f883 207e strb.w r2, [r3, #126] ; 0x7e
LEDData[42][1] = 0x00;
80017d8: 4b84 ldr r3, [pc, #528] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017da: 2200 movs r2, #0
80017dc: f883 207f strb.w r2, [r3, #127] ; 0x7f
LEDData[42][2] = 0x7F;
80017e0: 4b82 ldr r3, [pc, #520] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017e2: 227f movs r2, #127 ; 0x7f
80017e4: f883 2080 strb.w r2, [r3, #128] ; 0x80
LEDData[43][0] = 0x00;
80017e8: 4b80 ldr r3, [pc, #512] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017ea: 2200 movs r2, #0
80017ec: f883 2081 strb.w r2, [r3, #129] ; 0x81
LEDData[43][1] = 0x00;
80017f0: 4b7e ldr r3, [pc, #504] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017f2: 2200 movs r2, #0
80017f4: f883 2082 strb.w r2, [r3, #130] ; 0x82
LEDData[43][2] = 0x00;
80017f8: 4b7c ldr r3, [pc, #496] ; (80019ec <LEDDesign_Smile+0x5d8>)
80017fa: 2200 movs r2, #0
80017fc: f883 2083 strb.w r2, [r3, #131] ; 0x83
LEDData[44][0] = 0x00;
8001800: 4b7a ldr r3, [pc, #488] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001802: 2200 movs r2, #0
8001804: f883 2084 strb.w r2, [r3, #132] ; 0x84
LEDData[44][1] = 0x00;
8001808: 4b78 ldr r3, [pc, #480] ; (80019ec <LEDDesign_Smile+0x5d8>)
800180a: 2200 movs r2, #0
800180c: f883 2085 strb.w r2, [r3, #133] ; 0x85
LEDData[44][2] = 0x00;
8001810: 4b76 ldr r3, [pc, #472] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001812: 2200 movs r2, #0
8001814: f883 2086 strb.w r2, [r3, #134] ; 0x86
LEDData[45][0] = 0x00;
8001818: 4b74 ldr r3, [pc, #464] ; (80019ec <LEDDesign_Smile+0x5d8>)
800181a: 2200 movs r2, #0
800181c: f883 2087 strb.w r2, [r3, #135] ; 0x87
LEDData[45][1] = 0x00;
8001820: 4b72 ldr r3, [pc, #456] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001822: 2200 movs r2, #0
8001824: f883 2088 strb.w r2, [r3, #136] ; 0x88
LEDData[45][2] = 0x00;
8001828: 4b70 ldr r3, [pc, #448] ; (80019ec <LEDDesign_Smile+0x5d8>)
800182a: 2200 movs r2, #0
800182c: f883 2089 strb.w r2, [r3, #137] ; 0x89
LEDData[46][0] = 0x00;
8001830: 4b6e ldr r3, [pc, #440] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001832: 2200 movs r2, #0
8001834: f883 208a strb.w r2, [r3, #138] ; 0x8a
LEDData[46][1] = 0x00;
8001838: 4b6c ldr r3, [pc, #432] ; (80019ec <LEDDesign_Smile+0x5d8>)
800183a: 2200 movs r2, #0
800183c: f883 208b strb.w r2, [r3, #139] ; 0x8b
LEDData[46][2] = 0x00;
8001840: 4b6a ldr r3, [pc, #424] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001842: 2200 movs r2, #0
8001844: f883 208c strb.w r2, [r3, #140] ; 0x8c
LEDData[47][0] = 0x00;
8001848: 4b68 ldr r3, [pc, #416] ; (80019ec <LEDDesign_Smile+0x5d8>)
800184a: 2200 movs r2, #0
800184c: f883 208d strb.w r2, [r3, #141] ; 0x8d
LEDData[47][1] = 0x00;
8001850: 4b66 ldr r3, [pc, #408] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001852: 2200 movs r2, #0
8001854: f883 208e strb.w r2, [r3, #142] ; 0x8e
LEDData[47][2] = 0x00;
8001858: 4b64 ldr r3, [pc, #400] ; (80019ec <LEDDesign_Smile+0x5d8>)
800185a: 2200 movs r2, #0
800185c: f883 208f strb.w r2, [r3, #143] ; 0x8f
LEDData[48][0] = 0x00;
8001860: 4b62 ldr r3, [pc, #392] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001862: 2200 movs r2, #0
8001864: f883 2090 strb.w r2, [r3, #144] ; 0x90
LEDData[48][1] = 0x00;
8001868: 4b60 ldr r3, [pc, #384] ; (80019ec <LEDDesign_Smile+0x5d8>)
800186a: 2200 movs r2, #0
800186c: f883 2091 strb.w r2, [r3, #145] ; 0x91
LEDData[48][2] = 0x00;
8001870: 4b5e ldr r3, [pc, #376] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001872: 2200 movs r2, #0
8001874: f883 2092 strb.w r2, [r3, #146] ; 0x92
LEDData[49][0] = 0x00;
8001878: 4b5c ldr r3, [pc, #368] ; (80019ec <LEDDesign_Smile+0x5d8>)
800187a: 2200 movs r2, #0
800187c: f883 2093 strb.w r2, [r3, #147] ; 0x93
LEDData[49][1] = 0x00;
8001880: 4b5a ldr r3, [pc, #360] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001882: 2200 movs r2, #0
8001884: f883 2094 strb.w r2, [r3, #148] ; 0x94
LEDData[49][2] = 0x00;
8001888: 4b58 ldr r3, [pc, #352] ; (80019ec <LEDDesign_Smile+0x5d8>)
800188a: 2200 movs r2, #0
800188c: f883 2095 strb.w r2, [r3, #149] ; 0x95
LEDData[50][0] = 0x00;
8001890: 4b56 ldr r3, [pc, #344] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001892: 2200 movs r2, #0
8001894: f883 2096 strb.w r2, [r3, #150] ; 0x96
LEDData[50][1] = 0x00;
8001898: 4b54 ldr r3, [pc, #336] ; (80019ec <LEDDesign_Smile+0x5d8>)
800189a: 2200 movs r2, #0
800189c: f883 2097 strb.w r2, [r3, #151] ; 0x97
LEDData[50][2] = 0x00;
80018a0: 4b52 ldr r3, [pc, #328] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018a2: 2200 movs r2, #0
80018a4: f883 2098 strb.w r2, [r3, #152] ; 0x98
LEDData[51][0] = 0x00;
80018a8: 4b50 ldr r3, [pc, #320] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018aa: 2200 movs r2, #0
80018ac: f883 2099 strb.w r2, [r3, #153] ; 0x99
LEDData[51][1] = 0x00;
80018b0: 4b4e ldr r3, [pc, #312] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018b2: 2200 movs r2, #0
80018b4: f883 209a strb.w r2, [r3, #154] ; 0x9a
LEDData[51][2] = 0x00;
80018b8: 4b4c ldr r3, [pc, #304] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018ba: 2200 movs r2, #0
80018bc: f883 209b strb.w r2, [r3, #155] ; 0x9b
LEDData[52][0] = 0x00;
80018c0: 4b4a ldr r3, [pc, #296] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018c2: 2200 movs r2, #0
80018c4: f883 209c strb.w r2, [r3, #156] ; 0x9c
LEDData[52][1] = 0x00;
80018c8: 4b48 ldr r3, [pc, #288] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018ca: 2200 movs r2, #0
80018cc: f883 209d strb.w r2, [r3, #157] ; 0x9d
LEDData[52][2] = 0x00;
80018d0: 4b46 ldr r3, [pc, #280] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018d2: 2200 movs r2, #0
80018d4: f883 209e strb.w r2, [r3, #158] ; 0x9e
LEDData[53][0] = 0x00;
80018d8: 4b44 ldr r3, [pc, #272] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018da: 2200 movs r2, #0
80018dc: f883 209f strb.w r2, [r3, #159] ; 0x9f
LEDData[53][1] = 0x00;
80018e0: 4b42 ldr r3, [pc, #264] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018e2: 2200 movs r2, #0
80018e4: f883 20a0 strb.w r2, [r3, #160] ; 0xa0
LEDData[53][2] = 0x7F;
80018e8: 4b40 ldr r3, [pc, #256] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018ea: 227f movs r2, #127 ; 0x7f
80018ec: f883 20a1 strb.w r2, [r3, #161] ; 0xa1
LEDData[54][0] = 0x00;
80018f0: 4b3e ldr r3, [pc, #248] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018f2: 2200 movs r2, #0
80018f4: f883 20a2 strb.w r2, [r3, #162] ; 0xa2
LEDData[54][1] = 0x00;
80018f8: 4b3c ldr r3, [pc, #240] ; (80019ec <LEDDesign_Smile+0x5d8>)
80018fa: 2200 movs r2, #0
80018fc: f883 20a3 strb.w r2, [r3, #163] ; 0xa3
LEDData[54][2] = 0x00;
8001900: 4b3a ldr r3, [pc, #232] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001902: 2200 movs r2, #0
8001904: f883 20a4 strb.w r2, [r3, #164] ; 0xa4
LEDData[55][0] = 0x00;
8001908: 4b38 ldr r3, [pc, #224] ; (80019ec <LEDDesign_Smile+0x5d8>)
800190a: 2200 movs r2, #0
800190c: f883 20a5 strb.w r2, [r3, #165] ; 0xa5
LEDData[55][1] = 0x00;
8001910: 4b36 ldr r3, [pc, #216] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001912: 2200 movs r2, #0
8001914: f883 20a6 strb.w r2, [r3, #166] ; 0xa6
LEDData[55][2] = 0x00;
8001918: 4b34 ldr r3, [pc, #208] ; (80019ec <LEDDesign_Smile+0x5d8>)
800191a: 2200 movs r2, #0
800191c: f883 20a7 strb.w r2, [r3, #167] ; 0xa7
LEDData[56][0] = 0x00;
8001920: 4b32 ldr r3, [pc, #200] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001922: 2200 movs r2, #0
8001924: f883 20a8 strb.w r2, [r3, #168] ; 0xa8
LEDData[56][1] = 0x00;
8001928: 4b30 ldr r3, [pc, #192] ; (80019ec <LEDDesign_Smile+0x5d8>)
800192a: 2200 movs r2, #0
800192c: f883 20a9 strb.w r2, [r3, #169] ; 0xa9
LEDData[56][2] = 0x00;
8001930: 4b2e ldr r3, [pc, #184] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001932: 2200 movs r2, #0
8001934: f883 20aa strb.w r2, [r3, #170] ; 0xaa
LEDData[57][0] = 0x00;
8001938: 4b2c ldr r3, [pc, #176] ; (80019ec <LEDDesign_Smile+0x5d8>)
800193a: 2200 movs r2, #0
800193c: f883 20ab strb.w r2, [r3, #171] ; 0xab
LEDData[57][1] = 0x00;
8001940: 4b2a ldr r3, [pc, #168] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001942: 2200 movs r2, #0
8001944: f883 20ac strb.w r2, [r3, #172] ; 0xac
LEDData[57][2] = 0x00;
8001948: 4b28 ldr r3, [pc, #160] ; (80019ec <LEDDesign_Smile+0x5d8>)
800194a: 2200 movs r2, #0
800194c: f883 20ad strb.w r2, [r3, #173] ; 0xad
LEDData[58][0] = 0x00;
8001950: 4b26 ldr r3, [pc, #152] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001952: 2200 movs r2, #0
8001954: f883 20ae strb.w r2, [r3, #174] ; 0xae
LEDData[58][1] = 0x00;
8001958: 4b24 ldr r3, [pc, #144] ; (80019ec <LEDDesign_Smile+0x5d8>)
800195a: 2200 movs r2, #0
800195c: f883 20af strb.w r2, [r3, #175] ; 0xaf
LEDData[58][2] = 0x00;
8001960: 4b22 ldr r3, [pc, #136] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001962: 2200 movs r2, #0
8001964: f883 20b0 strb.w r2, [r3, #176] ; 0xb0
LEDData[59][0] = 0x00;
8001968: 4b20 ldr r3, [pc, #128] ; (80019ec <LEDDesign_Smile+0x5d8>)
800196a: 2200 movs r2, #0
800196c: f883 20b1 strb.w r2, [r3, #177] ; 0xb1
LEDData[59][1] = 0x00;
8001970: 4b1e ldr r3, [pc, #120] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001972: 2200 movs r2, #0
8001974: f883 20b2 strb.w r2, [r3, #178] ; 0xb2
LEDData[59][2] = 0x7F;
8001978: 4b1c ldr r3, [pc, #112] ; (80019ec <LEDDesign_Smile+0x5d8>)
800197a: 227f movs r2, #127 ; 0x7f
800197c: f883 20b3 strb.w r2, [r3, #179] ; 0xb3
LEDData[60][0] = 0x00;
8001980: 4b1a ldr r3, [pc, #104] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001982: 2200 movs r2, #0
8001984: f883 20b4 strb.w r2, [r3, #180] ; 0xb4
LEDData[60][1] = 0x00;
8001988: 4b18 ldr r3, [pc, #96] ; (80019ec <LEDDesign_Smile+0x5d8>)
800198a: 2200 movs r2, #0
800198c: f883 20b5 strb.w r2, [r3, #181] ; 0xb5
LEDData[60][2] = 0x00;
8001990: 4b16 ldr r3, [pc, #88] ; (80019ec <LEDDesign_Smile+0x5d8>)
8001992: 2200 movs r2, #0
8001994: f883 20b6 strb.w r2, [r3, #182] ; 0xb6
LEDData[61][0] = 0x00;
8001998: 4b14 ldr r3, [pc, #80] ; (80019ec <LEDDesign_Smile+0x5d8>)
800199a: 2200 movs r2, #0
800199c: f883 20b7 strb.w r2, [r3, #183] ; 0xb7
LEDData[61][1] = 0x00;
80019a0: 4b12 ldr r3, [pc, #72] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019a2: 2200 movs r2, #0
80019a4: f883 20b8 strb.w r2, [r3, #184] ; 0xb8
LEDData[61][2] = 0x00;
80019a8: 4b10 ldr r3, [pc, #64] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019aa: 2200 movs r2, #0
80019ac: f883 20b9 strb.w r2, [r3, #185] ; 0xb9
LEDData[62][0] = 0x00;
80019b0: 4b0e ldr r3, [pc, #56] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019b2: 2200 movs r2, #0
80019b4: f883 20ba strb.w r2, [r3, #186] ; 0xba
LEDData[62][1] = 0x00;
80019b8: 4b0c ldr r3, [pc, #48] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019ba: 2200 movs r2, #0
80019bc: f883 20bb strb.w r2, [r3, #187] ; 0xbb
LEDData[62][2] = 0x00;
80019c0: 4b0a ldr r3, [pc, #40] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019c2: 2200 movs r2, #0
80019c4: f883 20bc strb.w r2, [r3, #188] ; 0xbc
LEDData[63][0] = 0x00;
80019c8: 4b08 ldr r3, [pc, #32] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019ca: 2200 movs r2, #0
80019cc: f883 20bd strb.w r2, [r3, #189] ; 0xbd
LEDData[63][1] = 0x00;
80019d0: 4b06 ldr r3, [pc, #24] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019d2: 2200 movs r2, #0
80019d4: f883 20be strb.w r2, [r3, #190] ; 0xbe
LEDData[63][2] = 0x00;
80019d8: 4b04 ldr r3, [pc, #16] ; (80019ec <LEDDesign_Smile+0x5d8>)
80019da: 2200 movs r2, #0
80019dc: f883 20bf strb.w r2, [r3, #191] ; 0xbf
}
80019e0: bf00 nop
80019e2: 46bd mov sp, r7
80019e4: f85d 7b04 ldr.w r7, [sp], #4
80019e8: 4770 bx lr
80019ea: bf00 nop
80019ec: 20000090 .word 0x20000090
080019f0 <LEDDesign_SuperCrazy>:
void LEDDesign_SuperCrazy(void){
80019f0: b580 push {r7, lr}
80019f2: b084 sub sp, #16
80019f4: af00 add r7, sp, #0
HAL_Delay(50);
80019f6: 2032 movs r0, #50 ; 0x32
80019f8: f000 fb18 bl 800202c <HAL_Delay>
uint8_t randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
80019fc: f002 fba0 bl 8004140 <rand>
8001a00: ee07 0a90 vmov s15, r0
8001a04: eeb8 7ae7 vcvt.f32.s32 s14, s15
8001a08: eddf 6a37 vldr s13, [pc, #220] ; 8001ae8 <LEDDesign_SuperCrazy+0xf8>
8001a0c: eec7 7a26 vdiv.f32 s15, s14, s13
8001a10: ed9f 7a36 vldr s14, [pc, #216] ; 8001aec <LEDDesign_SuperCrazy+0xfc>
8001a14: ee67 7a87 vmul.f32 s15, s15, s14
8001a18: eefc 7ae7 vcvt.u32.f32 s15, s15
8001a1c: edc7 7a01 vstr s15, [r7, #4]
8001a20: 793b ldrb r3, [r7, #4]
8001a22: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
8001a24: 2300 movs r3, #0
8001a26: 73fb strb r3, [r7, #15]
8001a28: e00a b.n 8001a40 <LEDDesign_SuperCrazy+0x50>
LEDData[i][0] = randomByte;
8001a2a: 7bfa ldrb r2, [r7, #15]
8001a2c: 4930 ldr r1, [pc, #192] ; (8001af0 <LEDDesign_SuperCrazy+0x100>)
8001a2e: 4613 mov r3, r2
8001a30: 005b lsls r3, r3, #1
8001a32: 4413 add r3, r2
8001a34: 440b add r3, r1
8001a36: 7b3a ldrb r2, [r7, #12]
8001a38: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001a3a: 7bfb ldrb r3, [r7, #15]
8001a3c: 3301 adds r3, #1
8001a3e: 73fb strb r3, [r7, #15]
8001a40: 7bfb ldrb r3, [r7, #15]
8001a42: 2b3f cmp r3, #63 ; 0x3f
8001a44: d9f1 bls.n 8001a2a <LEDDesign_SuperCrazy+0x3a>
}
randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
8001a46: f002 fb7b bl 8004140 <rand>
8001a4a: ee07 0a90 vmov s15, r0
8001a4e: eeb8 7ae7 vcvt.f32.s32 s14, s15
8001a52: eddf 6a25 vldr s13, [pc, #148] ; 8001ae8 <LEDDesign_SuperCrazy+0xf8>
8001a56: eec7 7a26 vdiv.f32 s15, s14, s13
8001a5a: ed9f 7a24 vldr s14, [pc, #144] ; 8001aec <LEDDesign_SuperCrazy+0xfc>
8001a5e: ee67 7a87 vmul.f32 s15, s15, s14
8001a62: eefc 7ae7 vcvt.u32.f32 s15, s15
8001a66: edc7 7a01 vstr s15, [r7, #4]
8001a6a: 793b ldrb r3, [r7, #4]
8001a6c: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
8001a6e: 2300 movs r3, #0
8001a70: 73bb strb r3, [r7, #14]
8001a72: e00b b.n 8001a8c <LEDDesign_SuperCrazy+0x9c>
LEDData[i][1] = randomByte;
8001a74: 7bba ldrb r2, [r7, #14]
8001a76: 491e ldr r1, [pc, #120] ; (8001af0 <LEDDesign_SuperCrazy+0x100>)
8001a78: 4613 mov r3, r2
8001a7a: 005b lsls r3, r3, #1
8001a7c: 4413 add r3, r2
8001a7e: 440b add r3, r1
8001a80: 3301 adds r3, #1
8001a82: 7b3a ldrb r2, [r7, #12]
8001a84: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001a86: 7bbb ldrb r3, [r7, #14]
8001a88: 3301 adds r3, #1
8001a8a: 73bb strb r3, [r7, #14]
8001a8c: 7bbb ldrb r3, [r7, #14]
8001a8e: 2b3f cmp r3, #63 ; 0x3f
8001a90: d9f0 bls.n 8001a74 <LEDDesign_SuperCrazy+0x84>
}
randomByte = (uint8_t) (0xFF * (((float) rand()) / RAND_MAX));
8001a92: f002 fb55 bl 8004140 <rand>
8001a96: ee07 0a90 vmov s15, r0
8001a9a: eeb8 7ae7 vcvt.f32.s32 s14, s15
8001a9e: eddf 6a12 vldr s13, [pc, #72] ; 8001ae8 <LEDDesign_SuperCrazy+0xf8>
8001aa2: eec7 7a26 vdiv.f32 s15, s14, s13
8001aa6: ed9f 7a11 vldr s14, [pc, #68] ; 8001aec <LEDDesign_SuperCrazy+0xfc>
8001aaa: ee67 7a87 vmul.f32 s15, s15, s14
8001aae: eefc 7ae7 vcvt.u32.f32 s15, s15
8001ab2: edc7 7a01 vstr s15, [r7, #4]
8001ab6: 793b ldrb r3, [r7, #4]
8001ab8: 733b strb r3, [r7, #12]
for(uint8_t i = 0; i < 64; ++i){
8001aba: 2300 movs r3, #0
8001abc: 737b strb r3, [r7, #13]
8001abe: e00b b.n 8001ad8 <LEDDesign_SuperCrazy+0xe8>
LEDData[i][2] = randomByte;
8001ac0: 7b7a ldrb r2, [r7, #13]
8001ac2: 490b ldr r1, [pc, #44] ; (8001af0 <LEDDesign_SuperCrazy+0x100>)
8001ac4: 4613 mov r3, r2
8001ac6: 005b lsls r3, r3, #1
8001ac8: 4413 add r3, r2
8001aca: 440b add r3, r1
8001acc: 3302 adds r3, #2
8001ace: 7b3a ldrb r2, [r7, #12]
8001ad0: 701a strb r2, [r3, #0]
for(uint8_t i = 0; i < 64; ++i){
8001ad2: 7b7b ldrb r3, [r7, #13]
8001ad4: 3301 adds r3, #1
8001ad6: 737b strb r3, [r7, #13]
8001ad8: 7b7b ldrb r3, [r7, #13]
8001ada: 2b3f cmp r3, #63 ; 0x3f
8001adc: d9f0 bls.n 8001ac0 <LEDDesign_SuperCrazy+0xd0>
}
}
8001ade: bf00 nop
8001ae0: 3710 adds r7, #16
8001ae2: 46bd mov sp, r7
8001ae4: bd80 pop {r7, pc}
8001ae6: bf00 nop
8001ae8: 4f000000 .word 0x4f000000
8001aec: 437f0000 .word 0x437f0000
8001af0: 20000090 .word 0x20000090
08001af4 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8001af4: b480 push {r7}
8001af6: af00 add r7, sp, #0
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
8001af8: bf00 nop
8001afa: 46bd mov sp, r7
8001afc: f85d 7b04 ldr.w r7, [sp], #4
8001b00: 4770 bx lr
...
08001b04 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8001b04: b580 push {r7, lr}
8001b06: b082 sub sp, #8
8001b08: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8001b0a: 2300 movs r3, #0
8001b0c: 607b str r3, [r7, #4]
8001b0e: 4b10 ldr r3, [pc, #64] ; (8001b50 <HAL_MspInit+0x4c>)
8001b10: 6c5b ldr r3, [r3, #68] ; 0x44
8001b12: 4a0f ldr r2, [pc, #60] ; (8001b50 <HAL_MspInit+0x4c>)
8001b14: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8001b18: 6453 str r3, [r2, #68] ; 0x44
8001b1a: 4b0d ldr r3, [pc, #52] ; (8001b50 <HAL_MspInit+0x4c>)
8001b1c: 6c5b ldr r3, [r3, #68] ; 0x44
8001b1e: f403 4380 and.w r3, r3, #16384 ; 0x4000
8001b22: 607b str r3, [r7, #4]
8001b24: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
8001b26: 2300 movs r3, #0
8001b28: 603b str r3, [r7, #0]
8001b2a: 4b09 ldr r3, [pc, #36] ; (8001b50 <HAL_MspInit+0x4c>)
8001b2c: 6c1b ldr r3, [r3, #64] ; 0x40
8001b2e: 4a08 ldr r2, [pc, #32] ; (8001b50 <HAL_MspInit+0x4c>)
8001b30: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8001b34: 6413 str r3, [r2, #64] ; 0x40
8001b36: 4b06 ldr r3, [pc, #24] ; (8001b50 <HAL_MspInit+0x4c>)
8001b38: 6c1b ldr r3, [r3, #64] ; 0x40
8001b3a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8001b3e: 603b str r3, [r7, #0]
8001b40: 683b ldr r3, [r7, #0]
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
8001b42: 2007 movs r0, #7
8001b44: f000 fdd6 bl 80026f4 <HAL_NVIC_SetPriorityGrouping>
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8001b48: bf00 nop
8001b4a: 3708 adds r7, #8
8001b4c: 46bd mov sp, r7
8001b4e: bd80 pop {r7, pc}
8001b50: 40023800 .word 0x40023800
08001b54 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8001b54: b580 push {r7, lr}
8001b56: b08a sub sp, #40 ; 0x28
8001b58: af00 add r7, sp, #0
8001b5a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001b5c: f107 0314 add.w r3, r7, #20
8001b60: 2200 movs r2, #0
8001b62: 601a str r2, [r3, #0]
8001b64: 605a str r2, [r3, #4]
8001b66: 609a str r2, [r3, #8]
8001b68: 60da str r2, [r3, #12]
8001b6a: 611a str r2, [r3, #16]
if(hadc->Instance==ADC3)
8001b6c: 687b ldr r3, [r7, #4]
8001b6e: 681b ldr r3, [r3, #0]
8001b70: 4a17 ldr r2, [pc, #92] ; (8001bd0 <HAL_ADC_MspInit+0x7c>)
8001b72: 4293 cmp r3, r2
8001b74: d127 bne.n 8001bc6 <HAL_ADC_MspInit+0x72>
{
/* USER CODE BEGIN ADC3_MspInit 0 */
/* USER CODE END ADC3_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC3_CLK_ENABLE();
8001b76: 2300 movs r3, #0
8001b78: 613b str r3, [r7, #16]
8001b7a: 4b16 ldr r3, [pc, #88] ; (8001bd4 <HAL_ADC_MspInit+0x80>)
8001b7c: 6c5b ldr r3, [r3, #68] ; 0x44
8001b7e: 4a15 ldr r2, [pc, #84] ; (8001bd4 <HAL_ADC_MspInit+0x80>)
8001b80: f443 6380 orr.w r3, r3, #1024 ; 0x400
8001b84: 6453 str r3, [r2, #68] ; 0x44
8001b86: 4b13 ldr r3, [pc, #76] ; (8001bd4 <HAL_ADC_MspInit+0x80>)
8001b88: 6c5b ldr r3, [r3, #68] ; 0x44
8001b8a: f403 6380 and.w r3, r3, #1024 ; 0x400
8001b8e: 613b str r3, [r7, #16]
8001b90: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOF_CLK_ENABLE();
8001b92: 2300 movs r3, #0
8001b94: 60fb str r3, [r7, #12]
8001b96: 4b0f ldr r3, [pc, #60] ; (8001bd4 <HAL_ADC_MspInit+0x80>)
8001b98: 6b1b ldr r3, [r3, #48] ; 0x30
8001b9a: 4a0e ldr r2, [pc, #56] ; (8001bd4 <HAL_ADC_MspInit+0x80>)
8001b9c: f043 0320 orr.w r3, r3, #32
8001ba0: 6313 str r3, [r2, #48] ; 0x30
8001ba2: 4b0c ldr r3, [pc, #48] ; (8001bd4 <HAL_ADC_MspInit+0x80>)
8001ba4: 6b1b ldr r3, [r3, #48] ; 0x30
8001ba6: f003 0320 and.w r3, r3, #32
8001baa: 60fb str r3, [r7, #12]
8001bac: 68fb ldr r3, [r7, #12]
/**ADC3 GPIO Configuration
PF6 ------> ADC3_IN4
*/
GPIO_InitStruct.Pin = GPIO_PIN_6;
8001bae: 2340 movs r3, #64 ; 0x40
8001bb0: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8001bb2: 2303 movs r3, #3
8001bb4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001bb6: 2300 movs r3, #0
8001bb8: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
8001bba: f107 0314 add.w r3, r7, #20
8001bbe: 4619 mov r1, r3
8001bc0: 4805 ldr r0, [pc, #20] ; (8001bd8 <HAL_ADC_MspInit+0x84>)
8001bc2: f000 fdfb bl 80027bc <HAL_GPIO_Init>
/* USER CODE BEGIN ADC3_MspInit 1 */
/* USER CODE END ADC3_MspInit 1 */
}
}
8001bc6: bf00 nop
8001bc8: 3728 adds r7, #40 ; 0x28
8001bca: 46bd mov sp, r7
8001bcc: bd80 pop {r7, pc}
8001bce: bf00 nop
8001bd0: 40012200 .word 0x40012200
8001bd4: 40023800 .word 0x40023800
8001bd8: 40021400 .word 0x40021400
08001bdc <HAL_SPI_MspInit>:
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
8001bdc: b580 push {r7, lr}
8001bde: b08a sub sp, #40 ; 0x28
8001be0: af00 add r7, sp, #0
8001be2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001be4: f107 0314 add.w r3, r7, #20
8001be8: 2200 movs r2, #0
8001bea: 601a str r2, [r3, #0]
8001bec: 605a str r2, [r3, #4]
8001bee: 609a str r2, [r3, #8]
8001bf0: 60da str r2, [r3, #12]
8001bf2: 611a str r2, [r3, #16]
if(hspi->Instance==SPI4)
8001bf4: 687b ldr r3, [r7, #4]
8001bf6: 681b ldr r3, [r3, #0]
8001bf8: 4a1d ldr r2, [pc, #116] ; (8001c70 <HAL_SPI_MspInit+0x94>)
8001bfa: 4293 cmp r3, r2
8001bfc: d133 bne.n 8001c66 <HAL_SPI_MspInit+0x8a>
{
/* USER CODE BEGIN SPI4_MspInit 0 */
/* USER CODE END SPI4_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI4_CLK_ENABLE();
8001bfe: 2300 movs r3, #0
8001c00: 613b str r3, [r7, #16]
8001c02: 4b1c ldr r3, [pc, #112] ; (8001c74 <HAL_SPI_MspInit+0x98>)
8001c04: 6c5b ldr r3, [r3, #68] ; 0x44
8001c06: 4a1b ldr r2, [pc, #108] ; (8001c74 <HAL_SPI_MspInit+0x98>)
8001c08: f443 5300 orr.w r3, r3, #8192 ; 0x2000
8001c0c: 6453 str r3, [r2, #68] ; 0x44
8001c0e: 4b19 ldr r3, [pc, #100] ; (8001c74 <HAL_SPI_MspInit+0x98>)
8001c10: 6c5b ldr r3, [r3, #68] ; 0x44
8001c12: f403 5300 and.w r3, r3, #8192 ; 0x2000
8001c16: 613b str r3, [r7, #16]
8001c18: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOE_CLK_ENABLE();
8001c1a: 2300 movs r3, #0
8001c1c: 60fb str r3, [r7, #12]
8001c1e: 4b15 ldr r3, [pc, #84] ; (8001c74 <HAL_SPI_MspInit+0x98>)
8001c20: 6b1b ldr r3, [r3, #48] ; 0x30
8001c22: 4a14 ldr r2, [pc, #80] ; (8001c74 <HAL_SPI_MspInit+0x98>)
8001c24: f043 0310 orr.w r3, r3, #16
8001c28: 6313 str r3, [r2, #48] ; 0x30
8001c2a: 4b12 ldr r3, [pc, #72] ; (8001c74 <HAL_SPI_MspInit+0x98>)
8001c2c: 6b1b ldr r3, [r3, #48] ; 0x30
8001c2e: f003 0310 and.w r3, r3, #16
8001c32: 60fb str r3, [r7, #12]
8001c34: 68fb ldr r3, [r7, #12]
/**SPI4 GPIO Configuration
PE2 ------> SPI4_SCK
PE6 ------> SPI4_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_6;
8001c36: 2344 movs r3, #68 ; 0x44
8001c38: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001c3a: 2302 movs r3, #2
8001c3c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001c3e: 2300 movs r3, #0
8001c40: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001c42: 2303 movs r3, #3
8001c44: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
8001c46: 2305 movs r3, #5
8001c48: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8001c4a: f107 0314 add.w r3, r7, #20
8001c4e: 4619 mov r1, r3
8001c50: 4809 ldr r0, [pc, #36] ; (8001c78 <HAL_SPI_MspInit+0x9c>)
8001c52: f000 fdb3 bl 80027bc <HAL_GPIO_Init>
/* SPI4 interrupt Init */
HAL_NVIC_SetPriority(SPI4_IRQn, 0, 0);
8001c56: 2200 movs r2, #0
8001c58: 2100 movs r1, #0
8001c5a: 2054 movs r0, #84 ; 0x54
8001c5c: f000 fd55 bl 800270a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(SPI4_IRQn);
8001c60: 2054 movs r0, #84 ; 0x54
8001c62: f000 fd6e bl 8002742 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN SPI4_MspInit 1 */
/* USER CODE END SPI4_MspInit 1 */
}
}
8001c66: bf00 nop
8001c68: 3728 adds r7, #40 ; 0x28
8001c6a: 46bd mov sp, r7
8001c6c: bd80 pop {r7, pc}
8001c6e: bf00 nop
8001c70: 40013400 .word 0x40013400
8001c74: 40023800 .word 0x40023800
8001c78: 40021000 .word 0x40021000
08001c7c <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8001c7c: b580 push {r7, lr}
8001c7e: b084 sub sp, #16
8001c80: af00 add r7, sp, #0
8001c82: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM6)
8001c84: 687b ldr r3, [r7, #4]
8001c86: 681b ldr r3, [r3, #0]
8001c88: 4a0e ldr r2, [pc, #56] ; (8001cc4 <HAL_TIM_Base_MspInit+0x48>)
8001c8a: 4293 cmp r3, r2
8001c8c: d115 bne.n 8001cba <HAL_TIM_Base_MspInit+0x3e>
{
/* USER CODE BEGIN TIM6_MspInit 0 */
/* USER CODE END TIM6_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM6_CLK_ENABLE();
8001c8e: 2300 movs r3, #0
8001c90: 60fb str r3, [r7, #12]
8001c92: 4b0d ldr r3, [pc, #52] ; (8001cc8 <HAL_TIM_Base_MspInit+0x4c>)
8001c94: 6c1b ldr r3, [r3, #64] ; 0x40
8001c96: 4a0c ldr r2, [pc, #48] ; (8001cc8 <HAL_TIM_Base_MspInit+0x4c>)
8001c98: f043 0310 orr.w r3, r3, #16
8001c9c: 6413 str r3, [r2, #64] ; 0x40
8001c9e: 4b0a ldr r3, [pc, #40] ; (8001cc8 <HAL_TIM_Base_MspInit+0x4c>)
8001ca0: 6c1b ldr r3, [r3, #64] ; 0x40
8001ca2: f003 0310 and.w r3, r3, #16
8001ca6: 60fb str r3, [r7, #12]
8001ca8: 68fb ldr r3, [r7, #12]
/* TIM6 interrupt Init */
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0, 0);
8001caa: 2200 movs r2, #0
8001cac: 2100 movs r1, #0
8001cae: 2036 movs r0, #54 ; 0x36
8001cb0: f000 fd2b bl 800270a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
8001cb4: 2036 movs r0, #54 ; 0x36
8001cb6: f000 fd44 bl 8002742 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN TIM6_MspInit 1 */
/* USER CODE END TIM6_MspInit 1 */
}
}
8001cba: bf00 nop
8001cbc: 3710 adds r7, #16
8001cbe: 46bd mov sp, r7
8001cc0: bd80 pop {r7, pc}
8001cc2: bf00 nop
8001cc4: 40001000 .word 0x40001000
8001cc8: 40023800 .word 0x40023800
08001ccc <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8001ccc: b480 push {r7}
8001cce: af00 add r7, sp, #0
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
8001cd0: bf00 nop
8001cd2: 46bd mov sp, r7
8001cd4: f85d 7b04 ldr.w r7, [sp], #4
8001cd8: 4770 bx lr
08001cda <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8001cda: b480 push {r7}
8001cdc: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8001cde: e7fe b.n 8001cde <HardFault_Handler+0x4>
08001ce0 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8001ce0: b480 push {r7}
8001ce2: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8001ce4: e7fe b.n 8001ce4 <MemManage_Handler+0x4>
08001ce6 <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8001ce6: b480 push {r7}
8001ce8: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8001cea: e7fe b.n 8001cea <BusFault_Handler+0x4>
08001cec <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8001cec: b480 push {r7}
8001cee: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8001cf0: e7fe b.n 8001cf0 <UsageFault_Handler+0x4>
08001cf2 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8001cf2: b480 push {r7}
8001cf4: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8001cf6: bf00 nop
8001cf8: 46bd mov sp, r7
8001cfa: f85d 7b04 ldr.w r7, [sp], #4
8001cfe: 4770 bx lr
08001d00 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8001d00: b480 push {r7}
8001d02: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8001d04: bf00 nop
8001d06: 46bd mov sp, r7
8001d08: f85d 7b04 ldr.w r7, [sp], #4
8001d0c: 4770 bx lr
08001d0e <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8001d0e: b480 push {r7}
8001d10: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8001d12: bf00 nop
8001d14: 46bd mov sp, r7
8001d16: f85d 7b04 ldr.w r7, [sp], #4
8001d1a: 4770 bx lr
08001d1c <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8001d1c: b580 push {r7, lr}
8001d1e: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8001d20: f000 f964 bl 8001fec <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8001d24: bf00 nop
8001d26: bd80 pop {r7, pc}
08001d28 <EXTI0_IRQHandler>:
/**
* @brief This function handles EXTI line0 interrupt.
*/
void EXTI0_IRQHandler(void)
{
8001d28: b580 push {r7, lr}
8001d2a: af00 add r7, sp, #0
/* USER CODE BEGIN EXTI0_IRQn 0 */
/* USER CODE END EXTI0_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
8001d2c: 2001 movs r0, #1
8001d2e: f000 ff09 bl 8002b44 <HAL_GPIO_EXTI_IRQHandler>
/* USER CODE BEGIN EXTI0_IRQn 1 */
HAL_TIM_Base_Start_IT(&htim6);
8001d32: 4804 ldr r0, [pc, #16] ; (8001d44 <EXTI0_IRQHandler+0x1c>)
8001d34: f001 fee5 bl 8003b02 <HAL_TIM_Base_Start_IT>
LEDDesign_PendingChange = true;
8001d38: 4b03 ldr r3, [pc, #12] ; (8001d48 <EXTI0_IRQHandler+0x20>)
8001d3a: 2201 movs r2, #1
8001d3c: 701a strb r2, [r3, #0]
/* USER CODE END EXTI0_IRQn 1 */
}
8001d3e: bf00 nop
8001d40: bd80 pop {r7, pc}
8001d42: bf00 nop
8001d44: 20000454 .word 0x20000454
8001d48: 2000008d .word 0x2000008d
08001d4c <TIM6_DAC_IRQHandler>:
/**
* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
*/
void TIM6_DAC_IRQHandler(void)
{
8001d4c: b580 push {r7, lr}
8001d4e: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM6_DAC_IRQn 0 */
HAL_TIM_IRQHandler(&htim6);
8001d50: 480c ldr r0, [pc, #48] ; (8001d84 <TIM6_DAC_IRQHandler+0x38>)
8001d52: f001 ff40 bl 8003bd6 <HAL_TIM_IRQHandler>
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
LEDMode = (LEDMode + 1) % 7;
8001d56: 4b0c ldr r3, [pc, #48] ; (8001d88 <TIM6_DAC_IRQHandler+0x3c>)
8001d58: 781b ldrb r3, [r3, #0]
8001d5a: 1c5a adds r2, r3, #1
8001d5c: 4b0b ldr r3, [pc, #44] ; (8001d8c <TIM6_DAC_IRQHandler+0x40>)
8001d5e: fb83 1302 smull r1, r3, r3, r2
8001d62: 4413 add r3, r2
8001d64: 1099 asrs r1, r3, #2
8001d66: 17d3 asrs r3, r2, #31
8001d68: 1ac9 subs r1, r1, r3
8001d6a: 460b mov r3, r1
8001d6c: 00db lsls r3, r3, #3
8001d6e: 1a5b subs r3, r3, r1
8001d70: 1ad1 subs r1, r2, r3
8001d72: b2ca uxtb r2, r1
8001d74: 4b04 ldr r3, [pc, #16] ; (8001d88 <TIM6_DAC_IRQHandler+0x3c>)
8001d76: 701a strb r2, [r3, #0]
LEDDesign_PendingChange = false;
8001d78: 4b05 ldr r3, [pc, #20] ; (8001d90 <TIM6_DAC_IRQHandler+0x44>)
8001d7a: 2200 movs r2, #0
8001d7c: 701a strb r2, [r3, #0]
/* USER CODE END TIM6_DAC_IRQn 1 */
}
8001d7e: bf00 nop
8001d80: bd80 pop {r7, pc}
8001d82: bf00 nop
8001d84: 20000454 .word 0x20000454
8001d88: 2000008c .word 0x2000008c
8001d8c: 92492493 .word 0x92492493
8001d90: 2000008d .word 0x2000008d
08001d94 <SPI4_IRQHandler>:
/**
* @brief This function handles SPI4 global interrupt.
*/
void SPI4_IRQHandler(void)
{
8001d94: b580 push {r7, lr}
8001d96: af00 add r7, sp, #0
/* USER CODE BEGIN SPI4_IRQn 0 */
/* USER CODE END SPI4_IRQn 0 */
HAL_SPI_IRQHandler(&hspi4);
8001d98: 4805 ldr r0, [pc, #20] ; (8001db0 <SPI4_IRQHandler+0x1c>)
8001d9a: f001 fc0b bl 80035b4 <HAL_SPI_IRQHandler>
/* USER CODE BEGIN SPI4_IRQn 1 */
HAL_SPI_Transmit_IT(&hspi4, (uint8_t *) &LEDData_WS2812B, (uint16_t) 66 * 3 * 3);
8001d9e: f240 2252 movw r2, #594 ; 0x252
8001da2: 4904 ldr r1, [pc, #16] ; (8001db4 <SPI4_IRQHandler+0x20>)
8001da4: 4802 ldr r0, [pc, #8] ; (8001db0 <SPI4_IRQHandler+0x1c>)
8001da6: f001 fb83 bl 80034b0 <HAL_SPI_Transmit_IT>
/* USER CODE END SPI4_IRQn 1 */
}
8001daa: bf00 nop
8001dac: bd80 pop {r7, pc}
8001dae: bf00 nop
8001db0: 200003fc .word 0x200003fc
8001db4: 20000150 .word 0x20000150
08001db8 <_read>:
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
8001db8: b580 push {r7, lr}
8001dba: b086 sub sp, #24
8001dbc: af00 add r7, sp, #0
8001dbe: 60f8 str r0, [r7, #12]
8001dc0: 60b9 str r1, [r7, #8]
8001dc2: 607a str r2, [r7, #4]
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
8001dc4: 2300 movs r3, #0
8001dc6: 617b str r3, [r7, #20]
8001dc8: e00a b.n 8001de0 <_read+0x28>
{
*ptr++ = __io_getchar();
8001dca: f3af 8000 nop.w
8001dce: 4601 mov r1, r0
8001dd0: 68bb ldr r3, [r7, #8]
8001dd2: 1c5a adds r2, r3, #1
8001dd4: 60ba str r2, [r7, #8]
8001dd6: b2ca uxtb r2, r1
8001dd8: 701a strb r2, [r3, #0]
for (DataIdx = 0; DataIdx < len; DataIdx++)
8001dda: 697b ldr r3, [r7, #20]
8001ddc: 3301 adds r3, #1
8001dde: 617b str r3, [r7, #20]
8001de0: 697a ldr r2, [r7, #20]
8001de2: 687b ldr r3, [r7, #4]
8001de4: 429a cmp r2, r3
8001de6: dbf0 blt.n 8001dca <_read+0x12>
}
return len;
8001de8: 687b ldr r3, [r7, #4]
}
8001dea: 4618 mov r0, r3
8001dec: 3718 adds r7, #24
8001dee: 46bd mov sp, r7
8001df0: bd80 pop {r7, pc}
08001df2 <_close>:
}
return len;
}
int _close(int file)
{
8001df2: b480 push {r7}
8001df4: b083 sub sp, #12
8001df6: af00 add r7, sp, #0
8001df8: 6078 str r0, [r7, #4]
return -1;
8001dfa: f04f 33ff mov.w r3, #4294967295
}
8001dfe: 4618 mov r0, r3
8001e00: 370c adds r7, #12
8001e02: 46bd mov sp, r7
8001e04: f85d 7b04 ldr.w r7, [sp], #4
8001e08: 4770 bx lr
08001e0a <_fstat>:
int _fstat(int file, struct stat *st)
{
8001e0a: b480 push {r7}
8001e0c: b083 sub sp, #12
8001e0e: af00 add r7, sp, #0
8001e10: 6078 str r0, [r7, #4]
8001e12: 6039 str r1, [r7, #0]
st->st_mode = S_IFCHR;
8001e14: 683b ldr r3, [r7, #0]
8001e16: f44f 5200 mov.w r2, #8192 ; 0x2000
8001e1a: 605a str r2, [r3, #4]
return 0;
8001e1c: 2300 movs r3, #0
}
8001e1e: 4618 mov r0, r3
8001e20: 370c adds r7, #12
8001e22: 46bd mov sp, r7
8001e24: f85d 7b04 ldr.w r7, [sp], #4
8001e28: 4770 bx lr
08001e2a <_isatty>:
int _isatty(int file)
{
8001e2a: b480 push {r7}
8001e2c: b083 sub sp, #12
8001e2e: af00 add r7, sp, #0
8001e30: 6078 str r0, [r7, #4]
return 1;
8001e32: 2301 movs r3, #1
}
8001e34: 4618 mov r0, r3
8001e36: 370c adds r7, #12
8001e38: 46bd mov sp, r7
8001e3a: f85d 7b04 ldr.w r7, [sp], #4
8001e3e: 4770 bx lr
08001e40 <_lseek>:
int _lseek(int file, int ptr, int dir)
{
8001e40: b480 push {r7}
8001e42: b085 sub sp, #20
8001e44: af00 add r7, sp, #0
8001e46: 60f8 str r0, [r7, #12]
8001e48: 60b9 str r1, [r7, #8]
8001e4a: 607a str r2, [r7, #4]
return 0;
8001e4c: 2300 movs r3, #0
}
8001e4e: 4618 mov r0, r3
8001e50: 3714 adds r7, #20
8001e52: 46bd mov sp, r7
8001e54: f85d 7b04 ldr.w r7, [sp], #4
8001e58: 4770 bx lr
...
08001e5c <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8001e5c: b580 push {r7, lr}
8001e5e: b086 sub sp, #24
8001e60: af00 add r7, sp, #0
8001e62: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8001e64: 4a14 ldr r2, [pc, #80] ; (8001eb8 <_sbrk+0x5c>)
8001e66: 4b15 ldr r3, [pc, #84] ; (8001ebc <_sbrk+0x60>)
8001e68: 1ad3 subs r3, r2, r3
8001e6a: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8001e6c: 697b ldr r3, [r7, #20]
8001e6e: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initalize heap end at first call */
if (NULL == __sbrk_heap_end)
8001e70: 4b13 ldr r3, [pc, #76] ; (8001ec0 <_sbrk+0x64>)
8001e72: 681b ldr r3, [r3, #0]
8001e74: 2b00 cmp r3, #0
8001e76: d102 bne.n 8001e7e <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8001e78: 4b11 ldr r3, [pc, #68] ; (8001ec0 <_sbrk+0x64>)
8001e7a: 4a12 ldr r2, [pc, #72] ; (8001ec4 <_sbrk+0x68>)
8001e7c: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8001e7e: 4b10 ldr r3, [pc, #64] ; (8001ec0 <_sbrk+0x64>)
8001e80: 681a ldr r2, [r3, #0]
8001e82: 687b ldr r3, [r7, #4]
8001e84: 4413 add r3, r2
8001e86: 693a ldr r2, [r7, #16]
8001e88: 429a cmp r2, r3
8001e8a: d207 bcs.n 8001e9c <_sbrk+0x40>
{
errno = ENOMEM;
8001e8c: f002 f90e bl 80040ac <__errno>
8001e90: 4602 mov r2, r0
8001e92: 230c movs r3, #12
8001e94: 6013 str r3, [r2, #0]
return (void *)-1;
8001e96: f04f 33ff mov.w r3, #4294967295
8001e9a: e009 b.n 8001eb0 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8001e9c: 4b08 ldr r3, [pc, #32] ; (8001ec0 <_sbrk+0x64>)
8001e9e: 681b ldr r3, [r3, #0]
8001ea0: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8001ea2: 4b07 ldr r3, [pc, #28] ; (8001ec0 <_sbrk+0x64>)
8001ea4: 681a ldr r2, [r3, #0]
8001ea6: 687b ldr r3, [r7, #4]
8001ea8: 4413 add r3, r2
8001eaa: 4a05 ldr r2, [pc, #20] ; (8001ec0 <_sbrk+0x64>)
8001eac: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8001eae: 68fb ldr r3, [r7, #12]
}
8001eb0: 4618 mov r0, r3
8001eb2: 3718 adds r7, #24
8001eb4: 46bd mov sp, r7
8001eb6: bd80 pop {r7, pc}
8001eb8: 20030000 .word 0x20030000
8001ebc: 00000400 .word 0x00000400
8001ec0: 200003a8 .word 0x200003a8
8001ec4: 200004a0 .word 0x200004a0
08001ec8 <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
8001ec8: b480 push {r7}
8001eca: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
8001ecc: 4b08 ldr r3, [pc, #32] ; (8001ef0 <SystemInit+0x28>)
8001ece: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
8001ed2: 4a07 ldr r2, [pc, #28] ; (8001ef0 <SystemInit+0x28>)
8001ed4: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
8001ed8: f8c2 3088 str.w r3, [r2, #136] ; 0x88
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
8001edc: 4b04 ldr r3, [pc, #16] ; (8001ef0 <SystemInit+0x28>)
8001ede: f04f 6200 mov.w r2, #134217728 ; 0x8000000
8001ee2: 609a str r2, [r3, #8]
#endif
}
8001ee4: bf00 nop
8001ee6: 46bd mov sp, r7
8001ee8: f85d 7b04 ldr.w r7, [sp], #4
8001eec: 4770 bx lr
8001eee: bf00 nop
8001ef0: e000ed00 .word 0xe000ed00
08001ef4 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
8001ef4: f8df d034 ldr.w sp, [pc, #52] ; 8001f2c <LoopFillZerobss+0x14>
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
8001ef8: 2100 movs r1, #0
b LoopCopyDataInit
8001efa: e003 b.n 8001f04 <LoopCopyDataInit>
08001efc <CopyDataInit>:
CopyDataInit:
ldr r3, =_sidata
8001efc: 4b0c ldr r3, [pc, #48] ; (8001f30 <LoopFillZerobss+0x18>)
ldr r3, [r3, r1]
8001efe: 585b ldr r3, [r3, r1]
str r3, [r0, r1]
8001f00: 5043 str r3, [r0, r1]
adds r1, r1, #4
8001f02: 3104 adds r1, #4
08001f04 <LoopCopyDataInit>:
LoopCopyDataInit:
ldr r0, =_sdata
8001f04: 480b ldr r0, [pc, #44] ; (8001f34 <LoopFillZerobss+0x1c>)
ldr r3, =_edata
8001f06: 4b0c ldr r3, [pc, #48] ; (8001f38 <LoopFillZerobss+0x20>)
adds r2, r0, r1
8001f08: 1842 adds r2, r0, r1
cmp r2, r3
8001f0a: 429a cmp r2, r3
bcc CopyDataInit
8001f0c: d3f6 bcc.n 8001efc <CopyDataInit>
ldr r2, =_sbss
8001f0e: 4a0b ldr r2, [pc, #44] ; (8001f3c <LoopFillZerobss+0x24>)
b LoopFillZerobss
8001f10: e002 b.n 8001f18 <LoopFillZerobss>
08001f12 <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
8001f12: 2300 movs r3, #0
str r3, [r2], #4
8001f14: f842 3b04 str.w r3, [r2], #4
08001f18 <LoopFillZerobss>:
LoopFillZerobss:
ldr r3, = _ebss
8001f18: 4b09 ldr r3, [pc, #36] ; (8001f40 <LoopFillZerobss+0x28>)
cmp r2, r3
8001f1a: 429a cmp r2, r3
bcc FillZerobss
8001f1c: d3f9 bcc.n 8001f12 <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8001f1e: f7ff ffd3 bl 8001ec8 <SystemInit>
/* Call static constructors */
bl __libc_init_array
8001f22: f002 f8c9 bl 80040b8 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8001f26: f7fe fb77 bl 8000618 <main>
bx lr
8001f2a: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
8001f2c: 20030000 .word 0x20030000
ldr r3, =_sidata
8001f30: 08005028 .word 0x08005028
ldr r0, =_sdata
8001f34: 20000000 .word 0x20000000
ldr r3, =_edata
8001f38: 20000070 .word 0x20000070
ldr r2, =_sbss
8001f3c: 20000070 .word 0x20000070
ldr r3, = _ebss
8001f40: 2000049c .word 0x2000049c
08001f44 <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8001f44: e7fe b.n 8001f44 <ADC_IRQHandler>
...
08001f48 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8001f48: b580 push {r7, lr}
8001f4a: af00 add r7, sp, #0
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
8001f4c: 4b0e ldr r3, [pc, #56] ; (8001f88 <HAL_Init+0x40>)
8001f4e: 681b ldr r3, [r3, #0]
8001f50: 4a0d ldr r2, [pc, #52] ; (8001f88 <HAL_Init+0x40>)
8001f52: f443 7300 orr.w r3, r3, #512 ; 0x200
8001f56: 6013 str r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
8001f58: 4b0b ldr r3, [pc, #44] ; (8001f88 <HAL_Init+0x40>)
8001f5a: 681b ldr r3, [r3, #0]
8001f5c: 4a0a ldr r2, [pc, #40] ; (8001f88 <HAL_Init+0x40>)
8001f5e: f443 6380 orr.w r3, r3, #1024 ; 0x400
8001f62: 6013 str r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8001f64: 4b08 ldr r3, [pc, #32] ; (8001f88 <HAL_Init+0x40>)
8001f66: 681b ldr r3, [r3, #0]
8001f68: 4a07 ldr r2, [pc, #28] ; (8001f88 <HAL_Init+0x40>)
8001f6a: f443 7380 orr.w r3, r3, #256 ; 0x100
8001f6e: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8001f70: 2003 movs r0, #3
8001f72: f000 fbbf bl 80026f4 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8001f76: 2000 movs r0, #0
8001f78: f000 f808 bl 8001f8c <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8001f7c: f7ff fdc2 bl 8001b04 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8001f80: 2300 movs r3, #0
}
8001f82: 4618 mov r0, r3
8001f84: bd80 pop {r7, pc}
8001f86: bf00 nop
8001f88: 40023c00 .word 0x40023c00
08001f8c <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8001f8c: b580 push {r7, lr}
8001f8e: b082 sub sp, #8
8001f90: af00 add r7, sp, #0
8001f92: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8001f94: 4b12 ldr r3, [pc, #72] ; (8001fe0 <HAL_InitTick+0x54>)
8001f96: 681a ldr r2, [r3, #0]
8001f98: 4b12 ldr r3, [pc, #72] ; (8001fe4 <HAL_InitTick+0x58>)
8001f9a: 781b ldrb r3, [r3, #0]
8001f9c: 4619 mov r1, r3
8001f9e: f44f 737a mov.w r3, #1000 ; 0x3e8
8001fa2: fbb3 f3f1 udiv r3, r3, r1
8001fa6: fbb2 f3f3 udiv r3, r2, r3
8001faa: 4618 mov r0, r3
8001fac: f000 fbd7 bl 800275e <HAL_SYSTICK_Config>
8001fb0: 4603 mov r3, r0
8001fb2: 2b00 cmp r3, #0
8001fb4: d001 beq.n 8001fba <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8001fb6: 2301 movs r3, #1
8001fb8: e00e b.n 8001fd8 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001fba: 687b ldr r3, [r7, #4]
8001fbc: 2b0f cmp r3, #15
8001fbe: d80a bhi.n 8001fd6 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8001fc0: 2200 movs r2, #0
8001fc2: 6879 ldr r1, [r7, #4]
8001fc4: f04f 30ff mov.w r0, #4294967295
8001fc8: f000 fb9f bl 800270a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001fcc: 4a06 ldr r2, [pc, #24] ; (8001fe8 <HAL_InitTick+0x5c>)
8001fce: 687b ldr r3, [r7, #4]
8001fd0: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8001fd2: 2300 movs r3, #0
8001fd4: e000 b.n 8001fd8 <HAL_InitTick+0x4c>
return HAL_ERROR;
8001fd6: 2301 movs r3, #1
}
8001fd8: 4618 mov r0, r3
8001fda: 3708 adds r7, #8
8001fdc: 46bd mov sp, r7
8001fde: bd80 pop {r7, pc}
8001fe0: 20000000 .word 0x20000000
8001fe4: 20000008 .word 0x20000008
8001fe8: 20000004 .word 0x20000004
08001fec <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001fec: b480 push {r7}
8001fee: af00 add r7, sp, #0
uwTick += uwTickFreq;
8001ff0: 4b06 ldr r3, [pc, #24] ; (800200c <HAL_IncTick+0x20>)
8001ff2: 781b ldrb r3, [r3, #0]
8001ff4: 461a mov r2, r3
8001ff6: 4b06 ldr r3, [pc, #24] ; (8002010 <HAL_IncTick+0x24>)
8001ff8: 681b ldr r3, [r3, #0]
8001ffa: 4413 add r3, r2
8001ffc: 4a04 ldr r2, [pc, #16] ; (8002010 <HAL_IncTick+0x24>)
8001ffe: 6013 str r3, [r2, #0]
}
8002000: bf00 nop
8002002: 46bd mov sp, r7
8002004: f85d 7b04 ldr.w r7, [sp], #4
8002008: 4770 bx lr
800200a: bf00 nop
800200c: 20000008 .word 0x20000008
8002010: 20000494 .word 0x20000494
08002014 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8002014: b480 push {r7}
8002016: af00 add r7, sp, #0
return uwTick;
8002018: 4b03 ldr r3, [pc, #12] ; (8002028 <HAL_GetTick+0x14>)
800201a: 681b ldr r3, [r3, #0]
}
800201c: 4618 mov r0, r3
800201e: 46bd mov sp, r7
8002020: f85d 7b04 ldr.w r7, [sp], #4
8002024: 4770 bx lr
8002026: bf00 nop
8002028: 20000494 .word 0x20000494
0800202c <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
800202c: b580 push {r7, lr}
800202e: b084 sub sp, #16
8002030: af00 add r7, sp, #0
8002032: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8002034: f7ff ffee bl 8002014 <HAL_GetTick>
8002038: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
800203a: 687b ldr r3, [r7, #4]
800203c: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
800203e: 68fb ldr r3, [r7, #12]
8002040: f1b3 3fff cmp.w r3, #4294967295
8002044: d005 beq.n 8002052 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
8002046: 4b09 ldr r3, [pc, #36] ; (800206c <HAL_Delay+0x40>)
8002048: 781b ldrb r3, [r3, #0]
800204a: 461a mov r2, r3
800204c: 68fb ldr r3, [r7, #12]
800204e: 4413 add r3, r2
8002050: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
8002052: bf00 nop
8002054: f7ff ffde bl 8002014 <HAL_GetTick>
8002058: 4602 mov r2, r0
800205a: 68bb ldr r3, [r7, #8]
800205c: 1ad3 subs r3, r2, r3
800205e: 68fa ldr r2, [r7, #12]
8002060: 429a cmp r2, r3
8002062: d8f7 bhi.n 8002054 <HAL_Delay+0x28>
{
}
}
8002064: bf00 nop
8002066: 3710 adds r7, #16
8002068: 46bd mov sp, r7
800206a: bd80 pop {r7, pc}
800206c: 20000008 .word 0x20000008
08002070 <HAL_ADC_Init>:
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8002070: b580 push {r7, lr}
8002072: b084 sub sp, #16
8002074: af00 add r7, sp, #0
8002076: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8002078: 2300 movs r3, #0
800207a: 73fb strb r3, [r7, #15]
/* Check ADC handle */
if(hadc == NULL)
800207c: 687b ldr r3, [r7, #4]
800207e: 2b00 cmp r3, #0
8002080: d101 bne.n 8002086 <HAL_ADC_Init+0x16>
{
return HAL_ERROR;
8002082: 2301 movs r3, #1
8002084: e033 b.n 80020ee <HAL_ADC_Init+0x7e>
if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
{
assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
}
if(hadc->State == HAL_ADC_STATE_RESET)
8002086: 687b ldr r3, [r7, #4]
8002088: 6c1b ldr r3, [r3, #64] ; 0x40
800208a: 2b00 cmp r3, #0
800208c: d109 bne.n 80020a2 <HAL_ADC_Init+0x32>
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
800208e: 6878 ldr r0, [r7, #4]
8002090: f7ff fd60 bl 8001b54 <HAL_ADC_MspInit>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8002094: 687b ldr r3, [r7, #4]
8002096: 2200 movs r2, #0
8002098: 645a str r2, [r3, #68] ; 0x44
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
800209a: 687b ldr r3, [r7, #4]
800209c: 2200 movs r2, #0
800209e: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
80020a2: 687b ldr r3, [r7, #4]
80020a4: 6c1b ldr r3, [r3, #64] ; 0x40
80020a6: f003 0310 and.w r3, r3, #16
80020aa: 2b00 cmp r3, #0
80020ac: d118 bne.n 80020e0 <HAL_ADC_Init+0x70>
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
80020ae: 687b ldr r3, [r7, #4]
80020b0: 6c1b ldr r3, [r3, #64] ; 0x40
80020b2: f423 5388 bic.w r3, r3, #4352 ; 0x1100
80020b6: f023 0302 bic.w r3, r3, #2
80020ba: f043 0202 orr.w r2, r3, #2
80020be: 687b ldr r3, [r7, #4]
80020c0: 641a str r2, [r3, #64] ; 0x40
HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
HAL_ADC_STATE_BUSY_INTERNAL);
/* Set ADC parameters */
ADC_Init(hadc);
80020c2: 6878 ldr r0, [r7, #4]
80020c4: f000 f94a bl 800235c <ADC_Init>
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
80020c8: 687b ldr r3, [r7, #4]
80020ca: 2200 movs r2, #0
80020cc: 645a str r2, [r3, #68] ; 0x44
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
80020ce: 687b ldr r3, [r7, #4]
80020d0: 6c1b ldr r3, [r3, #64] ; 0x40
80020d2: f023 0303 bic.w r3, r3, #3
80020d6: f043 0201 orr.w r2, r3, #1
80020da: 687b ldr r3, [r7, #4]
80020dc: 641a str r2, [r3, #64] ; 0x40
80020de: e001 b.n 80020e4 <HAL_ADC_Init+0x74>
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_READY);
}
else
{
tmp_hal_status = HAL_ERROR;
80020e0: 2301 movs r3, #1
80020e2: 73fb strb r3, [r7, #15]
}
/* Release Lock */
__HAL_UNLOCK(hadc);
80020e4: 687b ldr r3, [r7, #4]
80020e6: 2200 movs r2, #0
80020e8: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Return function status */
return tmp_hal_status;
80020ec: 7bfb ldrb r3, [r7, #15]
}
80020ee: 4618 mov r0, r3
80020f0: 3710 adds r7, #16
80020f2: 46bd mov sp, r7
80020f4: bd80 pop {r7, pc}
...
080020f8 <HAL_ADC_ConfigChannel>:
* the configuration information for the specified ADC.
* @param sConfig ADC configuration structure.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
80020f8: b480 push {r7}
80020fa: b085 sub sp, #20
80020fc: af00 add r7, sp, #0
80020fe: 6078 str r0, [r7, #4]
8002100: 6039 str r1, [r7, #0]
__IO uint32_t counter = 0U;
8002102: 2300 movs r3, #0
8002104: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8002106: 687b ldr r3, [r7, #4]
8002108: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
800210c: 2b01 cmp r3, #1
800210e: d101 bne.n 8002114 <HAL_ADC_ConfigChannel+0x1c>
8002110: 2302 movs r3, #2
8002112: e113 b.n 800233c <HAL_ADC_ConfigChannel+0x244>
8002114: 687b ldr r3, [r7, #4]
8002116: 2201 movs r2, #1
8002118: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
if (sConfig->Channel > ADC_CHANNEL_9)
800211c: 683b ldr r3, [r7, #0]
800211e: 681b ldr r3, [r3, #0]
8002120: 2b09 cmp r3, #9
8002122: d925 bls.n 8002170 <HAL_ADC_ConfigChannel+0x78>
{
/* Clear the old sample time */
hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
8002124: 687b ldr r3, [r7, #4]
8002126: 681b ldr r3, [r3, #0]
8002128: 68d9 ldr r1, [r3, #12]
800212a: 683b ldr r3, [r7, #0]
800212c: 681b ldr r3, [r3, #0]
800212e: b29b uxth r3, r3
8002130: 461a mov r2, r3
8002132: 4613 mov r3, r2
8002134: 005b lsls r3, r3, #1
8002136: 4413 add r3, r2
8002138: 3b1e subs r3, #30
800213a: 2207 movs r2, #7
800213c: fa02 f303 lsl.w r3, r2, r3
8002140: 43da mvns r2, r3
8002142: 687b ldr r3, [r7, #4]
8002144: 681b ldr r3, [r3, #0]
8002146: 400a ands r2, r1
8002148: 60da str r2, [r3, #12]
/* Set the new sample time */
hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
800214a: 687b ldr r3, [r7, #4]
800214c: 681b ldr r3, [r3, #0]
800214e: 68d9 ldr r1, [r3, #12]
8002150: 683b ldr r3, [r7, #0]
8002152: 689a ldr r2, [r3, #8]
8002154: 683b ldr r3, [r7, #0]
8002156: 681b ldr r3, [r3, #0]
8002158: b29b uxth r3, r3
800215a: 4618 mov r0, r3
800215c: 4603 mov r3, r0
800215e: 005b lsls r3, r3, #1
8002160: 4403 add r3, r0
8002162: 3b1e subs r3, #30
8002164: 409a lsls r2, r3
8002166: 687b ldr r3, [r7, #4]
8002168: 681b ldr r3, [r3, #0]
800216a: 430a orrs r2, r1
800216c: 60da str r2, [r3, #12]
800216e: e022 b.n 80021b6 <HAL_ADC_ConfigChannel+0xbe>
}
else /* ADC_Channel include in ADC_Channel_[0..9] */
{
/* Clear the old sample time */
hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
8002170: 687b ldr r3, [r7, #4]
8002172: 681b ldr r3, [r3, #0]
8002174: 6919 ldr r1, [r3, #16]
8002176: 683b ldr r3, [r7, #0]
8002178: 681b ldr r3, [r3, #0]
800217a: b29b uxth r3, r3
800217c: 461a mov r2, r3
800217e: 4613 mov r3, r2
8002180: 005b lsls r3, r3, #1
8002182: 4413 add r3, r2
8002184: 2207 movs r2, #7
8002186: fa02 f303 lsl.w r3, r2, r3
800218a: 43da mvns r2, r3
800218c: 687b ldr r3, [r7, #4]
800218e: 681b ldr r3, [r3, #0]
8002190: 400a ands r2, r1
8002192: 611a str r2, [r3, #16]
/* Set the new sample time */
hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
8002194: 687b ldr r3, [r7, #4]
8002196: 681b ldr r3, [r3, #0]
8002198: 6919 ldr r1, [r3, #16]
800219a: 683b ldr r3, [r7, #0]
800219c: 689a ldr r2, [r3, #8]
800219e: 683b ldr r3, [r7, #0]
80021a0: 681b ldr r3, [r3, #0]
80021a2: b29b uxth r3, r3
80021a4: 4618 mov r0, r3
80021a6: 4603 mov r3, r0
80021a8: 005b lsls r3, r3, #1
80021aa: 4403 add r3, r0
80021ac: 409a lsls r2, r3
80021ae: 687b ldr r3, [r7, #4]
80021b0: 681b ldr r3, [r3, #0]
80021b2: 430a orrs r2, r1
80021b4: 611a str r2, [r3, #16]
}
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
80021b6: 683b ldr r3, [r7, #0]
80021b8: 685b ldr r3, [r3, #4]
80021ba: 2b06 cmp r3, #6
80021bc: d824 bhi.n 8002208 <HAL_ADC_ConfigChannel+0x110>
{
/* Clear the old SQx bits for the selected rank */
hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
80021be: 687b ldr r3, [r7, #4]
80021c0: 681b ldr r3, [r3, #0]
80021c2: 6b59 ldr r1, [r3, #52] ; 0x34
80021c4: 683b ldr r3, [r7, #0]
80021c6: 685a ldr r2, [r3, #4]
80021c8: 4613 mov r3, r2
80021ca: 009b lsls r3, r3, #2
80021cc: 4413 add r3, r2
80021ce: 3b05 subs r3, #5
80021d0: 221f movs r2, #31
80021d2: fa02 f303 lsl.w r3, r2, r3
80021d6: 43da mvns r2, r3
80021d8: 687b ldr r3, [r7, #4]
80021da: 681b ldr r3, [r3, #0]
80021dc: 400a ands r2, r1
80021de: 635a str r2, [r3, #52] ; 0x34
/* Set the SQx bits for the selected rank */
hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
80021e0: 687b ldr r3, [r7, #4]
80021e2: 681b ldr r3, [r3, #0]
80021e4: 6b59 ldr r1, [r3, #52] ; 0x34
80021e6: 683b ldr r3, [r7, #0]
80021e8: 681b ldr r3, [r3, #0]
80021ea: b29b uxth r3, r3
80021ec: 4618 mov r0, r3
80021ee: 683b ldr r3, [r7, #0]
80021f0: 685a ldr r2, [r3, #4]
80021f2: 4613 mov r3, r2
80021f4: 009b lsls r3, r3, #2
80021f6: 4413 add r3, r2
80021f8: 3b05 subs r3, #5
80021fa: fa00 f203 lsl.w r2, r0, r3
80021fe: 687b ldr r3, [r7, #4]
8002200: 681b ldr r3, [r3, #0]
8002202: 430a orrs r2, r1
8002204: 635a str r2, [r3, #52] ; 0x34
8002206: e04c b.n 80022a2 <HAL_ADC_ConfigChannel+0x1aa>
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8002208: 683b ldr r3, [r7, #0]
800220a: 685b ldr r3, [r3, #4]
800220c: 2b0c cmp r3, #12
800220e: d824 bhi.n 800225a <HAL_ADC_ConfigChannel+0x162>
{
/* Clear the old SQx bits for the selected rank */
hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
8002210: 687b ldr r3, [r7, #4]
8002212: 681b ldr r3, [r3, #0]
8002214: 6b19 ldr r1, [r3, #48] ; 0x30
8002216: 683b ldr r3, [r7, #0]
8002218: 685a ldr r2, [r3, #4]
800221a: 4613 mov r3, r2
800221c: 009b lsls r3, r3, #2
800221e: 4413 add r3, r2
8002220: 3b23 subs r3, #35 ; 0x23
8002222: 221f movs r2, #31
8002224: fa02 f303 lsl.w r3, r2, r3
8002228: 43da mvns r2, r3
800222a: 687b ldr r3, [r7, #4]
800222c: 681b ldr r3, [r3, #0]
800222e: 400a ands r2, r1
8002230: 631a str r2, [r3, #48] ; 0x30
/* Set the SQx bits for the selected rank */
hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
8002232: 687b ldr r3, [r7, #4]
8002234: 681b ldr r3, [r3, #0]
8002236: 6b19 ldr r1, [r3, #48] ; 0x30
8002238: 683b ldr r3, [r7, #0]
800223a: 681b ldr r3, [r3, #0]
800223c: b29b uxth r3, r3
800223e: 4618 mov r0, r3
8002240: 683b ldr r3, [r7, #0]
8002242: 685a ldr r2, [r3, #4]
8002244: 4613 mov r3, r2
8002246: 009b lsls r3, r3, #2
8002248: 4413 add r3, r2
800224a: 3b23 subs r3, #35 ; 0x23
800224c: fa00 f203 lsl.w r2, r0, r3
8002250: 687b ldr r3, [r7, #4]
8002252: 681b ldr r3, [r3, #0]
8002254: 430a orrs r2, r1
8002256: 631a str r2, [r3, #48] ; 0x30
8002258: e023 b.n 80022a2 <HAL_ADC_ConfigChannel+0x1aa>
}
/* For Rank 13 to 16 */
else
{
/* Clear the old SQx bits for the selected rank */
hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
800225a: 687b ldr r3, [r7, #4]
800225c: 681b ldr r3, [r3, #0]
800225e: 6ad9 ldr r1, [r3, #44] ; 0x2c
8002260: 683b ldr r3, [r7, #0]
8002262: 685a ldr r2, [r3, #4]
8002264: 4613 mov r3, r2
8002266: 009b lsls r3, r3, #2
8002268: 4413 add r3, r2
800226a: 3b41 subs r3, #65 ; 0x41
800226c: 221f movs r2, #31
800226e: fa02 f303 lsl.w r3, r2, r3
8002272: 43da mvns r2, r3
8002274: 687b ldr r3, [r7, #4]
8002276: 681b ldr r3, [r3, #0]
8002278: 400a ands r2, r1
800227a: 62da str r2, [r3, #44] ; 0x2c
/* Set the SQx bits for the selected rank */
hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
800227c: 687b ldr r3, [r7, #4]
800227e: 681b ldr r3, [r3, #0]
8002280: 6ad9 ldr r1, [r3, #44] ; 0x2c
8002282: 683b ldr r3, [r7, #0]
8002284: 681b ldr r3, [r3, #0]
8002286: b29b uxth r3, r3
8002288: 4618 mov r0, r3
800228a: 683b ldr r3, [r7, #0]
800228c: 685a ldr r2, [r3, #4]
800228e: 4613 mov r3, r2
8002290: 009b lsls r3, r3, #2
8002292: 4413 add r3, r2
8002294: 3b41 subs r3, #65 ; 0x41
8002296: fa00 f203 lsl.w r2, r0, r3
800229a: 687b ldr r3, [r7, #4]
800229c: 681b ldr r3, [r3, #0]
800229e: 430a orrs r2, r1
80022a0: 62da str r2, [r3, #44] ; 0x2c
}
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
/* control register) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
80022a2: 4b29 ldr r3, [pc, #164] ; (8002348 <HAL_ADC_ConfigChannel+0x250>)
80022a4: 60fb str r3, [r7, #12]
/* if ADC1 Channel_18 is selected for VBAT Channel ennable VBATE */
if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
80022a6: 687b ldr r3, [r7, #4]
80022a8: 681b ldr r3, [r3, #0]
80022aa: 4a28 ldr r2, [pc, #160] ; (800234c <HAL_ADC_ConfigChannel+0x254>)
80022ac: 4293 cmp r3, r2
80022ae: d10f bne.n 80022d0 <HAL_ADC_ConfigChannel+0x1d8>
80022b0: 683b ldr r3, [r7, #0]
80022b2: 681b ldr r3, [r3, #0]
80022b4: 2b12 cmp r3, #18
80022b6: d10b bne.n 80022d0 <HAL_ADC_ConfigChannel+0x1d8>
{
/* Disable the TEMPSENSOR channel in case of using board with multiplixed ADC_CHANNEL_VBAT & ADC_CHANNEL_TEMPSENSOR*/
if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT)
{
tmpADC_Common->CCR &= ~ADC_CCR_TSVREFE;
80022b8: 68fb ldr r3, [r7, #12]
80022ba: 685b ldr r3, [r3, #4]
80022bc: f423 0200 bic.w r2, r3, #8388608 ; 0x800000
80022c0: 68fb ldr r3, [r7, #12]
80022c2: 605a str r2, [r3, #4]
}
/* Enable the VBAT channel*/
tmpADC_Common->CCR |= ADC_CCR_VBATE;
80022c4: 68fb ldr r3, [r7, #12]
80022c6: 685b ldr r3, [r3, #4]
80022c8: f443 0280 orr.w r2, r3, #4194304 ; 0x400000
80022cc: 68fb ldr r3, [r7, #12]
80022ce: 605a str r2, [r3, #4]
}
/* if ADC1 Channel_16 or Channel_18 is selected for Temperature sensor or
Channel_17 is selected for VREFINT enable TSVREFE */
if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
80022d0: 687b ldr r3, [r7, #4]
80022d2: 681b ldr r3, [r3, #0]
80022d4: 4a1d ldr r2, [pc, #116] ; (800234c <HAL_ADC_ConfigChannel+0x254>)
80022d6: 4293 cmp r3, r2
80022d8: d12b bne.n 8002332 <HAL_ADC_ConfigChannel+0x23a>
80022da: 683b ldr r3, [r7, #0]
80022dc: 681b ldr r3, [r3, #0]
80022de: 4a1c ldr r2, [pc, #112] ; (8002350 <HAL_ADC_ConfigChannel+0x258>)
80022e0: 4293 cmp r3, r2
80022e2: d003 beq.n 80022ec <HAL_ADC_ConfigChannel+0x1f4>
80022e4: 683b ldr r3, [r7, #0]
80022e6: 681b ldr r3, [r3, #0]
80022e8: 2b11 cmp r3, #17
80022ea: d122 bne.n 8002332 <HAL_ADC_ConfigChannel+0x23a>
{
/* Disable the VBAT channel in case of using board with multiplixed ADC_CHANNEL_VBAT & ADC_CHANNEL_TEMPSENSOR*/
if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT)
{
tmpADC_Common->CCR &= ~ADC_CCR_VBATE;
80022ec: 68fb ldr r3, [r7, #12]
80022ee: 685b ldr r3, [r3, #4]
80022f0: f423 0280 bic.w r2, r3, #4194304 ; 0x400000
80022f4: 68fb ldr r3, [r7, #12]
80022f6: 605a str r2, [r3, #4]
}
/* Enable the Temperature sensor and VREFINT channel*/
tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
80022f8: 68fb ldr r3, [r7, #12]
80022fa: 685b ldr r3, [r3, #4]
80022fc: f443 0200 orr.w r2, r3, #8388608 ; 0x800000
8002300: 68fb ldr r3, [r7, #12]
8002302: 605a str r2, [r3, #4]
if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
8002304: 683b ldr r3, [r7, #0]
8002306: 681b ldr r3, [r3, #0]
8002308: 4a11 ldr r2, [pc, #68] ; (8002350 <HAL_ADC_ConfigChannel+0x258>)
800230a: 4293 cmp r3, r2
800230c: d111 bne.n 8002332 <HAL_ADC_ConfigChannel+0x23a>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
800230e: 4b11 ldr r3, [pc, #68] ; (8002354 <HAL_ADC_ConfigChannel+0x25c>)
8002310: 681b ldr r3, [r3, #0]
8002312: 4a11 ldr r2, [pc, #68] ; (8002358 <HAL_ADC_ConfigChannel+0x260>)
8002314: fba2 2303 umull r2, r3, r2, r3
8002318: 0c9a lsrs r2, r3, #18
800231a: 4613 mov r3, r2
800231c: 009b lsls r3, r3, #2
800231e: 4413 add r3, r2
8002320: 005b lsls r3, r3, #1
8002322: 60bb str r3, [r7, #8]
while(counter != 0U)
8002324: e002 b.n 800232c <HAL_ADC_ConfigChannel+0x234>
{
counter--;
8002326: 68bb ldr r3, [r7, #8]
8002328: 3b01 subs r3, #1
800232a: 60bb str r3, [r7, #8]
while(counter != 0U)
800232c: 68bb ldr r3, [r7, #8]
800232e: 2b00 cmp r3, #0
8002330: d1f9 bne.n 8002326 <HAL_ADC_ConfigChannel+0x22e>
}
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8002332: 687b ldr r3, [r7, #4]
8002334: 2200 movs r2, #0
8002336: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Return function status */
return HAL_OK;
800233a: 2300 movs r3, #0
}
800233c: 4618 mov r0, r3
800233e: 3714 adds r7, #20
8002340: 46bd mov sp, r7
8002342: f85d 7b04 ldr.w r7, [sp], #4
8002346: 4770 bx lr
8002348: 40012300 .word 0x40012300
800234c: 40012000 .word 0x40012000
8002350: 10000012 .word 0x10000012
8002354: 20000000 .word 0x20000000
8002358: 431bde83 .word 0x431bde83
0800235c <ADC_Init>:
* @param hadc pointer to a ADC_HandleTypeDef structure that contains
* the configuration information for the specified ADC.
* @retval None
*/
static void ADC_Init(ADC_HandleTypeDef* hadc)
{
800235c: b480 push {r7}
800235e: b085 sub sp, #20
8002360: af00 add r7, sp, #0
8002362: 6078 str r0, [r7, #4]
/* Set ADC parameters */
/* Pointer to the common control register to which is belonging hadc */
/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
/* control register) */
tmpADC_Common = ADC_COMMON_REGISTER(hadc);
8002364: 4b79 ldr r3, [pc, #484] ; (800254c <ADC_Init+0x1f0>)
8002366: 60fb str r3, [r7, #12]
/* Set the ADC clock prescaler */
tmpADC_Common->CCR &= ~(ADC_CCR_ADCPRE);
8002368: 68fb ldr r3, [r7, #12]
800236a: 685b ldr r3, [r3, #4]
800236c: f423 3240 bic.w r2, r3, #196608 ; 0x30000
8002370: 68fb ldr r3, [r7, #12]
8002372: 605a str r2, [r3, #4]
tmpADC_Common->CCR |= hadc->Init.ClockPrescaler;
8002374: 68fb ldr r3, [r7, #12]
8002376: 685a ldr r2, [r3, #4]
8002378: 687b ldr r3, [r7, #4]
800237a: 685b ldr r3, [r3, #4]
800237c: 431a orrs r2, r3
800237e: 68fb ldr r3, [r7, #12]
8002380: 605a str r2, [r3, #4]
/* Set ADC scan mode */
hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
8002382: 687b ldr r3, [r7, #4]
8002384: 681b ldr r3, [r3, #0]
8002386: 685a ldr r2, [r3, #4]
8002388: 687b ldr r3, [r7, #4]
800238a: 681b ldr r3, [r3, #0]
800238c: f422 7280 bic.w r2, r2, #256 ; 0x100
8002390: 605a str r2, [r3, #4]
hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
8002392: 687b ldr r3, [r7, #4]
8002394: 681b ldr r3, [r3, #0]
8002396: 6859 ldr r1, [r3, #4]
8002398: 687b ldr r3, [r7, #4]
800239a: 691b ldr r3, [r3, #16]
800239c: 021a lsls r2, r3, #8
800239e: 687b ldr r3, [r7, #4]
80023a0: 681b ldr r3, [r3, #0]
80023a2: 430a orrs r2, r1
80023a4: 605a str r2, [r3, #4]
/* Set ADC resolution */
hadc->Instance->CR1 &= ~(ADC_CR1_RES);
80023a6: 687b ldr r3, [r7, #4]
80023a8: 681b ldr r3, [r3, #0]
80023aa: 685a ldr r2, [r3, #4]
80023ac: 687b ldr r3, [r7, #4]
80023ae: 681b ldr r3, [r3, #0]
80023b0: f022 7240 bic.w r2, r2, #50331648 ; 0x3000000
80023b4: 605a str r2, [r3, #4]
hadc->Instance->CR1 |= hadc->Init.Resolution;
80023b6: 687b ldr r3, [r7, #4]
80023b8: 681b ldr r3, [r3, #0]
80023ba: 6859 ldr r1, [r3, #4]
80023bc: 687b ldr r3, [r7, #4]
80023be: 689a ldr r2, [r3, #8]
80023c0: 687b ldr r3, [r7, #4]
80023c2: 681b ldr r3, [r3, #0]
80023c4: 430a orrs r2, r1
80023c6: 605a str r2, [r3, #4]
/* Set ADC data alignment */
hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
80023c8: 687b ldr r3, [r7, #4]
80023ca: 681b ldr r3, [r3, #0]
80023cc: 689a ldr r2, [r3, #8]
80023ce: 687b ldr r3, [r7, #4]
80023d0: 681b ldr r3, [r3, #0]
80023d2: f422 6200 bic.w r2, r2, #2048 ; 0x800
80023d6: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= hadc->Init.DataAlign;
80023d8: 687b ldr r3, [r7, #4]
80023da: 681b ldr r3, [r3, #0]
80023dc: 6899 ldr r1, [r3, #8]
80023de: 687b ldr r3, [r7, #4]
80023e0: 68da ldr r2, [r3, #12]
80023e2: 687b ldr r3, [r7, #4]
80023e4: 681b ldr r3, [r3, #0]
80023e6: 430a orrs r2, r1
80023e8: 609a str r2, [r3, #8]
/* Enable external trigger if trigger selection is different of software */
/* start. */
/* Note: This configuration keeps the hardware feature of parameter */
/* ExternalTrigConvEdge "trigger edge none" equivalent to */
/* software start. */
if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
80023ea: 687b ldr r3, [r7, #4]
80023ec: 6a9b ldr r3, [r3, #40] ; 0x28
80023ee: 4a58 ldr r2, [pc, #352] ; (8002550 <ADC_Init+0x1f4>)
80023f0: 4293 cmp r3, r2
80023f2: d022 beq.n 800243a <ADC_Init+0xde>
{
/* Select external trigger to start conversion */
hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
80023f4: 687b ldr r3, [r7, #4]
80023f6: 681b ldr r3, [r3, #0]
80023f8: 689a ldr r2, [r3, #8]
80023fa: 687b ldr r3, [r7, #4]
80023fc: 681b ldr r3, [r3, #0]
80023fe: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000
8002402: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
8002404: 687b ldr r3, [r7, #4]
8002406: 681b ldr r3, [r3, #0]
8002408: 6899 ldr r1, [r3, #8]
800240a: 687b ldr r3, [r7, #4]
800240c: 6a9a ldr r2, [r3, #40] ; 0x28
800240e: 687b ldr r3, [r7, #4]
8002410: 681b ldr r3, [r3, #0]
8002412: 430a orrs r2, r1
8002414: 609a str r2, [r3, #8]
/* Select external trigger polarity */
hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
8002416: 687b ldr r3, [r7, #4]
8002418: 681b ldr r3, [r3, #0]
800241a: 689a ldr r2, [r3, #8]
800241c: 687b ldr r3, [r7, #4]
800241e: 681b ldr r3, [r3, #0]
8002420: f022 5240 bic.w r2, r2, #805306368 ; 0x30000000
8002424: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
8002426: 687b ldr r3, [r7, #4]
8002428: 681b ldr r3, [r3, #0]
800242a: 6899 ldr r1, [r3, #8]
800242c: 687b ldr r3, [r7, #4]
800242e: 6ada ldr r2, [r3, #44] ; 0x2c
8002430: 687b ldr r3, [r7, #4]
8002432: 681b ldr r3, [r3, #0]
8002434: 430a orrs r2, r1
8002436: 609a str r2, [r3, #8]
8002438: e00f b.n 800245a <ADC_Init+0xfe>
}
else
{
/* Reset the external trigger */
hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
800243a: 687b ldr r3, [r7, #4]
800243c: 681b ldr r3, [r3, #0]
800243e: 689a ldr r2, [r3, #8]
8002440: 687b ldr r3, [r7, #4]
8002442: 681b ldr r3, [r3, #0]
8002444: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000
8002448: 609a str r2, [r3, #8]
hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
800244a: 687b ldr r3, [r7, #4]
800244c: 681b ldr r3, [r3, #0]
800244e: 689a ldr r2, [r3, #8]
8002450: 687b ldr r3, [r7, #4]
8002452: 681b ldr r3, [r3, #0]
8002454: f022 5240 bic.w r2, r2, #805306368 ; 0x30000000
8002458: 609a str r2, [r3, #8]
}
/* Enable or disable ADC continuous conversion mode */
hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
800245a: 687b ldr r3, [r7, #4]
800245c: 681b ldr r3, [r3, #0]
800245e: 689a ldr r2, [r3, #8]
8002460: 687b ldr r3, [r7, #4]
8002462: 681b ldr r3, [r3, #0]
8002464: f022 0202 bic.w r2, r2, #2
8002468: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode);
800246a: 687b ldr r3, [r7, #4]
800246c: 681b ldr r3, [r3, #0]
800246e: 6899 ldr r1, [r3, #8]
8002470: 687b ldr r3, [r7, #4]
8002472: 7e1b ldrb r3, [r3, #24]
8002474: 005a lsls r2, r3, #1
8002476: 687b ldr r3, [r7, #4]
8002478: 681b ldr r3, [r3, #0]
800247a: 430a orrs r2, r1
800247c: 609a str r2, [r3, #8]
if(hadc->Init.DiscontinuousConvMode != DISABLE)
800247e: 687b ldr r3, [r7, #4]
8002480: f893 3020 ldrb.w r3, [r3, #32]
8002484: 2b00 cmp r3, #0
8002486: d01b beq.n 80024c0 <ADC_Init+0x164>
{
assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
/* Enable the selected ADC regular discontinuous mode */
hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
8002488: 687b ldr r3, [r7, #4]
800248a: 681b ldr r3, [r3, #0]
800248c: 685a ldr r2, [r3, #4]
800248e: 687b ldr r3, [r7, #4]
8002490: 681b ldr r3, [r3, #0]
8002492: f442 6200 orr.w r2, r2, #2048 ; 0x800
8002496: 605a str r2, [r3, #4]
/* Set the number of channels to be converted in discontinuous mode */
hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
8002498: 687b ldr r3, [r7, #4]
800249a: 681b ldr r3, [r3, #0]
800249c: 685a ldr r2, [r3, #4]
800249e: 687b ldr r3, [r7, #4]
80024a0: 681b ldr r3, [r3, #0]
80024a2: f422 4260 bic.w r2, r2, #57344 ; 0xe000
80024a6: 605a str r2, [r3, #4]
hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
80024a8: 687b ldr r3, [r7, #4]
80024aa: 681b ldr r3, [r3, #0]
80024ac: 6859 ldr r1, [r3, #4]
80024ae: 687b ldr r3, [r7, #4]
80024b0: 6a5b ldr r3, [r3, #36] ; 0x24
80024b2: 3b01 subs r3, #1
80024b4: 035a lsls r2, r3, #13
80024b6: 687b ldr r3, [r7, #4]
80024b8: 681b ldr r3, [r3, #0]
80024ba: 430a orrs r2, r1
80024bc: 605a str r2, [r3, #4]
80024be: e007 b.n 80024d0 <ADC_Init+0x174>
}
else
{
/* Disable the selected ADC regular discontinuous mode */
hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
80024c0: 687b ldr r3, [r7, #4]
80024c2: 681b ldr r3, [r3, #0]
80024c4: 685a ldr r2, [r3, #4]
80024c6: 687b ldr r3, [r7, #4]
80024c8: 681b ldr r3, [r3, #0]
80024ca: f422 6200 bic.w r2, r2, #2048 ; 0x800
80024ce: 605a str r2, [r3, #4]
}
/* Set ADC number of conversion */
hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
80024d0: 687b ldr r3, [r7, #4]
80024d2: 681b ldr r3, [r3, #0]
80024d4: 6ada ldr r2, [r3, #44] ; 0x2c
80024d6: 687b ldr r3, [r7, #4]
80024d8: 681b ldr r3, [r3, #0]
80024da: f422 0270 bic.w r2, r2, #15728640 ; 0xf00000
80024de: 62da str r2, [r3, #44] ; 0x2c
hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion);
80024e0: 687b ldr r3, [r7, #4]
80024e2: 681b ldr r3, [r3, #0]
80024e4: 6ad9 ldr r1, [r3, #44] ; 0x2c
80024e6: 687b ldr r3, [r7, #4]
80024e8: 69db ldr r3, [r3, #28]
80024ea: 3b01 subs r3, #1
80024ec: 051a lsls r2, r3, #20
80024ee: 687b ldr r3, [r7, #4]
80024f0: 681b ldr r3, [r3, #0]
80024f2: 430a orrs r2, r1
80024f4: 62da str r2, [r3, #44] ; 0x2c
/* Enable or disable ADC DMA continuous request */
hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
80024f6: 687b ldr r3, [r7, #4]
80024f8: 681b ldr r3, [r3, #0]
80024fa: 689a ldr r2, [r3, #8]
80024fc: 687b ldr r3, [r7, #4]
80024fe: 681b ldr r3, [r3, #0]
8002500: f422 7200 bic.w r2, r2, #512 ; 0x200
8002504: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= ADC_CR2_DMAContReq((uint32_t)hadc->Init.DMAContinuousRequests);
8002506: 687b ldr r3, [r7, #4]
8002508: 681b ldr r3, [r3, #0]
800250a: 6899 ldr r1, [r3, #8]
800250c: 687b ldr r3, [r7, #4]
800250e: f893 3030 ldrb.w r3, [r3, #48] ; 0x30
8002512: 025a lsls r2, r3, #9
8002514: 687b ldr r3, [r7, #4]
8002516: 681b ldr r3, [r3, #0]
8002518: 430a orrs r2, r1
800251a: 609a str r2, [r3, #8]
/* Enable or disable ADC end of conversion selection */
hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
800251c: 687b ldr r3, [r7, #4]
800251e: 681b ldr r3, [r3, #0]
8002520: 689a ldr r2, [r3, #8]
8002522: 687b ldr r3, [r7, #4]
8002524: 681b ldr r3, [r3, #0]
8002526: f422 6280 bic.w r2, r2, #1024 ; 0x400
800252a: 609a str r2, [r3, #8]
hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
800252c: 687b ldr r3, [r7, #4]
800252e: 681b ldr r3, [r3, #0]
8002530: 6899 ldr r1, [r3, #8]
8002532: 687b ldr r3, [r7, #4]
8002534: 695b ldr r3, [r3, #20]
8002536: 029a lsls r2, r3, #10
8002538: 687b ldr r3, [r7, #4]
800253a: 681b ldr r3, [r3, #0]
800253c: 430a orrs r2, r1
800253e: 609a str r2, [r3, #8]
}
8002540: bf00 nop
8002542: 3714 adds r7, #20
8002544: 46bd mov sp, r7
8002546: f85d 7b04 ldr.w r7, [sp], #4
800254a: 4770 bx lr
800254c: 40012300 .word 0x40012300
8002550: 0f000001 .word 0x0f000001
08002554 <__NVIC_SetPriorityGrouping>:
{
8002554: b480 push {r7}
8002556: b085 sub sp, #20
8002558: af00 add r7, sp, #0
800255a: 6078 str r0, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
800255c: 687b ldr r3, [r7, #4]
800255e: f003 0307 and.w r3, r3, #7
8002562: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8002564: 4b0c ldr r3, [pc, #48] ; (8002598 <__NVIC_SetPriorityGrouping+0x44>)
8002566: 68db ldr r3, [r3, #12]
8002568: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
800256a: 68ba ldr r2, [r7, #8]
800256c: f64f 03ff movw r3, #63743 ; 0xf8ff
8002570: 4013 ands r3, r2
8002572: 60bb str r3, [r7, #8]
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8002574: 68fb ldr r3, [r7, #12]
8002576: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8002578: 68bb ldr r3, [r7, #8]
800257a: 4313 orrs r3, r2
reg_value = (reg_value |
800257c: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
8002580: f443 3300 orr.w r3, r3, #131072 ; 0x20000
8002584: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8002586: 4a04 ldr r2, [pc, #16] ; (8002598 <__NVIC_SetPriorityGrouping+0x44>)
8002588: 68bb ldr r3, [r7, #8]
800258a: 60d3 str r3, [r2, #12]
}
800258c: bf00 nop
800258e: 3714 adds r7, #20
8002590: 46bd mov sp, r7
8002592: f85d 7b04 ldr.w r7, [sp], #4
8002596: 4770 bx lr
8002598: e000ed00 .word 0xe000ed00
0800259c <__NVIC_GetPriorityGrouping>:
{
800259c: b480 push {r7}
800259e: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
80025a0: 4b04 ldr r3, [pc, #16] ; (80025b4 <__NVIC_GetPriorityGrouping+0x18>)
80025a2: 68db ldr r3, [r3, #12]
80025a4: 0a1b lsrs r3, r3, #8
80025a6: f003 0307 and.w r3, r3, #7
}
80025aa: 4618 mov r0, r3
80025ac: 46bd mov sp, r7
80025ae: f85d 7b04 ldr.w r7, [sp], #4
80025b2: 4770 bx lr
80025b4: e000ed00 .word 0xe000ed00
080025b8 <__NVIC_EnableIRQ>:
{
80025b8: b480 push {r7}
80025ba: b083 sub sp, #12
80025bc: af00 add r7, sp, #0
80025be: 4603 mov r3, r0
80025c0: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80025c2: f997 3007 ldrsb.w r3, [r7, #7]
80025c6: 2b00 cmp r3, #0
80025c8: db0b blt.n 80025e2 <__NVIC_EnableIRQ+0x2a>
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
80025ca: 79fb ldrb r3, [r7, #7]
80025cc: f003 021f and.w r2, r3, #31
80025d0: 4907 ldr r1, [pc, #28] ; (80025f0 <__NVIC_EnableIRQ+0x38>)
80025d2: f997 3007 ldrsb.w r3, [r7, #7]
80025d6: 095b lsrs r3, r3, #5
80025d8: 2001 movs r0, #1
80025da: fa00 f202 lsl.w r2, r0, r2
80025de: f841 2023 str.w r2, [r1, r3, lsl #2]
}
80025e2: bf00 nop
80025e4: 370c adds r7, #12
80025e6: 46bd mov sp, r7
80025e8: f85d 7b04 ldr.w r7, [sp], #4
80025ec: 4770 bx lr
80025ee: bf00 nop
80025f0: e000e100 .word 0xe000e100
080025f4 <__NVIC_SetPriority>:
{
80025f4: b480 push {r7}
80025f6: b083 sub sp, #12
80025f8: af00 add r7, sp, #0
80025fa: 4603 mov r3, r0
80025fc: 6039 str r1, [r7, #0]
80025fe: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8002600: f997 3007 ldrsb.w r3, [r7, #7]
8002604: 2b00 cmp r3, #0
8002606: db0a blt.n 800261e <__NVIC_SetPriority+0x2a>
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8002608: 683b ldr r3, [r7, #0]
800260a: b2da uxtb r2, r3
800260c: 490c ldr r1, [pc, #48] ; (8002640 <__NVIC_SetPriority+0x4c>)
800260e: f997 3007 ldrsb.w r3, [r7, #7]
8002612: 0112 lsls r2, r2, #4
8002614: b2d2 uxtb r2, r2
8002616: 440b add r3, r1
8002618: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
800261c: e00a b.n 8002634 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800261e: 683b ldr r3, [r7, #0]
8002620: b2da uxtb r2, r3
8002622: 4908 ldr r1, [pc, #32] ; (8002644 <__NVIC_SetPriority+0x50>)
8002624: 79fb ldrb r3, [r7, #7]
8002626: f003 030f and.w r3, r3, #15
800262a: 3b04 subs r3, #4
800262c: 0112 lsls r2, r2, #4
800262e: b2d2 uxtb r2, r2
8002630: 440b add r3, r1
8002632: 761a strb r2, [r3, #24]
}
8002634: bf00 nop
8002636: 370c adds r7, #12
8002638: 46bd mov sp, r7
800263a: f85d 7b04 ldr.w r7, [sp], #4
800263e: 4770 bx lr
8002640: e000e100 .word 0xe000e100
8002644: e000ed00 .word 0xe000ed00
08002648 <NVIC_EncodePriority>:
{
8002648: b480 push {r7}
800264a: b089 sub sp, #36 ; 0x24
800264c: af00 add r7, sp, #0
800264e: 60f8 str r0, [r7, #12]
8002650: 60b9 str r1, [r7, #8]
8002652: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8002654: 68fb ldr r3, [r7, #12]
8002656: f003 0307 and.w r3, r3, #7
800265a: 61fb str r3, [r7, #28]
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
800265c: 69fb ldr r3, [r7, #28]
800265e: f1c3 0307 rsb r3, r3, #7
8002662: 2b04 cmp r3, #4
8002664: bf28 it cs
8002666: 2304 movcs r3, #4
8002668: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
800266a: 69fb ldr r3, [r7, #28]
800266c: 3304 adds r3, #4
800266e: 2b06 cmp r3, #6
8002670: d902 bls.n 8002678 <NVIC_EncodePriority+0x30>
8002672: 69fb ldr r3, [r7, #28]
8002674: 3b03 subs r3, #3
8002676: e000 b.n 800267a <NVIC_EncodePriority+0x32>
8002678: 2300 movs r3, #0
800267a: 617b str r3, [r7, #20]
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
800267c: f04f 32ff mov.w r2, #4294967295
8002680: 69bb ldr r3, [r7, #24]
8002682: fa02 f303 lsl.w r3, r2, r3
8002686: 43da mvns r2, r3
8002688: 68bb ldr r3, [r7, #8]
800268a: 401a ands r2, r3
800268c: 697b ldr r3, [r7, #20]
800268e: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8002690: f04f 31ff mov.w r1, #4294967295
8002694: 697b ldr r3, [r7, #20]
8002696: fa01 f303 lsl.w r3, r1, r3
800269a: 43d9 mvns r1, r3
800269c: 687b ldr r3, [r7, #4]
800269e: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80026a0: 4313 orrs r3, r2
}
80026a2: 4618 mov r0, r3
80026a4: 3724 adds r7, #36 ; 0x24
80026a6: 46bd mov sp, r7
80026a8: f85d 7b04 ldr.w r7, [sp], #4
80026ac: 4770 bx lr
...
080026b0 <SysTick_Config>:
{
80026b0: b580 push {r7, lr}
80026b2: b082 sub sp, #8
80026b4: af00 add r7, sp, #0
80026b6: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
80026b8: 687b ldr r3, [r7, #4]
80026ba: 3b01 subs r3, #1
80026bc: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
80026c0: d301 bcc.n 80026c6 <SysTick_Config+0x16>
return (1UL); /* Reload value impossible */
80026c2: 2301 movs r3, #1
80026c4: e00f b.n 80026e6 <SysTick_Config+0x36>
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
80026c6: 4a0a ldr r2, [pc, #40] ; (80026f0 <SysTick_Config+0x40>)
80026c8: 687b ldr r3, [r7, #4]
80026ca: 3b01 subs r3, #1
80026cc: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
80026ce: 210f movs r1, #15
80026d0: f04f 30ff mov.w r0, #4294967295
80026d4: f7ff ff8e bl 80025f4 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
80026d8: 4b05 ldr r3, [pc, #20] ; (80026f0 <SysTick_Config+0x40>)
80026da: 2200 movs r2, #0
80026dc: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80026de: 4b04 ldr r3, [pc, #16] ; (80026f0 <SysTick_Config+0x40>)
80026e0: 2207 movs r2, #7
80026e2: 601a str r2, [r3, #0]
return (0UL); /* Function successful */
80026e4: 2300 movs r3, #0
}
80026e6: 4618 mov r0, r3
80026e8: 3708 adds r7, #8
80026ea: 46bd mov sp, r7
80026ec: bd80 pop {r7, pc}
80026ee: bf00 nop
80026f0: e000e010 .word 0xe000e010
080026f4 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80026f4: b580 push {r7, lr}
80026f6: b082 sub sp, #8
80026f8: af00 add r7, sp, #0
80026fa: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
80026fc: 6878 ldr r0, [r7, #4]
80026fe: f7ff ff29 bl 8002554 <__NVIC_SetPriorityGrouping>
}
8002702: bf00 nop
8002704: 3708 adds r7, #8
8002706: 46bd mov sp, r7
8002708: bd80 pop {r7, pc}
0800270a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
800270a: b580 push {r7, lr}
800270c: b086 sub sp, #24
800270e: af00 add r7, sp, #0
8002710: 4603 mov r3, r0
8002712: 60b9 str r1, [r7, #8]
8002714: 607a str r2, [r7, #4]
8002716: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8002718: 2300 movs r3, #0
800271a: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
800271c: f7ff ff3e bl 800259c <__NVIC_GetPriorityGrouping>
8002720: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8002722: 687a ldr r2, [r7, #4]
8002724: 68b9 ldr r1, [r7, #8]
8002726: 6978 ldr r0, [r7, #20]
8002728: f7ff ff8e bl 8002648 <NVIC_EncodePriority>
800272c: 4602 mov r2, r0
800272e: f997 300f ldrsb.w r3, [r7, #15]
8002732: 4611 mov r1, r2
8002734: 4618 mov r0, r3
8002736: f7ff ff5d bl 80025f4 <__NVIC_SetPriority>
}
800273a: bf00 nop
800273c: 3718 adds r7, #24
800273e: 46bd mov sp, r7
8002740: bd80 pop {r7, pc}
08002742 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8002742: b580 push {r7, lr}
8002744: b082 sub sp, #8
8002746: af00 add r7, sp, #0
8002748: 4603 mov r3, r0
800274a: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
800274c: f997 3007 ldrsb.w r3, [r7, #7]
8002750: 4618 mov r0, r3
8002752: f7ff ff31 bl 80025b8 <__NVIC_EnableIRQ>
}
8002756: bf00 nop
8002758: 3708 adds r7, #8
800275a: 46bd mov sp, r7
800275c: bd80 pop {r7, pc}
0800275e <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
800275e: b580 push {r7, lr}
8002760: b082 sub sp, #8
8002762: af00 add r7, sp, #0
8002764: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8002766: 6878 ldr r0, [r7, #4]
8002768: f7ff ffa2 bl 80026b0 <SysTick_Config>
800276c: 4603 mov r3, r0
}
800276e: 4618 mov r0, r3
8002770: 3708 adds r7, #8
8002772: 46bd mov sp, r7
8002774: bd80 pop {r7, pc}
08002776 <HAL_DMA_Abort_IT>:
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
8002776: b480 push {r7}
8002778: b083 sub sp, #12
800277a: af00 add r7, sp, #0
800277c: 6078 str r0, [r7, #4]
if(hdma->State != HAL_DMA_STATE_BUSY)
800277e: 687b ldr r3, [r7, #4]
8002780: f893 3035 ldrb.w r3, [r3, #53] ; 0x35
8002784: b2db uxtb r3, r3
8002786: 2b02 cmp r3, #2
8002788: d004 beq.n 8002794 <HAL_DMA_Abort_IT+0x1e>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
800278a: 687b ldr r3, [r7, #4]
800278c: 2280 movs r2, #128 ; 0x80
800278e: 655a str r2, [r3, #84] ; 0x54
return HAL_ERROR;
8002790: 2301 movs r3, #1
8002792: e00c b.n 80027ae <HAL_DMA_Abort_IT+0x38>
}
else
{
/* Set Abort State */
hdma->State = HAL_DMA_STATE_ABORT;
8002794: 687b ldr r3, [r7, #4]
8002796: 2205 movs r2, #5
8002798: f883 2035 strb.w r2, [r3, #53] ; 0x35
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
800279c: 687b ldr r3, [r7, #4]
800279e: 681b ldr r3, [r3, #0]
80027a0: 681a ldr r2, [r3, #0]
80027a2: 687b ldr r3, [r7, #4]
80027a4: 681b ldr r3, [r3, #0]
80027a6: f022 0201 bic.w r2, r2, #1
80027aa: 601a str r2, [r3, #0]
}
return HAL_OK;
80027ac: 2300 movs r3, #0
}
80027ae: 4618 mov r0, r3
80027b0: 370c adds r7, #12
80027b2: 46bd mov sp, r7
80027b4: f85d 7b04 ldr.w r7, [sp], #4
80027b8: 4770 bx lr
...
080027bc <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80027bc: b480 push {r7}
80027be: b089 sub sp, #36 ; 0x24
80027c0: af00 add r7, sp, #0
80027c2: 6078 str r0, [r7, #4]
80027c4: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
80027c6: 2300 movs r3, #0
80027c8: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
80027ca: 2300 movs r3, #0
80027cc: 613b str r3, [r7, #16]
uint32_t temp = 0x00U;
80027ce: 2300 movs r3, #0
80027d0: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
80027d2: 2300 movs r3, #0
80027d4: 61fb str r3, [r7, #28]
80027d6: e177 b.n 8002ac8 <HAL_GPIO_Init+0x30c>
{
/* Get the IO position */
ioposition = 0x01U << position;
80027d8: 2201 movs r2, #1
80027da: 69fb ldr r3, [r7, #28]
80027dc: fa02 f303 lsl.w r3, r2, r3
80027e0: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
80027e2: 683b ldr r3, [r7, #0]
80027e4: 681b ldr r3, [r3, #0]
80027e6: 697a ldr r2, [r7, #20]
80027e8: 4013 ands r3, r2
80027ea: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
80027ec: 693a ldr r2, [r7, #16]
80027ee: 697b ldr r3, [r7, #20]
80027f0: 429a cmp r2, r3
80027f2: f040 8166 bne.w 8002ac2 <HAL_GPIO_Init+0x306>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
80027f6: 683b ldr r3, [r7, #0]
80027f8: 685b ldr r3, [r3, #4]
80027fa: 2b01 cmp r3, #1
80027fc: d00b beq.n 8002816 <HAL_GPIO_Init+0x5a>
80027fe: 683b ldr r3, [r7, #0]
8002800: 685b ldr r3, [r3, #4]
8002802: 2b02 cmp r3, #2
8002804: d007 beq.n 8002816 <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
8002806: 683b ldr r3, [r7, #0]
8002808: 685b ldr r3, [r3, #4]
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
800280a: 2b11 cmp r3, #17
800280c: d003 beq.n 8002816 <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800280e: 683b ldr r3, [r7, #0]
8002810: 685b ldr r3, [r3, #4]
8002812: 2b12 cmp r3, #18
8002814: d130 bne.n 8002878 <HAL_GPIO_Init+0xbc>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8002816: 687b ldr r3, [r7, #4]
8002818: 689b ldr r3, [r3, #8]
800281a: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
800281c: 69fb ldr r3, [r7, #28]
800281e: 005b lsls r3, r3, #1
8002820: 2203 movs r2, #3
8002822: fa02 f303 lsl.w r3, r2, r3
8002826: 43db mvns r3, r3
8002828: 69ba ldr r2, [r7, #24]
800282a: 4013 ands r3, r2
800282c: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
800282e: 683b ldr r3, [r7, #0]
8002830: 68da ldr r2, [r3, #12]
8002832: 69fb ldr r3, [r7, #28]
8002834: 005b lsls r3, r3, #1
8002836: fa02 f303 lsl.w r3, r2, r3
800283a: 69ba ldr r2, [r7, #24]
800283c: 4313 orrs r3, r2
800283e: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
8002840: 687b ldr r3, [r7, #4]
8002842: 69ba ldr r2, [r7, #24]
8002844: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
8002846: 687b ldr r3, [r7, #4]
8002848: 685b ldr r3, [r3, #4]
800284a: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
800284c: 2201 movs r2, #1
800284e: 69fb ldr r3, [r7, #28]
8002850: fa02 f303 lsl.w r3, r2, r3
8002854: 43db mvns r3, r3
8002856: 69ba ldr r2, [r7, #24]
8002858: 4013 ands r3, r2
800285a: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
800285c: 683b ldr r3, [r7, #0]
800285e: 685b ldr r3, [r3, #4]
8002860: 091b lsrs r3, r3, #4
8002862: f003 0201 and.w r2, r3, #1
8002866: 69fb ldr r3, [r7, #28]
8002868: fa02 f303 lsl.w r3, r2, r3
800286c: 69ba ldr r2, [r7, #24]
800286e: 4313 orrs r3, r2
8002870: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
8002872: 687b ldr r3, [r7, #4]
8002874: 69ba ldr r2, [r7, #24]
8002876: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
8002878: 687b ldr r3, [r7, #4]
800287a: 68db ldr r3, [r3, #12]
800287c: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
800287e: 69fb ldr r3, [r7, #28]
8002880: 005b lsls r3, r3, #1
8002882: 2203 movs r2, #3
8002884: fa02 f303 lsl.w r3, r2, r3
8002888: 43db mvns r3, r3
800288a: 69ba ldr r2, [r7, #24]
800288c: 4013 ands r3, r2
800288e: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
8002890: 683b ldr r3, [r7, #0]
8002892: 689a ldr r2, [r3, #8]
8002894: 69fb ldr r3, [r7, #28]
8002896: 005b lsls r3, r3, #1
8002898: fa02 f303 lsl.w r3, r2, r3
800289c: 69ba ldr r2, [r7, #24]
800289e: 4313 orrs r3, r2
80028a0: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
80028a2: 687b ldr r3, [r7, #4]
80028a4: 69ba ldr r2, [r7, #24]
80028a6: 60da str r2, [r3, #12]
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
80028a8: 683b ldr r3, [r7, #0]
80028aa: 685b ldr r3, [r3, #4]
80028ac: 2b02 cmp r3, #2
80028ae: d003 beq.n 80028b8 <HAL_GPIO_Init+0xfc>
80028b0: 683b ldr r3, [r7, #0]
80028b2: 685b ldr r3, [r3, #4]
80028b4: 2b12 cmp r3, #18
80028b6: d123 bne.n 8002900 <HAL_GPIO_Init+0x144>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
80028b8: 69fb ldr r3, [r7, #28]
80028ba: 08da lsrs r2, r3, #3
80028bc: 687b ldr r3, [r7, #4]
80028be: 3208 adds r2, #8
80028c0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80028c4: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
80028c6: 69fb ldr r3, [r7, #28]
80028c8: f003 0307 and.w r3, r3, #7
80028cc: 009b lsls r3, r3, #2
80028ce: 220f movs r2, #15
80028d0: fa02 f303 lsl.w r3, r2, r3
80028d4: 43db mvns r3, r3
80028d6: 69ba ldr r2, [r7, #24]
80028d8: 4013 ands r3, r2
80028da: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
80028dc: 683b ldr r3, [r7, #0]
80028de: 691a ldr r2, [r3, #16]
80028e0: 69fb ldr r3, [r7, #28]
80028e2: f003 0307 and.w r3, r3, #7
80028e6: 009b lsls r3, r3, #2
80028e8: fa02 f303 lsl.w r3, r2, r3
80028ec: 69ba ldr r2, [r7, #24]
80028ee: 4313 orrs r3, r2
80028f0: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
80028f2: 69fb ldr r3, [r7, #28]
80028f4: 08da lsrs r2, r3, #3
80028f6: 687b ldr r3, [r7, #4]
80028f8: 3208 adds r2, #8
80028fa: 69b9 ldr r1, [r7, #24]
80028fc: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8002900: 687b ldr r3, [r7, #4]
8002902: 681b ldr r3, [r3, #0]
8002904: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
8002906: 69fb ldr r3, [r7, #28]
8002908: 005b lsls r3, r3, #1
800290a: 2203 movs r2, #3
800290c: fa02 f303 lsl.w r3, r2, r3
8002910: 43db mvns r3, r3
8002912: 69ba ldr r2, [r7, #24]
8002914: 4013 ands r3, r2
8002916: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
8002918: 683b ldr r3, [r7, #0]
800291a: 685b ldr r3, [r3, #4]
800291c: f003 0203 and.w r2, r3, #3
8002920: 69fb ldr r3, [r7, #28]
8002922: 005b lsls r3, r3, #1
8002924: fa02 f303 lsl.w r3, r2, r3
8002928: 69ba ldr r2, [r7, #24]
800292a: 4313 orrs r3, r2
800292c: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
800292e: 687b ldr r3, [r7, #4]
8002930: 69ba ldr r2, [r7, #24]
8002932: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8002934: 683b ldr r3, [r7, #0]
8002936: 685b ldr r3, [r3, #4]
8002938: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
800293c: 2b00 cmp r3, #0
800293e: f000 80c0 beq.w 8002ac2 <HAL_GPIO_Init+0x306>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8002942: 2300 movs r3, #0
8002944: 60fb str r3, [r7, #12]
8002946: 4b65 ldr r3, [pc, #404] ; (8002adc <HAL_GPIO_Init+0x320>)
8002948: 6c5b ldr r3, [r3, #68] ; 0x44
800294a: 4a64 ldr r2, [pc, #400] ; (8002adc <HAL_GPIO_Init+0x320>)
800294c: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8002950: 6453 str r3, [r2, #68] ; 0x44
8002952: 4b62 ldr r3, [pc, #392] ; (8002adc <HAL_GPIO_Init+0x320>)
8002954: 6c5b ldr r3, [r3, #68] ; 0x44
8002956: f403 4380 and.w r3, r3, #16384 ; 0x4000
800295a: 60fb str r3, [r7, #12]
800295c: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
800295e: 4a60 ldr r2, [pc, #384] ; (8002ae0 <HAL_GPIO_Init+0x324>)
8002960: 69fb ldr r3, [r7, #28]
8002962: 089b lsrs r3, r3, #2
8002964: 3302 adds r3, #2
8002966: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800296a: 61bb str r3, [r7, #24]
temp &= ~(0x0FU << (4U * (position & 0x03U)));
800296c: 69fb ldr r3, [r7, #28]
800296e: f003 0303 and.w r3, r3, #3
8002972: 009b lsls r3, r3, #2
8002974: 220f movs r2, #15
8002976: fa02 f303 lsl.w r3, r2, r3
800297a: 43db mvns r3, r3
800297c: 69ba ldr r2, [r7, #24]
800297e: 4013 ands r3, r2
8002980: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
8002982: 687b ldr r3, [r7, #4]
8002984: 4a57 ldr r2, [pc, #348] ; (8002ae4 <HAL_GPIO_Init+0x328>)
8002986: 4293 cmp r3, r2
8002988: d037 beq.n 80029fa <HAL_GPIO_Init+0x23e>
800298a: 687b ldr r3, [r7, #4]
800298c: 4a56 ldr r2, [pc, #344] ; (8002ae8 <HAL_GPIO_Init+0x32c>)
800298e: 4293 cmp r3, r2
8002990: d031 beq.n 80029f6 <HAL_GPIO_Init+0x23a>
8002992: 687b ldr r3, [r7, #4]
8002994: 4a55 ldr r2, [pc, #340] ; (8002aec <HAL_GPIO_Init+0x330>)
8002996: 4293 cmp r3, r2
8002998: d02b beq.n 80029f2 <HAL_GPIO_Init+0x236>
800299a: 687b ldr r3, [r7, #4]
800299c: 4a54 ldr r2, [pc, #336] ; (8002af0 <HAL_GPIO_Init+0x334>)
800299e: 4293 cmp r3, r2
80029a0: d025 beq.n 80029ee <HAL_GPIO_Init+0x232>
80029a2: 687b ldr r3, [r7, #4]
80029a4: 4a53 ldr r2, [pc, #332] ; (8002af4 <HAL_GPIO_Init+0x338>)
80029a6: 4293 cmp r3, r2
80029a8: d01f beq.n 80029ea <HAL_GPIO_Init+0x22e>
80029aa: 687b ldr r3, [r7, #4]
80029ac: 4a52 ldr r2, [pc, #328] ; (8002af8 <HAL_GPIO_Init+0x33c>)
80029ae: 4293 cmp r3, r2
80029b0: d019 beq.n 80029e6 <HAL_GPIO_Init+0x22a>
80029b2: 687b ldr r3, [r7, #4]
80029b4: 4a51 ldr r2, [pc, #324] ; (8002afc <HAL_GPIO_Init+0x340>)
80029b6: 4293 cmp r3, r2
80029b8: d013 beq.n 80029e2 <HAL_GPIO_Init+0x226>
80029ba: 687b ldr r3, [r7, #4]
80029bc: 4a50 ldr r2, [pc, #320] ; (8002b00 <HAL_GPIO_Init+0x344>)
80029be: 4293 cmp r3, r2
80029c0: d00d beq.n 80029de <HAL_GPIO_Init+0x222>
80029c2: 687b ldr r3, [r7, #4]
80029c4: 4a4f ldr r2, [pc, #316] ; (8002b04 <HAL_GPIO_Init+0x348>)
80029c6: 4293 cmp r3, r2
80029c8: d007 beq.n 80029da <HAL_GPIO_Init+0x21e>
80029ca: 687b ldr r3, [r7, #4]
80029cc: 4a4e ldr r2, [pc, #312] ; (8002b08 <HAL_GPIO_Init+0x34c>)
80029ce: 4293 cmp r3, r2
80029d0: d101 bne.n 80029d6 <HAL_GPIO_Init+0x21a>
80029d2: 2309 movs r3, #9
80029d4: e012 b.n 80029fc <HAL_GPIO_Init+0x240>
80029d6: 230a movs r3, #10
80029d8: e010 b.n 80029fc <HAL_GPIO_Init+0x240>
80029da: 2308 movs r3, #8
80029dc: e00e b.n 80029fc <HAL_GPIO_Init+0x240>
80029de: 2307 movs r3, #7
80029e0: e00c b.n 80029fc <HAL_GPIO_Init+0x240>
80029e2: 2306 movs r3, #6
80029e4: e00a b.n 80029fc <HAL_GPIO_Init+0x240>
80029e6: 2305 movs r3, #5
80029e8: e008 b.n 80029fc <HAL_GPIO_Init+0x240>
80029ea: 2304 movs r3, #4
80029ec: e006 b.n 80029fc <HAL_GPIO_Init+0x240>
80029ee: 2303 movs r3, #3
80029f0: e004 b.n 80029fc <HAL_GPIO_Init+0x240>
80029f2: 2302 movs r3, #2
80029f4: e002 b.n 80029fc <HAL_GPIO_Init+0x240>
80029f6: 2301 movs r3, #1
80029f8: e000 b.n 80029fc <HAL_GPIO_Init+0x240>
80029fa: 2300 movs r3, #0
80029fc: 69fa ldr r2, [r7, #28]
80029fe: f002 0203 and.w r2, r2, #3
8002a02: 0092 lsls r2, r2, #2
8002a04: 4093 lsls r3, r2
8002a06: 69ba ldr r2, [r7, #24]
8002a08: 4313 orrs r3, r2
8002a0a: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
8002a0c: 4934 ldr r1, [pc, #208] ; (8002ae0 <HAL_GPIO_Init+0x324>)
8002a0e: 69fb ldr r3, [r7, #28]
8002a10: 089b lsrs r3, r3, #2
8002a12: 3302 adds r3, #2
8002a14: 69ba ldr r2, [r7, #24]
8002a16: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
8002a1a: 4b3c ldr r3, [pc, #240] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a1c: 681b ldr r3, [r3, #0]
8002a1e: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002a20: 693b ldr r3, [r7, #16]
8002a22: 43db mvns r3, r3
8002a24: 69ba ldr r2, [r7, #24]
8002a26: 4013 ands r3, r2
8002a28: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8002a2a: 683b ldr r3, [r7, #0]
8002a2c: 685b ldr r3, [r3, #4]
8002a2e: f403 3380 and.w r3, r3, #65536 ; 0x10000
8002a32: 2b00 cmp r3, #0
8002a34: d003 beq.n 8002a3e <HAL_GPIO_Init+0x282>
{
temp |= iocurrent;
8002a36: 69ba ldr r2, [r7, #24]
8002a38: 693b ldr r3, [r7, #16]
8002a3a: 4313 orrs r3, r2
8002a3c: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
8002a3e: 4a33 ldr r2, [pc, #204] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a40: 69bb ldr r3, [r7, #24]
8002a42: 6013 str r3, [r2, #0]
temp = EXTI->EMR;
8002a44: 4b31 ldr r3, [pc, #196] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a46: 685b ldr r3, [r3, #4]
8002a48: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002a4a: 693b ldr r3, [r7, #16]
8002a4c: 43db mvns r3, r3
8002a4e: 69ba ldr r2, [r7, #24]
8002a50: 4013 ands r3, r2
8002a52: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8002a54: 683b ldr r3, [r7, #0]
8002a56: 685b ldr r3, [r3, #4]
8002a58: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002a5c: 2b00 cmp r3, #0
8002a5e: d003 beq.n 8002a68 <HAL_GPIO_Init+0x2ac>
{
temp |= iocurrent;
8002a60: 69ba ldr r2, [r7, #24]
8002a62: 693b ldr r3, [r7, #16]
8002a64: 4313 orrs r3, r2
8002a66: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
8002a68: 4a28 ldr r2, [pc, #160] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a6a: 69bb ldr r3, [r7, #24]
8002a6c: 6053 str r3, [r2, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
8002a6e: 4b27 ldr r3, [pc, #156] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a70: 689b ldr r3, [r3, #8]
8002a72: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002a74: 693b ldr r3, [r7, #16]
8002a76: 43db mvns r3, r3
8002a78: 69ba ldr r2, [r7, #24]
8002a7a: 4013 ands r3, r2
8002a7c: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8002a7e: 683b ldr r3, [r7, #0]
8002a80: 685b ldr r3, [r3, #4]
8002a82: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8002a86: 2b00 cmp r3, #0
8002a88: d003 beq.n 8002a92 <HAL_GPIO_Init+0x2d6>
{
temp |= iocurrent;
8002a8a: 69ba ldr r2, [r7, #24]
8002a8c: 693b ldr r3, [r7, #16]
8002a8e: 4313 orrs r3, r2
8002a90: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
8002a92: 4a1e ldr r2, [pc, #120] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a94: 69bb ldr r3, [r7, #24]
8002a96: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
8002a98: 4b1c ldr r3, [pc, #112] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002a9a: 68db ldr r3, [r3, #12]
8002a9c: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8002a9e: 693b ldr r3, [r7, #16]
8002aa0: 43db mvns r3, r3
8002aa2: 69ba ldr r2, [r7, #24]
8002aa4: 4013 ands r3, r2
8002aa6: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8002aa8: 683b ldr r3, [r7, #0]
8002aaa: 685b ldr r3, [r3, #4]
8002aac: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8002ab0: 2b00 cmp r3, #0
8002ab2: d003 beq.n 8002abc <HAL_GPIO_Init+0x300>
{
temp |= iocurrent;
8002ab4: 69ba ldr r2, [r7, #24]
8002ab6: 693b ldr r3, [r7, #16]
8002ab8: 4313 orrs r3, r2
8002aba: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
8002abc: 4a13 ldr r2, [pc, #76] ; (8002b0c <HAL_GPIO_Init+0x350>)
8002abe: 69bb ldr r3, [r7, #24]
8002ac0: 60d3 str r3, [r2, #12]
for(position = 0U; position < GPIO_NUMBER; position++)
8002ac2: 69fb ldr r3, [r7, #28]
8002ac4: 3301 adds r3, #1
8002ac6: 61fb str r3, [r7, #28]
8002ac8: 69fb ldr r3, [r7, #28]
8002aca: 2b0f cmp r3, #15
8002acc: f67f ae84 bls.w 80027d8 <HAL_GPIO_Init+0x1c>
}
}
}
}
8002ad0: bf00 nop
8002ad2: 3724 adds r7, #36 ; 0x24
8002ad4: 46bd mov sp, r7
8002ad6: f85d 7b04 ldr.w r7, [sp], #4
8002ada: 4770 bx lr
8002adc: 40023800 .word 0x40023800
8002ae0: 40013800 .word 0x40013800
8002ae4: 40020000 .word 0x40020000
8002ae8: 40020400 .word 0x40020400
8002aec: 40020800 .word 0x40020800
8002af0: 40020c00 .word 0x40020c00
8002af4: 40021000 .word 0x40021000
8002af8: 40021400 .word 0x40021400
8002afc: 40021800 .word 0x40021800
8002b00: 40021c00 .word 0x40021c00
8002b04: 40022000 .word 0x40022000
8002b08: 40022400 .word 0x40022400
8002b0c: 40013c00 .word 0x40013c00
08002b10 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8002b10: b480 push {r7}
8002b12: b083 sub sp, #12
8002b14: af00 add r7, sp, #0
8002b16: 6078 str r0, [r7, #4]
8002b18: 460b mov r3, r1
8002b1a: 807b strh r3, [r7, #2]
8002b1c: 4613 mov r3, r2
8002b1e: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
8002b20: 787b ldrb r3, [r7, #1]
8002b22: 2b00 cmp r3, #0
8002b24: d003 beq.n 8002b2e <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8002b26: 887a ldrh r2, [r7, #2]
8002b28: 687b ldr r3, [r7, #4]
8002b2a: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
8002b2c: e003 b.n 8002b36 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
8002b2e: 887b ldrh r3, [r7, #2]
8002b30: 041a lsls r2, r3, #16
8002b32: 687b ldr r3, [r7, #4]
8002b34: 619a str r2, [r3, #24]
}
8002b36: bf00 nop
8002b38: 370c adds r7, #12
8002b3a: 46bd mov sp, r7
8002b3c: f85d 7b04 ldr.w r7, [sp], #4
8002b40: 4770 bx lr
...
08002b44 <HAL_GPIO_EXTI_IRQHandler>:
* @brief This function handles EXTI interrupt request.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
{
8002b44: b580 push {r7, lr}
8002b46: b082 sub sp, #8
8002b48: af00 add r7, sp, #0
8002b4a: 4603 mov r3, r0
8002b4c: 80fb strh r3, [r7, #6]
/* EXTI line interrupt detected */
if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
8002b4e: 4b08 ldr r3, [pc, #32] ; (8002b70 <HAL_GPIO_EXTI_IRQHandler+0x2c>)
8002b50: 695a ldr r2, [r3, #20]
8002b52: 88fb ldrh r3, [r7, #6]
8002b54: 4013 ands r3, r2
8002b56: 2b00 cmp r3, #0
8002b58: d006 beq.n 8002b68 <HAL_GPIO_EXTI_IRQHandler+0x24>
{
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
8002b5a: 4a05 ldr r2, [pc, #20] ; (8002b70 <HAL_GPIO_EXTI_IRQHandler+0x2c>)
8002b5c: 88fb ldrh r3, [r7, #6]
8002b5e: 6153 str r3, [r2, #20]
HAL_GPIO_EXTI_Callback(GPIO_Pin);
8002b60: 88fb ldrh r3, [r7, #6]
8002b62: 4618 mov r0, r3
8002b64: f000 f806 bl 8002b74 <HAL_GPIO_EXTI_Callback>
}
}
8002b68: bf00 nop
8002b6a: 3708 adds r7, #8
8002b6c: 46bd mov sp, r7
8002b6e: bd80 pop {r7, pc}
8002b70: 40013c00 .word 0x40013c00
08002b74 <HAL_GPIO_EXTI_Callback>:
* @brief EXTI line detection callbacks.
* @param GPIO_Pin Specifies the pins connected EXTI line
* @retval None
*/
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
8002b74: b480 push {r7}
8002b76: b083 sub sp, #12
8002b78: af00 add r7, sp, #0
8002b7a: 4603 mov r3, r0
8002b7c: 80fb strh r3, [r7, #6]
/* Prevent unused argument(s) compilation warning */
UNUSED(GPIO_Pin);
/* NOTE: This function Should not be modified, when the callback is needed,
the HAL_GPIO_EXTI_Callback could be implemented in the user file
*/
}
8002b7e: bf00 nop
8002b80: 370c adds r7, #12
8002b82: 46bd mov sp, r7
8002b84: f85d 7b04 ldr.w r7, [sp], #4
8002b88: 4770 bx lr
...
08002b8c <HAL_RCC_OscConfig>:
* supported by this API. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8002b8c: b580 push {r7, lr}
8002b8e: b086 sub sp, #24
8002b90: af00 add r7, sp, #0
8002b92: 6078 str r0, [r7, #4]
uint32_t tickstart, pll_config;
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
8002b94: 687b ldr r3, [r7, #4]
8002b96: 2b00 cmp r3, #0
8002b98: d101 bne.n 8002b9e <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8002b9a: 2301 movs r3, #1
8002b9c: e25b b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8002b9e: 687b ldr r3, [r7, #4]
8002ba0: 681b ldr r3, [r3, #0]
8002ba2: f003 0301 and.w r3, r3, #1
8002ba6: 2b00 cmp r3, #0
8002ba8: d075 beq.n 8002c96 <HAL_RCC_OscConfig+0x10a>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
8002baa: 4ba3 ldr r3, [pc, #652] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002bac: 689b ldr r3, [r3, #8]
8002bae: f003 030c and.w r3, r3, #12
8002bb2: 2b04 cmp r3, #4
8002bb4: d00c beq.n 8002bd0 <HAL_RCC_OscConfig+0x44>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8002bb6: 4ba0 ldr r3, [pc, #640] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002bb8: 689b ldr r3, [r3, #8]
8002bba: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
8002bbe: 2b08 cmp r3, #8
8002bc0: d112 bne.n 8002be8 <HAL_RCC_OscConfig+0x5c>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8002bc2: 4b9d ldr r3, [pc, #628] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002bc4: 685b ldr r3, [r3, #4]
8002bc6: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8002bca: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
8002bce: d10b bne.n 8002be8 <HAL_RCC_OscConfig+0x5c>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002bd0: 4b99 ldr r3, [pc, #612] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002bd2: 681b ldr r3, [r3, #0]
8002bd4: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002bd8: 2b00 cmp r3, #0
8002bda: d05b beq.n 8002c94 <HAL_RCC_OscConfig+0x108>
8002bdc: 687b ldr r3, [r7, #4]
8002bde: 685b ldr r3, [r3, #4]
8002be0: 2b00 cmp r3, #0
8002be2: d157 bne.n 8002c94 <HAL_RCC_OscConfig+0x108>
{
return HAL_ERROR;
8002be4: 2301 movs r3, #1
8002be6: e236 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8002be8: 687b ldr r3, [r7, #4]
8002bea: 685b ldr r3, [r3, #4]
8002bec: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8002bf0: d106 bne.n 8002c00 <HAL_RCC_OscConfig+0x74>
8002bf2: 4b91 ldr r3, [pc, #580] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002bf4: 681b ldr r3, [r3, #0]
8002bf6: 4a90 ldr r2, [pc, #576] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002bf8: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002bfc: 6013 str r3, [r2, #0]
8002bfe: e01d b.n 8002c3c <HAL_RCC_OscConfig+0xb0>
8002c00: 687b ldr r3, [r7, #4]
8002c02: 685b ldr r3, [r3, #4]
8002c04: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
8002c08: d10c bne.n 8002c24 <HAL_RCC_OscConfig+0x98>
8002c0a: 4b8b ldr r3, [pc, #556] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c0c: 681b ldr r3, [r3, #0]
8002c0e: 4a8a ldr r2, [pc, #552] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c10: f443 2380 orr.w r3, r3, #262144 ; 0x40000
8002c14: 6013 str r3, [r2, #0]
8002c16: 4b88 ldr r3, [pc, #544] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c18: 681b ldr r3, [r3, #0]
8002c1a: 4a87 ldr r2, [pc, #540] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c1c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8002c20: 6013 str r3, [r2, #0]
8002c22: e00b b.n 8002c3c <HAL_RCC_OscConfig+0xb0>
8002c24: 4b84 ldr r3, [pc, #528] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c26: 681b ldr r3, [r3, #0]
8002c28: 4a83 ldr r2, [pc, #524] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c2a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8002c2e: 6013 str r3, [r2, #0]
8002c30: 4b81 ldr r3, [pc, #516] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c32: 681b ldr r3, [r3, #0]
8002c34: 4a80 ldr r2, [pc, #512] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c36: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8002c3a: 6013 str r3, [r2, #0]
/* Check the HSE State */
if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
8002c3c: 687b ldr r3, [r7, #4]
8002c3e: 685b ldr r3, [r3, #4]
8002c40: 2b00 cmp r3, #0
8002c42: d013 beq.n 8002c6c <HAL_RCC_OscConfig+0xe0>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002c44: f7ff f9e6 bl 8002014 <HAL_GetTick>
8002c48: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002c4a: e008 b.n 8002c5e <HAL_RCC_OscConfig+0xd2>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8002c4c: f7ff f9e2 bl 8002014 <HAL_GetTick>
8002c50: 4602 mov r2, r0
8002c52: 693b ldr r3, [r7, #16]
8002c54: 1ad3 subs r3, r2, r3
8002c56: 2b64 cmp r3, #100 ; 0x64
8002c58: d901 bls.n 8002c5e <HAL_RCC_OscConfig+0xd2>
{
return HAL_TIMEOUT;
8002c5a: 2303 movs r3, #3
8002c5c: e1fb b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002c5e: 4b76 ldr r3, [pc, #472] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c60: 681b ldr r3, [r3, #0]
8002c62: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002c66: 2b00 cmp r3, #0
8002c68: d0f0 beq.n 8002c4c <HAL_RCC_OscConfig+0xc0>
8002c6a: e014 b.n 8002c96 <HAL_RCC_OscConfig+0x10a>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002c6c: f7ff f9d2 bl 8002014 <HAL_GetTick>
8002c70: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002c72: e008 b.n 8002c86 <HAL_RCC_OscConfig+0xfa>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8002c74: f7ff f9ce bl 8002014 <HAL_GetTick>
8002c78: 4602 mov r2, r0
8002c7a: 693b ldr r3, [r7, #16]
8002c7c: 1ad3 subs r3, r2, r3
8002c7e: 2b64 cmp r3, #100 ; 0x64
8002c80: d901 bls.n 8002c86 <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
8002c82: 2303 movs r3, #3
8002c84: e1e7 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002c86: 4b6c ldr r3, [pc, #432] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002c88: 681b ldr r3, [r3, #0]
8002c8a: f403 3300 and.w r3, r3, #131072 ; 0x20000
8002c8e: 2b00 cmp r3, #0
8002c90: d1f0 bne.n 8002c74 <HAL_RCC_OscConfig+0xe8>
8002c92: e000 b.n 8002c96 <HAL_RCC_OscConfig+0x10a>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002c94: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8002c96: 687b ldr r3, [r7, #4]
8002c98: 681b ldr r3, [r3, #0]
8002c9a: f003 0302 and.w r3, r3, #2
8002c9e: 2b00 cmp r3, #0
8002ca0: d063 beq.n 8002d6a <HAL_RCC_OscConfig+0x1de>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
8002ca2: 4b65 ldr r3, [pc, #404] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002ca4: 689b ldr r3, [r3, #8]
8002ca6: f003 030c and.w r3, r3, #12
8002caa: 2b00 cmp r3, #0
8002cac: d00b beq.n 8002cc6 <HAL_RCC_OscConfig+0x13a>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8002cae: 4b62 ldr r3, [pc, #392] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002cb0: 689b ldr r3, [r3, #8]
8002cb2: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
8002cb6: 2b08 cmp r3, #8
8002cb8: d11c bne.n 8002cf4 <HAL_RCC_OscConfig+0x168>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8002cba: 4b5f ldr r3, [pc, #380] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002cbc: 685b ldr r3, [r3, #4]
8002cbe: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8002cc2: 2b00 cmp r3, #0
8002cc4: d116 bne.n 8002cf4 <HAL_RCC_OscConfig+0x168>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002cc6: 4b5c ldr r3, [pc, #368] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002cc8: 681b ldr r3, [r3, #0]
8002cca: f003 0302 and.w r3, r3, #2
8002cce: 2b00 cmp r3, #0
8002cd0: d005 beq.n 8002cde <HAL_RCC_OscConfig+0x152>
8002cd2: 687b ldr r3, [r7, #4]
8002cd4: 68db ldr r3, [r3, #12]
8002cd6: 2b01 cmp r3, #1
8002cd8: d001 beq.n 8002cde <HAL_RCC_OscConfig+0x152>
{
return HAL_ERROR;
8002cda: 2301 movs r3, #1
8002cdc: e1bb b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002cde: 4b56 ldr r3, [pc, #344] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002ce0: 681b ldr r3, [r3, #0]
8002ce2: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8002ce6: 687b ldr r3, [r7, #4]
8002ce8: 691b ldr r3, [r3, #16]
8002cea: 00db lsls r3, r3, #3
8002cec: 4952 ldr r1, [pc, #328] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002cee: 4313 orrs r3, r2
8002cf0: 600b str r3, [r1, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002cf2: e03a b.n 8002d6a <HAL_RCC_OscConfig+0x1de>
}
}
else
{
/* Check the HSI State */
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
8002cf4: 687b ldr r3, [r7, #4]
8002cf6: 68db ldr r3, [r3, #12]
8002cf8: 2b00 cmp r3, #0
8002cfa: d020 beq.n 8002d3e <HAL_RCC_OscConfig+0x1b2>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8002cfc: 4b4f ldr r3, [pc, #316] ; (8002e3c <HAL_RCC_OscConfig+0x2b0>)
8002cfe: 2201 movs r2, #1
8002d00: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8002d02: f7ff f987 bl 8002014 <HAL_GetTick>
8002d06: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002d08: e008 b.n 8002d1c <HAL_RCC_OscConfig+0x190>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8002d0a: f7ff f983 bl 8002014 <HAL_GetTick>
8002d0e: 4602 mov r2, r0
8002d10: 693b ldr r3, [r7, #16]
8002d12: 1ad3 subs r3, r2, r3
8002d14: 2b02 cmp r3, #2
8002d16: d901 bls.n 8002d1c <HAL_RCC_OscConfig+0x190>
{
return HAL_TIMEOUT;
8002d18: 2303 movs r3, #3
8002d1a: e19c b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002d1c: 4b46 ldr r3, [pc, #280] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002d1e: 681b ldr r3, [r3, #0]
8002d20: f003 0302 and.w r3, r3, #2
8002d24: 2b00 cmp r3, #0
8002d26: d0f0 beq.n 8002d0a <HAL_RCC_OscConfig+0x17e>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002d28: 4b43 ldr r3, [pc, #268] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002d2a: 681b ldr r3, [r3, #0]
8002d2c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8002d30: 687b ldr r3, [r7, #4]
8002d32: 691b ldr r3, [r3, #16]
8002d34: 00db lsls r3, r3, #3
8002d36: 4940 ldr r1, [pc, #256] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002d38: 4313 orrs r3, r2
8002d3a: 600b str r3, [r1, #0]
8002d3c: e015 b.n 8002d6a <HAL_RCC_OscConfig+0x1de>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8002d3e: 4b3f ldr r3, [pc, #252] ; (8002e3c <HAL_RCC_OscConfig+0x2b0>)
8002d40: 2200 movs r2, #0
8002d42: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8002d44: f7ff f966 bl 8002014 <HAL_GetTick>
8002d48: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002d4a: e008 b.n 8002d5e <HAL_RCC_OscConfig+0x1d2>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8002d4c: f7ff f962 bl 8002014 <HAL_GetTick>
8002d50: 4602 mov r2, r0
8002d52: 693b ldr r3, [r7, #16]
8002d54: 1ad3 subs r3, r2, r3
8002d56: 2b02 cmp r3, #2
8002d58: d901 bls.n 8002d5e <HAL_RCC_OscConfig+0x1d2>
{
return HAL_TIMEOUT;
8002d5a: 2303 movs r3, #3
8002d5c: e17b b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002d5e: 4b36 ldr r3, [pc, #216] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002d60: 681b ldr r3, [r3, #0]
8002d62: f003 0302 and.w r3, r3, #2
8002d66: 2b00 cmp r3, #0
8002d68: d1f0 bne.n 8002d4c <HAL_RCC_OscConfig+0x1c0>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8002d6a: 687b ldr r3, [r7, #4]
8002d6c: 681b ldr r3, [r3, #0]
8002d6e: f003 0308 and.w r3, r3, #8
8002d72: 2b00 cmp r3, #0
8002d74: d030 beq.n 8002dd8 <HAL_RCC_OscConfig+0x24c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
8002d76: 687b ldr r3, [r7, #4]
8002d78: 695b ldr r3, [r3, #20]
8002d7a: 2b00 cmp r3, #0
8002d7c: d016 beq.n 8002dac <HAL_RCC_OscConfig+0x220>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8002d7e: 4b30 ldr r3, [pc, #192] ; (8002e40 <HAL_RCC_OscConfig+0x2b4>)
8002d80: 2201 movs r2, #1
8002d82: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8002d84: f7ff f946 bl 8002014 <HAL_GetTick>
8002d88: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8002d8a: e008 b.n 8002d9e <HAL_RCC_OscConfig+0x212>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8002d8c: f7ff f942 bl 8002014 <HAL_GetTick>
8002d90: 4602 mov r2, r0
8002d92: 693b ldr r3, [r7, #16]
8002d94: 1ad3 subs r3, r2, r3
8002d96: 2b02 cmp r3, #2
8002d98: d901 bls.n 8002d9e <HAL_RCC_OscConfig+0x212>
{
return HAL_TIMEOUT;
8002d9a: 2303 movs r3, #3
8002d9c: e15b b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8002d9e: 4b26 ldr r3, [pc, #152] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002da0: 6f5b ldr r3, [r3, #116] ; 0x74
8002da2: f003 0302 and.w r3, r3, #2
8002da6: 2b00 cmp r3, #0
8002da8: d0f0 beq.n 8002d8c <HAL_RCC_OscConfig+0x200>
8002daa: e015 b.n 8002dd8 <HAL_RCC_OscConfig+0x24c>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8002dac: 4b24 ldr r3, [pc, #144] ; (8002e40 <HAL_RCC_OscConfig+0x2b4>)
8002dae: 2200 movs r2, #0
8002db0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002db2: f7ff f92f bl 8002014 <HAL_GetTick>
8002db6: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8002db8: e008 b.n 8002dcc <HAL_RCC_OscConfig+0x240>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8002dba: f7ff f92b bl 8002014 <HAL_GetTick>
8002dbe: 4602 mov r2, r0
8002dc0: 693b ldr r3, [r7, #16]
8002dc2: 1ad3 subs r3, r2, r3
8002dc4: 2b02 cmp r3, #2
8002dc6: d901 bls.n 8002dcc <HAL_RCC_OscConfig+0x240>
{
return HAL_TIMEOUT;
8002dc8: 2303 movs r3, #3
8002dca: e144 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8002dcc: 4b1a ldr r3, [pc, #104] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002dce: 6f5b ldr r3, [r3, #116] ; 0x74
8002dd0: f003 0302 and.w r3, r3, #2
8002dd4: 2b00 cmp r3, #0
8002dd6: d1f0 bne.n 8002dba <HAL_RCC_OscConfig+0x22e>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8002dd8: 687b ldr r3, [r7, #4]
8002dda: 681b ldr r3, [r3, #0]
8002ddc: f003 0304 and.w r3, r3, #4
8002de0: 2b00 cmp r3, #0
8002de2: f000 80a0 beq.w 8002f26 <HAL_RCC_OscConfig+0x39a>
{
FlagStatus pwrclkchanged = RESET;
8002de6: 2300 movs r3, #0
8002de8: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
8002dea: 4b13 ldr r3, [pc, #76] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002dec: 6c1b ldr r3, [r3, #64] ; 0x40
8002dee: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002df2: 2b00 cmp r3, #0
8002df4: d10f bne.n 8002e16 <HAL_RCC_OscConfig+0x28a>
{
__HAL_RCC_PWR_CLK_ENABLE();
8002df6: 2300 movs r3, #0
8002df8: 60bb str r3, [r7, #8]
8002dfa: 4b0f ldr r3, [pc, #60] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002dfc: 6c1b ldr r3, [r3, #64] ; 0x40
8002dfe: 4a0e ldr r2, [pc, #56] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002e00: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8002e04: 6413 str r3, [r2, #64] ; 0x40
8002e06: 4b0c ldr r3, [pc, #48] ; (8002e38 <HAL_RCC_OscConfig+0x2ac>)
8002e08: 6c1b ldr r3, [r3, #64] ; 0x40
8002e0a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8002e0e: 60bb str r3, [r7, #8]
8002e10: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8002e12: 2301 movs r3, #1
8002e14: 75fb strb r3, [r7, #23]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002e16: 4b0b ldr r3, [pc, #44] ; (8002e44 <HAL_RCC_OscConfig+0x2b8>)
8002e18: 681b ldr r3, [r3, #0]
8002e1a: f403 7380 and.w r3, r3, #256 ; 0x100
8002e1e: 2b00 cmp r3, #0
8002e20: d121 bne.n 8002e66 <HAL_RCC_OscConfig+0x2da>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8002e22: 4b08 ldr r3, [pc, #32] ; (8002e44 <HAL_RCC_OscConfig+0x2b8>)
8002e24: 681b ldr r3, [r3, #0]
8002e26: 4a07 ldr r2, [pc, #28] ; (8002e44 <HAL_RCC_OscConfig+0x2b8>)
8002e28: f443 7380 orr.w r3, r3, #256 ; 0x100
8002e2c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8002e2e: f7ff f8f1 bl 8002014 <HAL_GetTick>
8002e32: 6138 str r0, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002e34: e011 b.n 8002e5a <HAL_RCC_OscConfig+0x2ce>
8002e36: bf00 nop
8002e38: 40023800 .word 0x40023800
8002e3c: 42470000 .word 0x42470000
8002e40: 42470e80 .word 0x42470e80
8002e44: 40007000 .word 0x40007000
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8002e48: f7ff f8e4 bl 8002014 <HAL_GetTick>
8002e4c: 4602 mov r2, r0
8002e4e: 693b ldr r3, [r7, #16]
8002e50: 1ad3 subs r3, r2, r3
8002e52: 2b02 cmp r3, #2
8002e54: d901 bls.n 8002e5a <HAL_RCC_OscConfig+0x2ce>
{
return HAL_TIMEOUT;
8002e56: 2303 movs r3, #3
8002e58: e0fd b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002e5a: 4b81 ldr r3, [pc, #516] ; (8003060 <HAL_RCC_OscConfig+0x4d4>)
8002e5c: 681b ldr r3, [r3, #0]
8002e5e: f403 7380 and.w r3, r3, #256 ; 0x100
8002e62: 2b00 cmp r3, #0
8002e64: d0f0 beq.n 8002e48 <HAL_RCC_OscConfig+0x2bc>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8002e66: 687b ldr r3, [r7, #4]
8002e68: 689b ldr r3, [r3, #8]
8002e6a: 2b01 cmp r3, #1
8002e6c: d106 bne.n 8002e7c <HAL_RCC_OscConfig+0x2f0>
8002e6e: 4b7d ldr r3, [pc, #500] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002e70: 6f1b ldr r3, [r3, #112] ; 0x70
8002e72: 4a7c ldr r2, [pc, #496] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002e74: f043 0301 orr.w r3, r3, #1
8002e78: 6713 str r3, [r2, #112] ; 0x70
8002e7a: e01c b.n 8002eb6 <HAL_RCC_OscConfig+0x32a>
8002e7c: 687b ldr r3, [r7, #4]
8002e7e: 689b ldr r3, [r3, #8]
8002e80: 2b05 cmp r3, #5
8002e82: d10c bne.n 8002e9e <HAL_RCC_OscConfig+0x312>
8002e84: 4b77 ldr r3, [pc, #476] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002e86: 6f1b ldr r3, [r3, #112] ; 0x70
8002e88: 4a76 ldr r2, [pc, #472] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002e8a: f043 0304 orr.w r3, r3, #4
8002e8e: 6713 str r3, [r2, #112] ; 0x70
8002e90: 4b74 ldr r3, [pc, #464] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002e92: 6f1b ldr r3, [r3, #112] ; 0x70
8002e94: 4a73 ldr r2, [pc, #460] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002e96: f043 0301 orr.w r3, r3, #1
8002e9a: 6713 str r3, [r2, #112] ; 0x70
8002e9c: e00b b.n 8002eb6 <HAL_RCC_OscConfig+0x32a>
8002e9e: 4b71 ldr r3, [pc, #452] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002ea0: 6f1b ldr r3, [r3, #112] ; 0x70
8002ea2: 4a70 ldr r2, [pc, #448] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002ea4: f023 0301 bic.w r3, r3, #1
8002ea8: 6713 str r3, [r2, #112] ; 0x70
8002eaa: 4b6e ldr r3, [pc, #440] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002eac: 6f1b ldr r3, [r3, #112] ; 0x70
8002eae: 4a6d ldr r2, [pc, #436] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002eb0: f023 0304 bic.w r3, r3, #4
8002eb4: 6713 str r3, [r2, #112] ; 0x70
/* Check the LSE State */
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
8002eb6: 687b ldr r3, [r7, #4]
8002eb8: 689b ldr r3, [r3, #8]
8002eba: 2b00 cmp r3, #0
8002ebc: d015 beq.n 8002eea <HAL_RCC_OscConfig+0x35e>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8002ebe: f7ff f8a9 bl 8002014 <HAL_GetTick>
8002ec2: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8002ec4: e00a b.n 8002edc <HAL_RCC_OscConfig+0x350>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8002ec6: f7ff f8a5 bl 8002014 <HAL_GetTick>
8002eca: 4602 mov r2, r0
8002ecc: 693b ldr r3, [r7, #16]
8002ece: 1ad3 subs r3, r2, r3
8002ed0: f241 3288 movw r2, #5000 ; 0x1388
8002ed4: 4293 cmp r3, r2
8002ed6: d901 bls.n 8002edc <HAL_RCC_OscConfig+0x350>
{
return HAL_TIMEOUT;
8002ed8: 2303 movs r3, #3
8002eda: e0bc b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8002edc: 4b61 ldr r3, [pc, #388] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002ede: 6f1b ldr r3, [r3, #112] ; 0x70
8002ee0: f003 0302 and.w r3, r3, #2
8002ee4: 2b00 cmp r3, #0
8002ee6: d0ee beq.n 8002ec6 <HAL_RCC_OscConfig+0x33a>
8002ee8: e014 b.n 8002f14 <HAL_RCC_OscConfig+0x388>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002eea: f7ff f893 bl 8002014 <HAL_GetTick>
8002eee: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002ef0: e00a b.n 8002f08 <HAL_RCC_OscConfig+0x37c>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8002ef2: f7ff f88f bl 8002014 <HAL_GetTick>
8002ef6: 4602 mov r2, r0
8002ef8: 693b ldr r3, [r7, #16]
8002efa: 1ad3 subs r3, r2, r3
8002efc: f241 3288 movw r2, #5000 ; 0x1388
8002f00: 4293 cmp r3, r2
8002f02: d901 bls.n 8002f08 <HAL_RCC_OscConfig+0x37c>
{
return HAL_TIMEOUT;
8002f04: 2303 movs r3, #3
8002f06: e0a6 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002f08: 4b56 ldr r3, [pc, #344] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002f0a: 6f1b ldr r3, [r3, #112] ; 0x70
8002f0c: f003 0302 and.w r3, r3, #2
8002f10: 2b00 cmp r3, #0
8002f12: d1ee bne.n 8002ef2 <HAL_RCC_OscConfig+0x366>
}
}
}
/* Restore clock configuration if changed */
if(pwrclkchanged == SET)
8002f14: 7dfb ldrb r3, [r7, #23]
8002f16: 2b01 cmp r3, #1
8002f18: d105 bne.n 8002f26 <HAL_RCC_OscConfig+0x39a>
{
__HAL_RCC_PWR_CLK_DISABLE();
8002f1a: 4b52 ldr r3, [pc, #328] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002f1c: 6c1b ldr r3, [r3, #64] ; 0x40
8002f1e: 4a51 ldr r2, [pc, #324] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002f20: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8002f24: 6413 str r3, [r2, #64] ; 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8002f26: 687b ldr r3, [r7, #4]
8002f28: 699b ldr r3, [r3, #24]
8002f2a: 2b00 cmp r3, #0
8002f2c: f000 8092 beq.w 8003054 <HAL_RCC_OscConfig+0x4c8>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
8002f30: 4b4c ldr r3, [pc, #304] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002f32: 689b ldr r3, [r3, #8]
8002f34: f003 030c and.w r3, r3, #12
8002f38: 2b08 cmp r3, #8
8002f3a: d05c beq.n 8002ff6 <HAL_RCC_OscConfig+0x46a>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8002f3c: 687b ldr r3, [r7, #4]
8002f3e: 699b ldr r3, [r3, #24]
8002f40: 2b02 cmp r3, #2
8002f42: d141 bne.n 8002fc8 <HAL_RCC_OscConfig+0x43c>
assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8002f44: 4b48 ldr r3, [pc, #288] ; (8003068 <HAL_RCC_OscConfig+0x4dc>)
8002f46: 2200 movs r2, #0
8002f48: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002f4a: f7ff f863 bl 8002014 <HAL_GetTick>
8002f4e: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002f50: e008 b.n 8002f64 <HAL_RCC_OscConfig+0x3d8>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8002f52: f7ff f85f bl 8002014 <HAL_GetTick>
8002f56: 4602 mov r2, r0
8002f58: 693b ldr r3, [r7, #16]
8002f5a: 1ad3 subs r3, r2, r3
8002f5c: 2b02 cmp r3, #2
8002f5e: d901 bls.n 8002f64 <HAL_RCC_OscConfig+0x3d8>
{
return HAL_TIMEOUT;
8002f60: 2303 movs r3, #3
8002f62: e078 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002f64: 4b3f ldr r3, [pc, #252] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002f66: 681b ldr r3, [r3, #0]
8002f68: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8002f6c: 2b00 cmp r3, #0
8002f6e: d1f0 bne.n 8002f52 <HAL_RCC_OscConfig+0x3c6>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
8002f70: 687b ldr r3, [r7, #4]
8002f72: 69da ldr r2, [r3, #28]
8002f74: 687b ldr r3, [r7, #4]
8002f76: 6a1b ldr r3, [r3, #32]
8002f78: 431a orrs r2, r3
8002f7a: 687b ldr r3, [r7, #4]
8002f7c: 6a5b ldr r3, [r3, #36] ; 0x24
8002f7e: 019b lsls r3, r3, #6
8002f80: 431a orrs r2, r3
8002f82: 687b ldr r3, [r7, #4]
8002f84: 6a9b ldr r3, [r3, #40] ; 0x28
8002f86: 085b lsrs r3, r3, #1
8002f88: 3b01 subs r3, #1
8002f8a: 041b lsls r3, r3, #16
8002f8c: 431a orrs r2, r3
8002f8e: 687b ldr r3, [r7, #4]
8002f90: 6adb ldr r3, [r3, #44] ; 0x2c
8002f92: 061b lsls r3, r3, #24
8002f94: 4933 ldr r1, [pc, #204] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002f96: 4313 orrs r3, r2
8002f98: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLM | \
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8002f9a: 4b33 ldr r3, [pc, #204] ; (8003068 <HAL_RCC_OscConfig+0x4dc>)
8002f9c: 2201 movs r2, #1
8002f9e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002fa0: f7ff f838 bl 8002014 <HAL_GetTick>
8002fa4: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8002fa6: e008 b.n 8002fba <HAL_RCC_OscConfig+0x42e>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8002fa8: f7ff f834 bl 8002014 <HAL_GetTick>
8002fac: 4602 mov r2, r0
8002fae: 693b ldr r3, [r7, #16]
8002fb0: 1ad3 subs r3, r2, r3
8002fb2: 2b02 cmp r3, #2
8002fb4: d901 bls.n 8002fba <HAL_RCC_OscConfig+0x42e>
{
return HAL_TIMEOUT;
8002fb6: 2303 movs r3, #3
8002fb8: e04d b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8002fba: 4b2a ldr r3, [pc, #168] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002fbc: 681b ldr r3, [r3, #0]
8002fbe: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8002fc2: 2b00 cmp r3, #0
8002fc4: d0f0 beq.n 8002fa8 <HAL_RCC_OscConfig+0x41c>
8002fc6: e045 b.n 8003054 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8002fc8: 4b27 ldr r3, [pc, #156] ; (8003068 <HAL_RCC_OscConfig+0x4dc>)
8002fca: 2200 movs r2, #0
8002fcc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002fce: f7ff f821 bl 8002014 <HAL_GetTick>
8002fd2: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002fd4: e008 b.n 8002fe8 <HAL_RCC_OscConfig+0x45c>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8002fd6: f7ff f81d bl 8002014 <HAL_GetTick>
8002fda: 4602 mov r2, r0
8002fdc: 693b ldr r3, [r7, #16]
8002fde: 1ad3 subs r3, r2, r3
8002fe0: 2b02 cmp r3, #2
8002fe2: d901 bls.n 8002fe8 <HAL_RCC_OscConfig+0x45c>
{
return HAL_TIMEOUT;
8002fe4: 2303 movs r3, #3
8002fe6: e036 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002fe8: 4b1e ldr r3, [pc, #120] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8002fea: 681b ldr r3, [r3, #0]
8002fec: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8002ff0: 2b00 cmp r3, #0
8002ff2: d1f0 bne.n 8002fd6 <HAL_RCC_OscConfig+0x44a>
8002ff4: e02e b.n 8003054 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8002ff6: 687b ldr r3, [r7, #4]
8002ff8: 699b ldr r3, [r3, #24]
8002ffa: 2b01 cmp r3, #1
8002ffc: d101 bne.n 8003002 <HAL_RCC_OscConfig+0x476>
{
return HAL_ERROR;
8002ffe: 2301 movs r3, #1
8003000: e029 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->PLLCFGR;
8003002: 4b18 ldr r3, [pc, #96] ; (8003064 <HAL_RCC_OscConfig+0x4d8>)
8003004: 685b ldr r3, [r3, #4]
8003006: 60fb str r3, [r7, #12]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8003008: 68fb ldr r3, [r7, #12]
800300a: f403 0280 and.w r2, r3, #4194304 ; 0x400000
800300e: 687b ldr r3, [r7, #4]
8003010: 69db ldr r3, [r3, #28]
8003012: 429a cmp r2, r3
8003014: d11c bne.n 8003050 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
8003016: 68fb ldr r3, [r7, #12]
8003018: f003 023f and.w r2, r3, #63 ; 0x3f
800301c: 687b ldr r3, [r7, #4]
800301e: 6a1b ldr r3, [r3, #32]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8003020: 429a cmp r2, r3
8003022: d115 bne.n 8003050 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
8003024: 68fa ldr r2, [r7, #12]
8003026: f647 73c0 movw r3, #32704 ; 0x7fc0
800302a: 4013 ands r3, r2
800302c: 687a ldr r2, [r7, #4]
800302e: 6a52 ldr r2, [r2, #36] ; 0x24
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
8003030: 4293 cmp r3, r2
8003032: d10d bne.n 8003050 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8003034: 68fb ldr r3, [r7, #12]
8003036: f403 3240 and.w r2, r3, #196608 ; 0x30000
800303a: 687b ldr r3, [r7, #4]
800303c: 6a9b ldr r3, [r3, #40] ; 0x28
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
800303e: 429a cmp r2, r3
8003040: d106 bne.n 8003050 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
8003042: 68fb ldr r3, [r7, #12]
8003044: f003 6270 and.w r2, r3, #251658240 ; 0xf000000
8003048: 687b ldr r3, [r7, #4]
800304a: 6adb ldr r3, [r3, #44] ; 0x2c
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
800304c: 429a cmp r2, r3
800304e: d001 beq.n 8003054 <HAL_RCC_OscConfig+0x4c8>
{
return HAL_ERROR;
8003050: 2301 movs r3, #1
8003052: e000 b.n 8003056 <HAL_RCC_OscConfig+0x4ca>
}
}
}
}
return HAL_OK;
8003054: 2300 movs r3, #0
}
8003056: 4618 mov r0, r3
8003058: 3718 adds r7, #24
800305a: 46bd mov sp, r7
800305c: bd80 pop {r7, pc}
800305e: bf00 nop
8003060: 40007000 .word 0x40007000
8003064: 40023800 .word 0x40023800
8003068: 42470060 .word 0x42470060
0800306c <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
800306c: b580 push {r7, lr}
800306e: b084 sub sp, #16
8003070: af00 add r7, sp, #0
8003072: 6078 str r0, [r7, #4]
8003074: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
8003076: 687b ldr r3, [r7, #4]
8003078: 2b00 cmp r3, #0
800307a: d101 bne.n 8003080 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
800307c: 2301 movs r3, #1
800307e: e0cc b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
8003080: 4b68 ldr r3, [pc, #416] ; (8003224 <HAL_RCC_ClockConfig+0x1b8>)
8003082: 681b ldr r3, [r3, #0]
8003084: f003 030f and.w r3, r3, #15
8003088: 683a ldr r2, [r7, #0]
800308a: 429a cmp r2, r3
800308c: d90c bls.n 80030a8 <HAL_RCC_ClockConfig+0x3c>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800308e: 4b65 ldr r3, [pc, #404] ; (8003224 <HAL_RCC_ClockConfig+0x1b8>)
8003090: 683a ldr r2, [r7, #0]
8003092: b2d2 uxtb r2, r2
8003094: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
8003096: 4b63 ldr r3, [pc, #396] ; (8003224 <HAL_RCC_ClockConfig+0x1b8>)
8003098: 681b ldr r3, [r3, #0]
800309a: f003 030f and.w r3, r3, #15
800309e: 683a ldr r2, [r7, #0]
80030a0: 429a cmp r2, r3
80030a2: d001 beq.n 80030a8 <HAL_RCC_ClockConfig+0x3c>
{
return HAL_ERROR;
80030a4: 2301 movs r3, #1
80030a6: e0b8 b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80030a8: 687b ldr r3, [r7, #4]
80030aa: 681b ldr r3, [r3, #0]
80030ac: f003 0302 and.w r3, r3, #2
80030b0: 2b00 cmp r3, #0
80030b2: d020 beq.n 80030f6 <HAL_RCC_ClockConfig+0x8a>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80030b4: 687b ldr r3, [r7, #4]
80030b6: 681b ldr r3, [r3, #0]
80030b8: f003 0304 and.w r3, r3, #4
80030bc: 2b00 cmp r3, #0
80030be: d005 beq.n 80030cc <HAL_RCC_ClockConfig+0x60>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
80030c0: 4b59 ldr r3, [pc, #356] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80030c2: 689b ldr r3, [r3, #8]
80030c4: 4a58 ldr r2, [pc, #352] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80030c6: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
80030ca: 6093 str r3, [r2, #8]
}
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80030cc: 687b ldr r3, [r7, #4]
80030ce: 681b ldr r3, [r3, #0]
80030d0: f003 0308 and.w r3, r3, #8
80030d4: 2b00 cmp r3, #0
80030d6: d005 beq.n 80030e4 <HAL_RCC_ClockConfig+0x78>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
80030d8: 4b53 ldr r3, [pc, #332] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80030da: 689b ldr r3, [r3, #8]
80030dc: 4a52 ldr r2, [pc, #328] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80030de: f443 4360 orr.w r3, r3, #57344 ; 0xe000
80030e2: 6093 str r3, [r2, #8]
}
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
80030e4: 4b50 ldr r3, [pc, #320] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80030e6: 689b ldr r3, [r3, #8]
80030e8: f023 02f0 bic.w r2, r3, #240 ; 0xf0
80030ec: 687b ldr r3, [r7, #4]
80030ee: 689b ldr r3, [r3, #8]
80030f0: 494d ldr r1, [pc, #308] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80030f2: 4313 orrs r3, r2
80030f4: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
80030f6: 687b ldr r3, [r7, #4]
80030f8: 681b ldr r3, [r3, #0]
80030fa: f003 0301 and.w r3, r3, #1
80030fe: 2b00 cmp r3, #0
8003100: d044 beq.n 800318c <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8003102: 687b ldr r3, [r7, #4]
8003104: 685b ldr r3, [r3, #4]
8003106: 2b01 cmp r3, #1
8003108: d107 bne.n 800311a <HAL_RCC_ClockConfig+0xae>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800310a: 4b47 ldr r3, [pc, #284] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
800310c: 681b ldr r3, [r3, #0]
800310e: f403 3300 and.w r3, r3, #131072 ; 0x20000
8003112: 2b00 cmp r3, #0
8003114: d119 bne.n 800314a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003116: 2301 movs r3, #1
8003118: e07f b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
}
}
/* PLL is selected as System Clock Source */
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
800311a: 687b ldr r3, [r7, #4]
800311c: 685b ldr r3, [r3, #4]
800311e: 2b02 cmp r3, #2
8003120: d003 beq.n 800312a <HAL_RCC_ClockConfig+0xbe>
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
8003122: 687b ldr r3, [r7, #4]
8003124: 685b ldr r3, [r3, #4]
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8003126: 2b03 cmp r3, #3
8003128: d107 bne.n 800313a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800312a: 4b3f ldr r3, [pc, #252] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
800312c: 681b ldr r3, [r3, #0]
800312e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8003132: 2b00 cmp r3, #0
8003134: d109 bne.n 800314a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003136: 2301 movs r3, #1
8003138: e06f b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800313a: 4b3b ldr r3, [pc, #236] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
800313c: 681b ldr r3, [r3, #0]
800313e: f003 0302 and.w r3, r3, #2
8003142: 2b00 cmp r3, #0
8003144: d101 bne.n 800314a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003146: 2301 movs r3, #1
8003148: e067 b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800314a: 4b37 ldr r3, [pc, #220] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
800314c: 689b ldr r3, [r3, #8]
800314e: f023 0203 bic.w r2, r3, #3
8003152: 687b ldr r3, [r7, #4]
8003154: 685b ldr r3, [r3, #4]
8003156: 4934 ldr r1, [pc, #208] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
8003158: 4313 orrs r3, r2
800315a: 608b str r3, [r1, #8]
/* Get Start Tick */
tickstart = HAL_GetTick();
800315c: f7fe ff5a bl 8002014 <HAL_GetTick>
8003160: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8003162: e00a b.n 800317a <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8003164: f7fe ff56 bl 8002014 <HAL_GetTick>
8003168: 4602 mov r2, r0
800316a: 68fb ldr r3, [r7, #12]
800316c: 1ad3 subs r3, r2, r3
800316e: f241 3288 movw r2, #5000 ; 0x1388
8003172: 4293 cmp r3, r2
8003174: d901 bls.n 800317a <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8003176: 2303 movs r3, #3
8003178: e04f b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800317a: 4b2b ldr r3, [pc, #172] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
800317c: 689b ldr r3, [r3, #8]
800317e: f003 020c and.w r2, r3, #12
8003182: 687b ldr r3, [r7, #4]
8003184: 685b ldr r3, [r3, #4]
8003186: 009b lsls r3, r3, #2
8003188: 429a cmp r2, r3
800318a: d1eb bne.n 8003164 <HAL_RCC_ClockConfig+0xf8>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
800318c: 4b25 ldr r3, [pc, #148] ; (8003224 <HAL_RCC_ClockConfig+0x1b8>)
800318e: 681b ldr r3, [r3, #0]
8003190: f003 030f and.w r3, r3, #15
8003194: 683a ldr r2, [r7, #0]
8003196: 429a cmp r2, r3
8003198: d20c bcs.n 80031b4 <HAL_RCC_ClockConfig+0x148>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800319a: 4b22 ldr r3, [pc, #136] ; (8003224 <HAL_RCC_ClockConfig+0x1b8>)
800319c: 683a ldr r2, [r7, #0]
800319e: b2d2 uxtb r2, r2
80031a0: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
80031a2: 4b20 ldr r3, [pc, #128] ; (8003224 <HAL_RCC_ClockConfig+0x1b8>)
80031a4: 681b ldr r3, [r3, #0]
80031a6: f003 030f and.w r3, r3, #15
80031aa: 683a ldr r2, [r7, #0]
80031ac: 429a cmp r2, r3
80031ae: d001 beq.n 80031b4 <HAL_RCC_ClockConfig+0x148>
{
return HAL_ERROR;
80031b0: 2301 movs r3, #1
80031b2: e032 b.n 800321a <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80031b4: 687b ldr r3, [r7, #4]
80031b6: 681b ldr r3, [r3, #0]
80031b8: f003 0304 and.w r3, r3, #4
80031bc: 2b00 cmp r3, #0
80031be: d008 beq.n 80031d2 <HAL_RCC_ClockConfig+0x166>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80031c0: 4b19 ldr r3, [pc, #100] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80031c2: 689b ldr r3, [r3, #8]
80031c4: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
80031c8: 687b ldr r3, [r7, #4]
80031ca: 68db ldr r3, [r3, #12]
80031cc: 4916 ldr r1, [pc, #88] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80031ce: 4313 orrs r3, r2
80031d0: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80031d2: 687b ldr r3, [r7, #4]
80031d4: 681b ldr r3, [r3, #0]
80031d6: f003 0308 and.w r3, r3, #8
80031da: 2b00 cmp r3, #0
80031dc: d009 beq.n 80031f2 <HAL_RCC_ClockConfig+0x186>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
80031de: 4b12 ldr r3, [pc, #72] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80031e0: 689b ldr r3, [r3, #8]
80031e2: f423 4260 bic.w r2, r3, #57344 ; 0xe000
80031e6: 687b ldr r3, [r7, #4]
80031e8: 691b ldr r3, [r3, #16]
80031ea: 00db lsls r3, r3, #3
80031ec: 490e ldr r1, [pc, #56] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80031ee: 4313 orrs r3, r2
80031f0: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
80031f2: f000 f821 bl 8003238 <HAL_RCC_GetSysClockFreq>
80031f6: 4601 mov r1, r0
80031f8: 4b0b ldr r3, [pc, #44] ; (8003228 <HAL_RCC_ClockConfig+0x1bc>)
80031fa: 689b ldr r3, [r3, #8]
80031fc: 091b lsrs r3, r3, #4
80031fe: f003 030f and.w r3, r3, #15
8003202: 4a0a ldr r2, [pc, #40] ; (800322c <HAL_RCC_ClockConfig+0x1c0>)
8003204: 5cd3 ldrb r3, [r2, r3]
8003206: fa21 f303 lsr.w r3, r1, r3
800320a: 4a09 ldr r2, [pc, #36] ; (8003230 <HAL_RCC_ClockConfig+0x1c4>)
800320c: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings */
HAL_InitTick (uwTickPrio);
800320e: 4b09 ldr r3, [pc, #36] ; (8003234 <HAL_RCC_ClockConfig+0x1c8>)
8003210: 681b ldr r3, [r3, #0]
8003212: 4618 mov r0, r3
8003214: f7fe feba bl 8001f8c <HAL_InitTick>
return HAL_OK;
8003218: 2300 movs r3, #0
}
800321a: 4618 mov r0, r3
800321c: 3710 adds r7, #16
800321e: 46bd mov sp, r7
8003220: bd80 pop {r7, pc}
8003222: bf00 nop
8003224: 40023c00 .word 0x40023c00
8003228: 40023800 .word 0x40023800
800322c: 08004f70 .word 0x08004f70
8003230: 20000000 .word 0x20000000
8003234: 20000004 .word 0x20000004
08003238 <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
{
8003238: b5f0 push {r4, r5, r6, r7, lr}
800323a: b085 sub sp, #20
800323c: af00 add r7, sp, #0
uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
800323e: 2300 movs r3, #0
8003240: 607b str r3, [r7, #4]
8003242: 2300 movs r3, #0
8003244: 60fb str r3, [r7, #12]
8003246: 2300 movs r3, #0
8003248: 603b str r3, [r7, #0]
uint32_t sysclockfreq = 0U;
800324a: 2300 movs r3, #0
800324c: 60bb str r3, [r7, #8]
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
800324e: 4b63 ldr r3, [pc, #396] ; (80033dc <HAL_RCC_GetSysClockFreq+0x1a4>)
8003250: 689b ldr r3, [r3, #8]
8003252: f003 030c and.w r3, r3, #12
8003256: 2b04 cmp r3, #4
8003258: d007 beq.n 800326a <HAL_RCC_GetSysClockFreq+0x32>
800325a: 2b08 cmp r3, #8
800325c: d008 beq.n 8003270 <HAL_RCC_GetSysClockFreq+0x38>
800325e: 2b00 cmp r3, #0
8003260: f040 80b4 bne.w 80033cc <HAL_RCC_GetSysClockFreq+0x194>
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
8003264: 4b5e ldr r3, [pc, #376] ; (80033e0 <HAL_RCC_GetSysClockFreq+0x1a8>)
8003266: 60bb str r3, [r7, #8]
break;
8003268: e0b3 b.n 80033d2 <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
800326a: 4b5e ldr r3, [pc, #376] ; (80033e4 <HAL_RCC_GetSysClockFreq+0x1ac>)
800326c: 60bb str r3, [r7, #8]
break;
800326e: e0b0 b.n 80033d2 <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
8003270: 4b5a ldr r3, [pc, #360] ; (80033dc <HAL_RCC_GetSysClockFreq+0x1a4>)
8003272: 685b ldr r3, [r3, #4]
8003274: f003 033f and.w r3, r3, #63 ; 0x3f
8003278: 607b str r3, [r7, #4]
if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
800327a: 4b58 ldr r3, [pc, #352] ; (80033dc <HAL_RCC_GetSysClockFreq+0x1a4>)
800327c: 685b ldr r3, [r3, #4]
800327e: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8003282: 2b00 cmp r3, #0
8003284: d04a beq.n 800331c <HAL_RCC_GetSysClockFreq+0xe4>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8003286: 4b55 ldr r3, [pc, #340] ; (80033dc <HAL_RCC_GetSysClockFreq+0x1a4>)
8003288: 685b ldr r3, [r3, #4]
800328a: 099b lsrs r3, r3, #6
800328c: f04f 0400 mov.w r4, #0
8003290: f240 11ff movw r1, #511 ; 0x1ff
8003294: f04f 0200 mov.w r2, #0
8003298: ea03 0501 and.w r5, r3, r1
800329c: ea04 0602 and.w r6, r4, r2
80032a0: 4629 mov r1, r5
80032a2: 4632 mov r2, r6
80032a4: f04f 0300 mov.w r3, #0
80032a8: f04f 0400 mov.w r4, #0
80032ac: 0154 lsls r4, r2, #5
80032ae: ea44 64d1 orr.w r4, r4, r1, lsr #27
80032b2: 014b lsls r3, r1, #5
80032b4: 4619 mov r1, r3
80032b6: 4622 mov r2, r4
80032b8: 1b49 subs r1, r1, r5
80032ba: eb62 0206 sbc.w r2, r2, r6
80032be: f04f 0300 mov.w r3, #0
80032c2: f04f 0400 mov.w r4, #0
80032c6: 0194 lsls r4, r2, #6
80032c8: ea44 6491 orr.w r4, r4, r1, lsr #26
80032cc: 018b lsls r3, r1, #6
80032ce: 1a5b subs r3, r3, r1
80032d0: eb64 0402 sbc.w r4, r4, r2
80032d4: f04f 0100 mov.w r1, #0
80032d8: f04f 0200 mov.w r2, #0
80032dc: 00e2 lsls r2, r4, #3
80032de: ea42 7253 orr.w r2, r2, r3, lsr #29
80032e2: 00d9 lsls r1, r3, #3
80032e4: 460b mov r3, r1
80032e6: 4614 mov r4, r2
80032e8: 195b adds r3, r3, r5
80032ea: eb44 0406 adc.w r4, r4, r6
80032ee: f04f 0100 mov.w r1, #0
80032f2: f04f 0200 mov.w r2, #0
80032f6: 0262 lsls r2, r4, #9
80032f8: ea42 52d3 orr.w r2, r2, r3, lsr #23
80032fc: 0259 lsls r1, r3, #9
80032fe: 460b mov r3, r1
8003300: 4614 mov r4, r2
8003302: 4618 mov r0, r3
8003304: 4621 mov r1, r4
8003306: 687b ldr r3, [r7, #4]
8003308: f04f 0400 mov.w r4, #0
800330c: 461a mov r2, r3
800330e: 4623 mov r3, r4
8003310: f7fc ffbe bl 8000290 <__aeabi_uldivmod>
8003314: 4603 mov r3, r0
8003316: 460c mov r4, r1
8003318: 60fb str r3, [r7, #12]
800331a: e049 b.n 80033b0 <HAL_RCC_GetSysClockFreq+0x178>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
800331c: 4b2f ldr r3, [pc, #188] ; (80033dc <HAL_RCC_GetSysClockFreq+0x1a4>)
800331e: 685b ldr r3, [r3, #4]
8003320: 099b lsrs r3, r3, #6
8003322: f04f 0400 mov.w r4, #0
8003326: f240 11ff movw r1, #511 ; 0x1ff
800332a: f04f 0200 mov.w r2, #0
800332e: ea03 0501 and.w r5, r3, r1
8003332: ea04 0602 and.w r6, r4, r2
8003336: 4629 mov r1, r5
8003338: 4632 mov r2, r6
800333a: f04f 0300 mov.w r3, #0
800333e: f04f 0400 mov.w r4, #0
8003342: 0154 lsls r4, r2, #5
8003344: ea44 64d1 orr.w r4, r4, r1, lsr #27
8003348: 014b lsls r3, r1, #5
800334a: 4619 mov r1, r3
800334c: 4622 mov r2, r4
800334e: 1b49 subs r1, r1, r5
8003350: eb62 0206 sbc.w r2, r2, r6
8003354: f04f 0300 mov.w r3, #0
8003358: f04f 0400 mov.w r4, #0
800335c: 0194 lsls r4, r2, #6
800335e: ea44 6491 orr.w r4, r4, r1, lsr #26
8003362: 018b lsls r3, r1, #6
8003364: 1a5b subs r3, r3, r1
8003366: eb64 0402 sbc.w r4, r4, r2
800336a: f04f 0100 mov.w r1, #0
800336e: f04f 0200 mov.w r2, #0
8003372: 00e2 lsls r2, r4, #3
8003374: ea42 7253 orr.w r2, r2, r3, lsr #29
8003378: 00d9 lsls r1, r3, #3
800337a: 460b mov r3, r1
800337c: 4614 mov r4, r2
800337e: 195b adds r3, r3, r5
8003380: eb44 0406 adc.w r4, r4, r6
8003384: f04f 0100 mov.w r1, #0
8003388: f04f 0200 mov.w r2, #0
800338c: 02a2 lsls r2, r4, #10
800338e: ea42 5293 orr.w r2, r2, r3, lsr #22
8003392: 0299 lsls r1, r3, #10
8003394: 460b mov r3, r1
8003396: 4614 mov r4, r2
8003398: 4618 mov r0, r3
800339a: 4621 mov r1, r4
800339c: 687b ldr r3, [r7, #4]
800339e: f04f 0400 mov.w r4, #0
80033a2: 461a mov r2, r3
80033a4: 4623 mov r3, r4
80033a6: f7fc ff73 bl 8000290 <__aeabi_uldivmod>
80033aa: 4603 mov r3, r0
80033ac: 460c mov r4, r1
80033ae: 60fb str r3, [r7, #12]
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
80033b0: 4b0a ldr r3, [pc, #40] ; (80033dc <HAL_RCC_GetSysClockFreq+0x1a4>)
80033b2: 685b ldr r3, [r3, #4]
80033b4: 0c1b lsrs r3, r3, #16
80033b6: f003 0303 and.w r3, r3, #3
80033ba: 3301 adds r3, #1
80033bc: 005b lsls r3, r3, #1
80033be: 603b str r3, [r7, #0]
sysclockfreq = pllvco/pllp;
80033c0: 68fa ldr r2, [r7, #12]
80033c2: 683b ldr r3, [r7, #0]
80033c4: fbb2 f3f3 udiv r3, r2, r3
80033c8: 60bb str r3, [r7, #8]
break;
80033ca: e002 b.n 80033d2 <HAL_RCC_GetSysClockFreq+0x19a>
}
default:
{
sysclockfreq = HSI_VALUE;
80033cc: 4b04 ldr r3, [pc, #16] ; (80033e0 <HAL_RCC_GetSysClockFreq+0x1a8>)
80033ce: 60bb str r3, [r7, #8]
break;
80033d0: bf00 nop
}
}
return sysclockfreq;
80033d2: 68bb ldr r3, [r7, #8]
}
80033d4: 4618 mov r0, r3
80033d6: 3714 adds r7, #20
80033d8: 46bd mov sp, r7
80033da: bdf0 pop {r4, r5, r6, r7, pc}
80033dc: 40023800 .word 0x40023800
80033e0: 00f42400 .word 0x00f42400
80033e4: 007a1200 .word 0x007a1200
080033e8 <HAL_SPI_Init>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
80033e8: b580 push {r7, lr}
80033ea: b082 sub sp, #8
80033ec: af00 add r7, sp, #0
80033ee: 6078 str r0, [r7, #4]
/* Check the SPI handle allocation */
if (hspi == NULL)
80033f0: 687b ldr r3, [r7, #4]
80033f2: 2b00 cmp r3, #0
80033f4: d101 bne.n 80033fa <HAL_SPI_Init+0x12>
{
return HAL_ERROR;
80033f6: 2301 movs r3, #1
80033f8: e056 b.n 80034a8 <HAL_SPI_Init+0xc0>
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
}
#else
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
80033fa: 687b ldr r3, [r7, #4]
80033fc: 2200 movs r2, #0
80033fe: 629a str r2, [r3, #40] ; 0x28
#endif /* USE_SPI_CRC */
if (hspi->State == HAL_SPI_STATE_RESET)
8003400: 687b ldr r3, [r7, #4]
8003402: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
8003406: b2db uxtb r3, r3
8003408: 2b00 cmp r3, #0
800340a: d106 bne.n 800341a <HAL_SPI_Init+0x32>
{
/* Allocate lock resource and initialize it */
hspi->Lock = HAL_UNLOCKED;
800340c: 687b ldr r3, [r7, #4]
800340e: 2200 movs r2, #0
8003410: f883 2050 strb.w r2, [r3, #80] ; 0x50
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
hspi->MspInitCallback(hspi);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
8003414: 6878 ldr r0, [r7, #4]
8003416: f7fe fbe1 bl 8001bdc <HAL_SPI_MspInit>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
hspi->State = HAL_SPI_STATE_BUSY;
800341a: 687b ldr r3, [r7, #4]
800341c: 2202 movs r2, #2
800341e: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the selected SPI peripheral */
__HAL_SPI_DISABLE(hspi);
8003422: 687b ldr r3, [r7, #4]
8003424: 681b ldr r3, [r3, #0]
8003426: 681a ldr r2, [r3, #0]
8003428: 687b ldr r3, [r7, #4]
800342a: 681b ldr r3, [r3, #0]
800342c: f022 0240 bic.w r2, r2, #64 ; 0x40
8003430: 601a str r2, [r3, #0]
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
Communication speed, First bit and CRC calculation state */
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
8003432: 687b ldr r3, [r7, #4]
8003434: 685a ldr r2, [r3, #4]
8003436: 687b ldr r3, [r7, #4]
8003438: 689b ldr r3, [r3, #8]
800343a: 431a orrs r2, r3
800343c: 687b ldr r3, [r7, #4]
800343e: 68db ldr r3, [r3, #12]
8003440: 431a orrs r2, r3
8003442: 687b ldr r3, [r7, #4]
8003444: 691b ldr r3, [r3, #16]
8003446: 431a orrs r2, r3
8003448: 687b ldr r3, [r7, #4]
800344a: 695b ldr r3, [r3, #20]
800344c: 431a orrs r2, r3
800344e: 687b ldr r3, [r7, #4]
8003450: 699b ldr r3, [r3, #24]
8003452: f403 7300 and.w r3, r3, #512 ; 0x200
8003456: 431a orrs r2, r3
8003458: 687b ldr r3, [r7, #4]
800345a: 69db ldr r3, [r3, #28]
800345c: 431a orrs r2, r3
800345e: 687b ldr r3, [r7, #4]
8003460: 6a1b ldr r3, [r3, #32]
8003462: ea42 0103 orr.w r1, r2, r3
8003466: 687b ldr r3, [r7, #4]
8003468: 6a9a ldr r2, [r3, #40] ; 0x28
800346a: 687b ldr r3, [r7, #4]
800346c: 681b ldr r3, [r3, #0]
800346e: 430a orrs r2, r1
8003470: 601a str r2, [r3, #0]
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation));
/* Configure : NSS management, TI Mode */
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
8003472: 687b ldr r3, [r7, #4]
8003474: 699b ldr r3, [r3, #24]
8003476: 0c1b lsrs r3, r3, #16
8003478: f003 0104 and.w r1, r3, #4
800347c: 687b ldr r3, [r7, #4]
800347e: 6a5a ldr r2, [r3, #36] ; 0x24
8003480: 687b ldr r3, [r7, #4]
8003482: 681b ldr r3, [r3, #0]
8003484: 430a orrs r2, r1
8003486: 605a str r2, [r3, #4]
}
#endif /* USE_SPI_CRC */
#if defined(SPI_I2SCFGR_I2SMOD)
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
8003488: 687b ldr r3, [r7, #4]
800348a: 681b ldr r3, [r3, #0]
800348c: 69da ldr r2, [r3, #28]
800348e: 687b ldr r3, [r7, #4]
8003490: 681b ldr r3, [r3, #0]
8003492: f422 6200 bic.w r2, r2, #2048 ; 0x800
8003496: 61da str r2, [r3, #28]
#endif /* SPI_I2SCFGR_I2SMOD */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
8003498: 687b ldr r3, [r7, #4]
800349a: 2200 movs r2, #0
800349c: 655a str r2, [r3, #84] ; 0x54
hspi->State = HAL_SPI_STATE_READY;
800349e: 687b ldr r3, [r7, #4]
80034a0: 2201 movs r2, #1
80034a2: f883 2051 strb.w r2, [r3, #81] ; 0x51
return HAL_OK;
80034a6: 2300 movs r3, #0
}
80034a8: 4618 mov r0, r3
80034aa: 3708 adds r7, #8
80034ac: 46bd mov sp, r7
80034ae: bd80 pop {r7, pc}
080034b0 <HAL_SPI_Transmit_IT>:
* @param pData pointer to data buffer
* @param Size amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
80034b0: b480 push {r7}
80034b2: b087 sub sp, #28
80034b4: af00 add r7, sp, #0
80034b6: 60f8 str r0, [r7, #12]
80034b8: 60b9 str r1, [r7, #8]
80034ba: 4613 mov r3, r2
80034bc: 80fb strh r3, [r7, #6]
HAL_StatusTypeDef errorcode = HAL_OK;
80034be: 2300 movs r3, #0
80034c0: 75fb strb r3, [r7, #23]
/* Check Direction parameter */
assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
/* Process Locked */
__HAL_LOCK(hspi);
80034c2: 68fb ldr r3, [r7, #12]
80034c4: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
80034c8: 2b01 cmp r3, #1
80034ca: d101 bne.n 80034d0 <HAL_SPI_Transmit_IT+0x20>
80034cc: 2302 movs r3, #2
80034ce: e067 b.n 80035a0 <HAL_SPI_Transmit_IT+0xf0>
80034d0: 68fb ldr r3, [r7, #12]
80034d2: 2201 movs r2, #1
80034d4: f883 2050 strb.w r2, [r3, #80] ; 0x50
if ((pData == NULL) || (Size == 0U))
80034d8: 68bb ldr r3, [r7, #8]
80034da: 2b00 cmp r3, #0
80034dc: d002 beq.n 80034e4 <HAL_SPI_Transmit_IT+0x34>
80034de: 88fb ldrh r3, [r7, #6]
80034e0: 2b00 cmp r3, #0
80034e2: d102 bne.n 80034ea <HAL_SPI_Transmit_IT+0x3a>
{
errorcode = HAL_ERROR;
80034e4: 2301 movs r3, #1
80034e6: 75fb strb r3, [r7, #23]
goto error;
80034e8: e055 b.n 8003596 <HAL_SPI_Transmit_IT+0xe6>
}
if (hspi->State != HAL_SPI_STATE_READY)
80034ea: 68fb ldr r3, [r7, #12]
80034ec: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
80034f0: b2db uxtb r3, r3
80034f2: 2b01 cmp r3, #1
80034f4: d002 beq.n 80034fc <HAL_SPI_Transmit_IT+0x4c>
{
errorcode = HAL_BUSY;
80034f6: 2302 movs r3, #2
80034f8: 75fb strb r3, [r7, #23]
goto error;
80034fa: e04c b.n 8003596 <HAL_SPI_Transmit_IT+0xe6>
}
/* Set the transaction information */
hspi->State = HAL_SPI_STATE_BUSY_TX;
80034fc: 68fb ldr r3, [r7, #12]
80034fe: 2203 movs r2, #3
8003500: f883 2051 strb.w r2, [r3, #81] ; 0x51
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
8003504: 68fb ldr r3, [r7, #12]
8003506: 2200 movs r2, #0
8003508: 655a str r2, [r3, #84] ; 0x54
hspi->pTxBuffPtr = (uint8_t *)pData;
800350a: 68fb ldr r3, [r7, #12]
800350c: 68ba ldr r2, [r7, #8]
800350e: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferSize = Size;
8003510: 68fb ldr r3, [r7, #12]
8003512: 88fa ldrh r2, [r7, #6]
8003514: 869a strh r2, [r3, #52] ; 0x34
hspi->TxXferCount = Size;
8003516: 68fb ldr r3, [r7, #12]
8003518: 88fa ldrh r2, [r7, #6]
800351a: 86da strh r2, [r3, #54] ; 0x36
/* Init field not used in handle to zero */
hspi->pRxBuffPtr = (uint8_t *)NULL;
800351c: 68fb ldr r3, [r7, #12]
800351e: 2200 movs r2, #0
8003520: 639a str r2, [r3, #56] ; 0x38
hspi->RxXferSize = 0U;
8003522: 68fb ldr r3, [r7, #12]
8003524: 2200 movs r2, #0
8003526: 879a strh r2, [r3, #60] ; 0x3c
hspi->RxXferCount = 0U;
8003528: 68fb ldr r3, [r7, #12]
800352a: 2200 movs r2, #0
800352c: 87da strh r2, [r3, #62] ; 0x3e
hspi->RxISR = NULL;
800352e: 68fb ldr r3, [r7, #12]
8003530: 2200 movs r2, #0
8003532: 641a str r2, [r3, #64] ; 0x40
/* Set the function for IT treatment */
if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
8003534: 68fb ldr r3, [r7, #12]
8003536: 68db ldr r3, [r3, #12]
8003538: 2b00 cmp r3, #0
800353a: d003 beq.n 8003544 <HAL_SPI_Transmit_IT+0x94>
{
hspi->TxISR = SPI_TxISR_16BIT;
800353c: 68fb ldr r3, [r7, #12]
800353e: 4a1b ldr r2, [pc, #108] ; (80035ac <HAL_SPI_Transmit_IT+0xfc>)
8003540: 645a str r2, [r3, #68] ; 0x44
8003542: e002 b.n 800354a <HAL_SPI_Transmit_IT+0x9a>
}
else
{
hspi->TxISR = SPI_TxISR_8BIT;
8003544: 68fb ldr r3, [r7, #12]
8003546: 4a1a ldr r2, [pc, #104] ; (80035b0 <HAL_SPI_Transmit_IT+0x100>)
8003548: 645a str r2, [r3, #68] ; 0x44
}
/* Configure communication direction : 1Line */
if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
800354a: 68fb ldr r3, [r7, #12]
800354c: 689b ldr r3, [r3, #8]
800354e: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8003552: d107 bne.n 8003564 <HAL_SPI_Transmit_IT+0xb4>
{
SPI_1LINE_TX(hspi);
8003554: 68fb ldr r3, [r7, #12]
8003556: 681b ldr r3, [r3, #0]
8003558: 681a ldr r2, [r3, #0]
800355a: 68fb ldr r3, [r7, #12]
800355c: 681b ldr r3, [r3, #0]
800355e: f442 4280 orr.w r2, r2, #16384 ; 0x4000
8003562: 601a str r2, [r3, #0]
SPI_RESET_CRC(hspi);
}
#endif /* USE_SPI_CRC */
/* Enable TXE and ERR interrupt */
__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
8003564: 68fb ldr r3, [r7, #12]
8003566: 681b ldr r3, [r3, #0]
8003568: 685a ldr r2, [r3, #4]
800356a: 68fb ldr r3, [r7, #12]
800356c: 681b ldr r3, [r3, #0]
800356e: f042 02a0 orr.w r2, r2, #160 ; 0xa0
8003572: 605a str r2, [r3, #4]
/* Check if the SPI is already enabled */
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
8003574: 68fb ldr r3, [r7, #12]
8003576: 681b ldr r3, [r3, #0]
8003578: 681b ldr r3, [r3, #0]
800357a: f003 0340 and.w r3, r3, #64 ; 0x40
800357e: 2b40 cmp r3, #64 ; 0x40
8003580: d008 beq.n 8003594 <HAL_SPI_Transmit_IT+0xe4>
{
/* Enable SPI peripheral */
__HAL_SPI_ENABLE(hspi);
8003582: 68fb ldr r3, [r7, #12]
8003584: 681b ldr r3, [r3, #0]
8003586: 681a ldr r2, [r3, #0]
8003588: 68fb ldr r3, [r7, #12]
800358a: 681b ldr r3, [r3, #0]
800358c: f042 0240 orr.w r2, r2, #64 ; 0x40
8003590: 601a str r2, [r3, #0]
8003592: e000 b.n 8003596 <HAL_SPI_Transmit_IT+0xe6>
}
error :
8003594: bf00 nop
__HAL_UNLOCK(hspi);
8003596: 68fb ldr r3, [r7, #12]
8003598: 2200 movs r2, #0
800359a: f883 2050 strb.w r2, [r3, #80] ; 0x50
return errorcode;
800359e: 7dfb ldrb r3, [r7, #23]
}
80035a0: 4618 mov r0, r3
80035a2: 371c adds r7, #28
80035a4: 46bd mov sp, r7
80035a6: f85d 7b04 ldr.w r7, [sp], #4
80035aa: 4770 bx lr
80035ac: 0800384b .word 0x0800384b
80035b0: 08003805 .word 0x08003805
080035b4 <HAL_SPI_IRQHandler>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for the specified SPI module.
* @retval None
*/
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
{
80035b4: b580 push {r7, lr}
80035b6: b088 sub sp, #32
80035b8: af00 add r7, sp, #0
80035ba: 6078 str r0, [r7, #4]
uint32_t itsource = hspi->Instance->CR2;
80035bc: 687b ldr r3, [r7, #4]
80035be: 681b ldr r3, [r3, #0]
80035c0: 685b ldr r3, [r3, #4]
80035c2: 61fb str r3, [r7, #28]
uint32_t itflag = hspi->Instance->SR;
80035c4: 687b ldr r3, [r7, #4]
80035c6: 681b ldr r3, [r3, #0]
80035c8: 689b ldr r3, [r3, #8]
80035ca: 61bb str r3, [r7, #24]
/* SPI in mode Receiver ----------------------------------------------------*/
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
80035cc: 69bb ldr r3, [r7, #24]
80035ce: 099b lsrs r3, r3, #6
80035d0: f003 0301 and.w r3, r3, #1
80035d4: 2b00 cmp r3, #0
80035d6: d10f bne.n 80035f8 <HAL_SPI_IRQHandler+0x44>
(SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
80035d8: 69bb ldr r3, [r7, #24]
80035da: f003 0301 and.w r3, r3, #1
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
80035de: 2b00 cmp r3, #0
80035e0: d00a beq.n 80035f8 <HAL_SPI_IRQHandler+0x44>
(SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
80035e2: 69fb ldr r3, [r7, #28]
80035e4: 099b lsrs r3, r3, #6
80035e6: f003 0301 and.w r3, r3, #1
80035ea: 2b00 cmp r3, #0
80035ec: d004 beq.n 80035f8 <HAL_SPI_IRQHandler+0x44>
{
hspi->RxISR(hspi);
80035ee: 687b ldr r3, [r7, #4]
80035f0: 6c1b ldr r3, [r3, #64] ; 0x40
80035f2: 6878 ldr r0, [r7, #4]
80035f4: 4798 blx r3
return;
80035f6: e0d8 b.n 80037aa <HAL_SPI_IRQHandler+0x1f6>
}
/* SPI in mode Transmitter -------------------------------------------------*/
if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET))
80035f8: 69bb ldr r3, [r7, #24]
80035fa: 085b lsrs r3, r3, #1
80035fc: f003 0301 and.w r3, r3, #1
8003600: 2b00 cmp r3, #0
8003602: d00a beq.n 800361a <HAL_SPI_IRQHandler+0x66>
8003604: 69fb ldr r3, [r7, #28]
8003606: 09db lsrs r3, r3, #7
8003608: f003 0301 and.w r3, r3, #1
800360c: 2b00 cmp r3, #0
800360e: d004 beq.n 800361a <HAL_SPI_IRQHandler+0x66>
{
hspi->TxISR(hspi);
8003610: 687b ldr r3, [r7, #4]
8003612: 6c5b ldr r3, [r3, #68] ; 0x44
8003614: 6878 ldr r0, [r7, #4]
8003616: 4798 blx r3
return;
8003618: e0c7 b.n 80037aa <HAL_SPI_IRQHandler+0x1f6>
}
/* SPI in Error Treatment --------------------------------------------------*/
if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
800361a: 69bb ldr r3, [r7, #24]
800361c: 095b lsrs r3, r3, #5
800361e: f003 0301 and.w r3, r3, #1
8003622: 2b00 cmp r3, #0
8003624: d10c bne.n 8003640 <HAL_SPI_IRQHandler+0x8c>
8003626: 69bb ldr r3, [r7, #24]
8003628: 099b lsrs r3, r3, #6
800362a: f003 0301 and.w r3, r3, #1
800362e: 2b00 cmp r3, #0
8003630: d106 bne.n 8003640 <HAL_SPI_IRQHandler+0x8c>
|| (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
8003632: 69bb ldr r3, [r7, #24]
8003634: 0a1b lsrs r3, r3, #8
8003636: f003 0301 and.w r3, r3, #1
800363a: 2b00 cmp r3, #0
800363c: f000 80b5 beq.w 80037aa <HAL_SPI_IRQHandler+0x1f6>
8003640: 69fb ldr r3, [r7, #28]
8003642: 095b lsrs r3, r3, #5
8003644: f003 0301 and.w r3, r3, #1
8003648: 2b00 cmp r3, #0
800364a: f000 80ae beq.w 80037aa <HAL_SPI_IRQHandler+0x1f6>
{
/* SPI Overrun error interrupt occurred ----------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
800364e: 69bb ldr r3, [r7, #24]
8003650: 099b lsrs r3, r3, #6
8003652: f003 0301 and.w r3, r3, #1
8003656: 2b00 cmp r3, #0
8003658: d023 beq.n 80036a2 <HAL_SPI_IRQHandler+0xee>
{
if (hspi->State != HAL_SPI_STATE_BUSY_TX)
800365a: 687b ldr r3, [r7, #4]
800365c: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
8003660: b2db uxtb r3, r3
8003662: 2b03 cmp r3, #3
8003664: d011 beq.n 800368a <HAL_SPI_IRQHandler+0xd6>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
8003666: 687b ldr r3, [r7, #4]
8003668: 6d5b ldr r3, [r3, #84] ; 0x54
800366a: f043 0204 orr.w r2, r3, #4
800366e: 687b ldr r3, [r7, #4]
8003670: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_OVRFLAG(hspi);
8003672: 2300 movs r3, #0
8003674: 617b str r3, [r7, #20]
8003676: 687b ldr r3, [r7, #4]
8003678: 681b ldr r3, [r3, #0]
800367a: 68db ldr r3, [r3, #12]
800367c: 617b str r3, [r7, #20]
800367e: 687b ldr r3, [r7, #4]
8003680: 681b ldr r3, [r3, #0]
8003682: 689b ldr r3, [r3, #8]
8003684: 617b str r3, [r7, #20]
8003686: 697b ldr r3, [r7, #20]
8003688: e00b b.n 80036a2 <HAL_SPI_IRQHandler+0xee>
}
else
{
__HAL_SPI_CLEAR_OVRFLAG(hspi);
800368a: 2300 movs r3, #0
800368c: 613b str r3, [r7, #16]
800368e: 687b ldr r3, [r7, #4]
8003690: 681b ldr r3, [r3, #0]
8003692: 68db ldr r3, [r3, #12]
8003694: 613b str r3, [r7, #16]
8003696: 687b ldr r3, [r7, #4]
8003698: 681b ldr r3, [r3, #0]
800369a: 689b ldr r3, [r3, #8]
800369c: 613b str r3, [r7, #16]
800369e: 693b ldr r3, [r7, #16]
return;
80036a0: e083 b.n 80037aa <HAL_SPI_IRQHandler+0x1f6>
}
}
/* SPI Mode Fault error interrupt occurred -------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET)
80036a2: 69bb ldr r3, [r7, #24]
80036a4: 095b lsrs r3, r3, #5
80036a6: f003 0301 and.w r3, r3, #1
80036aa: 2b00 cmp r3, #0
80036ac: d014 beq.n 80036d8 <HAL_SPI_IRQHandler+0x124>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
80036ae: 687b ldr r3, [r7, #4]
80036b0: 6d5b ldr r3, [r3, #84] ; 0x54
80036b2: f043 0201 orr.w r2, r3, #1
80036b6: 687b ldr r3, [r7, #4]
80036b8: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_MODFFLAG(hspi);
80036ba: 2300 movs r3, #0
80036bc: 60fb str r3, [r7, #12]
80036be: 687b ldr r3, [r7, #4]
80036c0: 681b ldr r3, [r3, #0]
80036c2: 689b ldr r3, [r3, #8]
80036c4: 60fb str r3, [r7, #12]
80036c6: 687b ldr r3, [r7, #4]
80036c8: 681b ldr r3, [r3, #0]
80036ca: 681a ldr r2, [r3, #0]
80036cc: 687b ldr r3, [r7, #4]
80036ce: 681b ldr r3, [r3, #0]
80036d0: f022 0240 bic.w r2, r2, #64 ; 0x40
80036d4: 601a str r2, [r3, #0]
80036d6: 68fb ldr r3, [r7, #12]
}
/* SPI Frame error interrupt occurred ------------------------------------*/
if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)
80036d8: 69bb ldr r3, [r7, #24]
80036da: 0a1b lsrs r3, r3, #8
80036dc: f003 0301 and.w r3, r3, #1
80036e0: 2b00 cmp r3, #0
80036e2: d00c beq.n 80036fe <HAL_SPI_IRQHandler+0x14a>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
80036e4: 687b ldr r3, [r7, #4]
80036e6: 6d5b ldr r3, [r3, #84] ; 0x54
80036e8: f043 0208 orr.w r2, r3, #8
80036ec: 687b ldr r3, [r7, #4]
80036ee: 655a str r2, [r3, #84] ; 0x54
__HAL_SPI_CLEAR_FREFLAG(hspi);
80036f0: 2300 movs r3, #0
80036f2: 60bb str r3, [r7, #8]
80036f4: 687b ldr r3, [r7, #4]
80036f6: 681b ldr r3, [r3, #0]
80036f8: 689b ldr r3, [r3, #8]
80036fa: 60bb str r3, [r7, #8]
80036fc: 68bb ldr r3, [r7, #8]
}
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
80036fe: 687b ldr r3, [r7, #4]
8003700: 6d5b ldr r3, [r3, #84] ; 0x54
8003702: 2b00 cmp r3, #0
8003704: d050 beq.n 80037a8 <HAL_SPI_IRQHandler+0x1f4>
{
/* Disable all interrupts */
__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
8003706: 687b ldr r3, [r7, #4]
8003708: 681b ldr r3, [r3, #0]
800370a: 685a ldr r2, [r3, #4]
800370c: 687b ldr r3, [r7, #4]
800370e: 681b ldr r3, [r3, #0]
8003710: f022 02e0 bic.w r2, r2, #224 ; 0xe0
8003714: 605a str r2, [r3, #4]
hspi->State = HAL_SPI_STATE_READY;
8003716: 687b ldr r3, [r7, #4]
8003718: 2201 movs r2, #1
800371a: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the SPI DMA requests if enabled */
if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
800371e: 69fb ldr r3, [r7, #28]
8003720: f003 0302 and.w r3, r3, #2
8003724: 2b00 cmp r3, #0
8003726: d104 bne.n 8003732 <HAL_SPI_IRQHandler+0x17e>
8003728: 69fb ldr r3, [r7, #28]
800372a: f003 0301 and.w r3, r3, #1
800372e: 2b00 cmp r3, #0
8003730: d034 beq.n 800379c <HAL_SPI_IRQHandler+0x1e8>
{
CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
8003732: 687b ldr r3, [r7, #4]
8003734: 681b ldr r3, [r3, #0]
8003736: 685a ldr r2, [r3, #4]
8003738: 687b ldr r3, [r7, #4]
800373a: 681b ldr r3, [r3, #0]
800373c: f022 0203 bic.w r2, r2, #3
8003740: 605a str r2, [r3, #4]
/* Abort the SPI DMA Rx channel */
if (hspi->hdmarx != NULL)
8003742: 687b ldr r3, [r7, #4]
8003744: 6cdb ldr r3, [r3, #76] ; 0x4c
8003746: 2b00 cmp r3, #0
8003748: d011 beq.n 800376e <HAL_SPI_IRQHandler+0x1ba>
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
800374a: 687b ldr r3, [r7, #4]
800374c: 6cdb ldr r3, [r3, #76] ; 0x4c
800374e: 4a18 ldr r2, [pc, #96] ; (80037b0 <HAL_SPI_IRQHandler+0x1fc>)
8003750: 651a str r2, [r3, #80] ; 0x50
if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx))
8003752: 687b ldr r3, [r7, #4]
8003754: 6cdb ldr r3, [r3, #76] ; 0x4c
8003756: 4618 mov r0, r3
8003758: f7ff f80d bl 8002776 <HAL_DMA_Abort_IT>
800375c: 4603 mov r3, r0
800375e: 2b00 cmp r3, #0
8003760: d005 beq.n 800376e <HAL_SPI_IRQHandler+0x1ba>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
8003762: 687b ldr r3, [r7, #4]
8003764: 6d5b ldr r3, [r3, #84] ; 0x54
8003766: f043 0240 orr.w r2, r3, #64 ; 0x40
800376a: 687b ldr r3, [r7, #4]
800376c: 655a str r2, [r3, #84] ; 0x54
}
}
/* Abort the SPI DMA Tx channel */
if (hspi->hdmatx != NULL)
800376e: 687b ldr r3, [r7, #4]
8003770: 6c9b ldr r3, [r3, #72] ; 0x48
8003772: 2b00 cmp r3, #0
8003774: d016 beq.n 80037a4 <HAL_SPI_IRQHandler+0x1f0>
{
/* Set the SPI DMA Abort callback :
will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
8003776: 687b ldr r3, [r7, #4]
8003778: 6c9b ldr r3, [r3, #72] ; 0x48
800377a: 4a0d ldr r2, [pc, #52] ; (80037b0 <HAL_SPI_IRQHandler+0x1fc>)
800377c: 651a str r2, [r3, #80] ; 0x50
if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx))
800377e: 687b ldr r3, [r7, #4]
8003780: 6c9b ldr r3, [r3, #72] ; 0x48
8003782: 4618 mov r0, r3
8003784: f7fe fff7 bl 8002776 <HAL_DMA_Abort_IT>
8003788: 4603 mov r3, r0
800378a: 2b00 cmp r3, #0
800378c: d00a beq.n 80037a4 <HAL_SPI_IRQHandler+0x1f0>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
800378e: 687b ldr r3, [r7, #4]
8003790: 6d5b ldr r3, [r3, #84] ; 0x54
8003792: f043 0240 orr.w r2, r3, #64 ; 0x40
8003796: 687b ldr r3, [r7, #4]
8003798: 655a str r2, [r3, #84] ; 0x54
if (hspi->hdmatx != NULL)
800379a: e003 b.n 80037a4 <HAL_SPI_IRQHandler+0x1f0>
{
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
800379c: 6878 ldr r0, [r7, #4]
800379e: f000 f813 bl 80037c8 <HAL_SPI_ErrorCallback>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
}
return;
80037a2: e000 b.n 80037a6 <HAL_SPI_IRQHandler+0x1f2>
if (hspi->hdmatx != NULL)
80037a4: bf00 nop
return;
80037a6: bf00 nop
80037a8: bf00 nop
}
}
80037aa: 3720 adds r7, #32
80037ac: 46bd mov sp, r7
80037ae: bd80 pop {r7, pc}
80037b0: 080037dd .word 0x080037dd
080037b4 <HAL_SPI_TxCpltCallback>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
{
80037b4: b480 push {r7}
80037b6: b083 sub sp, #12
80037b8: af00 add r7, sp, #0
80037ba: 6078 str r0, [r7, #4]
UNUSED(hspi);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_SPI_TxCpltCallback should be implemented in the user file
*/
}
80037bc: bf00 nop
80037be: 370c adds r7, #12
80037c0: 46bd mov sp, r7
80037c2: f85d 7b04 ldr.w r7, [sp], #4
80037c6: 4770 bx lr
080037c8 <HAL_SPI_ErrorCallback>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
{
80037c8: b480 push {r7}
80037ca: b083 sub sp, #12
80037cc: af00 add r7, sp, #0
80037ce: 6078 str r0, [r7, #4]
the HAL_SPI_ErrorCallback should be implemented in the user file
*/
/* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
and user can use HAL_SPI_GetError() API to check the latest error occurred
*/
}
80037d0: bf00 nop
80037d2: 370c adds r7, #12
80037d4: 46bd mov sp, r7
80037d6: f85d 7b04 ldr.w r7, [sp], #4
80037da: 4770 bx lr
080037dc <SPI_DMAAbortOnError>:
* (To be called at end of DMA Abort procedure following error occurrence).
* @param hdma DMA handle.
* @retval None
*/
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
80037dc: b580 push {r7, lr}
80037de: b084 sub sp, #16
80037e0: af00 add r7, sp, #0
80037e2: 6078 str r0, [r7, #4]
SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
80037e4: 687b ldr r3, [r7, #4]
80037e6: 6b9b ldr r3, [r3, #56] ; 0x38
80037e8: 60fb str r3, [r7, #12]
hspi->RxXferCount = 0U;
80037ea: 68fb ldr r3, [r7, #12]
80037ec: 2200 movs r2, #0
80037ee: 87da strh r2, [r3, #62] ; 0x3e
hspi->TxXferCount = 0U;
80037f0: 68fb ldr r3, [r7, #12]
80037f2: 2200 movs r2, #0
80037f4: 86da strh r2, [r3, #54] ; 0x36
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
80037f6: 68f8 ldr r0, [r7, #12]
80037f8: f7ff ffe6 bl 80037c8 <HAL_SPI_ErrorCallback>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
80037fc: bf00 nop
80037fe: 3710 adds r7, #16
8003800: 46bd mov sp, r7
8003802: bd80 pop {r7, pc}
08003804 <SPI_TxISR_8BIT>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
{
8003804: b580 push {r7, lr}
8003806: b082 sub sp, #8
8003808: af00 add r7, sp, #0
800380a: 6078 str r0, [r7, #4]
*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
800380c: 687b ldr r3, [r7, #4]
800380e: 6b1a ldr r2, [r3, #48] ; 0x30
8003810: 687b ldr r3, [r7, #4]
8003812: 681b ldr r3, [r3, #0]
8003814: 330c adds r3, #12
8003816: 7812 ldrb r2, [r2, #0]
8003818: 701a strb r2, [r3, #0]
hspi->pTxBuffPtr++;
800381a: 687b ldr r3, [r7, #4]
800381c: 6b1b ldr r3, [r3, #48] ; 0x30
800381e: 1c5a adds r2, r3, #1
8003820: 687b ldr r3, [r7, #4]
8003822: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferCount--;
8003824: 687b ldr r3, [r7, #4]
8003826: 8edb ldrh r3, [r3, #54] ; 0x36
8003828: b29b uxth r3, r3
800382a: 3b01 subs r3, #1
800382c: b29a uxth r2, r3
800382e: 687b ldr r3, [r7, #4]
8003830: 86da strh r2, [r3, #54] ; 0x36
if (hspi->TxXferCount == 0U)
8003832: 687b ldr r3, [r7, #4]
8003834: 8edb ldrh r3, [r3, #54] ; 0x36
8003836: b29b uxth r3, r3
8003838: 2b00 cmp r3, #0
800383a: d102 bne.n 8003842 <SPI_TxISR_8BIT+0x3e>
{
/* Enable CRC Transmission */
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
}
#endif /* USE_SPI_CRC */
SPI_CloseTx_ISR(hspi);
800383c: 6878 ldr r0, [r7, #4]
800383e: f000 f8d3 bl 80039e8 <SPI_CloseTx_ISR>
}
}
8003842: bf00 nop
8003844: 3708 adds r7, #8
8003846: 46bd mov sp, r7
8003848: bd80 pop {r7, pc}
0800384a <SPI_TxISR_16BIT>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
{
800384a: b580 push {r7, lr}
800384c: b082 sub sp, #8
800384e: af00 add r7, sp, #0
8003850: 6078 str r0, [r7, #4]
/* Transmit data in 16 Bit mode */
hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
8003852: 687b ldr r3, [r7, #4]
8003854: 6b1b ldr r3, [r3, #48] ; 0x30
8003856: 881a ldrh r2, [r3, #0]
8003858: 687b ldr r3, [r7, #4]
800385a: 681b ldr r3, [r3, #0]
800385c: 60da str r2, [r3, #12]
hspi->pTxBuffPtr += sizeof(uint16_t);
800385e: 687b ldr r3, [r7, #4]
8003860: 6b1b ldr r3, [r3, #48] ; 0x30
8003862: 1c9a adds r2, r3, #2
8003864: 687b ldr r3, [r7, #4]
8003866: 631a str r2, [r3, #48] ; 0x30
hspi->TxXferCount--;
8003868: 687b ldr r3, [r7, #4]
800386a: 8edb ldrh r3, [r3, #54] ; 0x36
800386c: b29b uxth r3, r3
800386e: 3b01 subs r3, #1
8003870: b29a uxth r2, r3
8003872: 687b ldr r3, [r7, #4]
8003874: 86da strh r2, [r3, #54] ; 0x36
if (hspi->TxXferCount == 0U)
8003876: 687b ldr r3, [r7, #4]
8003878: 8edb ldrh r3, [r3, #54] ; 0x36
800387a: b29b uxth r3, r3
800387c: 2b00 cmp r3, #0
800387e: d102 bne.n 8003886 <SPI_TxISR_16BIT+0x3c>
{
/* Enable CRC Transmission */
SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
}
#endif /* USE_SPI_CRC */
SPI_CloseTx_ISR(hspi);
8003880: 6878 ldr r0, [r7, #4]
8003882: f000 f8b1 bl 80039e8 <SPI_CloseTx_ISR>
}
}
8003886: bf00 nop
8003888: 3708 adds r7, #8
800388a: 46bd mov sp, r7
800388c: bd80 pop {r7, pc}
0800388e <SPI_WaitFlagStateUntilTimeout>:
* @param Tickstart tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
uint32_t Timeout, uint32_t Tickstart)
{
800388e: b580 push {r7, lr}
8003890: b084 sub sp, #16
8003892: af00 add r7, sp, #0
8003894: 60f8 str r0, [r7, #12]
8003896: 60b9 str r1, [r7, #8]
8003898: 603b str r3, [r7, #0]
800389a: 4613 mov r3, r2
800389c: 71fb strb r3, [r7, #7]
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
800389e: e04c b.n 800393a <SPI_WaitFlagStateUntilTimeout+0xac>
{
if (Timeout != HAL_MAX_DELAY)
80038a0: 683b ldr r3, [r7, #0]
80038a2: f1b3 3fff cmp.w r3, #4294967295
80038a6: d048 beq.n 800393a <SPI_WaitFlagStateUntilTimeout+0xac>
{
if (((HAL_GetTick() - Tickstart) >= Timeout) || (Timeout == 0U))
80038a8: f7fe fbb4 bl 8002014 <HAL_GetTick>
80038ac: 4602 mov r2, r0
80038ae: 69bb ldr r3, [r7, #24]
80038b0: 1ad3 subs r3, r2, r3
80038b2: 683a ldr r2, [r7, #0]
80038b4: 429a cmp r2, r3
80038b6: d902 bls.n 80038be <SPI_WaitFlagStateUntilTimeout+0x30>
80038b8: 683b ldr r3, [r7, #0]
80038ba: 2b00 cmp r3, #0
80038bc: d13d bne.n 800393a <SPI_WaitFlagStateUntilTimeout+0xac>
/* Disable the SPI and reset the CRC: the CRC value should be cleared
on both master and slave sides in order to resynchronize the master
and slave for their respective CRC calculation */
/* Disable TXE, RXNE and ERR interrupts for the interrupt process */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
80038be: 68fb ldr r3, [r7, #12]
80038c0: 681b ldr r3, [r3, #0]
80038c2: 685a ldr r2, [r3, #4]
80038c4: 68fb ldr r3, [r7, #12]
80038c6: 681b ldr r3, [r3, #0]
80038c8: f022 02e0 bic.w r2, r2, #224 ; 0xe0
80038cc: 605a str r2, [r3, #4]
if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
80038ce: 68fb ldr r3, [r7, #12]
80038d0: 685b ldr r3, [r3, #4]
80038d2: f5b3 7f82 cmp.w r3, #260 ; 0x104
80038d6: d111 bne.n 80038fc <SPI_WaitFlagStateUntilTimeout+0x6e>
80038d8: 68fb ldr r3, [r7, #12]
80038da: 689b ldr r3, [r3, #8]
80038dc: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
80038e0: d004 beq.n 80038ec <SPI_WaitFlagStateUntilTimeout+0x5e>
|| (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
80038e2: 68fb ldr r3, [r7, #12]
80038e4: 689b ldr r3, [r3, #8]
80038e6: f5b3 6f80 cmp.w r3, #1024 ; 0x400
80038ea: d107 bne.n 80038fc <SPI_WaitFlagStateUntilTimeout+0x6e>
{
/* Disable SPI peripheral */
__HAL_SPI_DISABLE(hspi);
80038ec: 68fb ldr r3, [r7, #12]
80038ee: 681b ldr r3, [r3, #0]
80038f0: 681a ldr r2, [r3, #0]
80038f2: 68fb ldr r3, [r7, #12]
80038f4: 681b ldr r3, [r3, #0]
80038f6: f022 0240 bic.w r2, r2, #64 ; 0x40
80038fa: 601a str r2, [r3, #0]
}
/* Reset CRC Calculation */
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
80038fc: 68fb ldr r3, [r7, #12]
80038fe: 6a9b ldr r3, [r3, #40] ; 0x28
8003900: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
8003904: d10f bne.n 8003926 <SPI_WaitFlagStateUntilTimeout+0x98>
{
SPI_RESET_CRC(hspi);
8003906: 68fb ldr r3, [r7, #12]
8003908: 681b ldr r3, [r3, #0]
800390a: 681a ldr r2, [r3, #0]
800390c: 68fb ldr r3, [r7, #12]
800390e: 681b ldr r3, [r3, #0]
8003910: f422 5200 bic.w r2, r2, #8192 ; 0x2000
8003914: 601a str r2, [r3, #0]
8003916: 68fb ldr r3, [r7, #12]
8003918: 681b ldr r3, [r3, #0]
800391a: 681a ldr r2, [r3, #0]
800391c: 68fb ldr r3, [r7, #12]
800391e: 681b ldr r3, [r3, #0]
8003920: f442 5200 orr.w r2, r2, #8192 ; 0x2000
8003924: 601a str r2, [r3, #0]
}
hspi->State = HAL_SPI_STATE_READY;
8003926: 68fb ldr r3, [r7, #12]
8003928: 2201 movs r2, #1
800392a: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Process Unlocked */
__HAL_UNLOCK(hspi);
800392e: 68fb ldr r3, [r7, #12]
8003930: 2200 movs r2, #0
8003932: f883 2050 strb.w r2, [r3, #80] ; 0x50
return HAL_TIMEOUT;
8003936: 2303 movs r3, #3
8003938: e00f b.n 800395a <SPI_WaitFlagStateUntilTimeout+0xcc>
while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
800393a: 68fb ldr r3, [r7, #12]
800393c: 681b ldr r3, [r3, #0]
800393e: 689a ldr r2, [r3, #8]
8003940: 68bb ldr r3, [r7, #8]
8003942: 4013 ands r3, r2
8003944: 68ba ldr r2, [r7, #8]
8003946: 429a cmp r2, r3
8003948: bf0c ite eq
800394a: 2301 moveq r3, #1
800394c: 2300 movne r3, #0
800394e: b2db uxtb r3, r3
8003950: 461a mov r2, r3
8003952: 79fb ldrb r3, [r7, #7]
8003954: 429a cmp r2, r3
8003956: d1a3 bne.n 80038a0 <SPI_WaitFlagStateUntilTimeout+0x12>
}
}
}
return HAL_OK;
8003958: 2300 movs r3, #0
}
800395a: 4618 mov r0, r3
800395c: 3710 adds r7, #16
800395e: 46bd mov sp, r7
8003960: bd80 pop {r7, pc}
...
08003964 <SPI_EndRxTxTransaction>:
* @param Timeout Timeout duration
* @param Tickstart tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
{
8003964: b580 push {r7, lr}
8003966: b088 sub sp, #32
8003968: af02 add r7, sp, #8
800396a: 60f8 str r0, [r7, #12]
800396c: 60b9 str r1, [r7, #8]
800396e: 607a str r2, [r7, #4]
/* Timeout in µs */
__IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
8003970: 4b1b ldr r3, [pc, #108] ; (80039e0 <SPI_EndRxTxTransaction+0x7c>)
8003972: 681b ldr r3, [r3, #0]
8003974: 4a1b ldr r2, [pc, #108] ; (80039e4 <SPI_EndRxTxTransaction+0x80>)
8003976: fba2 2303 umull r2, r3, r2, r3
800397a: 0d5b lsrs r3, r3, #21
800397c: f44f 727a mov.w r2, #1000 ; 0x3e8
8003980: fb02 f303 mul.w r3, r2, r3
8003984: 617b str r3, [r7, #20]
/* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
if (hspi->Init.Mode == SPI_MODE_MASTER)
8003986: 68fb ldr r3, [r7, #12]
8003988: 685b ldr r3, [r3, #4]
800398a: f5b3 7f82 cmp.w r3, #260 ; 0x104
800398e: d112 bne.n 80039b6 <SPI_EndRxTxTransaction+0x52>
{
/* Control the BSY flag */
if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
8003990: 687b ldr r3, [r7, #4]
8003992: 9300 str r3, [sp, #0]
8003994: 68bb ldr r3, [r7, #8]
8003996: 2200 movs r2, #0
8003998: 2180 movs r1, #128 ; 0x80
800399a: 68f8 ldr r0, [r7, #12]
800399c: f7ff ff77 bl 800388e <SPI_WaitFlagStateUntilTimeout>
80039a0: 4603 mov r3, r0
80039a2: 2b00 cmp r3, #0
80039a4: d016 beq.n 80039d4 <SPI_EndRxTxTransaction+0x70>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
80039a6: 68fb ldr r3, [r7, #12]
80039a8: 6d5b ldr r3, [r3, #84] ; 0x54
80039aa: f043 0220 orr.w r2, r3, #32
80039ae: 68fb ldr r3, [r7, #12]
80039b0: 655a str r2, [r3, #84] ; 0x54
return HAL_TIMEOUT;
80039b2: 2303 movs r3, #3
80039b4: e00f b.n 80039d6 <SPI_EndRxTxTransaction+0x72>
* User have to calculate the timeout value to fit with the time of 1 byte transfer.
* This time is directly link with the SPI clock from Master device.
*/
do
{
if (count == 0U)
80039b6: 697b ldr r3, [r7, #20]
80039b8: 2b00 cmp r3, #0
80039ba: d00a beq.n 80039d2 <SPI_EndRxTxTransaction+0x6e>
{
break;
}
count--;
80039bc: 697b ldr r3, [r7, #20]
80039be: 3b01 subs r3, #1
80039c0: 617b str r3, [r7, #20]
} while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
80039c2: 68fb ldr r3, [r7, #12]
80039c4: 681b ldr r3, [r3, #0]
80039c6: 689b ldr r3, [r3, #8]
80039c8: f003 0380 and.w r3, r3, #128 ; 0x80
80039cc: 2b80 cmp r3, #128 ; 0x80
80039ce: d0f2 beq.n 80039b6 <SPI_EndRxTxTransaction+0x52>
80039d0: e000 b.n 80039d4 <SPI_EndRxTxTransaction+0x70>
break;
80039d2: bf00 nop
}
return HAL_OK;
80039d4: 2300 movs r3, #0
}
80039d6: 4618 mov r0, r3
80039d8: 3718 adds r7, #24
80039da: 46bd mov sp, r7
80039dc: bd80 pop {r7, pc}
80039de: bf00 nop
80039e0: 20000000 .word 0x20000000
80039e4: 165e9f81 .word 0x165e9f81
080039e8 <SPI_CloseTx_ISR>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
{
80039e8: b580 push {r7, lr}
80039ea: b086 sub sp, #24
80039ec: af00 add r7, sp, #0
80039ee: 6078 str r0, [r7, #4]
uint32_t tickstart;
__IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
80039f0: 4b2c ldr r3, [pc, #176] ; (8003aa4 <SPI_CloseTx_ISR+0xbc>)
80039f2: 681b ldr r3, [r3, #0]
80039f4: 4a2c ldr r2, [pc, #176] ; (8003aa8 <SPI_CloseTx_ISR+0xc0>)
80039f6: fba2 2303 umull r2, r3, r2, r3
80039fa: 0a5b lsrs r3, r3, #9
80039fc: 2264 movs r2, #100 ; 0x64
80039fe: fb02 f303 mul.w r3, r2, r3
8003a02: 613b str r3, [r7, #16]
/* Init tickstart for timeout management*/
tickstart = HAL_GetTick();
8003a04: f7fe fb06 bl 8002014 <HAL_GetTick>
8003a08: 6178 str r0, [r7, #20]
/* Wait until TXE flag is set */
do
{
if (count == 0U)
8003a0a: 693b ldr r3, [r7, #16]
8003a0c: 2b00 cmp r3, #0
8003a0e: d106 bne.n 8003a1e <SPI_CloseTx_ISR+0x36>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8003a10: 687b ldr r3, [r7, #4]
8003a12: 6d5b ldr r3, [r3, #84] ; 0x54
8003a14: f043 0220 orr.w r2, r3, #32
8003a18: 687b ldr r3, [r7, #4]
8003a1a: 655a str r2, [r3, #84] ; 0x54
break;
8003a1c: e009 b.n 8003a32 <SPI_CloseTx_ISR+0x4a>
}
count--;
8003a1e: 693b ldr r3, [r7, #16]
8003a20: 3b01 subs r3, #1
8003a22: 613b str r3, [r7, #16]
} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
8003a24: 687b ldr r3, [r7, #4]
8003a26: 681b ldr r3, [r3, #0]
8003a28: 689b ldr r3, [r3, #8]
8003a2a: f003 0302 and.w r3, r3, #2
8003a2e: 2b00 cmp r3, #0
8003a30: d0eb beq.n 8003a0a <SPI_CloseTx_ISR+0x22>
/* Disable TXE and ERR interrupt */
__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
8003a32: 687b ldr r3, [r7, #4]
8003a34: 681b ldr r3, [r3, #0]
8003a36: 685a ldr r2, [r3, #4]
8003a38: 687b ldr r3, [r7, #4]
8003a3a: 681b ldr r3, [r3, #0]
8003a3c: f022 02a0 bic.w r2, r2, #160 ; 0xa0
8003a40: 605a str r2, [r3, #4]
/* Check the end of the transaction */
if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
8003a42: 697a ldr r2, [r7, #20]
8003a44: 2164 movs r1, #100 ; 0x64
8003a46: 6878 ldr r0, [r7, #4]
8003a48: f7ff ff8c bl 8003964 <SPI_EndRxTxTransaction>
8003a4c: 4603 mov r3, r0
8003a4e: 2b00 cmp r3, #0
8003a50: d005 beq.n 8003a5e <SPI_CloseTx_ISR+0x76>
{
SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
8003a52: 687b ldr r3, [r7, #4]
8003a54: 6d5b ldr r3, [r3, #84] ; 0x54
8003a56: f043 0220 orr.w r2, r3, #32
8003a5a: 687b ldr r3, [r7, #4]
8003a5c: 655a str r2, [r3, #84] ; 0x54
}
/* Clear overrun flag in 2 Lines communication mode because received is not read */
if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
8003a5e: 687b ldr r3, [r7, #4]
8003a60: 689b ldr r3, [r3, #8]
8003a62: 2b00 cmp r3, #0
8003a64: d10a bne.n 8003a7c <SPI_CloseTx_ISR+0x94>
{
__HAL_SPI_CLEAR_OVRFLAG(hspi);
8003a66: 2300 movs r3, #0
8003a68: 60fb str r3, [r7, #12]
8003a6a: 687b ldr r3, [r7, #4]
8003a6c: 681b ldr r3, [r3, #0]
8003a6e: 68db ldr r3, [r3, #12]
8003a70: 60fb str r3, [r7, #12]
8003a72: 687b ldr r3, [r7, #4]
8003a74: 681b ldr r3, [r3, #0]
8003a76: 689b ldr r3, [r3, #8]
8003a78: 60fb str r3, [r7, #12]
8003a7a: 68fb ldr r3, [r7, #12]
}
hspi->State = HAL_SPI_STATE_READY;
8003a7c: 687b ldr r3, [r7, #4]
8003a7e: 2201 movs r2, #1
8003a80: f883 2051 strb.w r2, [r3, #81] ; 0x51
if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
8003a84: 687b ldr r3, [r7, #4]
8003a86: 6d5b ldr r3, [r3, #84] ; 0x54
8003a88: 2b00 cmp r3, #0
8003a8a: d003 beq.n 8003a94 <SPI_CloseTx_ISR+0xac>
{
/* Call user error callback */
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
hspi->ErrorCallback(hspi);
#else
HAL_SPI_ErrorCallback(hspi);
8003a8c: 6878 ldr r0, [r7, #4]
8003a8e: f7ff fe9b bl 80037c8 <HAL_SPI_ErrorCallback>
hspi->TxCpltCallback(hspi);
#else
HAL_SPI_TxCpltCallback(hspi);
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
}
8003a92: e002 b.n 8003a9a <SPI_CloseTx_ISR+0xb2>
HAL_SPI_TxCpltCallback(hspi);
8003a94: 6878 ldr r0, [r7, #4]
8003a96: f7ff fe8d bl 80037b4 <HAL_SPI_TxCpltCallback>
}
8003a9a: bf00 nop
8003a9c: 3718 adds r7, #24
8003a9e: 46bd mov sp, r7
8003aa0: bd80 pop {r7, pc}
8003aa2: bf00 nop
8003aa4: 20000000 .word 0x20000000
8003aa8: 057619f1 .word 0x057619f1
08003aac <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8003aac: b580 push {r7, lr}
8003aae: b082 sub sp, #8
8003ab0: af00 add r7, sp, #0
8003ab2: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8003ab4: 687b ldr r3, [r7, #4]
8003ab6: 2b00 cmp r3, #0
8003ab8: d101 bne.n 8003abe <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8003aba: 2301 movs r3, #1
8003abc: e01d b.n 8003afa <HAL_TIM_Base_Init+0x4e>
assert_param(IS_TIM_INSTANCE(htim->Instance));
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003abe: 687b ldr r3, [r7, #4]
8003ac0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8003ac4: b2db uxtb r3, r3
8003ac6: 2b00 cmp r3, #0
8003ac8: d106 bne.n 8003ad8 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003aca: 687b ldr r3, [r7, #4]
8003acc: 2200 movs r2, #0
8003ace: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8003ad2: 6878 ldr r0, [r7, #4]
8003ad4: f7fe f8d2 bl 8001c7c <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003ad8: 687b ldr r3, [r7, #4]
8003ada: 2202 movs r2, #2
8003adc: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003ae0: 687b ldr r3, [r7, #4]
8003ae2: 681a ldr r2, [r3, #0]
8003ae4: 687b ldr r3, [r7, #4]
8003ae6: 3304 adds r3, #4
8003ae8: 4619 mov r1, r3
8003aea: 4610 mov r0, r2
8003aec: f000 f9ae bl 8003e4c <TIM_Base_SetConfig>
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003af0: 687b ldr r3, [r7, #4]
8003af2: 2201 movs r2, #1
8003af4: f883 203d strb.w r2, [r3, #61] ; 0x3d
return HAL_OK;
8003af8: 2300 movs r3, #0
}
8003afa: 4618 mov r0, r3
8003afc: 3708 adds r7, #8
8003afe: 46bd mov sp, r7
8003b00: bd80 pop {r7, pc}
08003b02 <HAL_TIM_Base_Start_IT>:
* @brief Starts the TIM Base generation in interrupt mode.
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
8003b02: b480 push {r7}
8003b04: b085 sub sp, #20
8003b06: af00 add r7, sp, #0
8003b08: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_INSTANCE(htim->Instance));
/* Enable the TIM Update interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
8003b0a: 687b ldr r3, [r7, #4]
8003b0c: 681b ldr r3, [r3, #0]
8003b0e: 68da ldr r2, [r3, #12]
8003b10: 687b ldr r3, [r7, #4]
8003b12: 681b ldr r3, [r3, #0]
8003b14: f042 0201 orr.w r2, r2, #1
8003b18: 60da str r2, [r3, #12]
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8003b1a: 687b ldr r3, [r7, #4]
8003b1c: 681b ldr r3, [r3, #0]
8003b1e: 689b ldr r3, [r3, #8]
8003b20: f003 0307 and.w r3, r3, #7
8003b24: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8003b26: 68fb ldr r3, [r7, #12]
8003b28: 2b06 cmp r3, #6
8003b2a: d007 beq.n 8003b3c <HAL_TIM_Base_Start_IT+0x3a>
{
__HAL_TIM_ENABLE(htim);
8003b2c: 687b ldr r3, [r7, #4]
8003b2e: 681b ldr r3, [r3, #0]
8003b30: 681a ldr r2, [r3, #0]
8003b32: 687b ldr r3, [r7, #4]
8003b34: 681b ldr r3, [r3, #0]
8003b36: f042 0201 orr.w r2, r2, #1
8003b3a: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8003b3c: 2300 movs r3, #0
}
8003b3e: 4618 mov r0, r3
8003b40: 3714 adds r7, #20
8003b42: 46bd mov sp, r7
8003b44: f85d 7b04 ldr.w r7, [sp], #4
8003b48: 4770 bx lr
08003b4a <HAL_TIM_OnePulse_Init>:
* @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
* @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
{
8003b4a: b580 push {r7, lr}
8003b4c: b082 sub sp, #8
8003b4e: af00 add r7, sp, #0
8003b50: 6078 str r0, [r7, #4]
8003b52: 6039 str r1, [r7, #0]
/* Check the TIM handle allocation */
if (htim == NULL)
8003b54: 687b ldr r3, [r7, #4]
8003b56: 2b00 cmp r3, #0
8003b58: d101 bne.n 8003b5e <HAL_TIM_OnePulse_Init+0x14>
{
return HAL_ERROR;
8003b5a: 2301 movs r3, #1
8003b5c: e02d b.n 8003bba <HAL_TIM_OnePulse_Init+0x70>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_OPM_MODE(OnePulseMode));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003b5e: 687b ldr r3, [r7, #4]
8003b60: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8003b64: b2db uxtb r3, r3
8003b66: 2b00 cmp r3, #0
8003b68: d106 bne.n 8003b78 <HAL_TIM_OnePulse_Init+0x2e>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003b6a: 687b ldr r3, [r7, #4]
8003b6c: 2200 movs r2, #0
8003b6e: f883 203c strb.w r2, [r3, #60] ; 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->OnePulse_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_OnePulse_MspInit(htim);
8003b72: 6878 ldr r0, [r7, #4]
8003b74: f000 f825 bl 8003bc2 <HAL_TIM_OnePulse_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003b78: 687b ldr r3, [r7, #4]
8003b7a: 2202 movs r2, #2
8003b7c: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Configure the Time base in the One Pulse Mode */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003b80: 687b ldr r3, [r7, #4]
8003b82: 681a ldr r2, [r3, #0]
8003b84: 687b ldr r3, [r7, #4]
8003b86: 3304 adds r3, #4
8003b88: 4619 mov r1, r3
8003b8a: 4610 mov r0, r2
8003b8c: f000 f95e bl 8003e4c <TIM_Base_SetConfig>
/* Reset the OPM Bit */
htim->Instance->CR1 &= ~TIM_CR1_OPM;
8003b90: 687b ldr r3, [r7, #4]
8003b92: 681b ldr r3, [r3, #0]
8003b94: 681a ldr r2, [r3, #0]
8003b96: 687b ldr r3, [r7, #4]
8003b98: 681b ldr r3, [r3, #0]
8003b9a: f022 0208 bic.w r2, r2, #8
8003b9e: 601a str r2, [r3, #0]
/* Configure the OPM Mode */
htim->Instance->CR1 |= OnePulseMode;
8003ba0: 687b ldr r3, [r7, #4]
8003ba2: 681b ldr r3, [r3, #0]
8003ba4: 6819 ldr r1, [r3, #0]
8003ba6: 687b ldr r3, [r7, #4]
8003ba8: 681b ldr r3, [r3, #0]
8003baa: 683a ldr r2, [r7, #0]
8003bac: 430a orrs r2, r1
8003bae: 601a str r2, [r3, #0]
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003bb0: 687b ldr r3, [r7, #4]
8003bb2: 2201 movs r2, #1
8003bb4: f883 203d strb.w r2, [r3, #61] ; 0x3d
return HAL_OK;
8003bb8: 2300 movs r3, #0
}
8003bba: 4618 mov r0, r3
8003bbc: 3708 adds r7, #8
8003bbe: 46bd mov sp, r7
8003bc0: bd80 pop {r7, pc}
08003bc2 <HAL_TIM_OnePulse_MspInit>:
* @brief Initializes the TIM One Pulse MSP.
* @param htim TIM One Pulse handle
* @retval None
*/
__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
{
8003bc2: b480 push {r7}
8003bc4: b083 sub sp, #12
8003bc6: af00 add r7, sp, #0
8003bc8: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OnePulse_MspInit could be implemented in the user file
*/
}
8003bca: bf00 nop
8003bcc: 370c adds r7, #12
8003bce: 46bd mov sp, r7
8003bd0: f85d 7b04 ldr.w r7, [sp], #4
8003bd4: 4770 bx lr
08003bd6 <HAL_TIM_IRQHandler>:
* @brief This function handles TIM interrupts requests.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
8003bd6: b580 push {r7, lr}
8003bd8: b082 sub sp, #8
8003bda: af00 add r7, sp, #0
8003bdc: 6078 str r0, [r7, #4]
/* Capture compare 1 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
8003bde: 687b ldr r3, [r7, #4]
8003be0: 681b ldr r3, [r3, #0]
8003be2: 691b ldr r3, [r3, #16]
8003be4: f003 0302 and.w r3, r3, #2
8003be8: 2b02 cmp r3, #2
8003bea: d122 bne.n 8003c32 <HAL_TIM_IRQHandler+0x5c>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
8003bec: 687b ldr r3, [r7, #4]
8003bee: 681b ldr r3, [r3, #0]
8003bf0: 68db ldr r3, [r3, #12]
8003bf2: f003 0302 and.w r3, r3, #2
8003bf6: 2b02 cmp r3, #2
8003bf8: d11b bne.n 8003c32 <HAL_TIM_IRQHandler+0x5c>
{
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
8003bfa: 687b ldr r3, [r7, #4]
8003bfc: 681b ldr r3, [r3, #0]
8003bfe: f06f 0202 mvn.w r2, #2
8003c02: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
8003c04: 687b ldr r3, [r7, #4]
8003c06: 2201 movs r2, #1
8003c08: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
8003c0a: 687b ldr r3, [r7, #4]
8003c0c: 681b ldr r3, [r3, #0]
8003c0e: 699b ldr r3, [r3, #24]
8003c10: f003 0303 and.w r3, r3, #3
8003c14: 2b00 cmp r3, #0
8003c16: d003 beq.n 8003c20 <HAL_TIM_IRQHandler+0x4a>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8003c18: 6878 ldr r0, [r7, #4]
8003c1a: f000 f8f8 bl 8003e0e <HAL_TIM_IC_CaptureCallback>
8003c1e: e005 b.n 8003c2c <HAL_TIM_IRQHandler+0x56>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003c20: 6878 ldr r0, [r7, #4]
8003c22: f000 f8ea bl 8003dfa <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8003c26: 6878 ldr r0, [r7, #4]
8003c28: f000 f8fb bl 8003e22 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8003c2c: 687b ldr r3, [r7, #4]
8003c2e: 2200 movs r2, #0
8003c30: 771a strb r2, [r3, #28]
}
}
}
/* Capture compare 2 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
8003c32: 687b ldr r3, [r7, #4]
8003c34: 681b ldr r3, [r3, #0]
8003c36: 691b ldr r3, [r3, #16]
8003c38: f003 0304 and.w r3, r3, #4
8003c3c: 2b04 cmp r3, #4
8003c3e: d122 bne.n 8003c86 <HAL_TIM_IRQHandler+0xb0>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
8003c40: 687b ldr r3, [r7, #4]
8003c42: 681b ldr r3, [r3, #0]
8003c44: 68db ldr r3, [r3, #12]
8003c46: f003 0304 and.w r3, r3, #4
8003c4a: 2b04 cmp r3, #4
8003c4c: d11b bne.n 8003c86 <HAL_TIM_IRQHandler+0xb0>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
8003c4e: 687b ldr r3, [r7, #4]
8003c50: 681b ldr r3, [r3, #0]
8003c52: f06f 0204 mvn.w r2, #4
8003c56: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
8003c58: 687b ldr r3, [r7, #4]
8003c5a: 2202 movs r2, #2
8003c5c: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
8003c5e: 687b ldr r3, [r7, #4]
8003c60: 681b ldr r3, [r3, #0]
8003c62: 699b ldr r3, [r3, #24]
8003c64: f403 7340 and.w r3, r3, #768 ; 0x300
8003c68: 2b00 cmp r3, #0
8003c6a: d003 beq.n 8003c74 <HAL_TIM_IRQHandler+0x9e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8003c6c: 6878 ldr r0, [r7, #4]
8003c6e: f000 f8ce bl 8003e0e <HAL_TIM_IC_CaptureCallback>
8003c72: e005 b.n 8003c80 <HAL_TIM_IRQHandler+0xaa>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003c74: 6878 ldr r0, [r7, #4]
8003c76: f000 f8c0 bl 8003dfa <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8003c7a: 6878 ldr r0, [r7, #4]
8003c7c: f000 f8d1 bl 8003e22 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8003c80: 687b ldr r3, [r7, #4]
8003c82: 2200 movs r2, #0
8003c84: 771a strb r2, [r3, #28]
}
}
/* Capture compare 3 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
8003c86: 687b ldr r3, [r7, #4]
8003c88: 681b ldr r3, [r3, #0]
8003c8a: 691b ldr r3, [r3, #16]
8003c8c: f003 0308 and.w r3, r3, #8
8003c90: 2b08 cmp r3, #8
8003c92: d122 bne.n 8003cda <HAL_TIM_IRQHandler+0x104>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
8003c94: 687b ldr r3, [r7, #4]
8003c96: 681b ldr r3, [r3, #0]
8003c98: 68db ldr r3, [r3, #12]
8003c9a: f003 0308 and.w r3, r3, #8
8003c9e: 2b08 cmp r3, #8
8003ca0: d11b bne.n 8003cda <HAL_TIM_IRQHandler+0x104>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
8003ca2: 687b ldr r3, [r7, #4]
8003ca4: 681b ldr r3, [r3, #0]
8003ca6: f06f 0208 mvn.w r2, #8
8003caa: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
8003cac: 687b ldr r3, [r7, #4]
8003cae: 2204 movs r2, #4
8003cb0: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
8003cb2: 687b ldr r3, [r7, #4]
8003cb4: 681b ldr r3, [r3, #0]
8003cb6: 69db ldr r3, [r3, #28]
8003cb8: f003 0303 and.w r3, r3, #3
8003cbc: 2b00 cmp r3, #0
8003cbe: d003 beq.n 8003cc8 <HAL_TIM_IRQHandler+0xf2>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8003cc0: 6878 ldr r0, [r7, #4]
8003cc2: f000 f8a4 bl 8003e0e <HAL_TIM_IC_CaptureCallback>
8003cc6: e005 b.n 8003cd4 <HAL_TIM_IRQHandler+0xfe>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003cc8: 6878 ldr r0, [r7, #4]
8003cca: f000 f896 bl 8003dfa <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8003cce: 6878 ldr r0, [r7, #4]
8003cd0: f000 f8a7 bl 8003e22 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8003cd4: 687b ldr r3, [r7, #4]
8003cd6: 2200 movs r2, #0
8003cd8: 771a strb r2, [r3, #28]
}
}
/* Capture compare 4 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
8003cda: 687b ldr r3, [r7, #4]
8003cdc: 681b ldr r3, [r3, #0]
8003cde: 691b ldr r3, [r3, #16]
8003ce0: f003 0310 and.w r3, r3, #16
8003ce4: 2b10 cmp r3, #16
8003ce6: d122 bne.n 8003d2e <HAL_TIM_IRQHandler+0x158>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
8003ce8: 687b ldr r3, [r7, #4]
8003cea: 681b ldr r3, [r3, #0]
8003cec: 68db ldr r3, [r3, #12]
8003cee: f003 0310 and.w r3, r3, #16
8003cf2: 2b10 cmp r3, #16
8003cf4: d11b bne.n 8003d2e <HAL_TIM_IRQHandler+0x158>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
8003cf6: 687b ldr r3, [r7, #4]
8003cf8: 681b ldr r3, [r3, #0]
8003cfa: f06f 0210 mvn.w r2, #16
8003cfe: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
8003d00: 687b ldr r3, [r7, #4]
8003d02: 2208 movs r2, #8
8003d04: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
8003d06: 687b ldr r3, [r7, #4]
8003d08: 681b ldr r3, [r3, #0]
8003d0a: 69db ldr r3, [r3, #28]
8003d0c: f403 7340 and.w r3, r3, #768 ; 0x300
8003d10: 2b00 cmp r3, #0
8003d12: d003 beq.n 8003d1c <HAL_TIM_IRQHandler+0x146>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
8003d14: 6878 ldr r0, [r7, #4]
8003d16: f000 f87a bl 8003e0e <HAL_TIM_IC_CaptureCallback>
8003d1a: e005 b.n 8003d28 <HAL_TIM_IRQHandler+0x152>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
8003d1c: 6878 ldr r0, [r7, #4]
8003d1e: f000 f86c bl 8003dfa <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
8003d22: 6878 ldr r0, [r7, #4]
8003d24: f000 f87d bl 8003e22 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
8003d28: 687b ldr r3, [r7, #4]
8003d2a: 2200 movs r2, #0
8003d2c: 771a strb r2, [r3, #28]
}
}
/* TIM Update event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
8003d2e: 687b ldr r3, [r7, #4]
8003d30: 681b ldr r3, [r3, #0]
8003d32: 691b ldr r3, [r3, #16]
8003d34: f003 0301 and.w r3, r3, #1
8003d38: 2b01 cmp r3, #1
8003d3a: d10e bne.n 8003d5a <HAL_TIM_IRQHandler+0x184>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
8003d3c: 687b ldr r3, [r7, #4]
8003d3e: 681b ldr r3, [r3, #0]
8003d40: 68db ldr r3, [r3, #12]
8003d42: f003 0301 and.w r3, r3, #1
8003d46: 2b01 cmp r3, #1
8003d48: d107 bne.n 8003d5a <HAL_TIM_IRQHandler+0x184>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
8003d4a: 687b ldr r3, [r7, #4]
8003d4c: 681b ldr r3, [r3, #0]
8003d4e: f06f 0201 mvn.w r2, #1
8003d52: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
HAL_TIM_PeriodElapsedCallback(htim);
8003d54: 6878 ldr r0, [r7, #4]
8003d56: f000 f846 bl 8003de6 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Break input event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
8003d5a: 687b ldr r3, [r7, #4]
8003d5c: 681b ldr r3, [r3, #0]
8003d5e: 691b ldr r3, [r3, #16]
8003d60: f003 0380 and.w r3, r3, #128 ; 0x80
8003d64: 2b80 cmp r3, #128 ; 0x80
8003d66: d10e bne.n 8003d86 <HAL_TIM_IRQHandler+0x1b0>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
8003d68: 687b ldr r3, [r7, #4]
8003d6a: 681b ldr r3, [r3, #0]
8003d6c: 68db ldr r3, [r3, #12]
8003d6e: f003 0380 and.w r3, r3, #128 ; 0x80
8003d72: 2b80 cmp r3, #128 ; 0x80
8003d74: d107 bne.n 8003d86 <HAL_TIM_IRQHandler+0x1b0>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
8003d76: 687b ldr r3, [r7, #4]
8003d78: 681b ldr r3, [r3, #0]
8003d7a: f06f 0280 mvn.w r2, #128 ; 0x80
8003d7e: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
HAL_TIMEx_BreakCallback(htim);
8003d80: 6878 ldr r0, [r7, #4]
8003d82: f000 f989 bl 8004098 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Trigger detection event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
8003d86: 687b ldr r3, [r7, #4]
8003d88: 681b ldr r3, [r3, #0]
8003d8a: 691b ldr r3, [r3, #16]
8003d8c: f003 0340 and.w r3, r3, #64 ; 0x40
8003d90: 2b40 cmp r3, #64 ; 0x40
8003d92: d10e bne.n 8003db2 <HAL_TIM_IRQHandler+0x1dc>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
8003d94: 687b ldr r3, [r7, #4]
8003d96: 681b ldr r3, [r3, #0]
8003d98: 68db ldr r3, [r3, #12]
8003d9a: f003 0340 and.w r3, r3, #64 ; 0x40
8003d9e: 2b40 cmp r3, #64 ; 0x40
8003da0: d107 bne.n 8003db2 <HAL_TIM_IRQHandler+0x1dc>
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
8003da2: 687b ldr r3, [r7, #4]
8003da4: 681b ldr r3, [r3, #0]
8003da6: f06f 0240 mvn.w r2, #64 ; 0x40
8003daa: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
HAL_TIM_TriggerCallback(htim);
8003dac: 6878 ldr r0, [r7, #4]
8003dae: f000 f842 bl 8003e36 <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM commutation event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
8003db2: 687b ldr r3, [r7, #4]
8003db4: 681b ldr r3, [r3, #0]
8003db6: 691b ldr r3, [r3, #16]
8003db8: f003 0320 and.w r3, r3, #32
8003dbc: 2b20 cmp r3, #32
8003dbe: d10e bne.n 8003dde <HAL_TIM_IRQHandler+0x208>
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
8003dc0: 687b ldr r3, [r7, #4]
8003dc2: 681b ldr r3, [r3, #0]
8003dc4: 68db ldr r3, [r3, #12]
8003dc6: f003 0320 and.w r3, r3, #32
8003dca: 2b20 cmp r3, #32
8003dcc: d107 bne.n 8003dde <HAL_TIM_IRQHandler+0x208>
{
__HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
8003dce: 687b ldr r3, [r7, #4]
8003dd0: 681b ldr r3, [r3, #0]
8003dd2: f06f 0220 mvn.w r2, #32
8003dd6: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
HAL_TIMEx_CommutCallback(htim);
8003dd8: 6878 ldr r0, [r7, #4]
8003dda: f000 f953 bl 8004084 <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
}
8003dde: bf00 nop
8003de0: 3708 adds r7, #8
8003de2: 46bd mov sp, r7
8003de4: bd80 pop {r7, pc}
08003de6 <HAL_TIM_PeriodElapsedCallback>:
* @brief Period elapsed callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
8003de6: b480 push {r7}
8003de8: b083 sub sp, #12
8003dea: af00 add r7, sp, #0
8003dec: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PeriodElapsedCallback could be implemented in the user file
*/
}
8003dee: bf00 nop
8003df0: 370c adds r7, #12
8003df2: 46bd mov sp, r7
8003df4: f85d 7b04 ldr.w r7, [sp], #4
8003df8: 4770 bx lr
08003dfa <HAL_TIM_OC_DelayElapsedCallback>:
* @brief Output Compare callback in non-blocking mode
* @param htim TIM OC handle
* @retval None
*/
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
8003dfa: b480 push {r7}
8003dfc: b083 sub sp, #12
8003dfe: af00 add r7, sp, #0
8003e00: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
*/
}
8003e02: bf00 nop
8003e04: 370c adds r7, #12
8003e06: 46bd mov sp, r7
8003e08: f85d 7b04 ldr.w r7, [sp], #4
8003e0c: 4770 bx lr
08003e0e <HAL_TIM_IC_CaptureCallback>:
* @brief Input Capture callback in non-blocking mode
* @param htim TIM IC handle
* @retval None
*/
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
8003e0e: b480 push {r7}
8003e10: b083 sub sp, #12
8003e12: af00 add r7, sp, #0
8003e14: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_IC_CaptureCallback could be implemented in the user file
*/
}
8003e16: bf00 nop
8003e18: 370c adds r7, #12
8003e1a: 46bd mov sp, r7
8003e1c: f85d 7b04 ldr.w r7, [sp], #4
8003e20: 4770 bx lr
08003e22 <HAL_TIM_PWM_PulseFinishedCallback>:
* @brief PWM Pulse finished callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
8003e22: b480 push {r7}
8003e24: b083 sub sp, #12
8003e26: af00 add r7, sp, #0
8003e28: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
*/
}
8003e2a: bf00 nop
8003e2c: 370c adds r7, #12
8003e2e: 46bd mov sp, r7
8003e30: f85d 7b04 ldr.w r7, [sp], #4
8003e34: 4770 bx lr
08003e36 <HAL_TIM_TriggerCallback>:
* @brief Hall Trigger detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
8003e36: b480 push {r7}
8003e38: b083 sub sp, #12
8003e3a: af00 add r7, sp, #0
8003e3c: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_TriggerCallback could be implemented in the user file
*/
}
8003e3e: bf00 nop
8003e40: 370c adds r7, #12
8003e42: 46bd mov sp, r7
8003e44: f85d 7b04 ldr.w r7, [sp], #4
8003e48: 4770 bx lr
...
08003e4c <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
{
8003e4c: b480 push {r7}
8003e4e: b085 sub sp, #20
8003e50: af00 add r7, sp, #0
8003e52: 6078 str r0, [r7, #4]
8003e54: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8003e56: 687b ldr r3, [r7, #4]
8003e58: 681b ldr r3, [r3, #0]
8003e5a: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8003e5c: 687b ldr r3, [r7, #4]
8003e5e: 4a40 ldr r2, [pc, #256] ; (8003f60 <TIM_Base_SetConfig+0x114>)
8003e60: 4293 cmp r3, r2
8003e62: d013 beq.n 8003e8c <TIM_Base_SetConfig+0x40>
8003e64: 687b ldr r3, [r7, #4]
8003e66: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
8003e6a: d00f beq.n 8003e8c <TIM_Base_SetConfig+0x40>
8003e6c: 687b ldr r3, [r7, #4]
8003e6e: 4a3d ldr r2, [pc, #244] ; (8003f64 <TIM_Base_SetConfig+0x118>)
8003e70: 4293 cmp r3, r2
8003e72: d00b beq.n 8003e8c <TIM_Base_SetConfig+0x40>
8003e74: 687b ldr r3, [r7, #4]
8003e76: 4a3c ldr r2, [pc, #240] ; (8003f68 <TIM_Base_SetConfig+0x11c>)
8003e78: 4293 cmp r3, r2
8003e7a: d007 beq.n 8003e8c <TIM_Base_SetConfig+0x40>
8003e7c: 687b ldr r3, [r7, #4]
8003e7e: 4a3b ldr r2, [pc, #236] ; (8003f6c <TIM_Base_SetConfig+0x120>)
8003e80: 4293 cmp r3, r2
8003e82: d003 beq.n 8003e8c <TIM_Base_SetConfig+0x40>
8003e84: 687b ldr r3, [r7, #4]
8003e86: 4a3a ldr r2, [pc, #232] ; (8003f70 <TIM_Base_SetConfig+0x124>)
8003e88: 4293 cmp r3, r2
8003e8a: d108 bne.n 8003e9e <TIM_Base_SetConfig+0x52>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8003e8c: 68fb ldr r3, [r7, #12]
8003e8e: f023 0370 bic.w r3, r3, #112 ; 0x70
8003e92: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8003e94: 683b ldr r3, [r7, #0]
8003e96: 685b ldr r3, [r3, #4]
8003e98: 68fa ldr r2, [r7, #12]
8003e9a: 4313 orrs r3, r2
8003e9c: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8003e9e: 687b ldr r3, [r7, #4]
8003ea0: 4a2f ldr r2, [pc, #188] ; (8003f60 <TIM_Base_SetConfig+0x114>)
8003ea2: 4293 cmp r3, r2
8003ea4: d02b beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ea6: 687b ldr r3, [r7, #4]
8003ea8: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
8003eac: d027 beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003eae: 687b ldr r3, [r7, #4]
8003eb0: 4a2c ldr r2, [pc, #176] ; (8003f64 <TIM_Base_SetConfig+0x118>)
8003eb2: 4293 cmp r3, r2
8003eb4: d023 beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003eb6: 687b ldr r3, [r7, #4]
8003eb8: 4a2b ldr r2, [pc, #172] ; (8003f68 <TIM_Base_SetConfig+0x11c>)
8003eba: 4293 cmp r3, r2
8003ebc: d01f beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ebe: 687b ldr r3, [r7, #4]
8003ec0: 4a2a ldr r2, [pc, #168] ; (8003f6c <TIM_Base_SetConfig+0x120>)
8003ec2: 4293 cmp r3, r2
8003ec4: d01b beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ec6: 687b ldr r3, [r7, #4]
8003ec8: 4a29 ldr r2, [pc, #164] ; (8003f70 <TIM_Base_SetConfig+0x124>)
8003eca: 4293 cmp r3, r2
8003ecc: d017 beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ece: 687b ldr r3, [r7, #4]
8003ed0: 4a28 ldr r2, [pc, #160] ; (8003f74 <TIM_Base_SetConfig+0x128>)
8003ed2: 4293 cmp r3, r2
8003ed4: d013 beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ed6: 687b ldr r3, [r7, #4]
8003ed8: 4a27 ldr r2, [pc, #156] ; (8003f78 <TIM_Base_SetConfig+0x12c>)
8003eda: 4293 cmp r3, r2
8003edc: d00f beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ede: 687b ldr r3, [r7, #4]
8003ee0: 4a26 ldr r2, [pc, #152] ; (8003f7c <TIM_Base_SetConfig+0x130>)
8003ee2: 4293 cmp r3, r2
8003ee4: d00b beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ee6: 687b ldr r3, [r7, #4]
8003ee8: 4a25 ldr r2, [pc, #148] ; (8003f80 <TIM_Base_SetConfig+0x134>)
8003eea: 4293 cmp r3, r2
8003eec: d007 beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003eee: 687b ldr r3, [r7, #4]
8003ef0: 4a24 ldr r2, [pc, #144] ; (8003f84 <TIM_Base_SetConfig+0x138>)
8003ef2: 4293 cmp r3, r2
8003ef4: d003 beq.n 8003efe <TIM_Base_SetConfig+0xb2>
8003ef6: 687b ldr r3, [r7, #4]
8003ef8: 4a23 ldr r2, [pc, #140] ; (8003f88 <TIM_Base_SetConfig+0x13c>)
8003efa: 4293 cmp r3, r2
8003efc: d108 bne.n 8003f10 <TIM_Base_SetConfig+0xc4>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8003efe: 68fb ldr r3, [r7, #12]
8003f00: f423 7340 bic.w r3, r3, #768 ; 0x300
8003f04: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8003f06: 683b ldr r3, [r7, #0]
8003f08: 68db ldr r3, [r3, #12]
8003f0a: 68fa ldr r2, [r7, #12]
8003f0c: 4313 orrs r3, r2
8003f0e: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8003f10: 68fb ldr r3, [r7, #12]
8003f12: f023 0280 bic.w r2, r3, #128 ; 0x80
8003f16: 683b ldr r3, [r7, #0]
8003f18: 695b ldr r3, [r3, #20]
8003f1a: 4313 orrs r3, r2
8003f1c: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8003f1e: 687b ldr r3, [r7, #4]
8003f20: 68fa ldr r2, [r7, #12]
8003f22: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8003f24: 683b ldr r3, [r7, #0]
8003f26: 689a ldr r2, [r3, #8]
8003f28: 687b ldr r3, [r7, #4]
8003f2a: 62da str r2, [r3, #44] ; 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8003f2c: 683b ldr r3, [r7, #0]
8003f2e: 681a ldr r2, [r3, #0]
8003f30: 687b ldr r3, [r7, #4]
8003f32: 629a str r2, [r3, #40] ; 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8003f34: 687b ldr r3, [r7, #4]
8003f36: 4a0a ldr r2, [pc, #40] ; (8003f60 <TIM_Base_SetConfig+0x114>)
8003f38: 4293 cmp r3, r2
8003f3a: d003 beq.n 8003f44 <TIM_Base_SetConfig+0xf8>
8003f3c: 687b ldr r3, [r7, #4]
8003f3e: 4a0c ldr r2, [pc, #48] ; (8003f70 <TIM_Base_SetConfig+0x124>)
8003f40: 4293 cmp r3, r2
8003f42: d103 bne.n 8003f4c <TIM_Base_SetConfig+0x100>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8003f44: 683b ldr r3, [r7, #0]
8003f46: 691a ldr r2, [r3, #16]
8003f48: 687b ldr r3, [r7, #4]
8003f4a: 631a str r2, [r3, #48] ; 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8003f4c: 687b ldr r3, [r7, #4]
8003f4e: 2201 movs r2, #1
8003f50: 615a str r2, [r3, #20]
}
8003f52: bf00 nop
8003f54: 3714 adds r7, #20
8003f56: 46bd mov sp, r7
8003f58: f85d 7b04 ldr.w r7, [sp], #4
8003f5c: 4770 bx lr
8003f5e: bf00 nop
8003f60: 40010000 .word 0x40010000
8003f64: 40000400 .word 0x40000400
8003f68: 40000800 .word 0x40000800
8003f6c: 40000c00 .word 0x40000c00
8003f70: 40010400 .word 0x40010400
8003f74: 40014000 .word 0x40014000
8003f78: 40014400 .word 0x40014400
8003f7c: 40014800 .word 0x40014800
8003f80: 40001800 .word 0x40001800
8003f84: 40001c00 .word 0x40001c00
8003f88: 40002000 .word 0x40002000
08003f8c <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
TIM_MasterConfigTypeDef *sMasterConfig)
{
8003f8c: b480 push {r7}
8003f8e: b085 sub sp, #20
8003f90: af00 add r7, sp, #0
8003f92: 6078 str r0, [r7, #4]
8003f94: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8003f96: 687b ldr r3, [r7, #4]
8003f98: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
8003f9c: 2b01 cmp r3, #1
8003f9e: d101 bne.n 8003fa4 <HAL_TIMEx_MasterConfigSynchronization+0x18>
8003fa0: 2302 movs r3, #2
8003fa2: e05a b.n 800405a <HAL_TIMEx_MasterConfigSynchronization+0xce>
8003fa4: 687b ldr r3, [r7, #4]
8003fa6: 2201 movs r2, #1
8003fa8: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8003fac: 687b ldr r3, [r7, #4]
8003fae: 2202 movs r2, #2
8003fb0: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8003fb4: 687b ldr r3, [r7, #4]
8003fb6: 681b ldr r3, [r3, #0]
8003fb8: 685b ldr r3, [r3, #4]
8003fba: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8003fbc: 687b ldr r3, [r7, #4]
8003fbe: 681b ldr r3, [r3, #0]
8003fc0: 689b ldr r3, [r3, #8]
8003fc2: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8003fc4: 68fb ldr r3, [r7, #12]
8003fc6: f023 0370 bic.w r3, r3, #112 ; 0x70
8003fca: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8003fcc: 683b ldr r3, [r7, #0]
8003fce: 681b ldr r3, [r3, #0]
8003fd0: 68fa ldr r2, [r7, #12]
8003fd2: 4313 orrs r3, r2
8003fd4: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8003fd6: 687b ldr r3, [r7, #4]
8003fd8: 681b ldr r3, [r3, #0]
8003fda: 68fa ldr r2, [r7, #12]
8003fdc: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8003fde: 687b ldr r3, [r7, #4]
8003fe0: 681b ldr r3, [r3, #0]
8003fe2: 4a21 ldr r2, [pc, #132] ; (8004068 <HAL_TIMEx_MasterConfigSynchronization+0xdc>)
8003fe4: 4293 cmp r3, r2
8003fe6: d022 beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003fe8: 687b ldr r3, [r7, #4]
8003fea: 681b ldr r3, [r3, #0]
8003fec: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000
8003ff0: d01d beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003ff2: 687b ldr r3, [r7, #4]
8003ff4: 681b ldr r3, [r3, #0]
8003ff6: 4a1d ldr r2, [pc, #116] ; (800406c <HAL_TIMEx_MasterConfigSynchronization+0xe0>)
8003ff8: 4293 cmp r3, r2
8003ffa: d018 beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8003ffc: 687b ldr r3, [r7, #4]
8003ffe: 681b ldr r3, [r3, #0]
8004000: 4a1b ldr r2, [pc, #108] ; (8004070 <HAL_TIMEx_MasterConfigSynchronization+0xe4>)
8004002: 4293 cmp r3, r2
8004004: d013 beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004006: 687b ldr r3, [r7, #4]
8004008: 681b ldr r3, [r3, #0]
800400a: 4a1a ldr r2, [pc, #104] ; (8004074 <HAL_TIMEx_MasterConfigSynchronization+0xe8>)
800400c: 4293 cmp r3, r2
800400e: d00e beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004010: 687b ldr r3, [r7, #4]
8004012: 681b ldr r3, [r3, #0]
8004014: 4a18 ldr r2, [pc, #96] ; (8004078 <HAL_TIMEx_MasterConfigSynchronization+0xec>)
8004016: 4293 cmp r3, r2
8004018: d009 beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
800401a: 687b ldr r3, [r7, #4]
800401c: 681b ldr r3, [r3, #0]
800401e: 4a17 ldr r2, [pc, #92] ; (800407c <HAL_TIMEx_MasterConfigSynchronization+0xf0>)
8004020: 4293 cmp r3, r2
8004022: d004 beq.n 800402e <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004024: 687b ldr r3, [r7, #4]
8004026: 681b ldr r3, [r3, #0]
8004028: 4a15 ldr r2, [pc, #84] ; (8004080 <HAL_TIMEx_MasterConfigSynchronization+0xf4>)
800402a: 4293 cmp r3, r2
800402c: d10c bne.n 8004048 <HAL_TIMEx_MasterConfigSynchronization+0xbc>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
800402e: 68bb ldr r3, [r7, #8]
8004030: f023 0380 bic.w r3, r3, #128 ; 0x80
8004034: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8004036: 683b ldr r3, [r7, #0]
8004038: 685b ldr r3, [r3, #4]
800403a: 68ba ldr r2, [r7, #8]
800403c: 4313 orrs r3, r2
800403e: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8004040: 687b ldr r3, [r7, #4]
8004042: 681b ldr r3, [r3, #0]
8004044: 68ba ldr r2, [r7, #8]
8004046: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8004048: 687b ldr r3, [r7, #4]
800404a: 2201 movs r2, #1
800404c: f883 203d strb.w r2, [r3, #61] ; 0x3d
__HAL_UNLOCK(htim);
8004050: 687b ldr r3, [r7, #4]
8004052: 2200 movs r2, #0
8004054: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_OK;
8004058: 2300 movs r3, #0
}
800405a: 4618 mov r0, r3
800405c: 3714 adds r7, #20
800405e: 46bd mov sp, r7
8004060: f85d 7b04 ldr.w r7, [sp], #4
8004064: 4770 bx lr
8004066: bf00 nop
8004068: 40010000 .word 0x40010000
800406c: 40000400 .word 0x40000400
8004070: 40000800 .word 0x40000800
8004074: 40000c00 .word 0x40000c00
8004078: 40010400 .word 0x40010400
800407c: 40014000 .word 0x40014000
8004080: 40001800 .word 0x40001800
08004084 <HAL_TIMEx_CommutCallback>:
* @brief Hall commutation changed callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
8004084: b480 push {r7}
8004086: b083 sub sp, #12
8004088: af00 add r7, sp, #0
800408a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_CommutCallback could be implemented in the user file
*/
}
800408c: bf00 nop
800408e: 370c adds r7, #12
8004090: 46bd mov sp, r7
8004092: f85d 7b04 ldr.w r7, [sp], #4
8004096: 4770 bx lr
08004098 <HAL_TIMEx_BreakCallback>:
* @brief Hall Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
8004098: b480 push {r7}
800409a: b083 sub sp, #12
800409c: af00 add r7, sp, #0
800409e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_BreakCallback could be implemented in the user file
*/
}
80040a0: bf00 nop
80040a2: 370c adds r7, #12
80040a4: 46bd mov sp, r7
80040a6: f85d 7b04 ldr.w r7, [sp], #4
80040aa: 4770 bx lr
080040ac <__errno>:
80040ac: 4b01 ldr r3, [pc, #4] ; (80040b4 <__errno+0x8>)
80040ae: 6818 ldr r0, [r3, #0]
80040b0: 4770 bx lr
80040b2: bf00 nop
80040b4: 2000000c .word 0x2000000c
080040b8 <__libc_init_array>:
80040b8: b570 push {r4, r5, r6, lr}
80040ba: 4e0d ldr r6, [pc, #52] ; (80040f0 <__libc_init_array+0x38>)
80040bc: 4c0d ldr r4, [pc, #52] ; (80040f4 <__libc_init_array+0x3c>)
80040be: 1ba4 subs r4, r4, r6
80040c0: 10a4 asrs r4, r4, #2
80040c2: 2500 movs r5, #0
80040c4: 42a5 cmp r5, r4
80040c6: d109 bne.n 80040dc <__libc_init_array+0x24>
80040c8: 4e0b ldr r6, [pc, #44] ; (80040f8 <__libc_init_array+0x40>)
80040ca: 4c0c ldr r4, [pc, #48] ; (80040fc <__libc_init_array+0x44>)
80040cc: f000 ff40 bl 8004f50 <_init>
80040d0: 1ba4 subs r4, r4, r6
80040d2: 10a4 asrs r4, r4, #2
80040d4: 2500 movs r5, #0
80040d6: 42a5 cmp r5, r4
80040d8: d105 bne.n 80040e6 <__libc_init_array+0x2e>
80040da: bd70 pop {r4, r5, r6, pc}
80040dc: f856 3025 ldr.w r3, [r6, r5, lsl #2]
80040e0: 4798 blx r3
80040e2: 3501 adds r5, #1
80040e4: e7ee b.n 80040c4 <__libc_init_array+0xc>
80040e6: f856 3025 ldr.w r3, [r6, r5, lsl #2]
80040ea: 4798 blx r3
80040ec: 3501 adds r5, #1
80040ee: e7f2 b.n 80040d6 <__libc_init_array+0x1e>
80040f0: 08005020 .word 0x08005020
80040f4: 08005020 .word 0x08005020
80040f8: 08005020 .word 0x08005020
80040fc: 08005024 .word 0x08005024
08004100 <memset>:
8004100: 4402 add r2, r0
8004102: 4603 mov r3, r0
8004104: 4293 cmp r3, r2
8004106: d100 bne.n 800410a <memset+0xa>
8004108: 4770 bx lr
800410a: f803 1b01 strb.w r1, [r3], #1
800410e: e7f9 b.n 8004104 <memset+0x4>
08004110 <iprintf>:
8004110: b40f push {r0, r1, r2, r3}
8004112: 4b0a ldr r3, [pc, #40] ; (800413c <iprintf+0x2c>)
8004114: b513 push {r0, r1, r4, lr}
8004116: 681c ldr r4, [r3, #0]
8004118: b124 cbz r4, 8004124 <iprintf+0x14>
800411a: 69a3 ldr r3, [r4, #24]
800411c: b913 cbnz r3, 8004124 <iprintf+0x14>
800411e: 4620 mov r0, r4
8004120: f000 f882 bl 8004228 <__sinit>
8004124: ab05 add r3, sp, #20
8004126: 9a04 ldr r2, [sp, #16]
8004128: 68a1 ldr r1, [r4, #8]
800412a: 9301 str r3, [sp, #4]
800412c: 4620 mov r0, r4
800412e: f000 f9df bl 80044f0 <_vfiprintf_r>
8004132: b002 add sp, #8
8004134: e8bd 4010 ldmia.w sp!, {r4, lr}
8004138: b004 add sp, #16
800413a: 4770 bx lr
800413c: 2000000c .word 0x2000000c
08004140 <rand>:
8004140: b538 push {r3, r4, r5, lr}
8004142: 4b13 ldr r3, [pc, #76] ; (8004190 <rand+0x50>)
8004144: 681c ldr r4, [r3, #0]
8004146: 6ba3 ldr r3, [r4, #56] ; 0x38
8004148: b97b cbnz r3, 800416a <rand+0x2a>
800414a: 2018 movs r0, #24
800414c: f000 f8f6 bl 800433c <malloc>
8004150: 4a10 ldr r2, [pc, #64] ; (8004194 <rand+0x54>)
8004152: 4b11 ldr r3, [pc, #68] ; (8004198 <rand+0x58>)
8004154: 63a0 str r0, [r4, #56] ; 0x38
8004156: e9c0 2300 strd r2, r3, [r0]
800415a: 4b10 ldr r3, [pc, #64] ; (800419c <rand+0x5c>)
800415c: 6083 str r3, [r0, #8]
800415e: 230b movs r3, #11
8004160: 8183 strh r3, [r0, #12]
8004162: 2201 movs r2, #1
8004164: 2300 movs r3, #0
8004166: e9c0 2304 strd r2, r3, [r0, #16]
800416a: 6ba1 ldr r1, [r4, #56] ; 0x38
800416c: 480c ldr r0, [pc, #48] ; (80041a0 <rand+0x60>)
800416e: 690a ldr r2, [r1, #16]
8004170: 694b ldr r3, [r1, #20]
8004172: 4c0c ldr r4, [pc, #48] ; (80041a4 <rand+0x64>)
8004174: 4350 muls r0, r2
8004176: fb04 0003 mla r0, r4, r3, r0
800417a: fba2 2304 umull r2, r3, r2, r4
800417e: 4403 add r3, r0
8004180: 1c54 adds r4, r2, #1
8004182: f143 0500 adc.w r5, r3, #0
8004186: e9c1 4504 strd r4, r5, [r1, #16]
800418a: f025 4000 bic.w r0, r5, #2147483648 ; 0x80000000
800418e: bd38 pop {r3, r4, r5, pc}
8004190: 2000000c .word 0x2000000c
8004194: abcd330e .word 0xabcd330e
8004198: e66d1234 .word 0xe66d1234
800419c: 0005deec .word 0x0005deec
80041a0: 5851f42d .word 0x5851f42d
80041a4: 4c957f2d .word 0x4c957f2d
080041a8 <std>:
80041a8: 2300 movs r3, #0
80041aa: b510 push {r4, lr}
80041ac: 4604 mov r4, r0
80041ae: e9c0 3300 strd r3, r3, [r0]
80041b2: 6083 str r3, [r0, #8]
80041b4: 8181 strh r1, [r0, #12]
80041b6: 6643 str r3, [r0, #100] ; 0x64
80041b8: 81c2 strh r2, [r0, #14]
80041ba: e9c0 3304 strd r3, r3, [r0, #16]
80041be: 6183 str r3, [r0, #24]
80041c0: 4619 mov r1, r3
80041c2: 2208 movs r2, #8
80041c4: 305c adds r0, #92 ; 0x5c
80041c6: f7ff ff9b bl 8004100 <memset>
80041ca: 4b05 ldr r3, [pc, #20] ; (80041e0 <std+0x38>)
80041cc: 6263 str r3, [r4, #36] ; 0x24
80041ce: 4b05 ldr r3, [pc, #20] ; (80041e4 <std+0x3c>)
80041d0: 62a3 str r3, [r4, #40] ; 0x28
80041d2: 4b05 ldr r3, [pc, #20] ; (80041e8 <std+0x40>)
80041d4: 62e3 str r3, [r4, #44] ; 0x2c
80041d6: 4b05 ldr r3, [pc, #20] ; (80041ec <std+0x44>)
80041d8: 6224 str r4, [r4, #32]
80041da: 6323 str r3, [r4, #48] ; 0x30
80041dc: bd10 pop {r4, pc}
80041de: bf00 nop
80041e0: 08004a4d .word 0x08004a4d
80041e4: 08004a6f .word 0x08004a6f
80041e8: 08004aa7 .word 0x08004aa7
80041ec: 08004acb .word 0x08004acb
080041f0 <_cleanup_r>:
80041f0: 4901 ldr r1, [pc, #4] ; (80041f8 <_cleanup_r+0x8>)
80041f2: f000 b885 b.w 8004300 <_fwalk_reent>
80041f6: bf00 nop
80041f8: 08004da5 .word 0x08004da5
080041fc <__sfmoreglue>:
80041fc: b570 push {r4, r5, r6, lr}
80041fe: 1e4a subs r2, r1, #1
8004200: 2568 movs r5, #104 ; 0x68
8004202: 4355 muls r5, r2
8004204: 460e mov r6, r1
8004206: f105 0174 add.w r1, r5, #116 ; 0x74
800420a: f000 f8ed bl 80043e8 <_malloc_r>
800420e: 4604 mov r4, r0
8004210: b140 cbz r0, 8004224 <__sfmoreglue+0x28>
8004212: 2100 movs r1, #0
8004214: e9c0 1600 strd r1, r6, [r0]
8004218: 300c adds r0, #12
800421a: 60a0 str r0, [r4, #8]
800421c: f105 0268 add.w r2, r5, #104 ; 0x68
8004220: f7ff ff6e bl 8004100 <memset>
8004224: 4620 mov r0, r4
8004226: bd70 pop {r4, r5, r6, pc}
08004228 <__sinit>:
8004228: 6983 ldr r3, [r0, #24]
800422a: b510 push {r4, lr}
800422c: 4604 mov r4, r0
800422e: bb33 cbnz r3, 800427e <__sinit+0x56>
8004230: e9c0 3312 strd r3, r3, [r0, #72] ; 0x48
8004234: 6503 str r3, [r0, #80] ; 0x50
8004236: 4b12 ldr r3, [pc, #72] ; (8004280 <__sinit+0x58>)
8004238: 4a12 ldr r2, [pc, #72] ; (8004284 <__sinit+0x5c>)
800423a: 681b ldr r3, [r3, #0]
800423c: 6282 str r2, [r0, #40] ; 0x28
800423e: 4298 cmp r0, r3
8004240: bf04 itt eq
8004242: 2301 moveq r3, #1
8004244: 6183 streq r3, [r0, #24]
8004246: f000 f81f bl 8004288 <__sfp>
800424a: 6060 str r0, [r4, #4]
800424c: 4620 mov r0, r4
800424e: f000 f81b bl 8004288 <__sfp>
8004252: 60a0 str r0, [r4, #8]
8004254: 4620 mov r0, r4
8004256: f000 f817 bl 8004288 <__sfp>
800425a: 2200 movs r2, #0
800425c: 60e0 str r0, [r4, #12]
800425e: 2104 movs r1, #4
8004260: 6860 ldr r0, [r4, #4]
8004262: f7ff ffa1 bl 80041a8 <std>
8004266: 2201 movs r2, #1
8004268: 2109 movs r1, #9
800426a: 68a0 ldr r0, [r4, #8]
800426c: f7ff ff9c bl 80041a8 <std>
8004270: 2202 movs r2, #2
8004272: 2112 movs r1, #18
8004274: 68e0 ldr r0, [r4, #12]
8004276: f7ff ff97 bl 80041a8 <std>
800427a: 2301 movs r3, #1
800427c: 61a3 str r3, [r4, #24]
800427e: bd10 pop {r4, pc}
8004280: 08004f80 .word 0x08004f80
8004284: 080041f1 .word 0x080041f1
08004288 <__sfp>:
8004288: b5f8 push {r3, r4, r5, r6, r7, lr}
800428a: 4b1b ldr r3, [pc, #108] ; (80042f8 <__sfp+0x70>)
800428c: 681e ldr r6, [r3, #0]
800428e: 69b3 ldr r3, [r6, #24]
8004290: 4607 mov r7, r0
8004292: b913 cbnz r3, 800429a <__sfp+0x12>
8004294: 4630 mov r0, r6
8004296: f7ff ffc7 bl 8004228 <__sinit>
800429a: 3648 adds r6, #72 ; 0x48
800429c: e9d6 3401 ldrd r3, r4, [r6, #4]
80042a0: 3b01 subs r3, #1
80042a2: d503 bpl.n 80042ac <__sfp+0x24>
80042a4: 6833 ldr r3, [r6, #0]
80042a6: b133 cbz r3, 80042b6 <__sfp+0x2e>
80042a8: 6836 ldr r6, [r6, #0]
80042aa: e7f7 b.n 800429c <__sfp+0x14>
80042ac: f9b4 500c ldrsh.w r5, [r4, #12]
80042b0: b16d cbz r5, 80042ce <__sfp+0x46>
80042b2: 3468 adds r4, #104 ; 0x68
80042b4: e7f4 b.n 80042a0 <__sfp+0x18>
80042b6: 2104 movs r1, #4
80042b8: 4638 mov r0, r7
80042ba: f7ff ff9f bl 80041fc <__sfmoreglue>
80042be: 6030 str r0, [r6, #0]
80042c0: 2800 cmp r0, #0
80042c2: d1f1 bne.n 80042a8 <__sfp+0x20>
80042c4: 230c movs r3, #12
80042c6: 603b str r3, [r7, #0]
80042c8: 4604 mov r4, r0
80042ca: 4620 mov r0, r4
80042cc: bdf8 pop {r3, r4, r5, r6, r7, pc}
80042ce: 4b0b ldr r3, [pc, #44] ; (80042fc <__sfp+0x74>)
80042d0: 6665 str r5, [r4, #100] ; 0x64
80042d2: e9c4 5500 strd r5, r5, [r4]
80042d6: 60a5 str r5, [r4, #8]
80042d8: e9c4 3503 strd r3, r5, [r4, #12]
80042dc: e9c4 5505 strd r5, r5, [r4, #20]
80042e0: 2208 movs r2, #8
80042e2: 4629 mov r1, r5
80042e4: f104 005c add.w r0, r4, #92 ; 0x5c
80042e8: f7ff ff0a bl 8004100 <memset>
80042ec: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
80042f0: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
80042f4: e7e9 b.n 80042ca <__sfp+0x42>
80042f6: bf00 nop
80042f8: 08004f80 .word 0x08004f80
80042fc: ffff0001 .word 0xffff0001
08004300 <_fwalk_reent>:
8004300: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
8004304: 4680 mov r8, r0
8004306: 4689 mov r9, r1
8004308: f100 0448 add.w r4, r0, #72 ; 0x48
800430c: 2600 movs r6, #0
800430e: b914 cbnz r4, 8004316 <_fwalk_reent+0x16>
8004310: 4630 mov r0, r6
8004312: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
8004316: e9d4 7501 ldrd r7, r5, [r4, #4]
800431a: 3f01 subs r7, #1
800431c: d501 bpl.n 8004322 <_fwalk_reent+0x22>
800431e: 6824 ldr r4, [r4, #0]
8004320: e7f5 b.n 800430e <_fwalk_reent+0xe>
8004322: 89ab ldrh r3, [r5, #12]
8004324: 2b01 cmp r3, #1
8004326: d907 bls.n 8004338 <_fwalk_reent+0x38>
8004328: f9b5 300e ldrsh.w r3, [r5, #14]
800432c: 3301 adds r3, #1
800432e: d003 beq.n 8004338 <_fwalk_reent+0x38>
8004330: 4629 mov r1, r5
8004332: 4640 mov r0, r8
8004334: 47c8 blx r9
8004336: 4306 orrs r6, r0
8004338: 3568 adds r5, #104 ; 0x68
800433a: e7ee b.n 800431a <_fwalk_reent+0x1a>
0800433c <malloc>:
800433c: 4b02 ldr r3, [pc, #8] ; (8004348 <malloc+0xc>)
800433e: 4601 mov r1, r0
8004340: 6818 ldr r0, [r3, #0]
8004342: f000 b851 b.w 80043e8 <_malloc_r>
8004346: bf00 nop
8004348: 2000000c .word 0x2000000c
0800434c <_free_r>:
800434c: b538 push {r3, r4, r5, lr}
800434e: 4605 mov r5, r0
8004350: 2900 cmp r1, #0
8004352: d045 beq.n 80043e0 <_free_r+0x94>
8004354: f851 3c04 ldr.w r3, [r1, #-4]
8004358: 1f0c subs r4, r1, #4
800435a: 2b00 cmp r3, #0
800435c: bfb8 it lt
800435e: 18e4 addlt r4, r4, r3
8004360: f000 fdc0 bl 8004ee4 <__malloc_lock>
8004364: 4a1f ldr r2, [pc, #124] ; (80043e4 <_free_r+0x98>)
8004366: 6813 ldr r3, [r2, #0]
8004368: 4610 mov r0, r2
800436a: b933 cbnz r3, 800437a <_free_r+0x2e>
800436c: 6063 str r3, [r4, #4]
800436e: 6014 str r4, [r2, #0]
8004370: 4628 mov r0, r5
8004372: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
8004376: f000 bdb6 b.w 8004ee6 <__malloc_unlock>
800437a: 42a3 cmp r3, r4
800437c: d90c bls.n 8004398 <_free_r+0x4c>
800437e: 6821 ldr r1, [r4, #0]
8004380: 1862 adds r2, r4, r1
8004382: 4293 cmp r3, r2
8004384: bf04 itt eq
8004386: 681a ldreq r2, [r3, #0]
8004388: 685b ldreq r3, [r3, #4]
800438a: 6063 str r3, [r4, #4]
800438c: bf04 itt eq
800438e: 1852 addeq r2, r2, r1
8004390: 6022 streq r2, [r4, #0]
8004392: 6004 str r4, [r0, #0]
8004394: e7ec b.n 8004370 <_free_r+0x24>
8004396: 4613 mov r3, r2
8004398: 685a ldr r2, [r3, #4]
800439a: b10a cbz r2, 80043a0 <_free_r+0x54>
800439c: 42a2 cmp r2, r4
800439e: d9fa bls.n 8004396 <_free_r+0x4a>
80043a0: 6819 ldr r1, [r3, #0]
80043a2: 1858 adds r0, r3, r1
80043a4: 42a0 cmp r0, r4
80043a6: d10b bne.n 80043c0 <_free_r+0x74>
80043a8: 6820 ldr r0, [r4, #0]
80043aa: 4401 add r1, r0
80043ac: 1858 adds r0, r3, r1
80043ae: 4282 cmp r2, r0
80043b0: 6019 str r1, [r3, #0]
80043b2: d1dd bne.n 8004370 <_free_r+0x24>
80043b4: 6810 ldr r0, [r2, #0]
80043b6: 6852 ldr r2, [r2, #4]
80043b8: 605a str r2, [r3, #4]
80043ba: 4401 add r1, r0
80043bc: 6019 str r1, [r3, #0]
80043be: e7d7 b.n 8004370 <_free_r+0x24>
80043c0: d902 bls.n 80043c8 <_free_r+0x7c>
80043c2: 230c movs r3, #12
80043c4: 602b str r3, [r5, #0]
80043c6: e7d3 b.n 8004370 <_free_r+0x24>
80043c8: 6820 ldr r0, [r4, #0]
80043ca: 1821 adds r1, r4, r0
80043cc: 428a cmp r2, r1
80043ce: bf04 itt eq
80043d0: 6811 ldreq r1, [r2, #0]
80043d2: 6852 ldreq r2, [r2, #4]
80043d4: 6062 str r2, [r4, #4]
80043d6: bf04 itt eq
80043d8: 1809 addeq r1, r1, r0
80043da: 6021 streq r1, [r4, #0]
80043dc: 605c str r4, [r3, #4]
80043de: e7c7 b.n 8004370 <_free_r+0x24>
80043e0: bd38 pop {r3, r4, r5, pc}
80043e2: bf00 nop
80043e4: 200003ac .word 0x200003ac
080043e8 <_malloc_r>:
80043e8: b570 push {r4, r5, r6, lr}
80043ea: 1ccd adds r5, r1, #3
80043ec: f025 0503 bic.w r5, r5, #3
80043f0: 3508 adds r5, #8
80043f2: 2d0c cmp r5, #12
80043f4: bf38 it cc
80043f6: 250c movcc r5, #12
80043f8: 2d00 cmp r5, #0
80043fa: 4606 mov r6, r0
80043fc: db01 blt.n 8004402 <_malloc_r+0x1a>
80043fe: 42a9 cmp r1, r5
8004400: d903 bls.n 800440a <_malloc_r+0x22>
8004402: 230c movs r3, #12
8004404: 6033 str r3, [r6, #0]
8004406: 2000 movs r0, #0
8004408: bd70 pop {r4, r5, r6, pc}
800440a: f000 fd6b bl 8004ee4 <__malloc_lock>
800440e: 4a21 ldr r2, [pc, #132] ; (8004494 <_malloc_r+0xac>)
8004410: 6814 ldr r4, [r2, #0]
8004412: 4621 mov r1, r4
8004414: b991 cbnz r1, 800443c <_malloc_r+0x54>
8004416: 4c20 ldr r4, [pc, #128] ; (8004498 <_malloc_r+0xb0>)
8004418: 6823 ldr r3, [r4, #0]
800441a: b91b cbnz r3, 8004424 <_malloc_r+0x3c>
800441c: 4630 mov r0, r6
800441e: f000 fb05 bl 8004a2c <_sbrk_r>
8004422: 6020 str r0, [r4, #0]
8004424: 4629 mov r1, r5
8004426: 4630 mov r0, r6
8004428: f000 fb00 bl 8004a2c <_sbrk_r>
800442c: 1c43 adds r3, r0, #1
800442e: d124 bne.n 800447a <_malloc_r+0x92>
8004430: 230c movs r3, #12
8004432: 6033 str r3, [r6, #0]
8004434: 4630 mov r0, r6
8004436: f000 fd56 bl 8004ee6 <__malloc_unlock>
800443a: e7e4 b.n 8004406 <_malloc_r+0x1e>
800443c: 680b ldr r3, [r1, #0]
800443e: 1b5b subs r3, r3, r5
8004440: d418 bmi.n 8004474 <_malloc_r+0x8c>
8004442: 2b0b cmp r3, #11
8004444: d90f bls.n 8004466 <_malloc_r+0x7e>
8004446: 600b str r3, [r1, #0]
8004448: 50cd str r5, [r1, r3]
800444a: 18cc adds r4, r1, r3
800444c: 4630 mov r0, r6
800444e: f000 fd4a bl 8004ee6 <__malloc_unlock>
8004452: f104 000b add.w r0, r4, #11
8004456: 1d23 adds r3, r4, #4
8004458: f020 0007 bic.w r0, r0, #7
800445c: 1ac3 subs r3, r0, r3
800445e: d0d3 beq.n 8004408 <_malloc_r+0x20>
8004460: 425a negs r2, r3
8004462: 50e2 str r2, [r4, r3]
8004464: e7d0 b.n 8004408 <_malloc_r+0x20>
8004466: 428c cmp r4, r1
8004468: 684b ldr r3, [r1, #4]
800446a: bf16 itet ne
800446c: 6063 strne r3, [r4, #4]
800446e: 6013 streq r3, [r2, #0]
8004470: 460c movne r4, r1
8004472: e7eb b.n 800444c <_malloc_r+0x64>
8004474: 460c mov r4, r1
8004476: 6849 ldr r1, [r1, #4]
8004478: e7cc b.n 8004414 <_malloc_r+0x2c>
800447a: 1cc4 adds r4, r0, #3
800447c: f024 0403 bic.w r4, r4, #3
8004480: 42a0 cmp r0, r4
8004482: d005 beq.n 8004490 <_malloc_r+0xa8>
8004484: 1a21 subs r1, r4, r0
8004486: 4630 mov r0, r6
8004488: f000 fad0 bl 8004a2c <_sbrk_r>
800448c: 3001 adds r0, #1
800448e: d0cf beq.n 8004430 <_malloc_r+0x48>
8004490: 6025 str r5, [r4, #0]
8004492: e7db b.n 800444c <_malloc_r+0x64>
8004494: 200003ac .word 0x200003ac
8004498: 200003b0 .word 0x200003b0
0800449c <__sfputc_r>:
800449c: 6893 ldr r3, [r2, #8]
800449e: 3b01 subs r3, #1
80044a0: 2b00 cmp r3, #0
80044a2: b410 push {r4}
80044a4: 6093 str r3, [r2, #8]
80044a6: da08 bge.n 80044ba <__sfputc_r+0x1e>
80044a8: 6994 ldr r4, [r2, #24]
80044aa: 42a3 cmp r3, r4
80044ac: db01 blt.n 80044b2 <__sfputc_r+0x16>
80044ae: 290a cmp r1, #10
80044b0: d103 bne.n 80044ba <__sfputc_r+0x1e>
80044b2: f85d 4b04 ldr.w r4, [sp], #4
80044b6: f000 bb0d b.w 8004ad4 <__swbuf_r>
80044ba: 6813 ldr r3, [r2, #0]
80044bc: 1c58 adds r0, r3, #1
80044be: 6010 str r0, [r2, #0]
80044c0: 7019 strb r1, [r3, #0]
80044c2: 4608 mov r0, r1
80044c4: f85d 4b04 ldr.w r4, [sp], #4
80044c8: 4770 bx lr
080044ca <__sfputs_r>:
80044ca: b5f8 push {r3, r4, r5, r6, r7, lr}
80044cc: 4606 mov r6, r0
80044ce: 460f mov r7, r1
80044d0: 4614 mov r4, r2
80044d2: 18d5 adds r5, r2, r3
80044d4: 42ac cmp r4, r5
80044d6: d101 bne.n 80044dc <__sfputs_r+0x12>
80044d8: 2000 movs r0, #0
80044da: e007 b.n 80044ec <__sfputs_r+0x22>
80044dc: 463a mov r2, r7
80044de: f814 1b01 ldrb.w r1, [r4], #1
80044e2: 4630 mov r0, r6
80044e4: f7ff ffda bl 800449c <__sfputc_r>
80044e8: 1c43 adds r3, r0, #1
80044ea: d1f3 bne.n 80044d4 <__sfputs_r+0xa>
80044ec: bdf8 pop {r3, r4, r5, r6, r7, pc}
...
080044f0 <_vfiprintf_r>:
80044f0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
80044f4: 460c mov r4, r1
80044f6: b09d sub sp, #116 ; 0x74
80044f8: 4617 mov r7, r2
80044fa: 461d mov r5, r3
80044fc: 4606 mov r6, r0
80044fe: b118 cbz r0, 8004508 <_vfiprintf_r+0x18>
8004500: 6983 ldr r3, [r0, #24]
8004502: b90b cbnz r3, 8004508 <_vfiprintf_r+0x18>
8004504: f7ff fe90 bl 8004228 <__sinit>
8004508: 4b7c ldr r3, [pc, #496] ; (80046fc <_vfiprintf_r+0x20c>)
800450a: 429c cmp r4, r3
800450c: d158 bne.n 80045c0 <_vfiprintf_r+0xd0>
800450e: 6874 ldr r4, [r6, #4]
8004510: 89a3 ldrh r3, [r4, #12]
8004512: 0718 lsls r0, r3, #28
8004514: d55e bpl.n 80045d4 <_vfiprintf_r+0xe4>
8004516: 6923 ldr r3, [r4, #16]
8004518: 2b00 cmp r3, #0
800451a: d05b beq.n 80045d4 <_vfiprintf_r+0xe4>
800451c: 2300 movs r3, #0
800451e: 9309 str r3, [sp, #36] ; 0x24
8004520: 2320 movs r3, #32
8004522: f88d 3029 strb.w r3, [sp, #41] ; 0x29
8004526: 2330 movs r3, #48 ; 0x30
8004528: f88d 302a strb.w r3, [sp, #42] ; 0x2a
800452c: 9503 str r5, [sp, #12]
800452e: f04f 0b01 mov.w fp, #1
8004532: 46b8 mov r8, r7
8004534: 4645 mov r5, r8
8004536: f815 3b01 ldrb.w r3, [r5], #1
800453a: b10b cbz r3, 8004540 <_vfiprintf_r+0x50>
800453c: 2b25 cmp r3, #37 ; 0x25
800453e: d154 bne.n 80045ea <_vfiprintf_r+0xfa>
8004540: ebb8 0a07 subs.w sl, r8, r7
8004544: d00b beq.n 800455e <_vfiprintf_r+0x6e>
8004546: 4653 mov r3, sl
8004548: 463a mov r2, r7
800454a: 4621 mov r1, r4
800454c: 4630 mov r0, r6
800454e: f7ff ffbc bl 80044ca <__sfputs_r>
8004552: 3001 adds r0, #1
8004554: f000 80c2 beq.w 80046dc <_vfiprintf_r+0x1ec>
8004558: 9b09 ldr r3, [sp, #36] ; 0x24
800455a: 4453 add r3, sl
800455c: 9309 str r3, [sp, #36] ; 0x24
800455e: f898 3000 ldrb.w r3, [r8]
8004562: 2b00 cmp r3, #0
8004564: f000 80ba beq.w 80046dc <_vfiprintf_r+0x1ec>
8004568: 2300 movs r3, #0
800456a: f04f 32ff mov.w r2, #4294967295
800456e: e9cd 2305 strd r2, r3, [sp, #20]
8004572: 9304 str r3, [sp, #16]
8004574: 9307 str r3, [sp, #28]
8004576: f88d 3053 strb.w r3, [sp, #83] ; 0x53
800457a: 931a str r3, [sp, #104] ; 0x68
800457c: 46a8 mov r8, r5
800457e: 2205 movs r2, #5
8004580: f818 1b01 ldrb.w r1, [r8], #1
8004584: 485e ldr r0, [pc, #376] ; (8004700 <_vfiprintf_r+0x210>)
8004586: f7fb fe33 bl 80001f0 <memchr>
800458a: 9b04 ldr r3, [sp, #16]
800458c: bb78 cbnz r0, 80045ee <_vfiprintf_r+0xfe>
800458e: 06d9 lsls r1, r3, #27
8004590: bf44 itt mi
8004592: 2220 movmi r2, #32
8004594: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
8004598: 071a lsls r2, r3, #28
800459a: bf44 itt mi
800459c: 222b movmi r2, #43 ; 0x2b
800459e: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
80045a2: 782a ldrb r2, [r5, #0]
80045a4: 2a2a cmp r2, #42 ; 0x2a
80045a6: d02a beq.n 80045fe <_vfiprintf_r+0x10e>
80045a8: 9a07 ldr r2, [sp, #28]
80045aa: 46a8 mov r8, r5
80045ac: 2000 movs r0, #0
80045ae: 250a movs r5, #10
80045b0: 4641 mov r1, r8
80045b2: f811 3b01 ldrb.w r3, [r1], #1
80045b6: 3b30 subs r3, #48 ; 0x30
80045b8: 2b09 cmp r3, #9
80045ba: d969 bls.n 8004690 <_vfiprintf_r+0x1a0>
80045bc: b360 cbz r0, 8004618 <_vfiprintf_r+0x128>
80045be: e024 b.n 800460a <_vfiprintf_r+0x11a>
80045c0: 4b50 ldr r3, [pc, #320] ; (8004704 <_vfiprintf_r+0x214>)
80045c2: 429c cmp r4, r3
80045c4: d101 bne.n 80045ca <_vfiprintf_r+0xda>
80045c6: 68b4 ldr r4, [r6, #8]
80045c8: e7a2 b.n 8004510 <_vfiprintf_r+0x20>
80045ca: 4b4f ldr r3, [pc, #316] ; (8004708 <_vfiprintf_r+0x218>)
80045cc: 429c cmp r4, r3
80045ce: bf08 it eq
80045d0: 68f4 ldreq r4, [r6, #12]
80045d2: e79d b.n 8004510 <_vfiprintf_r+0x20>
80045d4: 4621 mov r1, r4
80045d6: 4630 mov r0, r6
80045d8: f000 fae0 bl 8004b9c <__swsetup_r>
80045dc: 2800 cmp r0, #0
80045de: d09d beq.n 800451c <_vfiprintf_r+0x2c>
80045e0: f04f 30ff mov.w r0, #4294967295
80045e4: b01d add sp, #116 ; 0x74
80045e6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
80045ea: 46a8 mov r8, r5
80045ec: e7a2 b.n 8004534 <_vfiprintf_r+0x44>
80045ee: 4a44 ldr r2, [pc, #272] ; (8004700 <_vfiprintf_r+0x210>)
80045f0: 1a80 subs r0, r0, r2
80045f2: fa0b f000 lsl.w r0, fp, r0
80045f6: 4318 orrs r0, r3
80045f8: 9004 str r0, [sp, #16]
80045fa: 4645 mov r5, r8
80045fc: e7be b.n 800457c <_vfiprintf_r+0x8c>
80045fe: 9a03 ldr r2, [sp, #12]
8004600: 1d11 adds r1, r2, #4
8004602: 6812 ldr r2, [r2, #0]
8004604: 9103 str r1, [sp, #12]
8004606: 2a00 cmp r2, #0
8004608: db01 blt.n 800460e <_vfiprintf_r+0x11e>
800460a: 9207 str r2, [sp, #28]
800460c: e004 b.n 8004618 <_vfiprintf_r+0x128>
800460e: 4252 negs r2, r2
8004610: f043 0302 orr.w r3, r3, #2
8004614: 9207 str r2, [sp, #28]
8004616: 9304 str r3, [sp, #16]
8004618: f898 3000 ldrb.w r3, [r8]
800461c: 2b2e cmp r3, #46 ; 0x2e
800461e: d10e bne.n 800463e <_vfiprintf_r+0x14e>
8004620: f898 3001 ldrb.w r3, [r8, #1]
8004624: 2b2a cmp r3, #42 ; 0x2a
8004626: d138 bne.n 800469a <_vfiprintf_r+0x1aa>
8004628: 9b03 ldr r3, [sp, #12]
800462a: 1d1a adds r2, r3, #4
800462c: 681b ldr r3, [r3, #0]
800462e: 9203 str r2, [sp, #12]
8004630: 2b00 cmp r3, #0
8004632: bfb8 it lt
8004634: f04f 33ff movlt.w r3, #4294967295
8004638: f108 0802 add.w r8, r8, #2
800463c: 9305 str r3, [sp, #20]
800463e: 4d33 ldr r5, [pc, #204] ; (800470c <_vfiprintf_r+0x21c>)
8004640: f898 1000 ldrb.w r1, [r8]
8004644: 2203 movs r2, #3
8004646: 4628 mov r0, r5
8004648: f7fb fdd2 bl 80001f0 <memchr>
800464c: b140 cbz r0, 8004660 <_vfiprintf_r+0x170>
800464e: 2340 movs r3, #64 ; 0x40
8004650: 1b40 subs r0, r0, r5
8004652: fa03 f000 lsl.w r0, r3, r0
8004656: 9b04 ldr r3, [sp, #16]
8004658: 4303 orrs r3, r0
800465a: f108 0801 add.w r8, r8, #1
800465e: 9304 str r3, [sp, #16]
8004660: f898 1000 ldrb.w r1, [r8]
8004664: 482a ldr r0, [pc, #168] ; (8004710 <_vfiprintf_r+0x220>)
8004666: f88d 1028 strb.w r1, [sp, #40] ; 0x28
800466a: 2206 movs r2, #6
800466c: f108 0701 add.w r7, r8, #1
8004670: f7fb fdbe bl 80001f0 <memchr>
8004674: 2800 cmp r0, #0
8004676: d037 beq.n 80046e8 <_vfiprintf_r+0x1f8>
8004678: 4b26 ldr r3, [pc, #152] ; (8004714 <_vfiprintf_r+0x224>)
800467a: bb1b cbnz r3, 80046c4 <_vfiprintf_r+0x1d4>
800467c: 9b03 ldr r3, [sp, #12]
800467e: 3307 adds r3, #7
8004680: f023 0307 bic.w r3, r3, #7
8004684: 3308 adds r3, #8
8004686: 9303 str r3, [sp, #12]
8004688: 9b09 ldr r3, [sp, #36] ; 0x24
800468a: 444b add r3, r9
800468c: 9309 str r3, [sp, #36] ; 0x24
800468e: e750 b.n 8004532 <_vfiprintf_r+0x42>
8004690: fb05 3202 mla r2, r5, r2, r3
8004694: 2001 movs r0, #1
8004696: 4688 mov r8, r1
8004698: e78a b.n 80045b0 <_vfiprintf_r+0xc0>
800469a: 2300 movs r3, #0
800469c: f108 0801 add.w r8, r8, #1
80046a0: 9305 str r3, [sp, #20]
80046a2: 4619 mov r1, r3
80046a4: 250a movs r5, #10
80046a6: 4640 mov r0, r8
80046a8: f810 2b01 ldrb.w r2, [r0], #1
80046ac: 3a30 subs r2, #48 ; 0x30
80046ae: 2a09 cmp r2, #9
80046b0: d903 bls.n 80046ba <_vfiprintf_r+0x1ca>
80046b2: 2b00 cmp r3, #0
80046b4: d0c3 beq.n 800463e <_vfiprintf_r+0x14e>
80046b6: 9105 str r1, [sp, #20]
80046b8: e7c1 b.n 800463e <_vfiprintf_r+0x14e>
80046ba: fb05 2101 mla r1, r5, r1, r2
80046be: 2301 movs r3, #1
80046c0: 4680 mov r8, r0
80046c2: e7f0 b.n 80046a6 <_vfiprintf_r+0x1b6>
80046c4: ab03 add r3, sp, #12
80046c6: 9300 str r3, [sp, #0]
80046c8: 4622 mov r2, r4
80046ca: 4b13 ldr r3, [pc, #76] ; (8004718 <_vfiprintf_r+0x228>)
80046cc: a904 add r1, sp, #16
80046ce: 4630 mov r0, r6
80046d0: f3af 8000 nop.w
80046d4: f1b0 3fff cmp.w r0, #4294967295
80046d8: 4681 mov r9, r0
80046da: d1d5 bne.n 8004688 <_vfiprintf_r+0x198>
80046dc: 89a3 ldrh r3, [r4, #12]
80046de: 065b lsls r3, r3, #25
80046e0: f53f af7e bmi.w 80045e0 <_vfiprintf_r+0xf0>
80046e4: 9809 ldr r0, [sp, #36] ; 0x24
80046e6: e77d b.n 80045e4 <_vfiprintf_r+0xf4>
80046e8: ab03 add r3, sp, #12
80046ea: 9300 str r3, [sp, #0]
80046ec: 4622 mov r2, r4
80046ee: 4b0a ldr r3, [pc, #40] ; (8004718 <_vfiprintf_r+0x228>)
80046f0: a904 add r1, sp, #16
80046f2: 4630 mov r0, r6
80046f4: f000 f888 bl 8004808 <_printf_i>
80046f8: e7ec b.n 80046d4 <_vfiprintf_r+0x1e4>
80046fa: bf00 nop
80046fc: 08004fa4 .word 0x08004fa4
8004700: 08004fe4 .word 0x08004fe4
8004704: 08004fc4 .word 0x08004fc4
8004708: 08004f84 .word 0x08004f84
800470c: 08004fea .word 0x08004fea
8004710: 08004fee .word 0x08004fee
8004714: 00000000 .word 0x00000000
8004718: 080044cb .word 0x080044cb
0800471c <_printf_common>:
800471c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8004720: 4691 mov r9, r2
8004722: 461f mov r7, r3
8004724: 688a ldr r2, [r1, #8]
8004726: 690b ldr r3, [r1, #16]
8004728: f8dd 8020 ldr.w r8, [sp, #32]
800472c: 4293 cmp r3, r2
800472e: bfb8 it lt
8004730: 4613 movlt r3, r2
8004732: f8c9 3000 str.w r3, [r9]
8004736: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
800473a: 4606 mov r6, r0
800473c: 460c mov r4, r1
800473e: b112 cbz r2, 8004746 <_printf_common+0x2a>
8004740: 3301 adds r3, #1
8004742: f8c9 3000 str.w r3, [r9]
8004746: 6823 ldr r3, [r4, #0]
8004748: 0699 lsls r1, r3, #26
800474a: bf42 ittt mi
800474c: f8d9 3000 ldrmi.w r3, [r9]
8004750: 3302 addmi r3, #2
8004752: f8c9 3000 strmi.w r3, [r9]
8004756: 6825 ldr r5, [r4, #0]
8004758: f015 0506 ands.w r5, r5, #6
800475c: d107 bne.n 800476e <_printf_common+0x52>
800475e: f104 0a19 add.w sl, r4, #25
8004762: 68e3 ldr r3, [r4, #12]
8004764: f8d9 2000 ldr.w r2, [r9]
8004768: 1a9b subs r3, r3, r2
800476a: 42ab cmp r3, r5
800476c: dc28 bgt.n 80047c0 <_printf_common+0xa4>
800476e: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
8004772: 6822 ldr r2, [r4, #0]
8004774: 3300 adds r3, #0
8004776: bf18 it ne
8004778: 2301 movne r3, #1
800477a: 0692 lsls r2, r2, #26
800477c: d42d bmi.n 80047da <_printf_common+0xbe>
800477e: f104 0243 add.w r2, r4, #67 ; 0x43
8004782: 4639 mov r1, r7
8004784: 4630 mov r0, r6
8004786: 47c0 blx r8
8004788: 3001 adds r0, #1
800478a: d020 beq.n 80047ce <_printf_common+0xb2>
800478c: 6823 ldr r3, [r4, #0]
800478e: 68e5 ldr r5, [r4, #12]
8004790: f8d9 2000 ldr.w r2, [r9]
8004794: f003 0306 and.w r3, r3, #6
8004798: 2b04 cmp r3, #4
800479a: bf08 it eq
800479c: 1aad subeq r5, r5, r2
800479e: 68a3 ldr r3, [r4, #8]
80047a0: 6922 ldr r2, [r4, #16]
80047a2: bf0c ite eq
80047a4: ea25 75e5 biceq.w r5, r5, r5, asr #31
80047a8: 2500 movne r5, #0
80047aa: 4293 cmp r3, r2
80047ac: bfc4 itt gt
80047ae: 1a9b subgt r3, r3, r2
80047b0: 18ed addgt r5, r5, r3
80047b2: f04f 0900 mov.w r9, #0
80047b6: 341a adds r4, #26
80047b8: 454d cmp r5, r9
80047ba: d11a bne.n 80047f2 <_printf_common+0xd6>
80047bc: 2000 movs r0, #0
80047be: e008 b.n 80047d2 <_printf_common+0xb6>
80047c0: 2301 movs r3, #1
80047c2: 4652 mov r2, sl
80047c4: 4639 mov r1, r7
80047c6: 4630 mov r0, r6
80047c8: 47c0 blx r8
80047ca: 3001 adds r0, #1
80047cc: d103 bne.n 80047d6 <_printf_common+0xba>
80047ce: f04f 30ff mov.w r0, #4294967295
80047d2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80047d6: 3501 adds r5, #1
80047d8: e7c3 b.n 8004762 <_printf_common+0x46>
80047da: 18e1 adds r1, r4, r3
80047dc: 1c5a adds r2, r3, #1
80047de: 2030 movs r0, #48 ; 0x30
80047e0: f881 0043 strb.w r0, [r1, #67] ; 0x43
80047e4: 4422 add r2, r4
80047e6: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
80047ea: f882 1043 strb.w r1, [r2, #67] ; 0x43
80047ee: 3302 adds r3, #2
80047f0: e7c5 b.n 800477e <_printf_common+0x62>
80047f2: 2301 movs r3, #1
80047f4: 4622 mov r2, r4
80047f6: 4639 mov r1, r7
80047f8: 4630 mov r0, r6
80047fa: 47c0 blx r8
80047fc: 3001 adds r0, #1
80047fe: d0e6 beq.n 80047ce <_printf_common+0xb2>
8004800: f109 0901 add.w r9, r9, #1
8004804: e7d8 b.n 80047b8 <_printf_common+0x9c>
...
08004808 <_printf_i>:
8004808: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
800480c: f101 0c43 add.w ip, r1, #67 ; 0x43
8004810: 460c mov r4, r1
8004812: 7e09 ldrb r1, [r1, #24]
8004814: b085 sub sp, #20
8004816: 296e cmp r1, #110 ; 0x6e
8004818: 4617 mov r7, r2
800481a: 4606 mov r6, r0
800481c: 4698 mov r8, r3
800481e: 9a0c ldr r2, [sp, #48] ; 0x30
8004820: f000 80b3 beq.w 800498a <_printf_i+0x182>
8004824: d822 bhi.n 800486c <_printf_i+0x64>
8004826: 2963 cmp r1, #99 ; 0x63
8004828: d036 beq.n 8004898 <_printf_i+0x90>
800482a: d80a bhi.n 8004842 <_printf_i+0x3a>
800482c: 2900 cmp r1, #0
800482e: f000 80b9 beq.w 80049a4 <_printf_i+0x19c>
8004832: 2958 cmp r1, #88 ; 0x58
8004834: f000 8083 beq.w 800493e <_printf_i+0x136>
8004838: f104 0542 add.w r5, r4, #66 ; 0x42
800483c: f884 1042 strb.w r1, [r4, #66] ; 0x42
8004840: e032 b.n 80048a8 <_printf_i+0xa0>
8004842: 2964 cmp r1, #100 ; 0x64
8004844: d001 beq.n 800484a <_printf_i+0x42>
8004846: 2969 cmp r1, #105 ; 0x69
8004848: d1f6 bne.n 8004838 <_printf_i+0x30>
800484a: 6820 ldr r0, [r4, #0]
800484c: 6813 ldr r3, [r2, #0]
800484e: 0605 lsls r5, r0, #24
8004850: f103 0104 add.w r1, r3, #4
8004854: d52a bpl.n 80048ac <_printf_i+0xa4>
8004856: 681b ldr r3, [r3, #0]
8004858: 6011 str r1, [r2, #0]
800485a: 2b00 cmp r3, #0
800485c: da03 bge.n 8004866 <_printf_i+0x5e>
800485e: 222d movs r2, #45 ; 0x2d
8004860: 425b negs r3, r3
8004862: f884 2043 strb.w r2, [r4, #67] ; 0x43
8004866: 486f ldr r0, [pc, #444] ; (8004a24 <_printf_i+0x21c>)
8004868: 220a movs r2, #10
800486a: e039 b.n 80048e0 <_printf_i+0xd8>
800486c: 2973 cmp r1, #115 ; 0x73
800486e: f000 809d beq.w 80049ac <_printf_i+0x1a4>
8004872: d808 bhi.n 8004886 <_printf_i+0x7e>
8004874: 296f cmp r1, #111 ; 0x6f
8004876: d020 beq.n 80048ba <_printf_i+0xb2>
8004878: 2970 cmp r1, #112 ; 0x70
800487a: d1dd bne.n 8004838 <_printf_i+0x30>
800487c: 6823 ldr r3, [r4, #0]
800487e: f043 0320 orr.w r3, r3, #32
8004882: 6023 str r3, [r4, #0]
8004884: e003 b.n 800488e <_printf_i+0x86>
8004886: 2975 cmp r1, #117 ; 0x75
8004888: d017 beq.n 80048ba <_printf_i+0xb2>
800488a: 2978 cmp r1, #120 ; 0x78
800488c: d1d4 bne.n 8004838 <_printf_i+0x30>
800488e: 2378 movs r3, #120 ; 0x78
8004890: f884 3045 strb.w r3, [r4, #69] ; 0x45
8004894: 4864 ldr r0, [pc, #400] ; (8004a28 <_printf_i+0x220>)
8004896: e055 b.n 8004944 <_printf_i+0x13c>
8004898: 6813 ldr r3, [r2, #0]
800489a: 1d19 adds r1, r3, #4
800489c: 681b ldr r3, [r3, #0]
800489e: 6011 str r1, [r2, #0]
80048a0: f104 0542 add.w r5, r4, #66 ; 0x42
80048a4: f884 3042 strb.w r3, [r4, #66] ; 0x42
80048a8: 2301 movs r3, #1
80048aa: e08c b.n 80049c6 <_printf_i+0x1be>
80048ac: 681b ldr r3, [r3, #0]
80048ae: 6011 str r1, [r2, #0]
80048b0: f010 0f40 tst.w r0, #64 ; 0x40
80048b4: bf18 it ne
80048b6: b21b sxthne r3, r3
80048b8: e7cf b.n 800485a <_printf_i+0x52>
80048ba: 6813 ldr r3, [r2, #0]
80048bc: 6825 ldr r5, [r4, #0]
80048be: 1d18 adds r0, r3, #4
80048c0: 6010 str r0, [r2, #0]
80048c2: 0628 lsls r0, r5, #24
80048c4: d501 bpl.n 80048ca <_printf_i+0xc2>
80048c6: 681b ldr r3, [r3, #0]
80048c8: e002 b.n 80048d0 <_printf_i+0xc8>
80048ca: 0668 lsls r0, r5, #25
80048cc: d5fb bpl.n 80048c6 <_printf_i+0xbe>
80048ce: 881b ldrh r3, [r3, #0]
80048d0: 4854 ldr r0, [pc, #336] ; (8004a24 <_printf_i+0x21c>)
80048d2: 296f cmp r1, #111 ; 0x6f
80048d4: bf14 ite ne
80048d6: 220a movne r2, #10
80048d8: 2208 moveq r2, #8
80048da: 2100 movs r1, #0
80048dc: f884 1043 strb.w r1, [r4, #67] ; 0x43
80048e0: 6865 ldr r5, [r4, #4]
80048e2: 60a5 str r5, [r4, #8]
80048e4: 2d00 cmp r5, #0
80048e6: f2c0 8095 blt.w 8004a14 <_printf_i+0x20c>
80048ea: 6821 ldr r1, [r4, #0]
80048ec: f021 0104 bic.w r1, r1, #4
80048f0: 6021 str r1, [r4, #0]
80048f2: 2b00 cmp r3, #0
80048f4: d13d bne.n 8004972 <_printf_i+0x16a>
80048f6: 2d00 cmp r5, #0
80048f8: f040 808e bne.w 8004a18 <_printf_i+0x210>
80048fc: 4665 mov r5, ip
80048fe: 2a08 cmp r2, #8
8004900: d10b bne.n 800491a <_printf_i+0x112>
8004902: 6823 ldr r3, [r4, #0]
8004904: 07db lsls r3, r3, #31
8004906: d508 bpl.n 800491a <_printf_i+0x112>
8004908: 6923 ldr r3, [r4, #16]
800490a: 6862 ldr r2, [r4, #4]
800490c: 429a cmp r2, r3
800490e: bfde ittt le
8004910: 2330 movle r3, #48 ; 0x30
8004912: f805 3c01 strble.w r3, [r5, #-1]
8004916: f105 35ff addle.w r5, r5, #4294967295
800491a: ebac 0305 sub.w r3, ip, r5
800491e: 6123 str r3, [r4, #16]
8004920: f8cd 8000 str.w r8, [sp]
8004924: 463b mov r3, r7
8004926: aa03 add r2, sp, #12
8004928: 4621 mov r1, r4
800492a: 4630 mov r0, r6
800492c: f7ff fef6 bl 800471c <_printf_common>
8004930: 3001 adds r0, #1
8004932: d14d bne.n 80049d0 <_printf_i+0x1c8>
8004934: f04f 30ff mov.w r0, #4294967295
8004938: b005 add sp, #20
800493a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
800493e: 4839 ldr r0, [pc, #228] ; (8004a24 <_printf_i+0x21c>)
8004940: f884 1045 strb.w r1, [r4, #69] ; 0x45
8004944: 6813 ldr r3, [r2, #0]
8004946: 6821 ldr r1, [r4, #0]
8004948: 1d1d adds r5, r3, #4
800494a: 681b ldr r3, [r3, #0]
800494c: 6015 str r5, [r2, #0]
800494e: 060a lsls r2, r1, #24
8004950: d50b bpl.n 800496a <_printf_i+0x162>
8004952: 07ca lsls r2, r1, #31
8004954: bf44 itt mi
8004956: f041 0120 orrmi.w r1, r1, #32
800495a: 6021 strmi r1, [r4, #0]
800495c: b91b cbnz r3, 8004966 <_printf_i+0x15e>
800495e: 6822 ldr r2, [r4, #0]
8004960: f022 0220 bic.w r2, r2, #32
8004964: 6022 str r2, [r4, #0]
8004966: 2210 movs r2, #16
8004968: e7b7 b.n 80048da <_printf_i+0xd2>
800496a: 064d lsls r5, r1, #25
800496c: bf48 it mi
800496e: b29b uxthmi r3, r3
8004970: e7ef b.n 8004952 <_printf_i+0x14a>
8004972: 4665 mov r5, ip
8004974: fbb3 f1f2 udiv r1, r3, r2
8004978: fb02 3311 mls r3, r2, r1, r3
800497c: 5cc3 ldrb r3, [r0, r3]
800497e: f805 3d01 strb.w r3, [r5, #-1]!
8004982: 460b mov r3, r1
8004984: 2900 cmp r1, #0
8004986: d1f5 bne.n 8004974 <_printf_i+0x16c>
8004988: e7b9 b.n 80048fe <_printf_i+0xf6>
800498a: 6813 ldr r3, [r2, #0]
800498c: 6825 ldr r5, [r4, #0]
800498e: 6961 ldr r1, [r4, #20]
8004990: 1d18 adds r0, r3, #4
8004992: 6010 str r0, [r2, #0]
8004994: 0628 lsls r0, r5, #24
8004996: 681b ldr r3, [r3, #0]
8004998: d501 bpl.n 800499e <_printf_i+0x196>
800499a: 6019 str r1, [r3, #0]
800499c: e002 b.n 80049a4 <_printf_i+0x19c>
800499e: 066a lsls r2, r5, #25
80049a0: d5fb bpl.n 800499a <_printf_i+0x192>
80049a2: 8019 strh r1, [r3, #0]
80049a4: 2300 movs r3, #0
80049a6: 6123 str r3, [r4, #16]
80049a8: 4665 mov r5, ip
80049aa: e7b9 b.n 8004920 <_printf_i+0x118>
80049ac: 6813 ldr r3, [r2, #0]
80049ae: 1d19 adds r1, r3, #4
80049b0: 6011 str r1, [r2, #0]
80049b2: 681d ldr r5, [r3, #0]
80049b4: 6862 ldr r2, [r4, #4]
80049b6: 2100 movs r1, #0
80049b8: 4628 mov r0, r5
80049ba: f7fb fc19 bl 80001f0 <memchr>
80049be: b108 cbz r0, 80049c4 <_printf_i+0x1bc>
80049c0: 1b40 subs r0, r0, r5
80049c2: 6060 str r0, [r4, #4]
80049c4: 6863 ldr r3, [r4, #4]
80049c6: 6123 str r3, [r4, #16]
80049c8: 2300 movs r3, #0
80049ca: f884 3043 strb.w r3, [r4, #67] ; 0x43
80049ce: e7a7 b.n 8004920 <_printf_i+0x118>
80049d0: 6923 ldr r3, [r4, #16]
80049d2: 462a mov r2, r5
80049d4: 4639 mov r1, r7
80049d6: 4630 mov r0, r6
80049d8: 47c0 blx r8
80049da: 3001 adds r0, #1
80049dc: d0aa beq.n 8004934 <_printf_i+0x12c>
80049de: 6823 ldr r3, [r4, #0]
80049e0: 079b lsls r3, r3, #30
80049e2: d413 bmi.n 8004a0c <_printf_i+0x204>
80049e4: 68e0 ldr r0, [r4, #12]
80049e6: 9b03 ldr r3, [sp, #12]
80049e8: 4298 cmp r0, r3
80049ea: bfb8 it lt
80049ec: 4618 movlt r0, r3
80049ee: e7a3 b.n 8004938 <_printf_i+0x130>
80049f0: 2301 movs r3, #1
80049f2: 464a mov r2, r9
80049f4: 4639 mov r1, r7
80049f6: 4630 mov r0, r6
80049f8: 47c0 blx r8
80049fa: 3001 adds r0, #1
80049fc: d09a beq.n 8004934 <_printf_i+0x12c>
80049fe: 3501 adds r5, #1
8004a00: 68e3 ldr r3, [r4, #12]
8004a02: 9a03 ldr r2, [sp, #12]
8004a04: 1a9b subs r3, r3, r2
8004a06: 42ab cmp r3, r5
8004a08: dcf2 bgt.n 80049f0 <_printf_i+0x1e8>
8004a0a: e7eb b.n 80049e4 <_printf_i+0x1dc>
8004a0c: 2500 movs r5, #0
8004a0e: f104 0919 add.w r9, r4, #25
8004a12: e7f5 b.n 8004a00 <_printf_i+0x1f8>
8004a14: 2b00 cmp r3, #0
8004a16: d1ac bne.n 8004972 <_printf_i+0x16a>
8004a18: 7803 ldrb r3, [r0, #0]
8004a1a: f884 3042 strb.w r3, [r4, #66] ; 0x42
8004a1e: f104 0542 add.w r5, r4, #66 ; 0x42
8004a22: e76c b.n 80048fe <_printf_i+0xf6>
8004a24: 08004ff5 .word 0x08004ff5
8004a28: 08005006 .word 0x08005006
08004a2c <_sbrk_r>:
8004a2c: b538 push {r3, r4, r5, lr}
8004a2e: 4c06 ldr r4, [pc, #24] ; (8004a48 <_sbrk_r+0x1c>)
8004a30: 2300 movs r3, #0
8004a32: 4605 mov r5, r0
8004a34: 4608 mov r0, r1
8004a36: 6023 str r3, [r4, #0]
8004a38: f7fd fa10 bl 8001e5c <_sbrk>
8004a3c: 1c43 adds r3, r0, #1
8004a3e: d102 bne.n 8004a46 <_sbrk_r+0x1a>
8004a40: 6823 ldr r3, [r4, #0]
8004a42: b103 cbz r3, 8004a46 <_sbrk_r+0x1a>
8004a44: 602b str r3, [r5, #0]
8004a46: bd38 pop {r3, r4, r5, pc}
8004a48: 20000498 .word 0x20000498
08004a4c <__sread>:
8004a4c: b510 push {r4, lr}
8004a4e: 460c mov r4, r1
8004a50: f9b1 100e ldrsh.w r1, [r1, #14]
8004a54: f000 fa48 bl 8004ee8 <_read_r>
8004a58: 2800 cmp r0, #0
8004a5a: bfab itete ge
8004a5c: 6d63 ldrge r3, [r4, #84] ; 0x54
8004a5e: 89a3 ldrhlt r3, [r4, #12]
8004a60: 181b addge r3, r3, r0
8004a62: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
8004a66: bfac ite ge
8004a68: 6563 strge r3, [r4, #84] ; 0x54
8004a6a: 81a3 strhlt r3, [r4, #12]
8004a6c: bd10 pop {r4, pc}
08004a6e <__swrite>:
8004a6e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
8004a72: 461f mov r7, r3
8004a74: 898b ldrh r3, [r1, #12]
8004a76: 05db lsls r3, r3, #23
8004a78: 4605 mov r5, r0
8004a7a: 460c mov r4, r1
8004a7c: 4616 mov r6, r2
8004a7e: d505 bpl.n 8004a8c <__swrite+0x1e>
8004a80: 2302 movs r3, #2
8004a82: 2200 movs r2, #0
8004a84: f9b1 100e ldrsh.w r1, [r1, #14]
8004a88: f000 f9b6 bl 8004df8 <_lseek_r>
8004a8c: 89a3 ldrh r3, [r4, #12]
8004a8e: f9b4 100e ldrsh.w r1, [r4, #14]
8004a92: f423 5380 bic.w r3, r3, #4096 ; 0x1000
8004a96: 81a3 strh r3, [r4, #12]
8004a98: 4632 mov r2, r6
8004a9a: 463b mov r3, r7
8004a9c: 4628 mov r0, r5
8004a9e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
8004aa2: f000 b869 b.w 8004b78 <_write_r>
08004aa6 <__sseek>:
8004aa6: b510 push {r4, lr}
8004aa8: 460c mov r4, r1
8004aaa: f9b1 100e ldrsh.w r1, [r1, #14]
8004aae: f000 f9a3 bl 8004df8 <_lseek_r>
8004ab2: 1c43 adds r3, r0, #1
8004ab4: 89a3 ldrh r3, [r4, #12]
8004ab6: bf15 itete ne
8004ab8: 6560 strne r0, [r4, #84] ; 0x54
8004aba: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
8004abe: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
8004ac2: 81a3 strheq r3, [r4, #12]
8004ac4: bf18 it ne
8004ac6: 81a3 strhne r3, [r4, #12]
8004ac8: bd10 pop {r4, pc}
08004aca <__sclose>:
8004aca: f9b1 100e ldrsh.w r1, [r1, #14]
8004ace: f000 b8d3 b.w 8004c78 <_close_r>
...
08004ad4 <__swbuf_r>:
8004ad4: b5f8 push {r3, r4, r5, r6, r7, lr}
8004ad6: 460e mov r6, r1
8004ad8: 4614 mov r4, r2
8004ada: 4605 mov r5, r0
8004adc: b118 cbz r0, 8004ae6 <__swbuf_r+0x12>
8004ade: 6983 ldr r3, [r0, #24]
8004ae0: b90b cbnz r3, 8004ae6 <__swbuf_r+0x12>
8004ae2: f7ff fba1 bl 8004228 <__sinit>
8004ae6: 4b21 ldr r3, [pc, #132] ; (8004b6c <__swbuf_r+0x98>)
8004ae8: 429c cmp r4, r3
8004aea: d12a bne.n 8004b42 <__swbuf_r+0x6e>
8004aec: 686c ldr r4, [r5, #4]
8004aee: 69a3 ldr r3, [r4, #24]
8004af0: 60a3 str r3, [r4, #8]
8004af2: 89a3 ldrh r3, [r4, #12]
8004af4: 071a lsls r2, r3, #28
8004af6: d52e bpl.n 8004b56 <__swbuf_r+0x82>
8004af8: 6923 ldr r3, [r4, #16]
8004afa: b363 cbz r3, 8004b56 <__swbuf_r+0x82>
8004afc: 6923 ldr r3, [r4, #16]
8004afe: 6820 ldr r0, [r4, #0]
8004b00: 1ac0 subs r0, r0, r3
8004b02: 6963 ldr r3, [r4, #20]
8004b04: b2f6 uxtb r6, r6
8004b06: 4283 cmp r3, r0
8004b08: 4637 mov r7, r6
8004b0a: dc04 bgt.n 8004b16 <__swbuf_r+0x42>
8004b0c: 4621 mov r1, r4
8004b0e: 4628 mov r0, r5
8004b10: f000 f948 bl 8004da4 <_fflush_r>
8004b14: bb28 cbnz r0, 8004b62 <__swbuf_r+0x8e>
8004b16: 68a3 ldr r3, [r4, #8]
8004b18: 3b01 subs r3, #1
8004b1a: 60a3 str r3, [r4, #8]
8004b1c: 6823 ldr r3, [r4, #0]
8004b1e: 1c5a adds r2, r3, #1
8004b20: 6022 str r2, [r4, #0]
8004b22: 701e strb r6, [r3, #0]
8004b24: 6963 ldr r3, [r4, #20]
8004b26: 3001 adds r0, #1
8004b28: 4283 cmp r3, r0
8004b2a: d004 beq.n 8004b36 <__swbuf_r+0x62>
8004b2c: 89a3 ldrh r3, [r4, #12]
8004b2e: 07db lsls r3, r3, #31
8004b30: d519 bpl.n 8004b66 <__swbuf_r+0x92>
8004b32: 2e0a cmp r6, #10
8004b34: d117 bne.n 8004b66 <__swbuf_r+0x92>
8004b36: 4621 mov r1, r4
8004b38: 4628 mov r0, r5
8004b3a: f000 f933 bl 8004da4 <_fflush_r>
8004b3e: b190 cbz r0, 8004b66 <__swbuf_r+0x92>
8004b40: e00f b.n 8004b62 <__swbuf_r+0x8e>
8004b42: 4b0b ldr r3, [pc, #44] ; (8004b70 <__swbuf_r+0x9c>)
8004b44: 429c cmp r4, r3
8004b46: d101 bne.n 8004b4c <__swbuf_r+0x78>
8004b48: 68ac ldr r4, [r5, #8]
8004b4a: e7d0 b.n 8004aee <__swbuf_r+0x1a>
8004b4c: 4b09 ldr r3, [pc, #36] ; (8004b74 <__swbuf_r+0xa0>)
8004b4e: 429c cmp r4, r3
8004b50: bf08 it eq
8004b52: 68ec ldreq r4, [r5, #12]
8004b54: e7cb b.n 8004aee <__swbuf_r+0x1a>
8004b56: 4621 mov r1, r4
8004b58: 4628 mov r0, r5
8004b5a: f000 f81f bl 8004b9c <__swsetup_r>
8004b5e: 2800 cmp r0, #0
8004b60: d0cc beq.n 8004afc <__swbuf_r+0x28>
8004b62: f04f 37ff mov.w r7, #4294967295
8004b66: 4638 mov r0, r7
8004b68: bdf8 pop {r3, r4, r5, r6, r7, pc}
8004b6a: bf00 nop
8004b6c: 08004fa4 .word 0x08004fa4
8004b70: 08004fc4 .word 0x08004fc4
8004b74: 08004f84 .word 0x08004f84
08004b78 <_write_r>:
8004b78: b538 push {r3, r4, r5, lr}
8004b7a: 4c07 ldr r4, [pc, #28] ; (8004b98 <_write_r+0x20>)
8004b7c: 4605 mov r5, r0
8004b7e: 4608 mov r0, r1
8004b80: 4611 mov r1, r2
8004b82: 2200 movs r2, #0
8004b84: 6022 str r2, [r4, #0]
8004b86: 461a mov r2, r3
8004b88: f7fb fd29 bl 80005de <_write>
8004b8c: 1c43 adds r3, r0, #1
8004b8e: d102 bne.n 8004b96 <_write_r+0x1e>
8004b90: 6823 ldr r3, [r4, #0]
8004b92: b103 cbz r3, 8004b96 <_write_r+0x1e>
8004b94: 602b str r3, [r5, #0]
8004b96: bd38 pop {r3, r4, r5, pc}
8004b98: 20000498 .word 0x20000498
08004b9c <__swsetup_r>:
8004b9c: 4b32 ldr r3, [pc, #200] ; (8004c68 <__swsetup_r+0xcc>)
8004b9e: b570 push {r4, r5, r6, lr}
8004ba0: 681d ldr r5, [r3, #0]
8004ba2: 4606 mov r6, r0
8004ba4: 460c mov r4, r1
8004ba6: b125 cbz r5, 8004bb2 <__swsetup_r+0x16>
8004ba8: 69ab ldr r3, [r5, #24]
8004baa: b913 cbnz r3, 8004bb2 <__swsetup_r+0x16>
8004bac: 4628 mov r0, r5
8004bae: f7ff fb3b bl 8004228 <__sinit>
8004bb2: 4b2e ldr r3, [pc, #184] ; (8004c6c <__swsetup_r+0xd0>)
8004bb4: 429c cmp r4, r3
8004bb6: d10f bne.n 8004bd8 <__swsetup_r+0x3c>
8004bb8: 686c ldr r4, [r5, #4]
8004bba: f9b4 300c ldrsh.w r3, [r4, #12]
8004bbe: b29a uxth r2, r3
8004bc0: 0715 lsls r5, r2, #28
8004bc2: d42c bmi.n 8004c1e <__swsetup_r+0x82>
8004bc4: 06d0 lsls r0, r2, #27
8004bc6: d411 bmi.n 8004bec <__swsetup_r+0x50>
8004bc8: 2209 movs r2, #9
8004bca: 6032 str r2, [r6, #0]
8004bcc: f043 0340 orr.w r3, r3, #64 ; 0x40
8004bd0: 81a3 strh r3, [r4, #12]
8004bd2: f04f 30ff mov.w r0, #4294967295
8004bd6: e03e b.n 8004c56 <__swsetup_r+0xba>
8004bd8: 4b25 ldr r3, [pc, #148] ; (8004c70 <__swsetup_r+0xd4>)
8004bda: 429c cmp r4, r3
8004bdc: d101 bne.n 8004be2 <__swsetup_r+0x46>
8004bde: 68ac ldr r4, [r5, #8]
8004be0: e7eb b.n 8004bba <__swsetup_r+0x1e>
8004be2: 4b24 ldr r3, [pc, #144] ; (8004c74 <__swsetup_r+0xd8>)
8004be4: 429c cmp r4, r3
8004be6: bf08 it eq
8004be8: 68ec ldreq r4, [r5, #12]
8004bea: e7e6 b.n 8004bba <__swsetup_r+0x1e>
8004bec: 0751 lsls r1, r2, #29
8004bee: d512 bpl.n 8004c16 <__swsetup_r+0x7a>
8004bf0: 6b61 ldr r1, [r4, #52] ; 0x34
8004bf2: b141 cbz r1, 8004c06 <__swsetup_r+0x6a>
8004bf4: f104 0344 add.w r3, r4, #68 ; 0x44
8004bf8: 4299 cmp r1, r3
8004bfa: d002 beq.n 8004c02 <__swsetup_r+0x66>
8004bfc: 4630 mov r0, r6
8004bfe: f7ff fba5 bl 800434c <_free_r>
8004c02: 2300 movs r3, #0
8004c04: 6363 str r3, [r4, #52] ; 0x34
8004c06: 89a3 ldrh r3, [r4, #12]
8004c08: f023 0324 bic.w r3, r3, #36 ; 0x24
8004c0c: 81a3 strh r3, [r4, #12]
8004c0e: 2300 movs r3, #0
8004c10: 6063 str r3, [r4, #4]
8004c12: 6923 ldr r3, [r4, #16]
8004c14: 6023 str r3, [r4, #0]
8004c16: 89a3 ldrh r3, [r4, #12]
8004c18: f043 0308 orr.w r3, r3, #8
8004c1c: 81a3 strh r3, [r4, #12]
8004c1e: 6923 ldr r3, [r4, #16]
8004c20: b94b cbnz r3, 8004c36 <__swsetup_r+0x9a>
8004c22: 89a3 ldrh r3, [r4, #12]
8004c24: f403 7320 and.w r3, r3, #640 ; 0x280
8004c28: f5b3 7f00 cmp.w r3, #512 ; 0x200
8004c2c: d003 beq.n 8004c36 <__swsetup_r+0x9a>
8004c2e: 4621 mov r1, r4
8004c30: 4630 mov r0, r6
8004c32: f000 f917 bl 8004e64 <__smakebuf_r>
8004c36: 89a2 ldrh r2, [r4, #12]
8004c38: f012 0301 ands.w r3, r2, #1
8004c3c: d00c beq.n 8004c58 <__swsetup_r+0xbc>
8004c3e: 2300 movs r3, #0
8004c40: 60a3 str r3, [r4, #8]
8004c42: 6963 ldr r3, [r4, #20]
8004c44: 425b negs r3, r3
8004c46: 61a3 str r3, [r4, #24]
8004c48: 6923 ldr r3, [r4, #16]
8004c4a: b953 cbnz r3, 8004c62 <__swsetup_r+0xc6>
8004c4c: f9b4 300c ldrsh.w r3, [r4, #12]
8004c50: f013 0080 ands.w r0, r3, #128 ; 0x80
8004c54: d1ba bne.n 8004bcc <__swsetup_r+0x30>
8004c56: bd70 pop {r4, r5, r6, pc}
8004c58: 0792 lsls r2, r2, #30
8004c5a: bf58 it pl
8004c5c: 6963 ldrpl r3, [r4, #20]
8004c5e: 60a3 str r3, [r4, #8]
8004c60: e7f2 b.n 8004c48 <__swsetup_r+0xac>
8004c62: 2000 movs r0, #0
8004c64: e7f7 b.n 8004c56 <__swsetup_r+0xba>
8004c66: bf00 nop
8004c68: 2000000c .word 0x2000000c
8004c6c: 08004fa4 .word 0x08004fa4
8004c70: 08004fc4 .word 0x08004fc4
8004c74: 08004f84 .word 0x08004f84
08004c78 <_close_r>:
8004c78: b538 push {r3, r4, r5, lr}
8004c7a: 4c06 ldr r4, [pc, #24] ; (8004c94 <_close_r+0x1c>)
8004c7c: 2300 movs r3, #0
8004c7e: 4605 mov r5, r0
8004c80: 4608 mov r0, r1
8004c82: 6023 str r3, [r4, #0]
8004c84: f7fd f8b5 bl 8001df2 <_close>
8004c88: 1c43 adds r3, r0, #1
8004c8a: d102 bne.n 8004c92 <_close_r+0x1a>
8004c8c: 6823 ldr r3, [r4, #0]
8004c8e: b103 cbz r3, 8004c92 <_close_r+0x1a>
8004c90: 602b str r3, [r5, #0]
8004c92: bd38 pop {r3, r4, r5, pc}
8004c94: 20000498 .word 0x20000498
08004c98 <__sflush_r>:
8004c98: 898a ldrh r2, [r1, #12]
8004c9a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
8004c9e: 4605 mov r5, r0
8004ca0: 0710 lsls r0, r2, #28
8004ca2: 460c mov r4, r1
8004ca4: d458 bmi.n 8004d58 <__sflush_r+0xc0>
8004ca6: 684b ldr r3, [r1, #4]
8004ca8: 2b00 cmp r3, #0
8004caa: dc05 bgt.n 8004cb8 <__sflush_r+0x20>
8004cac: 6c0b ldr r3, [r1, #64] ; 0x40
8004cae: 2b00 cmp r3, #0
8004cb0: dc02 bgt.n 8004cb8 <__sflush_r+0x20>
8004cb2: 2000 movs r0, #0
8004cb4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
8004cb8: 6ae6 ldr r6, [r4, #44] ; 0x2c
8004cba: 2e00 cmp r6, #0
8004cbc: d0f9 beq.n 8004cb2 <__sflush_r+0x1a>
8004cbe: 2300 movs r3, #0
8004cc0: f412 5280 ands.w r2, r2, #4096 ; 0x1000
8004cc4: 682f ldr r7, [r5, #0]
8004cc6: 6a21 ldr r1, [r4, #32]
8004cc8: 602b str r3, [r5, #0]
8004cca: d032 beq.n 8004d32 <__sflush_r+0x9a>
8004ccc: 6d60 ldr r0, [r4, #84] ; 0x54
8004cce: 89a3 ldrh r3, [r4, #12]
8004cd0: 075a lsls r2, r3, #29
8004cd2: d505 bpl.n 8004ce0 <__sflush_r+0x48>
8004cd4: 6863 ldr r3, [r4, #4]
8004cd6: 1ac0 subs r0, r0, r3
8004cd8: 6b63 ldr r3, [r4, #52] ; 0x34
8004cda: b10b cbz r3, 8004ce0 <__sflush_r+0x48>
8004cdc: 6c23 ldr r3, [r4, #64] ; 0x40
8004cde: 1ac0 subs r0, r0, r3
8004ce0: 2300 movs r3, #0
8004ce2: 4602 mov r2, r0
8004ce4: 6ae6 ldr r6, [r4, #44] ; 0x2c
8004ce6: 6a21 ldr r1, [r4, #32]
8004ce8: 4628 mov r0, r5
8004cea: 47b0 blx r6
8004cec: 1c43 adds r3, r0, #1
8004cee: 89a3 ldrh r3, [r4, #12]
8004cf0: d106 bne.n 8004d00 <__sflush_r+0x68>
8004cf2: 6829 ldr r1, [r5, #0]
8004cf4: 291d cmp r1, #29
8004cf6: d848 bhi.n 8004d8a <__sflush_r+0xf2>
8004cf8: 4a29 ldr r2, [pc, #164] ; (8004da0 <__sflush_r+0x108>)
8004cfa: 40ca lsrs r2, r1
8004cfc: 07d6 lsls r6, r2, #31
8004cfe: d544 bpl.n 8004d8a <__sflush_r+0xf2>
8004d00: 2200 movs r2, #0
8004d02: 6062 str r2, [r4, #4]
8004d04: 04d9 lsls r1, r3, #19
8004d06: 6922 ldr r2, [r4, #16]
8004d08: 6022 str r2, [r4, #0]
8004d0a: d504 bpl.n 8004d16 <__sflush_r+0x7e>
8004d0c: 1c42 adds r2, r0, #1
8004d0e: d101 bne.n 8004d14 <__sflush_r+0x7c>
8004d10: 682b ldr r3, [r5, #0]
8004d12: b903 cbnz r3, 8004d16 <__sflush_r+0x7e>
8004d14: 6560 str r0, [r4, #84] ; 0x54
8004d16: 6b61 ldr r1, [r4, #52] ; 0x34
8004d18: 602f str r7, [r5, #0]
8004d1a: 2900 cmp r1, #0
8004d1c: d0c9 beq.n 8004cb2 <__sflush_r+0x1a>
8004d1e: f104 0344 add.w r3, r4, #68 ; 0x44
8004d22: 4299 cmp r1, r3
8004d24: d002 beq.n 8004d2c <__sflush_r+0x94>
8004d26: 4628 mov r0, r5
8004d28: f7ff fb10 bl 800434c <_free_r>
8004d2c: 2000 movs r0, #0
8004d2e: 6360 str r0, [r4, #52] ; 0x34
8004d30: e7c0 b.n 8004cb4 <__sflush_r+0x1c>
8004d32: 2301 movs r3, #1
8004d34: 4628 mov r0, r5
8004d36: 47b0 blx r6
8004d38: 1c41 adds r1, r0, #1
8004d3a: d1c8 bne.n 8004cce <__sflush_r+0x36>
8004d3c: 682b ldr r3, [r5, #0]
8004d3e: 2b00 cmp r3, #0
8004d40: d0c5 beq.n 8004cce <__sflush_r+0x36>
8004d42: 2b1d cmp r3, #29
8004d44: d001 beq.n 8004d4a <__sflush_r+0xb2>
8004d46: 2b16 cmp r3, #22
8004d48: d101 bne.n 8004d4e <__sflush_r+0xb6>
8004d4a: 602f str r7, [r5, #0]
8004d4c: e7b1 b.n 8004cb2 <__sflush_r+0x1a>
8004d4e: 89a3 ldrh r3, [r4, #12]
8004d50: f043 0340 orr.w r3, r3, #64 ; 0x40
8004d54: 81a3 strh r3, [r4, #12]
8004d56: e7ad b.n 8004cb4 <__sflush_r+0x1c>
8004d58: 690f ldr r7, [r1, #16]
8004d5a: 2f00 cmp r7, #0
8004d5c: d0a9 beq.n 8004cb2 <__sflush_r+0x1a>
8004d5e: 0793 lsls r3, r2, #30
8004d60: 680e ldr r6, [r1, #0]
8004d62: bf08 it eq
8004d64: 694b ldreq r3, [r1, #20]
8004d66: 600f str r7, [r1, #0]
8004d68: bf18 it ne
8004d6a: 2300 movne r3, #0
8004d6c: eba6 0807 sub.w r8, r6, r7
8004d70: 608b str r3, [r1, #8]
8004d72: f1b8 0f00 cmp.w r8, #0
8004d76: dd9c ble.n 8004cb2 <__sflush_r+0x1a>
8004d78: 4643 mov r3, r8
8004d7a: 463a mov r2, r7
8004d7c: 6a21 ldr r1, [r4, #32]
8004d7e: 6aa6 ldr r6, [r4, #40] ; 0x28
8004d80: 4628 mov r0, r5
8004d82: 47b0 blx r6
8004d84: 2800 cmp r0, #0
8004d86: dc06 bgt.n 8004d96 <__sflush_r+0xfe>
8004d88: 89a3 ldrh r3, [r4, #12]
8004d8a: f043 0340 orr.w r3, r3, #64 ; 0x40
8004d8e: 81a3 strh r3, [r4, #12]
8004d90: f04f 30ff mov.w r0, #4294967295
8004d94: e78e b.n 8004cb4 <__sflush_r+0x1c>
8004d96: 4407 add r7, r0
8004d98: eba8 0800 sub.w r8, r8, r0
8004d9c: e7e9 b.n 8004d72 <__sflush_r+0xda>
8004d9e: bf00 nop
8004da0: 20400001 .word 0x20400001
08004da4 <_fflush_r>:
8004da4: b538 push {r3, r4, r5, lr}
8004da6: 690b ldr r3, [r1, #16]
8004da8: 4605 mov r5, r0
8004daa: 460c mov r4, r1
8004dac: b1db cbz r3, 8004de6 <_fflush_r+0x42>
8004dae: b118 cbz r0, 8004db8 <_fflush_r+0x14>
8004db0: 6983 ldr r3, [r0, #24]
8004db2: b90b cbnz r3, 8004db8 <_fflush_r+0x14>
8004db4: f7ff fa38 bl 8004228 <__sinit>
8004db8: 4b0c ldr r3, [pc, #48] ; (8004dec <_fflush_r+0x48>)
8004dba: 429c cmp r4, r3
8004dbc: d109 bne.n 8004dd2 <_fflush_r+0x2e>
8004dbe: 686c ldr r4, [r5, #4]
8004dc0: f9b4 300c ldrsh.w r3, [r4, #12]
8004dc4: b17b cbz r3, 8004de6 <_fflush_r+0x42>
8004dc6: 4621 mov r1, r4
8004dc8: 4628 mov r0, r5
8004dca: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
8004dce: f7ff bf63 b.w 8004c98 <__sflush_r>
8004dd2: 4b07 ldr r3, [pc, #28] ; (8004df0 <_fflush_r+0x4c>)
8004dd4: 429c cmp r4, r3
8004dd6: d101 bne.n 8004ddc <_fflush_r+0x38>
8004dd8: 68ac ldr r4, [r5, #8]
8004dda: e7f1 b.n 8004dc0 <_fflush_r+0x1c>
8004ddc: 4b05 ldr r3, [pc, #20] ; (8004df4 <_fflush_r+0x50>)
8004dde: 429c cmp r4, r3
8004de0: bf08 it eq
8004de2: 68ec ldreq r4, [r5, #12]
8004de4: e7ec b.n 8004dc0 <_fflush_r+0x1c>
8004de6: 2000 movs r0, #0
8004de8: bd38 pop {r3, r4, r5, pc}
8004dea: bf00 nop
8004dec: 08004fa4 .word 0x08004fa4
8004df0: 08004fc4 .word 0x08004fc4
8004df4: 08004f84 .word 0x08004f84
08004df8 <_lseek_r>:
8004df8: b538 push {r3, r4, r5, lr}
8004dfa: 4c07 ldr r4, [pc, #28] ; (8004e18 <_lseek_r+0x20>)
8004dfc: 4605 mov r5, r0
8004dfe: 4608 mov r0, r1
8004e00: 4611 mov r1, r2
8004e02: 2200 movs r2, #0
8004e04: 6022 str r2, [r4, #0]
8004e06: 461a mov r2, r3
8004e08: f7fd f81a bl 8001e40 <_lseek>
8004e0c: 1c43 adds r3, r0, #1
8004e0e: d102 bne.n 8004e16 <_lseek_r+0x1e>
8004e10: 6823 ldr r3, [r4, #0]
8004e12: b103 cbz r3, 8004e16 <_lseek_r+0x1e>
8004e14: 602b str r3, [r5, #0]
8004e16: bd38 pop {r3, r4, r5, pc}
8004e18: 20000498 .word 0x20000498
08004e1c <__swhatbuf_r>:
8004e1c: b570 push {r4, r5, r6, lr}
8004e1e: 460e mov r6, r1
8004e20: f9b1 100e ldrsh.w r1, [r1, #14]
8004e24: 2900 cmp r1, #0
8004e26: b096 sub sp, #88 ; 0x58
8004e28: 4614 mov r4, r2
8004e2a: 461d mov r5, r3
8004e2c: da07 bge.n 8004e3e <__swhatbuf_r+0x22>
8004e2e: 2300 movs r3, #0
8004e30: 602b str r3, [r5, #0]
8004e32: 89b3 ldrh r3, [r6, #12]
8004e34: 061a lsls r2, r3, #24
8004e36: d410 bmi.n 8004e5a <__swhatbuf_r+0x3e>
8004e38: f44f 6380 mov.w r3, #1024 ; 0x400
8004e3c: e00e b.n 8004e5c <__swhatbuf_r+0x40>
8004e3e: 466a mov r2, sp
8004e40: f000 f864 bl 8004f0c <_fstat_r>
8004e44: 2800 cmp r0, #0
8004e46: dbf2 blt.n 8004e2e <__swhatbuf_r+0x12>
8004e48: 9a01 ldr r2, [sp, #4]
8004e4a: f402 4270 and.w r2, r2, #61440 ; 0xf000
8004e4e: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
8004e52: 425a negs r2, r3
8004e54: 415a adcs r2, r3
8004e56: 602a str r2, [r5, #0]
8004e58: e7ee b.n 8004e38 <__swhatbuf_r+0x1c>
8004e5a: 2340 movs r3, #64 ; 0x40
8004e5c: 2000 movs r0, #0
8004e5e: 6023 str r3, [r4, #0]
8004e60: b016 add sp, #88 ; 0x58
8004e62: bd70 pop {r4, r5, r6, pc}
08004e64 <__smakebuf_r>:
8004e64: 898b ldrh r3, [r1, #12]
8004e66: b573 push {r0, r1, r4, r5, r6, lr}
8004e68: 079d lsls r5, r3, #30
8004e6a: 4606 mov r6, r0
8004e6c: 460c mov r4, r1
8004e6e: d507 bpl.n 8004e80 <__smakebuf_r+0x1c>
8004e70: f104 0347 add.w r3, r4, #71 ; 0x47
8004e74: 6023 str r3, [r4, #0]
8004e76: 6123 str r3, [r4, #16]
8004e78: 2301 movs r3, #1
8004e7a: 6163 str r3, [r4, #20]
8004e7c: b002 add sp, #8
8004e7e: bd70 pop {r4, r5, r6, pc}
8004e80: ab01 add r3, sp, #4
8004e82: 466a mov r2, sp
8004e84: f7ff ffca bl 8004e1c <__swhatbuf_r>
8004e88: 9900 ldr r1, [sp, #0]
8004e8a: 4605 mov r5, r0
8004e8c: 4630 mov r0, r6
8004e8e: f7ff faab bl 80043e8 <_malloc_r>
8004e92: b948 cbnz r0, 8004ea8 <__smakebuf_r+0x44>
8004e94: f9b4 300c ldrsh.w r3, [r4, #12]
8004e98: 059a lsls r2, r3, #22
8004e9a: d4ef bmi.n 8004e7c <__smakebuf_r+0x18>
8004e9c: f023 0303 bic.w r3, r3, #3
8004ea0: f043 0302 orr.w r3, r3, #2
8004ea4: 81a3 strh r3, [r4, #12]
8004ea6: e7e3 b.n 8004e70 <__smakebuf_r+0xc>
8004ea8: 4b0d ldr r3, [pc, #52] ; (8004ee0 <__smakebuf_r+0x7c>)
8004eaa: 62b3 str r3, [r6, #40] ; 0x28
8004eac: 89a3 ldrh r3, [r4, #12]
8004eae: 6020 str r0, [r4, #0]
8004eb0: f043 0380 orr.w r3, r3, #128 ; 0x80
8004eb4: 81a3 strh r3, [r4, #12]
8004eb6: 9b00 ldr r3, [sp, #0]
8004eb8: 6163 str r3, [r4, #20]
8004eba: 9b01 ldr r3, [sp, #4]
8004ebc: 6120 str r0, [r4, #16]
8004ebe: b15b cbz r3, 8004ed8 <__smakebuf_r+0x74>
8004ec0: f9b4 100e ldrsh.w r1, [r4, #14]
8004ec4: 4630 mov r0, r6
8004ec6: f000 f833 bl 8004f30 <_isatty_r>
8004eca: b128 cbz r0, 8004ed8 <__smakebuf_r+0x74>
8004ecc: 89a3 ldrh r3, [r4, #12]
8004ece: f023 0303 bic.w r3, r3, #3
8004ed2: f043 0301 orr.w r3, r3, #1
8004ed6: 81a3 strh r3, [r4, #12]
8004ed8: 89a3 ldrh r3, [r4, #12]
8004eda: 431d orrs r5, r3
8004edc: 81a5 strh r5, [r4, #12]
8004ede: e7cd b.n 8004e7c <__smakebuf_r+0x18>
8004ee0: 080041f1 .word 0x080041f1
08004ee4 <__malloc_lock>:
8004ee4: 4770 bx lr
08004ee6 <__malloc_unlock>:
8004ee6: 4770 bx lr
08004ee8 <_read_r>:
8004ee8: b538 push {r3, r4, r5, lr}
8004eea: 4c07 ldr r4, [pc, #28] ; (8004f08 <_read_r+0x20>)
8004eec: 4605 mov r5, r0
8004eee: 4608 mov r0, r1
8004ef0: 4611 mov r1, r2
8004ef2: 2200 movs r2, #0
8004ef4: 6022 str r2, [r4, #0]
8004ef6: 461a mov r2, r3
8004ef8: f7fc ff5e bl 8001db8 <_read>
8004efc: 1c43 adds r3, r0, #1
8004efe: d102 bne.n 8004f06 <_read_r+0x1e>
8004f00: 6823 ldr r3, [r4, #0]
8004f02: b103 cbz r3, 8004f06 <_read_r+0x1e>
8004f04: 602b str r3, [r5, #0]
8004f06: bd38 pop {r3, r4, r5, pc}
8004f08: 20000498 .word 0x20000498
08004f0c <_fstat_r>:
8004f0c: b538 push {r3, r4, r5, lr}
8004f0e: 4c07 ldr r4, [pc, #28] ; (8004f2c <_fstat_r+0x20>)
8004f10: 2300 movs r3, #0
8004f12: 4605 mov r5, r0
8004f14: 4608 mov r0, r1
8004f16: 4611 mov r1, r2
8004f18: 6023 str r3, [r4, #0]
8004f1a: f7fc ff76 bl 8001e0a <_fstat>
8004f1e: 1c43 adds r3, r0, #1
8004f20: d102 bne.n 8004f28 <_fstat_r+0x1c>
8004f22: 6823 ldr r3, [r4, #0]
8004f24: b103 cbz r3, 8004f28 <_fstat_r+0x1c>
8004f26: 602b str r3, [r5, #0]
8004f28: bd38 pop {r3, r4, r5, pc}
8004f2a: bf00 nop
8004f2c: 20000498 .word 0x20000498
08004f30 <_isatty_r>:
8004f30: b538 push {r3, r4, r5, lr}
8004f32: 4c06 ldr r4, [pc, #24] ; (8004f4c <_isatty_r+0x1c>)
8004f34: 2300 movs r3, #0
8004f36: 4605 mov r5, r0
8004f38: 4608 mov r0, r1
8004f3a: 6023 str r3, [r4, #0]
8004f3c: f7fc ff75 bl 8001e2a <_isatty>
8004f40: 1c43 adds r3, r0, #1
8004f42: d102 bne.n 8004f4a <_isatty_r+0x1a>
8004f44: 6823 ldr r3, [r4, #0]
8004f46: b103 cbz r3, 8004f4a <_isatty_r+0x1a>
8004f48: 602b str r3, [r5, #0]
8004f4a: bd38 pop {r3, r4, r5, pc}
8004f4c: 20000498 .word 0x20000498
08004f50 <_init>:
8004f50: b5f8 push {r3, r4, r5, r6, r7, lr}
8004f52: bf00 nop
8004f54: bcf8 pop {r3, r4, r5, r6, r7}
8004f56: bc08 pop {r3}
8004f58: 469e mov lr, r3
8004f5a: 4770 bx lr
08004f5c <_fini>:
8004f5c: b5f8 push {r3, r4, r5, r6, r7, lr}
8004f5e: bf00 nop
8004f60: bcf8 pop {r3, r4, r5, r6, r7}
8004f62: bc08 pop {r3}
8004f64: 469e mov lr, r3
8004f66: 4770 bx lr
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