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.../html/wdt__a_8c_source.html | 2 +- Generated Documentation/html/wdt__a_8h.html | 2 +- .../html/wdt__a_8h_source.html | 2 +- .../html/wdt__ex1__interval_mode_8c.html | 2 +- .../wdt__ex1__interval_mode_8c_source.html | 2 +- .../html/wdt__ex2__watchdog_mode_8c.html | 2 +- .../wdt__ex2__watchdog_mode_8c_source.html | 2 +- Generated Documentation/html/yacctab_8py.html | 2 +- .../html/yacctab_8py_source.html | 2 +- ...6xx_2crc_2crc__ex1__build_signature_8c.tex | 2 +- ..._6xx_2dma_2dma__ex1__repeated_block_8c.tex | 2 +- ...__a__spi_2eusci__a__spi__ex1__slave_8c.tex | 2 +- ...__b__spi_2eusci__b__spi__ex1__slave_8c.tex | 2 +- ...2mpy32__ex10__32bit_signed_multiply_8c.tex | 2 +- ...__ex11__32bit_signed_multiply_accum_8c.tex | 2 +- ...ex12__32bit_unsigned_multiply_accum_8c.tex | 2 +- ..._2mpy32__ex13__saturation_underflow_8c.tex | 2 +- ...2_2mpy32__ex14__saturation_overflow_8c.tex | 2 +- ..._2mpy32_2mpy32__ex15__fraction_mode_8c.tex | 2 +- ...mpy32__ex1__16bit_unsigned_multiply_8c.tex | 2 +- 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...2__ex7__16bit_signed_multiply_accum_8c.tex | 2 +- ...32__ex8__8bit_signed_multiply_accum_8c.tex | 2 +- ...mpy32__ex9__32bit_unsigned_multiply_8c.tex | 2 +- ...__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.tex | 2 +- ...timer__a_2timer__a__ex1__pwm_single_8c.tex | 2 +- ...de_operation_with_t_a_i_e_interrupt_8c.tex | 2 +- ...timer__a__ex4__pwm_multiple_up_down_8c.tex | 2 +- ...__a_2timer__a__ex5__pwm_multiple_up_8c.tex | 2 +- ...mer__a__ex6__up_down_mode_operation_8c.tex | 2 +- ...b_2timer__b__ex4__up_mode_operation_8c.tex | 2 +- ...mer__b_2timer__b__ex5__single_p_w_m_8c.tex | 2 +- ...4xx_2tlv_2tlv__ex1__get_device_type_8c.tex | 2 +- ...7xx_2crc_2crc__ex1__build_signature_8c.tex | 2 +- ...57xx_2dma_2dma__ex1__repeated_block_8c.tex | 2 +- ...__a__spi_2eusci__a__spi__ex1__slave_8c.tex | 2 +- ...__b__spi_2eusci__b__spi__ex1__slave_8c.tex | 2 +- ...r57xx_2framctl_2framctl__ex1__write_8c.tex | 2 +- ...2mpy32__ex10__32bit_signed_multiply_8c.tex | 2 +- ...__ex11__32bit_signed_multiply_accum_8c.tex | 2 +- ...ex12__32bit_unsigned_multiply_accum_8c.tex | 2 +- ..._2mpy32__ex13__saturation_underflow_8c.tex | 2 +- ...2_2mpy32__ex14__saturation_overflow_8c.tex | 2 +- ..._2mpy32_2mpy32__ex15__fraction_mode_8c.tex | 2 +- ...mpy32__ex1__16bit_unsigned_multiply_8c.tex | 2 +- ...2mpy32__ex2__8bit_unsigned_multiply_8c.tex | 2 +- ..._2mpy32__ex3__16bit_signed_multiply_8c.tex | 2 +- ...2_2mpy32__ex4__8bit_signed_multiply_8c.tex | 2 +- ..._ex5__16bit_unsigned_multiply_accum_8c.tex | 2 +- ...__ex6__8bit_unsigned_multiply_accum_8c.tex | 2 +- ...2__ex7__16bit_signed_multiply_accum_8c.tex | 2 +- ...32__ex8__8bit_signed_multiply_accum_8c.tex | 2 +- ...mpy32__ex9__32bit_unsigned_multiply_8c.tex | 2 +- ..._2rtc__b_2rtc__b__ex1__calendermode_8c.tex | 2 +- ...timer__a_2timer__a__ex1__pwm_single_8c.tex | 2 +- ...ode_operation_with_c_c_r0_interrupt_8c.tex | 2 +- ...de_operation_with_t_a_i_e_interrupt_8c.tex | 2 +- ...timer__a__ex4__pwm_multiple_up_down_8c.tex | 2 +- ...__a_2timer__a__ex5__pwm_multiple_up_8c.tex | 2 +- ...mer__a__ex6__up_down_mode_operation_8c.tex | 2 +- ...b_2timer__b__ex4__up_mode_operation_8c.tex | 2 +- ...mer__b_2timer__b__ex5__single_p_w_m_8c.tex | 2 +- ...7xx_2tlv_2tlv__ex1__get_device_type_8c.tex | 2 +- ..._a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex | 2 +- ...t__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex | 2 +- ...t__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex | 2 +- ...6xx_2crc_2crc__ex1__build_signature_8c.tex | 2 +- ..._6xx_2dma_2dma__ex1__repeated_block_8c.tex | 2 +- ...__a__spi_2eusci__a__spi__ex1__slave_8c.tex | 2 +- ...__6xx_2framctl_2framctl__ex1__write_8c.tex | 2 +- ...2mpy32__ex10__32bit_signed_multiply_8c.tex | 2 +- ...__ex11__32bit_signed_multiply_accum_8c.tex | 2 +- ...ex12__32bit_unsigned_multiply_accum_8c.tex | 2 +- ..._2mpy32__ex13__saturation_underflow_8c.tex | 2 +- ...2_2mpy32__ex14__saturation_overflow_8c.tex | 2 +- ..._2mpy32_2mpy32__ex15__fraction_mode_8c.tex | 2 +- ...mpy32__ex1__16bit_unsigned_multiply_8c.tex | 2 +- ...2mpy32__ex2__8bit_unsigned_multiply_8c.tex | 2 +- ..._2mpy32__ex3__16bit_signed_multiply_8c.tex | 2 +- ...2_2mpy32__ex4__8bit_signed_multiply_8c.tex | 2 +- ..._ex5__16bit_unsigned_multiply_accum_8c.tex | 2 +- ...__ex6__8bit_unsigned_multiply_accum_8c.tex | 2 +- ...2__ex7__16bit_signed_multiply_accum_8c.tex | 2 +- ...32__ex8__8bit_signed_multiply_accum_8c.tex | 2 +- ...mpy32__ex9__32bit_unsigned_multiply_8c.tex | 2 +- ..._2rtc__b_2rtc__b__ex1__calendermode_8c.tex | 2 +- ..._2rtc__c_2rtc__c__ex1__calendarmode_8c.tex | 2 +- ...timer__a_2timer__a__ex1__pwm_single_8c.tex | 2 +- ...ode_operation_with_c_c_r0_interrupt_8c.tex | 2 +- ...de_operation_with_t_a_i_e_interrupt_8c.tex | 2 +- ...timer__a__ex4__pwm_multiple_up_down_8c.tex | 2 +- ...__a_2timer__a__ex5__pwm_multiple_up_8c.tex | 2 +- ...mer__a__ex6__up_down_mode_operation_8c.tex | 2 +- ...b_2timer__b__ex4__up_mode_operation_8c.tex | 2 +- ...mer__b_2timer__b__ex5__single_p_w_m_8c.tex | 2 +- ...6xx_2tlv_2tlv__ex1__get_device_type_8c.tex | 2 +- ...v_2tlv__ex2__read_t_l_v_descriptors_8c.tex | 2 +- ..._a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex | 2 +- ...t__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex | 2 +- ...t__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex | 2 +- .../adc10__a__ex8__sequence_d_m_a_8c.tex | 2 +- .../latex/adc10__b__ex1__avcc_ref_8c.tex | 2 +- .../latex/adc__ex1__avcc_ref_8c.tex | 2 +- .../battbak__ex1__calendermode_l_p_m3_8c.tex | 2 +- .../latex/crc32__ex1__calculate_crc16_8c.tex | 2 +- .../latex/documentation_guide.tex | 10 +++--- .../flashctl__ex1__write_to_info_b_8c.tex | 2 +- .../flashctl__ex2__erase_copy_write_8c.tex | 2 +- .../flashctl__ex3__long_word_write_8c.tex | 2 +- .../flashctl__ex4__write_to_info_a_8c.tex | 2 +- .../latex/framctl__a__ex1__write_8c.tex | 2 +- Generated Documentation/latex/hardware.tex | 19 +++++++---- Generated Documentation/latex/index.tex | 10 +++--- ...3__single_function_to_multiple_pins_8c.tex | 2 +- .../latex/ram__ex1__set_sector_off_8c.tex | 2 +- .../latex/ram__ex1__turn_off_sector_8c.tex | 2 +- Generated Documentation/latex/resources.tex | 10 +++--- .../rtc__b__ex1__calendermode_l_p_m0_8c.tex | 2 +- .../rtc__b__ex2__calendermode_l_p_m3_8c.tex | 2 +- Hardware/Power Design.markdown | 25 ++++++++++++-- 1440 files changed, 1708 insertions(+), 1661 deletions(-) diff --git a/Generated Documentation/html/_9_hardware_8markdown.html b/Generated Documentation/html/_9_hardware_8markdown.html index 301e0ca..bb55d05 100644 --- a/Generated Documentation/html/_9_hardware_8markdown.html +++ b/Generated Documentation/html/_9_hardware_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_9_hardware_8markdown.html',''); initR diff --git a/Generated Documentation/html/_9_resources_8markdown.html b/Generated Documentation/html/_9_resources_8markdown.html index e02dc23..7f1daf2 100644 --- a/Generated Documentation/html/_9_resources_8markdown.html +++ b/Generated Documentation/html/_9_resources_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_9_resources_8markdown.html',''); init diff --git a/Generated Documentation/html/_9_software_8markdown.html b/Generated Documentation/html/_9_software_8markdown.html index e0b491e..630d4ec 100644 --- a/Generated Documentation/html/_9_software_8markdown.html +++ b/Generated Documentation/html/_9_software_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_9_software_8markdown.html',''); initR diff --git a/Generated Documentation/html/_board_8h.html b/Generated Documentation/html/_board_8h.html index bcb1785..cd159b1 100644 --- a/Generated Documentation/html/_board_8h.html +++ b/Generated Documentation/html/_board_8h.html @@ -100,7 +100,7 @@ $(document).ready(function(){initNavTree('_board_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/_board_8h_source.html b/Generated Documentation/html/_board_8h_source.html index 00b372b..c6cacc6 100644 --- a/Generated Documentation/html/_board_8h_source.html +++ b/Generated Documentation/html/_board_8h_source.html @@ -325,7 +325,7 @@ $(document).ready(function(){initNavTree('_board_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/_design_01_choices_8markdown.html b/Generated Documentation/html/_design_01_choices_8markdown.html index 8f9fad6..890b20d 100644 --- a/Generated Documentation/html/_design_01_choices_8markdown.html +++ b/Generated Documentation/html/_design_01_choices_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_design_01_choices_8markdown.html','') diff --git a/Generated Documentation/html/_device_01_specifications_8markdown.html b/Generated Documentation/html/_device_01_specifications_8markdown.html index a8bdafd..30619d9 100644 --- a/Generated Documentation/html/_device_01_specifications_8markdown.html +++ b/Generated Documentation/html/_device_01_specifications_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_device_01_specifications_8markdown.ht diff --git a/Generated Documentation/html/_documentation_01_guide_8markdown.html b/Generated Documentation/html/_documentation_01_guide_8markdown.html index 2865004..38dac29 100644 --- a/Generated Documentation/html/_documentation_01_guide_8markdown.html +++ b/Generated Documentation/html/_documentation_01_guide_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_documentation_01_guide_8markdown.html diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.html index 45fe84a..4e2634a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.html @@ -121,7 +121,7 @@ Functions

CRC - Build Signature and Rebuild to test.

The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.0 is set and the LED is turned on. Breakpoints can be set before the CRC_setData() function to observe the CRC register values and see the subsequent signatures before/after each data set.

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -152,7 +152,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html index 288ac01..513d8fb 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html @@ -199,7 +199,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2crc_2crc__ex1__bu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html index 65ed666..5332ed8 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html @@ -121,7 +121,7 @@ Functions

DMA - Repeated Block Transfer to-and-from RAM, Software Trigger.

A 16 word block from 1C00-1C1Fh is transfered to 1C20h-1C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.0 is toggled during DMA transfer only for demonstration purposes. ** RAM location 0x1C00 - 0x1C3F used - make sure no compiler conflict ** ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz

-

+

Tested on MSP430F5529, MSP430FR5739

/|| XIN|- | | | 32kHz –|RST XOUT|- | | | P1.0|-> LED | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -144,7 +144,7 @@ Tested on MSP430F5529, MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html index dc81c0f..02e5104 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html @@ -213,7 +213,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2dma_2dma__ex1__re diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html index e46ace4..afe936e 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html @@ -215,7 +215,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html index 7a7b0a9..e5f0111 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html @@ -232,7 +232,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__a__spi_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html index b8efb72..f4f2c5a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html @@ -190,7 +190,7 @@ Variables

SPI slave talks to SPI master using 3-wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset.

Use with eusci_spi_ex1_master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave's JTAG; to work around, use IAR's "Release JTAG on Go" on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.

-

+

Tesed on MSP430F67791A

/|\ | | | | | Master—+->|RST | | | | P3.1|-> Data Out (UCA0SIMO) | | | P3.0|<- Data In (UCA0SOMI) | | | P3.2|<- Serial Clock Out (UCA0CLK)

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -217,7 +217,7 @@ Tesed on MSP430F67791A diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html index e717756..1160dcd 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html @@ -213,7 +213,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__a__spi_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html index 19de44b..5ec4ccc 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html @@ -258,7 +258,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html index 75a61d3..47f49a8 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html @@ -230,7 +230,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__a__uart_2e diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html index 65e90a6..ad02649 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html @@ -222,7 +222,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html index 39bcabf..78d2f8c 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html @@ -311,7 +311,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html index 3226cbb..4666ff5 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html @@ -217,7 +217,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html index 67ad0f8..c390b25 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html @@ -242,7 +242,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html index ec50fc4..c75fb65 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html @@ -199,7 +199,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html index 69d21f2..3062827 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html @@ -207,7 +207,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html index 99f6dcd..44c5a88 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html @@ -216,7 +216,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html index 3b6de68..0ef211c 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html @@ -246,7 +246,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html index 195d306..868f8de 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html @@ -244,7 +244,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html index d29d99a..a7e544a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html @@ -267,7 +267,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html index 7af2aae..0e492a5 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html @@ -204,7 +204,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html index a934af6..e3ce3e3 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html @@ -264,7 +264,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html index 7f805b1..3f4c706 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html @@ -200,7 +200,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html index 06bfc6f..620553f 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html @@ -213,7 +213,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html index 88b163d..934639a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html @@ -225,7 +225,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html index 1910cfa..41ab968 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html @@ -234,7 +234,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html index 1529da8..54427fb 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html @@ -241,7 +241,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html index e2c0ca1..c3b4976 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html @@ -304,7 +304,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html index e54899a..a9adeb9 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html @@ -241,7 +241,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html index af7bbdf..2563557 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html @@ -276,7 +276,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__i2c_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html index e8fd58e..1c734c7 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html @@ -215,7 +215,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html index 5780280..8a472d3 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html @@ -233,7 +233,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__spi_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html index f27df88..181f135 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html @@ -190,7 +190,7 @@ Variables

SPI slave talks to SPI master using 3-wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset.

Use with eusci_spi_ex1_master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave's JTAG; to work around, use IAR's "Release JTAG on Go" on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.

-

+

Tesed on MSP430F67791A

/|\ | | | | | Master—+->|RST | | | | P2.6|-> Data Out (UCB0SIMO) | | | P2.5|<- Data In (UCB0SOMI) | | | P2.7|-> Serial Clock Out (UCB0CLK)

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -216,7 +216,7 @@ Tesed on MSP430F67791A diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html index b99575c..5fefc66 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html @@ -212,7 +212,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2eusci__b__spi_2eu diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html index 7df5f7d..4e8c352 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html index 3d4971e..4ea3280 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html @@ -190,7 +190,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2gpio_2gpio__ex1__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html index 2f18fd0..3329942 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html index b70585b..8e8aef4 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html @@ -234,7 +234,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2gpio_2gpio__ex2__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html index fe86cb1..4245d63 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html @@ -145,7 +145,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html index 85de1ee..4ef904f 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html @@ -176,7 +176,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2gpio_2gpio__ex3__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html index 6c55356..365090e 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html @@ -147,7 +147,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html index 4e88926..aafcda7 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html @@ -163,7 +163,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2gpio_2gpio__ex4__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html index 586e44c..5320492 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

    MPY - 32x32 Signed Multiply

    Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

    ACLK = 32.768kHz, MCLK = SMCLK = default DCO

    -

    +

    Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html index e0ed7bc..f28bf09 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html index 3e6f2ab..f384ff6 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html index 2232bc3..10a8d9d 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html index adffc5a..cf03eee 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Unsigned Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html index 06b1fad..20ce426 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html index 27b7a5c..d180e36 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mpode Underflow Test

Description: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.0000 for 16 bit). Results can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -215,7 +215,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html index 73857d7..d6e53dc 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html index f4aaa08..0c4a81f 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mode Overflow Test

The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -215,7 +215,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html index 5adc058..1aac7a4 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html index de67f57..9d78796 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html @@ -149,7 +149,7 @@ Variables

MPY - Fractional mode, Q15 multiplication

The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -195,7 +195,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html index 2513b1f..9a7def7 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html index 3dd7f6d..4505998 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html index 834dfb2..6092020 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html index d6d79e3..cb0237e 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html index 08ca28f..5bc9c28 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html index 51c0ec2..2c823ca 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html @@ -151,7 +151,7 @@ Variables

MPY - 16x16 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -215,7 +215,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html index cd9dcdc..8bf532f 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html @@ -167,7 +167,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html index 6f35c38..87aafe7 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html index e6aa7d5..f196238 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html @@ -163,7 +163,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html index 996ac62..0026203 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html index 0c8e17c..6ef1b92 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html index 9d56db5..a6b9c33 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html @@ -121,7 +121,7 @@ Functions

MPY - 8x8 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -149,7 +149,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html index 4f125d1..8e92cda 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html index e4cbd66..92b0224 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html index 2ca5974..d17c478 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html index 1c4cdc1..329c85d 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html index 24931b2..4325ba3 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html index 49fd40b..b791bc9 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html @@ -147,7 +147,7 @@ Variables

MPY - 32x32 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -175,7 +175,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html index faa3c80..256919e 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html @@ -170,7 +170,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html index 669ea0f..b405e74 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html @@ -171,7 +171,7 @@ Variables

RTC_C in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

NOTE: Refer device header file and pass in baseaddress parameter for RTC_C as RTC_C_BASE or RTC_CE_BASE as defined in User's guide

-

+

Tested On: MSP430F6736

/|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

@@ -191,7 +191,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html index 4f6d101..149293b 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html @@ -171,7 +171,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__a_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html index 203ae88..33edd80 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html @@ -125,7 +125,7 @@ Functions

TIMER_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK

Toggle P1.0 using software and TA_0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA_0 ISR, P1.0 is toggled and 50000 clock cycles are added to CCR0. TA_0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA_ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -197,7 +197,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html index fe09bd3..150b40a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html @@ -214,7 +214,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__a_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html index 6e054cb..b1641f7 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html @@ -123,7 +123,7 @@ Functions

TIMER_A, Toggle P1.0, Overflow ISR, 32kHz ACLK

Description: Toggle P1.0 using software and the TIMER_A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.0 is toggled. Toggle rate is exactly 0.25Hz = [32kHz/FFFFh]/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32kHz, MCLK = SMCLK = default DCO ~ 1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -172,7 +172,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html index 97f146f..81c00a8 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__a_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html index c33e6db..7b0847a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html @@ -159,7 +159,7 @@ Functions

Timer_A3, PWM TA1.1-2, Up/Down Mode, DCO SMCLK

Description: This program generates two PWM outputs on P2.0,P2.1 using Timer1_A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~233us with a 75% duty cycle on P2.0 and 25% on P2.1. SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430F5529

@@ -209,7 +209,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html index bb2274a..74ac4b6 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html @@ -196,7 +196,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__a_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html index 9a84420..ba5f035 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html @@ -158,7 +158,7 @@ Functions

This program generates two PWM outputs on P2.0,P2.1 using Timer1_A configured for up mode. The value in CCR0, 512-1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~500us with a 75% duty cycle on P2.2 and 25% on P2.3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430F5529

@@ -208,7 +208,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html index d1fec9d..b29b51f 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html @@ -195,7 +195,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__a_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html index fbb9499..04e23f0 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html @@ -140,7 +140,7 @@ Functions

Toggle P1.7 using hardware TA1.0 output. Timer1_A is configured for up/down mode with CCR0 defining period, TA1.0 also output on P1.7. In this example, CCR0 is loaded with 250 and TA1.0 will toggle P1.7 at TACLK/2*250. Thus the output frequency on P1.7 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P1.7 output frequency is ~1.045M/1000. SMCLK = MCLK = TACLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529

@@ -190,7 +190,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html index 08d2b90..b9f666d 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html @@ -187,7 +187,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__a_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html index 30ddfe4..56e9e33 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html @@ -125,7 +125,7 @@ Functions

Timer_B, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK

Description: Toggle P1.0 using software and TB_0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TBCLK. During the TB_0 ISR, P1.0 is toggled and 50000 clock cycles are added to CCR0. TB_0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TB_ISR. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529

@@ -190,7 +190,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html index e34d139..4e8ed9e 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html @@ -205,7 +205,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__b_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html index 36cf20f..16b2642 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html @@ -123,7 +123,7 @@ Functions

Timer_B, Toggle P1.0, Overflow ISR, 32kHz ACLK

Description: Toggle P1.0 using software and the Timer_B overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.0 is toggled. Toggle rate is exactly 0.25Hz = [32kHz/FFFFh]/2. Proper use of the TBIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32kHz, MCLK = SMCLK = default DCO ~ 1.045MHz

-

+

Tested On: MSP430F5529

@@ -165,7 +165,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html index 78fcb37..35183ed 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__b_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html index 0d5cf1f..ff5974c 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html @@ -130,7 +130,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html index 1c7fcf2..426cd8d 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html @@ -205,7 +205,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__b_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html index f1e029e..44f1fbb 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html @@ -125,7 +125,7 @@ Functions

Timer_B, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK

Description: Toggle P1.0 using software and TB_0 ISR. Timer_B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5229

@@ -195,7 +195,7 @@ Tested On: MSP430F5229 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html index f0a3337..b3140dc 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html @@ -193,7 +193,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__b_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html index cc93b54..38db70a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html @@ -141,7 +141,7 @@ Functions

Timer_B, PWM TB0.1, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P5.7 using Timer_B configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.045MHz SMCLK as TBCLK, the timer period is ~500us with a 75% duty cycle on P5.7 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430F5529

@@ -191,7 +191,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html index 208dfea..76d126b 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html @@ -170,7 +170,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2timer__b_2timer__ diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html index 859597e..81a4869 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html @@ -120,7 +120,7 @@ Functions

tlv - getDeviceType

-

+

Tested on MSP430F5438A, MSP430FR5739

/|| | | | | –| | Device Type | | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

The contents of TLV device descriptors are read out using the TLV functions and then stored into local variables.

ACLK = n/a, MCLK = SMCLK = default DCO ~ 1.045MHz

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969

/|| XIN|- | | | –|RST XOUT|- | | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

WDT - Toggle P1.0, Interval Overflow ISR, DCO SMCLK

Toggle P1.0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = {(default DCO 1.045MHz) / 32768} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -174,7 +174,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html index 1d2e9bd..e4f050a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html @@ -178,7 +178,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__e diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html index b8f41ad..def3725 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html @@ -123,7 +123,7 @@ Functions

WDT - Toggle P1.0, Interval Overflow ISR, 32kHz ACLK

Toggle P1.0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32kHz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-crystal(2^15) by 2^13 with an ISR triggered @ 4Hz = [WDT CLK source/32768]. ACLK = REFO , MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -174,7 +174,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html index 3687947..ee9e9b4 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html @@ -178,7 +178,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__e diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html index 17f114a..1cb418a 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html @@ -121,7 +121,7 @@ Functions

WDT - Failsafe Clock, 10KHz VLOCLK

Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-safe feature by automatically selecting VLOCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.0 every 3 seconds in main function. VLOCLK = 10KHZ, ACLK = 32768, MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -152,7 +152,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html index d7ebb89..9e8ec2e 100644 --- a/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html @@ -165,7 +165,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.html index 7a2e323..736a942 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.html @@ -121,7 +121,7 @@ Functions

CRC - Build Signature and Rebuild to test.

The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.0 is set and the LED is turned on. Breakpoints can be set before the CRC_setData() function to observe the CRC register values and see the subsequent signatures before/after each data set.

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -152,7 +152,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_source.html index 23cfccc..5749133 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_source.html @@ -199,7 +199,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__ diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html index 0a4538d..b117af8 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html index 561a38c..1e3b878 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html @@ -263,7 +263,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html index 91618f1..a9b4c00 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html index 6c891c5..bc49e53 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html @@ -238,7 +238,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__a__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html index 1336476..48b0fe1 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html @@ -253,7 +253,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html index 9b14f35..2dfd66c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html @@ -248,7 +248,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__a__uart_ diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html index 21b58f3..b3cea20 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html @@ -276,7 +276,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html index 52f100c..38697f1 100644 --- a/Generated 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Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html @@ -256,7 +256,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html index f873e32..dfe68a0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html @@ -277,7 +277,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html b/Generated 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Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html @@ -219,7 +219,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html index 39a48b3..adbdd1d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html @@ -266,7 +266,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html b/Generated 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$(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html index 546bd15..af62740 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html @@ -223,7 +223,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html index 42a447f..b56b101 100644 --- a/Generated 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Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html @@ -234,7 +234,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html index 572a5cd..9516b56 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html @@ -278,7 +278,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html index 7a6b2c3..645eb0c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html index c853067..0253136 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html @@ -287,7 +287,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html index 7294acd..d58e631 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html index 397b024..46c1ace 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html @@ -225,7 +225,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2eusci__b__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c.html index 219d7e5..e9e89ca 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c.html @@ -166,7 +166,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c_source.html index 013dab7..4cc08c6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2framctl_2framctl__ex1__write_8c_source.html @@ -184,7 +184,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2framctl_2framct diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c.html index 2b86714..e648dde 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c_source.html index a0dca34..ccd76da 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1__output_hi_8c_source.html @@ -192,7 +192,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c.html index 4eb5775..11be043 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c.html @@ -158,7 +158,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c_source.html index cac2441..93380fb 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2__input_capture_8c_source.html @@ -250,7 +250,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex2 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c.html index 267b347..b44d651 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c.html @@ -147,7 +147,7 @@ S1-->| |-->LED1 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c_source.html index 8bad0fa..3776033 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3__software_poll_8c_source.html @@ -183,7 +183,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex3 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c.html index 1c78fe0..8472cf6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c.html @@ -147,7 +147,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html index 8dbab10..da30e5d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html @@ -165,7 +165,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2gpio_2gpio__ex4 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html index 2cb2faa..c1191cc 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html index 675c965..727bb10 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html index 6e8198a..268606e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html index b34f93a..ca5e0e7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html index 0bec344..914d37b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Unsigned Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html index d2a1091..7d3e2d3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html index 5101f82..0177a27 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mpode Underflow Test

Description: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.0000 for 16 bit). Results can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html index 932eb5c..350f01c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html index 645fd31..fdde9c4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mode Overflow Test

The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html index 9d110ae..029536d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html index 8acd793..ed32537 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html @@ -149,7 +149,7 @@ Variables

MPY - Fractional mode, Q15 multiplication

The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -191,7 +191,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html index 6f6d5c7..b121b09 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html index 964ed1b..7b21b29 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html index 468b006..00f3647 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html index 9f409e5..6f6aea6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html index 90ae5ac..1d1cf3f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html index e78e159..31765de 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html @@ -151,7 +151,7 @@ Variables

MPY - 16x16 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html index b990fcd..8772625 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html @@ -167,7 +167,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html index 1458590..243b6fa 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html index 16ef5d1..32c848d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html @@ -163,7 +163,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html index f8458b9..643334a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html index ebc92e3..e6e6a4e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html index 5b273cb..5558809 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html @@ -121,7 +121,7 @@ Functions

MPY - 8x8 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -149,7 +149,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html index 7103d7d..48d2e09 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html index e572c72..4bac3f6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html index 192bdfa..850eb8b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html index 963ab19..25dbdaa 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html index c729b21..c8cbb41 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html index fe09e22..c118694 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html @@ -147,7 +147,7 @@ Variables

MPY - 32x32 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -173,7 +173,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html index ac62c96..3fe4177 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html @@ -170,7 +170,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.html index 1a2fdea..665dfd1 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.html @@ -120,7 +120,7 @@ Functions
-

+

MSP430FR2xx_4xx Board

@@ -145,7 +145,7 @@ MSP430FR2xx_4xx Board diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html index 9442795..53bf0c6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html @@ -233,7 +233,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2pmm_2pmm___rese diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.html index 7d4110f..683d695 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.html @@ -141,7 +141,7 @@ Functions

Timer_A3, PWM TA1.2, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P2.2 using Timer1_A configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.048MHz SMCLK as TACLK, the timer period is ~480us with a 75% duty cycle on P4.0 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.048MHz.

-

+

Tested On: MSP430FR4133

@@ -191,7 +191,7 @@ Tested On: MSP430FR4133 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html index dc83030..8d32fde 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html @@ -177,7 +177,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html index ee28479..f76fae3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html @@ -195,7 +195,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html index 87110ba..cedb10c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html @@ -221,7 +221,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html index 42e23bf..65b6286 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html @@ -123,7 +123,7 @@ Functions

TIMER_A, Toggle P1.0, Overflow ISR, 32kHz ACLK

Description: Toggle P1.0 using software and the TIMER_A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.0 is toggled. Toggle rate is exactly 0.25Hz = [32kHz/FFFFh]/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32kHz, MCLK = SMCLK = default DCO ~ 1.048MHz

-

+

Tested On: MSP430FR4133

@@ -172,7 +172,7 @@ Tested On: MSP430FR4133 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html index 34a1b2c..48b1e5c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html @@ -208,7 +208,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html index 9a03aac..88566af 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html @@ -159,7 +159,7 @@ Functions

Timer_A3, PWM TA1.1-2, Up/Down Mode, DCO SMCLK

Description: This program generates two PWM outputs on P4.0/8.3 using Timer1_A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~233us with a 75% duty cycle on P4.0 and 25% on P8.3. SMCLK = MCLK = TACLK = default DCO ~1.048MHz.

-

+

Tested On: MSP430FR4133

@@ -209,7 +209,7 @@ Tested On: MSP430FR4133 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html index c6a8d94..4e96991 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html @@ -208,7 +208,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html index 800f33b..cc57930 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html @@ -158,7 +158,7 @@ Functions

This program generates two PWM outputs on P4.0, P8.3 using Timer1_A configured for up mode. The value in CCR0, 512-1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.092MHz SMCLK as TACLK, the timer period is ~500us with a 75% duty cycle on P4.0 and 25% on P8.3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.048MHz.

-

+

Tested On: MSP430FR4133

@@ -208,7 +208,7 @@ Tested On: MSP430FR4133 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html index be00c19..bf8e699 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html index d2d0e99..246afb0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html @@ -140,7 +140,7 @@ Functions

Toggle P2.4 using hardware TA1.0 output. Timer1_A is configured for up/down mode with CCR0 defining period, TA1.1 also output on P4.0. In this example, CCR0 is loaded with 250 and TA1.0 will toggle P4.0 at TACLK/2*250. Thus the output frequency on P4.0 will be the TACLK/500. No CPU or software resources required. As coded with TACLK = SMCLK, P4.0 output frequency is ~1.048M/500. SMCLK = MCLK = TACLK = default DCO ~1.048MHz

-

+

Tested On: MSP430FR4133

@@ -190,7 +190,7 @@ Tested On: MSP430FR4133 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html index 2bc3df5..2aa375d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html @@ -192,7 +192,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html index caa386a..8682ba4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html @@ -179,7 +179,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html index a077500..43c1b7b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html @@ -225,7 +225,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html index bf0895c..fc886ab 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html index f2a42be..e4aa861 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html @@ -217,7 +217,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c.html index 4787eee..7551a37 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c_source.html index f95b705..81a1fec 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex3__pwm_8c_source.html @@ -202,7 +202,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html index dcfc145..937208e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html @@ -125,7 +125,7 @@ Functions

Timer_B, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK

Description: Toggle P1.0 using software and TB_0 ISR. Timer_B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR2311

@@ -195,7 +195,7 @@ Tested On: MSP430FR2311 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html index 4c360d1..c4e739b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html index 46b09ef..66df214 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html @@ -141,7 +141,7 @@ Functions

Timer_B, PWM TB0.1, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P2.6 using Timer_B configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.045MHz SMCLK as TBCLK, the timer period is ~488us with a 75% duty cycle on P2.6 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR2311

@@ -191,7 +191,7 @@ Tested On: MSP430FR2311 diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html index ee9e8b0..a9a4010 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html @@ -175,7 +175,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r2xx__4xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.html b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.html index b6388ad..a7d6f91 100644 --- a/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.html @@ -120,7 +120,7 @@ Functions

tlv - getDeviceType

-

+

Tested on MSP430F5438A, MSP430FR5739

/|| | | | | –| | Device Type | | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

CRC - Build Signature and Rebuild to test.

The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.0 is set and the LED is turned on. Breakpoints can be set before the CRC_setData() function to observe the CRC register values and see the subsequent signatures before/after each data set.

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -152,7 +152,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_source.html index 3303b99..b2e4a91 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_source.html @@ -199,7 +199,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2crc_2crc__ex1__buil diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c.html index 26b71e1..56248f3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c.html @@ -142,7 +142,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html index a9b8c6f..0c89af4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html @@ -176,7 +176,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2cs_2cs__ex1___d_c_o diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.html index bd23dea..00ce137 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.html @@ -121,7 +121,7 @@ Functions

DMA - Repeated Block Transfer to-and-from RAM, Software Trigger.

A 16 word block from 1C00-1C1Fh is transfered to 1C20h-1C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.0 is toggled during DMA transfer only for demonstration purposes. ** RAM location 0x1C00 - 0x1C3F used - make sure no compiler conflict ** ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz

-

+

Tested on MSP430F5529, MSP430FR5739

/|| XIN|- | | | 32kHz –|RST XOUT|- | | | P1.0|-> LED | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -144,7 +144,7 @@ Tested on MSP430F5529, MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_source.html index 1775789..2388366 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_source.html @@ -213,7 +213,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2dma_2dma__ex1__repe diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html index 412ae2f..780cc37 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html @@ -210,7 +210,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html index 830df93..90b6567 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html @@ -293,7 +293,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__a__spi_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html index 6c19024..a15e952 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html @@ -188,7 +188,7 @@ Variables

SPI slave talks to SPI master using 3-wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset.

Use with eusci_spi_ex1_master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave's JTAG; to work around, use IAR's "Release JTAG on Go" on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.

-

+

Tesed on MSP430FR5969 and MSP430FR5739

/|\ | | | | | Master—+->|RST | | | | P2.0|-> Data Out (UCA0SIMO) | | | P2.1|<- Data In (UCA0SOMI) | | | P1.5|<- Serial Clock Out (UCA0CLK)

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -212,7 +212,7 @@ Tesed on MSP430FR5969 and MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html index 71edca0..7395afb 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html @@ -249,7 +249,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__a__spi_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html index eb28ec1..c784ad0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html @@ -252,7 +252,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html index 602ebd4..5259a19 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html @@ -255,7 +255,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__a__uart_2eus diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html index 142c3fd..e7a1422 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html @@ -231,7 +231,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html index 68adb68..8fb85fb 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html @@ -312,7 +312,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html index 1962ab8..f012b1b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html @@ -221,7 +221,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html index cbaf035..9467dd1 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html @@ -232,7 +232,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html index d4d4bf5..ea29500 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html @@ -197,7 +197,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html index 2a6f072..848d06f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html @@ -225,7 +225,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html index 7235a9b..ce689ab 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html @@ -220,7 +220,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html index b07dba4..ee2169d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html @@ -238,7 +238,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html index 90b5d9e..601c23c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html @@ -240,7 +240,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html index c8e9969..96663d8 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html @@ -279,7 +279,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html index a1e74eb..74a654c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html @@ -202,7 +202,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html index 1e11942..e9e7355 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html @@ -256,7 +256,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html index 5a17248..173ae2b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html @@ -198,7 +198,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html index 24f64c4..3bdcfc0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html @@ -225,7 +225,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html index e3b381f..e71c385 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html @@ -223,7 +223,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html index d72c645..1b9ac2c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html index 8645ac2..6513b44 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html @@ -233,7 +233,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html index 70bc830..5eb4ba5 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html @@ -299,7 +299,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html index 8ab8d21..512dc28 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html @@ -233,7 +233,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html index af78a7a..b159793 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html @@ -275,7 +275,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__i2c_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html index 9644764..f5bd920 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html @@ -210,7 +210,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html index 4307131..2284ec2 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html @@ -293,7 +293,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__spi_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html index 81ac8d1..4f29f7f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html @@ -188,7 +188,7 @@ Variables

SPI slave talks to SPI master using 3-wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset.

Use with eusci_spi_ex1_master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave's JTAG; to work around, use IAR's "Release JTAG on Go" on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.

-

+

Tesed on MSP430FR5969 and MSP430FR5739

/|\ | | | | | Master—+->|RST | | | | P1.6|-> Data Out (UCB0SIMO) | | | P1.7|<- Data In (UCB0SOMI) | | | P2.2|<- Serial Clock Out (UCB0CLK)

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -212,7 +212,7 @@ Tesed on MSP430FR5969 and MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html index 12bee48..8b2851a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html @@ -246,7 +246,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2eusci__b__spi_2eusc diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.html index 222296c..a375388 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.html @@ -123,7 +123,7 @@ Functions

Long word writes to FRAM

Description: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz

-

+

Tested On: MSP430FR5739

@@ -166,7 +166,7 @@ Tested On: MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_source.html index a125c99..a5aff02 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_source.html @@ -189,7 +189,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2framctl_2framctl__e diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c.html index a47166a..69d6414 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c_source.html index 36f1d1a..5853c79 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex1__output_hi_8c_source.html @@ -190,7 +190,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2gpio_2gpio__ex1__ou diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c.html index 486b3ba..c7512c8 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c_source.html index cdf69d3..4220255 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex2__input_capture_8c_source.html @@ -234,7 +234,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2gpio_2gpio__ex2__in diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c.html index 00ca0cc..3d27138 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c.html @@ -145,7 +145,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c_source.html index 46dd2e0..9d8f6e6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex3__software_poll_8c_source.html @@ -176,7 +176,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2gpio_2gpio__ex3__so diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c.html index 3a6d285..69501b4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c.html @@ -147,7 +147,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html index 514808e..9c64978 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html @@ -163,7 +163,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2gpio_2gpio__ex4__wr diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c.html index 12719bb..ac8fb3f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c.html @@ -188,7 +188,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c_source.html index 97ce586..5092f2d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex1__three_seg_8c_source.html @@ -224,7 +224,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpu_2mpu__ex1__thre diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c.html index e419b5a..7a3e9f1 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c.html @@ -188,7 +188,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c_source.html index cc1bcf2..26a9a2d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_seg_8c_source.html @@ -216,7 +216,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpu_2mpu__ex2__two_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c.html index 96a8a17..655c60b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c.html @@ -360,7 +360,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html index d5aed15..0bb2f7e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html @@ -172,7 +172,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpu_2mpu__ex3__syst diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html index f5a8190..56c6018 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html index 1fcc56c..71c04f0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html index 458e3e7..98dfd9f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html index efbc063..2076a98 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html index 2f8293b..0887d01 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Unsigned Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html index e0d7460..1d936ae 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html index 32cfea0..595b055 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mpode Underflow Test

Description: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.0000 for 16 bit). Results can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html index 7f7f0cc..3b9b890 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html index 963ccae..eba3602 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mode Overflow Test

The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html index 5260ab6..f344d4f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html index 2fda043..9054b48 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html @@ -149,7 +149,7 @@ Variables

MPY - Fractional mode, Q15 multiplication

The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -191,7 +191,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html index d060983..3a47e7d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html index 565ff06..895a617 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html index 2947c81..128e5d4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html index e225b8b..c04db39 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html index 22da04a..6b6f1f2 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html index 76e118a..8facfdb 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html @@ -151,7 +151,7 @@ Variables

MPY - 16x16 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html index 040878a..5025acd 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html @@ -167,7 +167,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html index 7d6a6c6..b018187 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html index 6c6e57e..9f8bdda 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html @@ -163,7 +163,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html index 9f49c86..e5acb80 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html index 861c167..3c02b88 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html index fa6516d..005d150 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html @@ -121,7 +121,7 @@ Functions

MPY - 8x8 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -149,7 +149,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html index 2ee1ba4..96346e5 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html index b1c4be0..af9b6e7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html index 6146139..ecb18eb 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html index 0e7265a..ca3e523 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html index 90205b6..fd3a29f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html index 5e25068..600f2c4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html @@ -147,7 +147,7 @@ Variables

MPY - 32x32 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -173,7 +173,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html index 86d83ce..f0191ba 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html @@ -170,7 +170,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c.html index 62589e2..d7330e6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html index b31a4e6..197d2b6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html @@ -309,7 +309,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2pmm_2pmm___reset___ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html index dc9bfda..b35bacf 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html @@ -170,7 +170,7 @@ Variables

RTC_B in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

-

+

Tested on: MSP430FR5739

/|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -194,7 +194,7 @@ Tested on: MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html index 347e16f..5c1fc2c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html @@ -254,7 +254,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.html index a1b460d..e022030 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.html @@ -141,7 +141,7 @@ Functions

Timer_A3, PWM TA1.2, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P2.2 using Timer1_A configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.045MHz SMCLK as TACLK, the timer period is ~500us with a 75% duty cycle on P2.2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5739

@@ -191,7 +191,7 @@ Tested On: MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html index d8a5c83..9b5e192 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html @@ -172,7 +172,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__a_2timer__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html index 771e7f6..972b488 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html @@ -125,7 +125,7 @@ Functions

TIMER_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK

Toggle P1.0 using software and TA_0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA_0 ISR, P1.0 is toggled and 50000 clock cycles are added to CCR0. TA_0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA_ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -197,7 +197,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html index 4eea528..d6abae8 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html @@ -214,7 +214,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__a_2timer__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html index e650544..ebf0580 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html @@ -123,7 +123,7 @@ Functions

TIMER_A, Toggle P1.0, Overflow ISR, 32kHz ACLK

Description: Toggle P1.0 using software and the TIMER_A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.0 is toggled. Toggle rate is exactly 0.25Hz = [32kHz/FFFFh]/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32kHz, MCLK = SMCLK = default DCO ~ 1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -172,7 +172,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html index ef6c938..21eadaa 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__a_2timer__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html index 8315056..c626ce0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html @@ -159,7 +159,7 @@ Functions

Timer_A3, PWM TA1.1-2, Up/Down Mode, DCO SMCLK

Description: This program generates two PWM outputs on P2.2,3 using Timer1_A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~233us with a 75% duty cycle on P2.2 and 25% on P2.3. SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5739

@@ -209,7 +209,7 @@ Tested On: MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html index f5acb72..6a6dbb0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html @@ -196,7 +196,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__a_2timer__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html index 2bc9be5..555c00e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html @@ -158,7 +158,7 @@ Functions

This program generates two PWM outputs on P1.2,P1.3 using Timer1_A configured for up mode. The value in CCR0, 512-1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~500us with a 75% duty cycle on P2.2 and 25% on P2.3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5749

@@ -208,7 +208,7 @@ Tested On: MSP430FR5749 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html index aed42b3..ba1f4bf 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html @@ -192,7 +192,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__a_2timer__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html index 6b8edee..752e470 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html @@ -140,7 +140,7 @@ Functions

Toggle P2.4 using hardware TA1.0 output. Timer1_A is configured for up/down mode with CCR0 defining period, TA1.0 also output on P2.4. In this example, CCR0 is loaded with 250 and TA1.0 will toggle P2.4 at TACLK/2*250. Thus the output frequency on P2.4 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P2.4 output frequency is ~1.045M/1000. SMCLK = MCLK = TACLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5739

@@ -190,7 +190,7 @@ Tested On: MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html index 8de4187..a6d5e0d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html @@ -188,7 +188,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__a_2timer__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html index 46b38e9..19121fe 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html @@ -179,7 +179,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html index 1cbda2e..8a4894a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html @@ -221,7 +221,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__b_2timer__b_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html index 235fe81..994279c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html index 8b00ba7..58fb0ab 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html @@ -212,7 +212,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__b_2timer__b_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c.html index 4a0f67e..99f7590 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c.html @@ -130,7 +130,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c_source.html index cd64a9f..9a4c75e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex3__pwm_8c_source.html @@ -202,7 +202,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__b_2timer__b_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html index 518521f..6c21936 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html @@ -125,7 +125,7 @@ Functions

Timer_B, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK

Description: Toggle P1.0 using software and TB_0 ISR. Timer_B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5R5739

@@ -195,7 +195,7 @@ Tested On: MSP430F5R5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html index 93185a1..5bee713 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html @@ -199,7 +199,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__b_2timer__b_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html index 9f2d5ca..b984eab 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html @@ -141,7 +141,7 @@ Functions

Timer_B, PWM TB0.1, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P1.4 using Timer_B configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.045MHz SMCLK as TBCLK, the timer period is ~488us with a 75% duty cycle on P1.4 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5739

@@ -191,7 +191,7 @@ Tested On: MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html index 085abc8..22464f7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html @@ -171,7 +171,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2timer__b_2timer__b_ diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.html index 92f54a4..9271136 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.html @@ -120,7 +120,7 @@ Functions

tlv - getDeviceType

-

+

Tested on MSP430F5438A, MSP430FR5739

/|| | | | | –| | Device Type | | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

WDT - Toggle P1.0, Interval Overflow ISR, DCO SMCLK

Toggle P1.0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = {(default DCO 1.045MHz) / 32768} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -174,7 +174,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html index 839e93a..f26509f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html @@ -178,7 +178,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html index 2a05e46..3cb83cd 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html @@ -123,7 +123,7 @@ Functions

WDT - Toggle P1.0, Interval Overflow ISR, 32kHz ACLK

Toggle P1.0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32kHz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-crystal(2^15) by 2^13 with an ISR triggered @ 4Hz = [WDT CLK source/32768]. ACLK = REFO , MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -174,7 +174,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html index 7554bdc..d4456f4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html @@ -178,7 +178,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html index 3a4d180..da7308c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html @@ -121,7 +121,7 @@ Functions

WDT - Failsafe Clock, 10KHz VLOCLK

Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-safe feature by automatically selecting VLOCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.0 every 3 seconds in main function. VLOCLK = 10KHZ, ACLK = 32768, MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430F5529,MSP430FR5739

@@ -152,7 +152,7 @@ Tested On: MSP430F5529,MSP430FR5739 diff --git a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html index 44771d7..ee16f83 100644 --- a/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html @@ -165,7 +165,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.html index 3a0d892..33420f6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.html @@ -121,7 +121,7 @@ Functions

CRC - Build Signature and Rebuild to test.

The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.0 is set and the LED is turned on. Breakpoints can be set before the CRC_setData() function to observe the CRC register values and see the subsequent signatures before/after each data set.

-

+

Tested On: MSP430FR5969

@@ -152,7 +152,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html index 071139e..c9aded3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_source.html @@ -204,7 +204,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c.html index 0235d73..d92f3b3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html index d1684b3..ad0c7d4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d_c_o_setup_8c_source.html @@ -181,7 +181,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2cs_2cs__ex1___d diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html index 79e8307..1b16a57 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.html @@ -121,7 +121,7 @@ Functions

DMA - Repeated Block Transfer to-and-from RAM, Software Trigger.

A 16 word block from 1C00-1C1Fh is transfered to 1C20h-1C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.0 is toggled during DMA transfer only for demonstration purposes. ** RAM location 0x1C00 - 0x1C3F used - make sure no compiler conflict ** ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz

-

+

Tested on MSP430FR5969

/|| XIN|- | | | 32kHz –|RST XOUT|- | | | P1.0|-> LED | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -144,7 +144,7 @@ Tested on MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html index 1c56393..d4cbc2b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_source.html @@ -213,7 +213,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html index 7e00c18..06ba5cd 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html index bdc3a86..aa9d4f2 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__master_8c_source.html @@ -271,7 +271,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html index 576670a..957844a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.html @@ -188,7 +188,7 @@ Variables

SPI slave talks to SPI master using 3-wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset.

Use with eusci_spi_ex1_master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave's JTAG; to work around, use IAR's "Release JTAG on Go" on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.

-

+

Tesed on MSP430FR5969

/|\ | | | | | Master—+->|RST | | | | P2.0|-> Data Out (UCA0SIMO) | | | P2.1|<- Data In (UCA0SOMI) | | | P1.5|<- Serial Clock Out (UCA0CLK)

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -212,7 +212,7 @@ Tesed on MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html index b720485..9363da5 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_source.html @@ -252,7 +252,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html index 1c3dfa4..f30f05c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c.html @@ -252,7 +252,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html index ba2adfc..c6ea137 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__a__uart_2eusci__a__uart__ex1__loopback_advanced_8c_source.html @@ -262,7 +262,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__a__uart_ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html index 3825700..9f548b4 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c.html @@ -231,7 +231,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html index 68688e3..434397f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__master_rx_multiple_8c_source.html @@ -338,7 +338,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html index 976aad2..0868acc 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c.html @@ -221,7 +221,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html index cbd87f7..ddc2370 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex1__slave_tx_multiple_8c_source.html @@ -250,7 +250,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html index fa6839b..b3e5b1c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c.html @@ -197,7 +197,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html index 8766f72..af50d48 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__master_rx_single_8c_source.html @@ -244,7 +244,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html index 7d350a3..9f4d796 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c.html @@ -220,7 +220,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html index 9f3f3d3..02aecbe 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex2__slave_tx_single_8c_source.html @@ -258,7 +258,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html index e163d47..00df723 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c.html @@ -240,7 +240,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html index 007fc52..55e2a18 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__master_tx_multiple_8c_source.html @@ -285,7 +285,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html index 9d44808..825b06d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c.html @@ -202,7 +202,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html index 844a80d..ddf3519 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex3__slave_rx_multiple_8c_source.html @@ -276,7 +276,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html index fad1d9f..22b9ee6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c.html @@ -198,7 +198,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html index 480bc73..8926ed5 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__master_tx_single_8c_source.html @@ -229,7 +229,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html index 6c34806..26887f7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c.html @@ -223,7 +223,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html index 08e2e8d..948bdde 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex4__slave_rx_single_8c_source.html @@ -246,7 +246,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html index 51fc3bc..58dff3b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c.html @@ -233,7 +233,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html index ba62a86..09b65d6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__master_multiple_slave_8c_source.html @@ -321,7 +321,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html index c0799ae..3f8f252 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c.html @@ -233,7 +233,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html index 2453fb9..1fdc43e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2eusci__b__i2c__ex5__slave_multiple_slave_8c_source.html @@ -290,7 +290,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__i2c_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html index a158102..c0c72ff 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html index 20c4bc3..04416f3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__master_8c_source.html @@ -271,7 +271,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html index 53fde57..2a7a204 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.html @@ -213,7 +213,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html index 8b9c8c6..a319b67 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_source.html @@ -251,7 +251,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2eusci__b__spi_2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.html index f1ca6e7..904381e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.html @@ -121,7 +121,7 @@ Functions

Long word writes to FRAM

Description: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz

-

+

Tested On: MSP430FR5969

@@ -143,7 +143,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_source.html index a01a7ad..94b960a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_source.html @@ -202,7 +202,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2framctl_2framct diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html index 339adac..7dcc7b3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html index 070ee4f..ec3d4d0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1__output_hi_8c_source.html @@ -196,7 +196,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex1 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html index 728ab30..6fdec85 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html index 3c29fbc..d51f90b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2__input_capture_8c_source.html @@ -241,7 +241,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex2 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html index 89f023e..054f586 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c.html @@ -145,7 +145,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html index 57be810..383f188 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3__software_poll_8c_source.html @@ -182,7 +182,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex3 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html index b76d0d0..0c61241 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c.html @@ -147,7 +147,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html index db006b4..ce3f7b9 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4__write_to_port1_8c_source.html @@ -169,7 +169,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2gpio_2gpio__ex4 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c.html index 9898837..06c7006 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c.html @@ -217,7 +217,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c_source.html index 2e7179b..115c48d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__three_seg_8c_source.html @@ -253,7 +253,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex1__ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c.html index 5fe3c7b..275f1e2 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c.html @@ -217,7 +217,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c_source.html index e954e12..d045ff9 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__two_seg_8c_source.html @@ -243,7 +243,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex2__ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c.html index 25e5ba3..c2a43a5 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c.html @@ -365,7 +365,7 @@ Variables diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html index de3e782..df680ca 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__system_pre_init_8c_source.html @@ -200,7 +200,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpu_2mpu__ex3__ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html index 003529f..ef6cd37 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html index fc254fb..c7a2b91 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html index db7778e..7e0a778 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Signed Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html index a43f181..d060a5a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html index 6b10016..56325aa 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 32x32 Unsigned Multiply Accumalate

Hardware multiplier is used to multiply-accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html index c09edf3..6f8846b 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html index 2a7e193..6f29418 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mpode Underflow Test

Description: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.0000 for 16 bit). Results can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html index 7bb68f6..973a349 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html index 4a772ec..5d9e904 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.html @@ -151,7 +151,7 @@ Variables

MPY - Saturation Mode Overflow Test

The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html index c3207c0..5ab5313 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html index f7fb7fc..a283324 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.html @@ -149,7 +149,7 @@ Variables

MPY - Fractional mode, Q15 multiplication

The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -191,7 +191,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html index 34f2e5f..4186740 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_source.html @@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html index 46bcf04..e494901 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html index 6980057..17da323 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html index a17d3ae..a1ee888 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html index 35aab40..281a782 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_source.html @@ -157,7 +157,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html index 6dd7c93..d79fe0e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.html @@ -151,7 +151,7 @@ Variables

MPY - 16x16 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -209,7 +209,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html index a562476..dec87b7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_source.html @@ -167,7 +167,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html index 9a68a2b..e0a9e25 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html index 7b181c4..05140c2 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_source.html @@ -163,7 +163,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html index 537944a..4ad6327 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html index 697567f..087e17e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html index 4c897d9..f602032 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.html @@ -121,7 +121,7 @@ Functions

MPY - 8x8 Unsigned Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -149,7 +149,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html index 3cf3e59..25d47cc 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html index e47a114..3a4c1f7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 16x16 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html index 2511191..4c55d46 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_source.html @@ -166,7 +166,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html index 906d15f..2d940ee 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.html @@ -122,7 +122,7 @@ Functions

MPY - 8x8 Signed Multiply Accumulate

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -150,7 +150,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html index 5b7c977..4500581 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_source.html @@ -173,7 +173,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html index e48a9a3..9e1c99f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.html @@ -147,7 +147,7 @@ Variables

MPY - 32x32 Unsigned Multiply

Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3.

ACLK = 32.768kHz, MCLK = SMCLK = default DCO

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433

@@ -173,7 +173,7 @@ Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969,MSP430FR2433 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html index 6298d7a..1be3ad8 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_source.html @@ -170,7 +170,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__e diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c.html index 9e32836..744fb3a 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html index a72d900..9f3fbfd 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2pmm_2pmm___reset___l_p_mx__5_8c_source.html @@ -260,7 +260,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2pmm_2pmm___rese diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html index e29bbbe..dca6b25 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.html @@ -170,7 +170,7 @@ Variables

RTC_B in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

-

+

Tested On: MSP430FR5969

/|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -192,7 +192,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html index 1ab9e6a..d1de25f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_source.html @@ -264,7 +264,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b_ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html index 2b565fc..67bc4cd 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.html @@ -170,7 +170,7 @@ Variables

RTC_C in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

-

+

Tested On: MSP430FR6989

/|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -192,7 +192,7 @@ Tested On: MSP430FR6989 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_source.html index 71a93d4..f9bd15c 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_source.html @@ -255,7 +255,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c_ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.html index fcc2b54..01efd30 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.html @@ -141,7 +141,7 @@ Functions

Timer_A3, PWM TA1.2, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P2.2 using Timer1_A configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.045MHz SMCLK as TACLK, the timer period is ~500us with a 75% duty cycle on P2.2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5969

@@ -191,7 +191,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html index 8a59cfe..e5f54bd 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_source.html @@ -179,7 +179,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html index 76172e7..c932192 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.html @@ -125,7 +125,7 @@ Functions

TIMER_A, Toggle P1.0, CCR0 Cont. Mode ISR, DCO SMCLK

Toggle P1.0 using software and TA_0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA_0 ISR, P1.0 is toggled and 50000 clock cycles are added to CCR0. TA_0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA_ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5969

@@ -197,7 +197,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html index db1ceca..4ec63ac 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_source.html @@ -220,7 +220,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html index 2daeecb..ade509f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.html @@ -123,7 +123,7 @@ Functions

TIMER_A, Toggle P1.0, Overflow ISR, 32kHz ACLK

Description: Toggle P1.0 using software and the TIMER_A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.0 is toggled. Toggle rate is exactly 0.25Hz = [32kHz/FFFFh]/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32kHz, MCLK = SMCLK = default DCO ~ 1.045MHz

-

+

Tested On: MSP430FR5969

@@ -172,7 +172,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html index 2d5f1e5..684abe2 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_source.html @@ -212,7 +212,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html index 7880e25..2465931 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.html @@ -159,7 +159,7 @@ Functions

Timer_A3, PWM TA1.1-2, Up/Down Mode, DCO SMCLK

Description: This program generates two PWM outputs on P2.2,3 using Timer1_A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~233us with a 75% duty cycle on P2.2 and 25% on P2.3. SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5969

@@ -209,7 +209,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html index f4d870e..b26b901 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_source.html @@ -202,7 +202,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html index 6862a82..5ea50cc 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.html @@ -158,7 +158,7 @@ Functions

This program generates two PWM outputs on P1.2,P1.3 using Timer1_A configured for up mode. The value in CCR0, 512-1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using ~1.045MHz SMCLK as TACLK, the timer period is ~500us with a 75% duty cycle on P2.2 and 25% on P2.3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5969

@@ -208,7 +208,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html index 11677be..c0f15f0 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_source.html @@ -202,7 +202,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html index ea6a094..21274a1 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.html @@ -140,7 +140,7 @@ Functions

Toggle P2.4 using hardware TA1.0 output. Timer1_A is configured for up/down mode with CCR0 defining period, TA1.0 also output on P2.4. In this example, CCR0 is loaded with 250 and TA1.0 will toggle P2.4 at TACLK/2*250. Thus the output frequency on P2.4 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P2.4 output frequency is ~1.045M/1000. SMCLK = MCLK = TACLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5969

@@ -190,7 +190,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html index f89fbea..870d39e 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_source.html @@ -193,7 +193,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__a_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html index 81532e8..76492bc 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.html @@ -179,7 +179,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html index e29027f..fa3b524 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_source.html @@ -221,7 +221,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html index 0b135a0..5fc44d5 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html index dc97daf..a24cc24 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_source.html @@ -211,7 +211,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html index 2dedddc..a65ef8d 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html index 6a16d96..ae25b34 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex3__pwm_8c_source.html @@ -204,7 +204,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html index 607445d..511891f 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.html @@ -125,7 +125,7 @@ Functions

Timer_B, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK

Description: Toggle P1.0 using software and TB_0 ISR. Timer_B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5969

@@ -195,7 +195,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html index 9e21779..f5197f9 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_source.html @@ -199,7 +199,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html index 97579c9..e4cd688 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.html @@ -141,7 +141,7 @@ Functions

Timer_B, PWM TB0.1, Up Mode, DCO SMCLK

Description: This program generates PWM outputs on P2.6 using Timer_B configured for up mode. The value , TIMER_PERIOD, defines the PWM period and the value DUTY_CYCLE the PWM duty cycle. Using ~1.045MHz SMCLK as TBCLK, the timer period is ~488us with a 75% duty cycle on P2.6 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO ~1.045MHz.

-

+

Tested On: MSP430FR5969

@@ -191,7 +191,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html index e7ea0f1..fc807ee 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_source.html @@ -177,7 +177,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2timer__b_2timer diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html index 8d54bb0..869ccbb 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.html @@ -120,7 +120,7 @@ Functions

tlv - getDeviceType

-

+

Tested on MSP430F5438A, MSP430FR5739

/|| | | | | –| | Device Type | | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

The contents of TLV device descriptors are read out using the TLV functions and then stored into local variables.

ACLK = n/a, MCLK = SMCLK = default DCO ~ 1.045MHz

-

+

Tested On: MSP430F5438A,MSP430FR5739,MSP430FR5969

/|| XIN|- | | | –|RST XOUT|- | | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

WDT - Toggle P1.0, Interval Overflow ISR, DCO SMCLK

Toggle P1.0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = {(default DCO 1.045MHz) / 32768} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5969

@@ -174,7 +174,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html index cbc8e05..ec16bc7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_source.html @@ -184,7 +184,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html index 0338a5a..d3d39e3 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.html @@ -123,7 +123,7 @@ Functions

WDT - Toggle P1.0, Interval Overflow ISR, 32kHz ACLK

Toggle P1.0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32kHz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-crystal(2^15) by 2^13 with an ISR triggered @ 4Hz = [WDT CLK source/32768]. ACLK = REFO , MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5969

@@ -174,7 +174,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html index 5410cdd..27007c7 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_source.html @@ -184,7 +184,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a_ diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html index b1f2e06..664b9d6 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.html @@ -121,7 +121,7 @@ Functions

WDT - Failsafe Clock, 39KHz LFMODCLK

Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-safe feature by automatically selecting LFMODCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.0 every 1 second in main function. LFMODCLK = 39062, ACLK = 32768, MCLK = SMCLK = default DCO ~1.045MHz

-

+

Tested On: MSP430FR5969

@@ -152,7 +152,7 @@ Tested On: MSP430FR5969 diff --git a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html index 8ef89ad..c515dbe 100644 --- a/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html +++ b/Generated Documentation/html/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_source.html @@ -171,7 +171,7 @@ $(document).ready(function(){initNavTree('_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a_ diff --git a/Generated Documentation/html/_power_01_design_8markdown.html b/Generated Documentation/html/_power_01_design_8markdown.html index 635ffde..49fbb03 100644 --- a/Generated Documentation/html/_power_01_design_8markdown.html +++ b/Generated Documentation/html/_power_01_design_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_power_01_design_8markdown.html',''); diff --git a/Generated Documentation/html/_r_e_a_d_m_e_8markdown.html b/Generated Documentation/html/_r_e_a_d_m_e_8markdown.html index 8d31893..dc11fce 100644 --- a/Generated Documentation/html/_r_e_a_d_m_e_8markdown.html +++ b/Generated Documentation/html/_r_e_a_d_m_e_8markdown.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('_r_e_a_d_m_e_8markdown.html',''); init diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c.html index 897c4ec..c186322 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c.html @@ -131,7 +131,7 @@ Functions diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c_source.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c_source.html index 343f47a..21add91 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c_source.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f5xx__6xx_200__empty_project_2main_8c_source.html @@ -139,7 +139,7 @@ $(document).ready(function(){initNavTree('_resources_2_software_2msp430__driverl diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c.html index d6d340e..5af871a 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c.html @@ -131,7 +131,7 @@ Functions diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c_source.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c_source.html index 00eb49d..8b80e19 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c_source.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r2xx__4xx_200__empty_project_2main_8c_source.html @@ -137,7 +137,7 @@ $(document).ready(function(){initNavTree('_resources_2_software_2msp430__driverl diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c.html index c193e1a..9aa8ed5 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c.html @@ -131,7 +131,7 @@ Functions diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c_source.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c_source.html index 7b309f5..fcb9f7c 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c_source.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r57xx_200__empty_project_2main_8c_source.html @@ -138,7 +138,7 @@ $(document).ready(function(){initNavTree('_resources_2_software_2msp430__driverl diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c.html index ceaad85..561e650 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c.html @@ -131,7 +131,7 @@ Functions diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c_source.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c_source.html index 644e290..5f583ce 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c_source.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430_f_r5xx__6xx_200__empty_project_2main_8c_source.html @@ -138,7 +138,7 @@ $(document).ready(function(){initNavTree('_resources_2_software_2msp430__driverl diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c.html index b5792e4..1653530 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c.html @@ -131,7 +131,7 @@ Functions diff --git a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c_source.html b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c_source.html index 255e081..97dbf08 100644 --- a/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c_source.html +++ b/Generated Documentation/html/_resources_2_software_2msp430__driverlib__2__91__13__01_2examples_2_m_s_p430i2xx_200__empty_project_2main_8c_source.html @@ -138,7 +138,7 @@ $(document).ready(function(){initNavTree('_resources_2_software_2msp430__driverl diff --git a/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c.html b/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c.html index 5681d77..992497d 100644 --- a/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c.html +++ b/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c.html @@ -131,7 +131,7 @@ Functions diff --git a/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c_source.html b/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c_source.html index b4b3ed9..ec8c4bb 100644 --- a/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c_source.html +++ b/Generated Documentation/html/_software_2_code_01_composer_01_studio_01_workspace_2_sunseeker_telemetry_and_lighting_system_2main_8c_source.html @@ -108,7 +108,7 @@ $(document).ready(function(){initNavTree('_software_2_code_01_composer_01_studio diff --git a/Generated Documentation/html/adc10__a_8c.html b/Generated Documentation/html/adc10__a_8c.html index e48b619..c708e3a 100644 --- a/Generated Documentation/html/adc10__a_8c.html +++ b/Generated Documentation/html/adc10__a_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('adc10__a_8c.html',''); initResizable() diff --git a/Generated Documentation/html/adc10__a_8c_source.html b/Generated Documentation/html/adc10__a_8c_source.html index 9af4632..fa98790 100644 --- a/Generated Documentation/html/adc10__a_8c_source.html +++ b/Generated Documentation/html/adc10__a_8c_source.html @@ -309,7 +309,7 @@ $(document).ready(function(){initNavTree('adc10__a_8c_source.html',''); initResi diff --git a/Generated Documentation/html/adc10__a_8h.html b/Generated Documentation/html/adc10__a_8h.html index 22813b8..b087cd3 100644 --- a/Generated Documentation/html/adc10__a_8h.html +++ b/Generated Documentation/html/adc10__a_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('adc10__a_8h.html',''); initResizable() diff --git a/Generated Documentation/html/adc10__a_8h_source.html b/Generated Documentation/html/adc10__a_8h_source.html index 40dff8e..2b31fcb 100644 --- a/Generated Documentation/html/adc10__a_8h_source.html +++ b/Generated Documentation/html/adc10__a_8h_source.html @@ -509,7 +509,7 @@ $(document).ready(function(){initNavTree('adc10__a_8h_source.html',''); initResi diff --git a/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c.html b/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c.html index 353941d..81e91e8 100644 --- a/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c.html +++ b/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c.html @@ -173,7 +173,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c_source.html b/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c_source.html index 243de76..dec0791 100644 --- a/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex1__avcc_ref_8c_source.html @@ -248,7 +248,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex1__avcc_ref_8c_source.html diff --git a/Generated Documentation/html/adc10__a__ex2__int_ref_8c.html b/Generated Documentation/html/adc10__a__ex2__int_ref_8c.html index 09a192d..9a5b829 100644 --- a/Generated Documentation/html/adc10__a__ex2__int_ref_8c.html +++ b/Generated Documentation/html/adc10__a__ex2__int_ref_8c.html @@ -219,7 +219,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex2__int_ref_8c_source.html b/Generated Documentation/html/adc10__a__ex2__int_ref_8c_source.html index fb258b3..145bc73 100644 --- a/Generated Documentation/html/adc10__a__ex2__int_ref_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex2__int_ref_8c_source.html @@ -300,7 +300,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex2__int_ref_8c_source.html' diff --git a/Generated Documentation/html/adc10__a__ex3__window_comp_8c.html b/Generated Documentation/html/adc10__a__ex3__window_comp_8c.html index 21233d6..69b0f4a 100644 --- a/Generated Documentation/html/adc10__a__ex3__window_comp_8c.html +++ b/Generated Documentation/html/adc10__a__ex3__window_comp_8c.html @@ -300,7 +300,7 @@ Variables diff --git a/Generated Documentation/html/adc10__a__ex3__window_comp_8c_source.html b/Generated Documentation/html/adc10__a__ex3__window_comp_8c_source.html index 732067d..69edf1e 100644 --- a/Generated Documentation/html/adc10__a__ex3__window_comp_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex3__window_comp_8c_source.html @@ -347,7 +347,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex3__window_comp_8c_source.h diff --git a/Generated Documentation/html/adc10__a__ex4__signed_data_8c.html b/Generated Documentation/html/adc10__a__ex4__signed_data_8c.html index a2bd309..b80e792 100644 --- a/Generated Documentation/html/adc10__a__ex4__signed_data_8c.html +++ b/Generated Documentation/html/adc10__a__ex4__signed_data_8c.html @@ -173,7 +173,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex4__signed_data_8c_source.html b/Generated Documentation/html/adc10__a__ex4__signed_data_8c_source.html index 51e189f..31c66d3 100644 --- a/Generated Documentation/html/adc10__a__ex4__signed_data_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex4__signed_data_8c_source.html @@ -251,7 +251,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex4__signed_data_8c_source.h diff --git a/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c.html b/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c.html index d914ded..a647ea1 100644 --- a/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c.html +++ b/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c.html @@ -149,7 +149,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c_source.html b/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c_source.html index c21d7a9..f7bda91 100644 --- a/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex5__batt_monitor_8c_source.html @@ -232,7 +232,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex5__batt_monitor_8c_source. diff --git a/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c.html b/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c.html index 70fc0e0..6b2c79f 100644 --- a/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c.html +++ b/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c.html @@ -176,7 +176,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c_source.html b/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c_source.html index 245ad8d..6299b0c 100644 --- a/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex6__ref_toggle_8c_source.html @@ -265,7 +265,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex6__ref_toggle_8c_source.ht diff --git a/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c.html b/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c.html index 069a1a4..c496b26 100644 --- a/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c.html +++ b/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c.html @@ -173,7 +173,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c_source.html b/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c_source.html index c27cb91..5b500e4 100644 --- a/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex7__repeat_single_d_m_a_8c_source.html @@ -277,7 +277,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex7__repeat_single_d_m_a_8c_ diff --git a/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c.html b/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c.html index bc95f88..e62d83b 100644 --- a/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c.html +++ b/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c.html @@ -145,7 +145,7 @@ Functions

ADC10_A - Sample A2-0 Inputs directly to DMA, 8-Bit Res, Single Seq.

MSP430F550x Demo Sample A2/A1/A0 as single sequence with reference to AVcc. Software sets ADC10SC to trigger sample sequence. In Mainloop MSP430 waits in LPM0 to save power until ADC10_A conversion complete, DMA_ISR will force exit from any LPMx. ADC10_A internal oscillator times sample period (16x) and conversion (13x). DMA transfers conv results ADC_Result variable. Notice that the conversions go in the order of A2, A1, then A0.

-

+

MSP430F550x

/|| XIN|- | | | –|RST XOUT|- | P6.2/A2|<- Sample Signal 1 | P6.1/A1|<- Sample Signal 2 | P6.0/A0|<- Sample Signal 3 | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -172,7 +172,7 @@ MSP430F550x diff --git a/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c_source.html b/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c_source.html index a492713..2b55fdb 100644 --- a/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex8__sequence_d_m_a_8c_source.html @@ -272,7 +272,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex8__sequence_d_m_a_8c_sourc diff --git a/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c.html b/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c.html index ed275dd..e6784f3 100644 --- a/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c.html +++ b/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c.html @@ -175,7 +175,7 @@ Functions diff --git a/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c_source.html b/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c_source.html index ffe38dd..8cb8a35 100644 --- a/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c_source.html +++ b/Generated Documentation/html/adc10__a__ex9__repeat_seq_8c_source.html @@ -277,7 +277,7 @@ $(document).ready(function(){initNavTree('adc10__a__ex9__repeat_seq_8c_source.ht diff --git a/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c.html b/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c.html index 105ba02..683cdd5 100644 --- a/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c.html +++ b/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c.html @@ -145,7 +145,7 @@ Functions

ADC10B - Sample A1 Input, AVcc Ref, P1.0 and P3.5 is set if A1 > 0.5AVcc

MSP430FR573x Demo A single sample is made on A1 with reference to AVcc. Software sets ADC10SC to start sample and conversion - ADC10SC automatically cleared at EOC.ADC10B internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10B conversion complete, ADC10_ISR will force exit from LPM0 in Mainloop on reti. If A1 > 0.5*AVcc, P1.0 and and P3.5 set, else reset.

-

+

MSP430FR5739

/|| XIN|- | | | –|RST XOUT|- | | >—|P1.1/A1 P1.0|-->LED | P3.5|-->LED

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -171,7 +171,7 @@ MSP430FR5739 diff --git a/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c_source.html b/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c_source.html index a12372c..b95467a 100644 --- a/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c_source.html +++ b/Generated Documentation/html/adc10__b__ex1__avcc_ref_8c_source.html @@ -312,7 +312,7 @@ $(document).ready(function(){initNavTree('adc10__b__ex1__avcc_ref_8c_source.html diff --git a/Generated Documentation/html/adc10__b__ex2__int_ref_8c.html b/Generated Documentation/html/adc10__b__ex2__int_ref_8c.html index 469b382..30a409c 100644 --- a/Generated Documentation/html/adc10__b__ex2__int_ref_8c.html +++ b/Generated Documentation/html/adc10__b__ex2__int_ref_8c.html @@ -222,7 +222,7 @@ Functions diff --git a/Generated Documentation/html/adc10__b__ex2__int_ref_8c_source.html b/Generated Documentation/html/adc10__b__ex2__int_ref_8c_source.html index b6b20b9..223c145 100644 --- a/Generated Documentation/html/adc10__b__ex2__int_ref_8c_source.html +++ b/Generated Documentation/html/adc10__b__ex2__int_ref_8c_source.html @@ -354,7 +354,7 @@ $(document).ready(function(){initNavTree('adc10__b__ex2__int_ref_8c_source.html' diff --git a/Generated Documentation/html/adc12__a_8c.html b/Generated Documentation/html/adc12__a_8c.html index b85119a..f40cb7e 100644 --- a/Generated Documentation/html/adc12__a_8c.html +++ b/Generated Documentation/html/adc12__a_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('adc12__a_8c.html',''); initResizable() diff --git a/Generated Documentation/html/adc12__a_8c_source.html b/Generated Documentation/html/adc12__a_8c_source.html index df7e588..7a6d9e3 100644 --- a/Generated Documentation/html/adc12__a_8c_source.html +++ b/Generated Documentation/html/adc12__a_8c_source.html @@ -341,7 +341,7 @@ $(document).ready(function(){initNavTree('adc12__a_8c_source.html',''); initResi diff --git a/Generated Documentation/html/adc12__a_8h.html b/Generated Documentation/html/adc12__a_8h.html index dc45474..2f061c2 100644 --- a/Generated Documentation/html/adc12__a_8h.html +++ b/Generated Documentation/html/adc12__a_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('adc12__a_8h.html',''); initResizable() diff --git a/Generated Documentation/html/adc12__a_8h_source.html b/Generated Documentation/html/adc12__a_8h_source.html index 7b571fe..2d7ab55 100644 --- a/Generated Documentation/html/adc12__a_8h_source.html +++ b/Generated Documentation/html/adc12__a_8h_source.html @@ -568,7 +568,7 @@ $(document).ready(function(){initNavTree('adc12__a_8h_source.html',''); initResi diff --git a/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c.html b/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c.html index db597ea..f12033c 100644 --- a/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c.html +++ b/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c.html @@ -172,7 +172,7 @@ Functions diff --git a/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c_source.html b/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c_source.html index c65b8a2..4a0f0b7 100644 --- a/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex1__avcc_ref_8c_source.html @@ -275,7 +275,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex1__avcc_ref_8c_source.html diff --git a/Generated Documentation/html/adc12__a__ex2__int_ref_8c.html b/Generated Documentation/html/adc12__a__ex2__int_ref_8c.html index bab3598..a9f10ea 100644 --- a/Generated Documentation/html/adc12__a__ex2__int_ref_8c.html +++ b/Generated Documentation/html/adc12__a__ex2__int_ref_8c.html @@ -147,7 +147,7 @@ Functions diff --git a/Generated Documentation/html/adc12__a__ex2__int_ref_8c_source.html b/Generated Documentation/html/adc12__a__ex2__int_ref_8c_source.html index 8590086..fab486d 100644 --- a/Generated Documentation/html/adc12__a__ex2__int_ref_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex2__int_ref_8c_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex2__int_ref_8c_source.html' diff --git a/Generated Documentation/html/adc12__a__ex3__ext_ref_8c.html b/Generated Documentation/html/adc12__a__ex3__ext_ref_8c.html index 4a075e0..b2bd137 100644 --- a/Generated Documentation/html/adc12__a__ex3__ext_ref_8c.html +++ b/Generated Documentation/html/adc12__a__ex3__ext_ref_8c.html @@ -143,7 +143,7 @@ Functions diff --git a/Generated Documentation/html/adc12__a__ex3__ext_ref_8c_source.html b/Generated Documentation/html/adc12__a__ex3__ext_ref_8c_source.html index ed2f87e..3f70b7e 100644 --- a/Generated Documentation/html/adc12__a__ex3__ext_ref_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex3__ext_ref_8c_source.html @@ -210,7 +210,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex3__ext_ref_8c_source.html' diff --git a/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c.html b/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c.html index 44c7eed..7b4f829 100644 --- a/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c.html +++ b/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c.html @@ -275,7 +275,7 @@ Variables diff --git a/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c_source.html b/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c_source.html index 29ef98d..d1091d4 100644 --- a/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex4__repeated_seq_8c_source.html @@ -328,7 +328,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex4__repeated_seq_8c_source. diff --git a/Generated Documentation/html/adc12__a__ex5__repeated_single_8c.html b/Generated Documentation/html/adc12__a__ex5__repeated_single_8c.html index 079d620..bebdb7e 100644 --- a/Generated Documentation/html/adc12__a__ex5__repeated_single_8c.html +++ b/Generated Documentation/html/adc12__a__ex5__repeated_single_8c.html @@ -215,7 +215,7 @@ Variables diff --git a/Generated Documentation/html/adc12__a__ex5__repeated_single_8c_source.html b/Generated Documentation/html/adc12__a__ex5__repeated_single_8c_source.html index 1fa44ed..4756a74 100644 --- a/Generated Documentation/html/adc12__a__ex5__repeated_single_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex5__repeated_single_8c_source.html @@ -267,7 +267,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex5__repeated_single_8c_sour diff --git a/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c.html b/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c.html index f3db88b..00f7b0f 100644 --- a/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c.html +++ b/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c.html @@ -199,7 +199,7 @@ Variables diff --git a/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c_source.html b/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c_source.html index 161fa1a..64ed9eb 100644 --- a/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex6__extended_inputs_8c_source.html @@ -276,7 +276,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex6__extended_inputs_8c_sour diff --git a/Generated Documentation/html/adc12__a__ex7__sequence_8c.html b/Generated Documentation/html/adc12__a__ex7__sequence_8c.html index 609930c..07216dd 100644 --- a/Generated Documentation/html/adc12__a__ex7__sequence_8c.html +++ b/Generated Documentation/html/adc12__a__ex7__sequence_8c.html @@ -201,7 +201,7 @@ Variables diff --git a/Generated Documentation/html/adc12__a__ex7__sequence_8c_source.html b/Generated Documentation/html/adc12__a__ex7__sequence_8c_source.html index 8b0d7a2..1529326 100644 --- a/Generated Documentation/html/adc12__a__ex7__sequence_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex7__sequence_8c_source.html @@ -321,7 +321,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex7__sequence_8c_source.html diff --git a/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c.html b/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c.html index 0a89f9b..2795919 100644 --- a/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c.html +++ b/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c.html @@ -237,7 +237,7 @@ Variables diff --git a/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c_source.html b/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c_source.html index f3cfee2..72d3872 100644 --- a/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c_source.html +++ b/Generated Documentation/html/adc12__a__ex8__temp_sensor_8c_source.html @@ -289,7 +289,7 @@ $(document).ready(function(){initNavTree('adc12__a__ex8__temp_sensor_8c_source.h diff --git a/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c.html b/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c.html index fc29078..66d84ea 100644 --- a/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c.html +++ b/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c.html @@ -156,7 +156,7 @@ Functions diff --git a/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c_source.html b/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c_source.html index cae20a6..913b54e 100644 --- a/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c_source.html +++ b/Generated Documentation/html/adc12__b__ex1__avcc_ref_8c_source.html @@ -364,7 +364,7 @@ $(document).ready(function(){initNavTree('adc12__b__ex1__avcc_ref_8c_source.html diff --git a/Generated Documentation/html/adc12__b__ex2__shared_ref_8c.html b/Generated Documentation/html/adc12__b__ex2__shared_ref_8c.html index 89d0fe8..2de44f0 100644 --- a/Generated Documentation/html/adc12__b__ex2__shared_ref_8c.html +++ b/Generated Documentation/html/adc12__b__ex2__shared_ref_8c.html @@ -156,7 +156,7 @@ Functions diff --git a/Generated Documentation/html/adc12__b__ex2__shared_ref_8c_source.html b/Generated Documentation/html/adc12__b__ex2__shared_ref_8c_source.html index ca7b198..dd611c8 100644 --- a/Generated Documentation/html/adc12__b__ex2__shared_ref_8c_source.html +++ b/Generated Documentation/html/adc12__b__ex2__shared_ref_8c_source.html @@ -371,7 +371,7 @@ $(document).ready(function(){initNavTree('adc12__b__ex2__shared_ref_8c_source.ht diff --git a/Generated Documentation/html/adc12__b__ex3__ext_ref_8c.html b/Generated Documentation/html/adc12__b__ex3__ext_ref_8c.html index d909711..c0c6524 100644 --- a/Generated Documentation/html/adc12__b__ex3__ext_ref_8c.html +++ b/Generated Documentation/html/adc12__b__ex3__ext_ref_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/adc12__b__ex3__ext_ref_8c_source.html b/Generated Documentation/html/adc12__b__ex3__ext_ref_8c_source.html index 6161af5..988f534 100644 --- a/Generated Documentation/html/adc12__b__ex3__ext_ref_8c_source.html +++ b/Generated Documentation/html/adc12__b__ex3__ext_ref_8c_source.html @@ -253,7 +253,7 @@ $(document).ready(function(){initNavTree('adc12__b__ex3__ext_ref_8c_source.html' diff --git a/Generated Documentation/html/adc__ex1__avcc_ref_8c.html b/Generated Documentation/html/adc__ex1__avcc_ref_8c.html index a372480..ca74caf 100644 --- a/Generated Documentation/html/adc__ex1__avcc_ref_8c.html +++ b/Generated Documentation/html/adc__ex1__avcc_ref_8c.html @@ -146,7 +146,7 @@ Functions

ADC - Sample A7 Input, AVcc Ref, LED1 and LED2 is set if A7 > 0.5AVcc

MSP430FR4133 Demo A single sample is made on A7 with reference to AVcc. Software sets ADC10SC to start sample and conversion - ADC10SC automatically cleared at EOC.ADC internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC conversion complete, ADC10_ISR will force exit from LPM0 in Mainloop on reti. If A7 > 0.5*AVcc, LED1 and LED2 set, else reset.

-

+

MSP430FR2xx_4xx Board

/|| XIN|- | | | –|RST XOUT|- | | >—|A7 |-->LED1 | |-->LED2

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -170,7 +170,7 @@ MSP430FR2xx_4xx Board diff --git a/Generated Documentation/html/adc__ex1__avcc_ref_8c_source.html b/Generated Documentation/html/adc__ex1__avcc_ref_8c_source.html index 685a69c..ca0f247 100644 --- a/Generated Documentation/html/adc__ex1__avcc_ref_8c_source.html +++ b/Generated Documentation/html/adc__ex1__avcc_ref_8c_source.html @@ -285,7 +285,7 @@ $(document).ready(function(){initNavTree('adc__ex1__avcc_ref_8c_source.html','') diff --git a/Generated Documentation/html/adc__ex2__int_ref_8c.html b/Generated Documentation/html/adc__ex2__int_ref_8c.html index 9d7441b..93f2f7b 100644 --- a/Generated Documentation/html/adc__ex2__int_ref_8c.html +++ b/Generated Documentation/html/adc__ex2__int_ref_8c.html @@ -221,7 +221,7 @@ Functions diff --git a/Generated Documentation/html/adc__ex2__int_ref_8c_source.html b/Generated Documentation/html/adc__ex2__int_ref_8c_source.html index aa77011..bf0f41d 100644 --- a/Generated Documentation/html/adc__ex2__int_ref_8c_source.html +++ b/Generated Documentation/html/adc__ex2__int_ref_8c_source.html @@ -351,7 +351,7 @@ $(document).ready(function(){initNavTree('adc__ex2__int_ref_8c_source.html',''); diff --git a/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c.html b/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c.html index 762ba2f..4ea9d93 100644 --- a/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c.html +++ b/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c.html @@ -262,7 +262,7 @@ Variables diff --git a/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c_source.html b/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c_source.html index 1e1f5ff..0f6c847 100644 --- a/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c_source.html +++ b/Generated Documentation/html/aes256__ex1__encrypt_decrypt_8c_source.html @@ -183,7 +183,7 @@ $(document).ready(function(){initNavTree('aes256__ex1__encrypt_decrypt_8c_source diff --git a/Generated Documentation/html/aes_8c.html b/Generated Documentation/html/aes_8c.html index 722c945..d6e1c1b 100644 --- a/Generated Documentation/html/aes_8c.html +++ b/Generated Documentation/html/aes_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('aes_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/aes_8c_source.html b/Generated Documentation/html/aes_8c_source.html index d3b72d4..d87eefc 100644 --- a/Generated Documentation/html/aes_8c_source.html +++ b/Generated Documentation/html/aes_8c_source.html @@ -448,7 +448,7 @@ $(document).ready(function(){initNavTree('aes_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/aes_8h.html b/Generated Documentation/html/aes_8h.html index 73f2e38..a6f1a97 100644 --- a/Generated Documentation/html/aes_8h.html +++ b/Generated Documentation/html/aes_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('aes_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/aes_8h_source.html b/Generated Documentation/html/aes_8h_source.html index 4ed2438..14fd7ef 100644 --- a/Generated Documentation/html/aes_8h_source.html +++ b/Generated Documentation/html/aes_8h_source.html @@ -282,7 +282,7 @@ $(document).ready(function(){initNavTree('aes_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c.html b/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c.html index 5d938be..e8284c4 100644 --- a/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c.html +++ b/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c.html @@ -200,7 +200,7 @@ Variables diff --git a/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c_source.html b/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c_source.html index 1f13760..78a87cd 100644 --- a/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c_source.html +++ b/Generated Documentation/html/aes__ex1__encrypt_decrypt_8c_source.html @@ -190,7 +190,7 @@ $(document).ready(function(){initNavTree('aes__ex1__encrypt_decrypt_8c_source.ht diff --git a/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c.html b/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c.html index 012bb0f..1eedd84 100644 --- a/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c.html +++ b/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c.html @@ -188,7 +188,7 @@ Variables diff --git a/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c_source.html b/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c_source.html index aeaae4b..66d8b5c 100644 --- a/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c_source.html +++ b/Generated Documentation/html/aes__ex2__encrypt_decrypt_with_first_round_key_8c_source.html @@ -178,7 +178,7 @@ $(document).ready(function(){initNavTree('aes__ex2__encrypt_decrypt_with_first_r diff --git a/Generated Documentation/html/annotated.html b/Generated Documentation/html/annotated.html index 2e3a25c..3f9df12 100644 --- a/Generated Documentation/html/annotated.html +++ b/Generated Documentation/html/annotated.html @@ -102,7 +102,7 @@ $(document).ready(function(){initNavTree('annotated.html',''); initResizable(); diff --git a/Generated Documentation/html/battbak_8c.html b/Generated Documentation/html/battbak_8c.html index bf86e18..aec0497 100644 --- a/Generated Documentation/html/battbak_8c.html +++ b/Generated Documentation/html/battbak_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('battbak_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/battbak_8c_source.html b/Generated Documentation/html/battbak_8c_source.html index 170e244..efe46c9 100644 --- a/Generated Documentation/html/battbak_8c_source.html +++ b/Generated Documentation/html/battbak_8c_source.html @@ -177,7 +177,7 @@ $(document).ready(function(){initNavTree('battbak_8c_source.html',''); initResiz diff --git a/Generated Documentation/html/battbak_8h.html b/Generated Documentation/html/battbak_8h.html index 352e2be..544562e 100644 --- a/Generated Documentation/html/battbak_8h.html +++ b/Generated Documentation/html/battbak_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('battbak_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/battbak_8h_source.html b/Generated Documentation/html/battbak_8h_source.html index 0d4f2e5..6633c75 100644 --- a/Generated Documentation/html/battbak_8h_source.html +++ b/Generated Documentation/html/battbak_8h_source.html @@ -238,7 +238,7 @@ $(document).ready(function(){initNavTree('battbak_8h_source.html',''); initResiz diff --git a/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c.html b/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c.html index 8548297..7fbaee2 100644 --- a/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c.html +++ b/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c.html @@ -170,7 +170,7 @@ Variables

RTC_B in Calendar mode with LPM3, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

This program demonstrates the battery backup peripheral working with RTC_B in LPM3. The LOCKBAK bit is cleared before RTC interrupt enabled and RTC interrupts will be serviced as normal interrupts. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

-

+

Tested On: MSP430F6638

/|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -195,7 +195,7 @@ Tested On: MSP430F6638 diff --git a/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c_source.html b/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c_source.html index 08af133..091c046 100644 --- a/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c_source.html +++ b/Generated Documentation/html/battbak__ex1__calendermode_l_p_m3_8c_source.html @@ -248,7 +248,7 @@ $(document).ready(function(){initNavTree('battbak__ex1__calendermode_l_p_m3_8c_s diff --git a/Generated Documentation/html/classes.html b/Generated Documentation/html/classes.html index 960cfd9..d1458da 100644 --- a/Generated Documentation/html/classes.html +++ b/Generated Documentation/html/classes.html @@ -103,7 +103,7 @@ $(document).ready(function(){initNavTree('classes.html',''); initResizable(); }) diff --git a/Generated Documentation/html/classti__mcu__msp430__driverlib__product.html b/Generated Documentation/html/classti__mcu__msp430__driverlib__product.html index 6584645..dde895f 100644 --- a/Generated Documentation/html/classti__mcu__msp430__driverlib__product.html +++ b/Generated Documentation/html/classti__mcu__msp430__driverlib__product.html @@ -153,7 +153,7 @@ Public Member Functions diff --git a/Generated Documentation/html/comp__b_8c.html b/Generated Documentation/html/comp__b_8c.html index bbebd6b..96ae737 100644 --- a/Generated Documentation/html/comp__b_8c.html +++ b/Generated Documentation/html/comp__b_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('comp__b_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/comp__b_8c_source.html b/Generated Documentation/html/comp__b_8c_source.html index c82d7a2..40c0d10 100644 --- a/Generated Documentation/html/comp__b_8c_source.html +++ b/Generated Documentation/html/comp__b_8c_source.html @@ -309,7 +309,7 @@ $(document).ready(function(){initNavTree('comp__b_8c_source.html',''); initResiz diff --git a/Generated Documentation/html/comp__b_8h.html b/Generated Documentation/html/comp__b_8h.html index efa877d..5e362d2 100644 --- a/Generated Documentation/html/comp__b_8h.html +++ b/Generated Documentation/html/comp__b_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('comp__b_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/comp__b_8h_source.html b/Generated Documentation/html/comp__b_8h_source.html index dfc9dce..06ff5c6 100644 --- a/Generated Documentation/html/comp__b_8h_source.html +++ b/Generated Documentation/html/comp__b_8h_source.html @@ -416,7 +416,7 @@ $(document).ready(function(){initNavTree('comp__b_8h_source.html',''); initResiz diff --git a/Generated Documentation/html/comp__b__ex1__2_v_ref_8c.html b/Generated Documentation/html/comp__b__ex1__2_v_ref_8c.html index c03bf82..0b479e3 100644 --- a/Generated Documentation/html/comp__b__ex1__2_v_ref_8c.html +++ b/Generated Documentation/html/comp__b__ex1__2_v_ref_8c.html @@ -151,7 +151,7 @@ Functions diff --git a/Generated Documentation/html/comp__b__ex1__2_v_ref_8c_source.html b/Generated Documentation/html/comp__b__ex1__2_v_ref_8c_source.html index dd2d508..a38a9df 100644 --- a/Generated Documentation/html/comp__b__ex1__2_v_ref_8c_source.html +++ b/Generated Documentation/html/comp__b__ex1__2_v_ref_8c_source.html @@ -193,7 +193,7 @@ $(document).ready(function(){initNavTree('comp__b__ex1__2_v_ref_8c_source.html', diff --git a/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c.html b/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c.html index 7e66188..04e60a0 100644 --- a/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c.html +++ b/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c.html @@ -169,7 +169,7 @@ Functions diff --git a/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c_source.html b/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c_source.html index 850896c..eece66e 100644 --- a/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c_source.html +++ b/Generated Documentation/html/comp__b__ex2__1_v5_ref_int_8c_source.html @@ -226,7 +226,7 @@ $(document).ready(function(){initNavTree('comp__b__ex2__1_v5_ref_int_8c_source.h diff --git a/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c.html b/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c.html index 3b32e2a..e0e167d 100644 --- a/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c.html +++ b/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c.html @@ -145,7 +145,7 @@ Functions diff --git a/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c_source.html b/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c_source.html index a8fecd7..f38414b 100644 --- a/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c_source.html +++ b/Generated Documentation/html/comp__b__ex3__avcc_ref_u_l_p_m_8c_source.html @@ -193,7 +193,7 @@ $(document).ready(function(){initNavTree('comp__b__ex3__avcc_ref_u_l_p_m_8c_sour diff --git a/Generated Documentation/html/comp__b__ex4__hysteresis_8c.html b/Generated Documentation/html/comp__b__ex4__hysteresis_8c.html index 2b0ae19..9ee96fb 100644 --- a/Generated Documentation/html/comp__b__ex4__hysteresis_8c.html +++ b/Generated Documentation/html/comp__b__ex4__hysteresis_8c.html @@ -145,7 +145,7 @@ Functions diff --git a/Generated Documentation/html/comp__b__ex4__hysteresis_8c_source.html b/Generated Documentation/html/comp__b__ex4__hysteresis_8c_source.html index 65c2d90..a8c9f25 100644 --- a/Generated Documentation/html/comp__b__ex4__hysteresis_8c_source.html +++ b/Generated Documentation/html/comp__b__ex4__hysteresis_8c_source.html @@ -190,7 +190,7 @@ $(document).ready(function(){initNavTree('comp__b__ex4__hysteresis_8c_source.htm diff --git a/Generated Documentation/html/comp__b__ex5___t_ax_8c.html b/Generated Documentation/html/comp__b__ex5___t_ax_8c.html index 7a7693c..5f6ae56 100644 --- a/Generated Documentation/html/comp__b__ex5___t_ax_8c.html +++ b/Generated Documentation/html/comp__b__ex5___t_ax_8c.html @@ -252,7 +252,7 @@ Variables diff --git a/Generated Documentation/html/comp__b__ex5___t_ax_8c_source.html b/Generated Documentation/html/comp__b__ex5___t_ax_8c_source.html index f8de718..25d4ebc 100644 --- a/Generated Documentation/html/comp__b__ex5___t_ax_8c_source.html +++ b/Generated Documentation/html/comp__b__ex5___t_ax_8c_source.html @@ -348,7 +348,7 @@ $(document).ready(function(){initNavTree('comp__b__ex5___t_ax_8c_source.html','' diff --git a/Generated Documentation/html/comp__b__ex6__ext_ref_8c.html b/Generated Documentation/html/comp__b__ex6__ext_ref_8c.html index 7bcd453..9372e95 100644 --- a/Generated Documentation/html/comp__b__ex6__ext_ref_8c.html +++ b/Generated Documentation/html/comp__b__ex6__ext_ref_8c.html @@ -153,7 +153,7 @@ Functions diff --git a/Generated Documentation/html/comp__b__ex6__ext_ref_8c_source.html b/Generated Documentation/html/comp__b__ex6__ext_ref_8c_source.html index ba4e7cb..f6cb1bc 100644 --- a/Generated Documentation/html/comp__b__ex6__ext_ref_8c_source.html +++ b/Generated Documentation/html/comp__b__ex6__ext_ref_8c_source.html @@ -180,7 +180,7 @@ $(document).ready(function(){initNavTree('comp__b__ex6__ext_ref_8c_source.html', diff --git a/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c.html b/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c.html index 5390078..c915819 100644 --- a/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c.html +++ b/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html b/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html index 183f809..6428817 100644 --- a/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html +++ b/Generated Documentation/html/comp__d__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html @@ -222,7 +222,7 @@ $(document).ready(function(){initNavTree('comp__d__ex1__output_toggle_vcomp_vs_v diff --git a/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c.html b/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c.html index 70e3cbc..2e70d61 100644 --- a/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c.html +++ b/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c_source.html b/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c_source.html index 42f8775..036db39 100644 --- a/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c_source.html +++ b/Generated Documentation/html/comp__d__ex2__output_toggle_vcomp_vs_vref25v_8c_source.html @@ -224,7 +224,7 @@ $(document).ready(function(){initNavTree('comp__d__ex2__output_toggle_vcomp_vs_v diff --git a/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c.html b/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c.html index 02a3b56..9c96c03 100644 --- a/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c.html +++ b/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c_source.html b/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c_source.html index 1070113..235ef51 100644 --- a/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c_source.html +++ b/Generated Documentation/html/comp__d__ex3__interrupt_vcomp_vs15_v_8c_source.html @@ -275,7 +275,7 @@ $(document).ready(function(){initNavTree('comp__d__ex3__interrupt_vcomp_vs15_v_8 diff --git a/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c.html b/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c.html index 1e2cd72..012c4f6 100644 --- a/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c.html +++ b/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html b/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html index 13ab55b..6377e66 100644 --- a/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html +++ b/Generated Documentation/html/comp__d__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html @@ -221,7 +221,7 @@ $(document).ready(function(){initNavTree('comp__d__ex4__output_toggle_vcomp_vs_h diff --git a/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c.html b/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c.html index 79308c9..fd80ae6 100644 --- a/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c.html +++ b/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c_source.html b/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c_source.html index 1ad9e3c..184cc27 100644 --- a/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c_source.html +++ b/Generated Documentation/html/comp__d__ex5__output_toggle_hysteresis_8c_source.html @@ -221,7 +221,7 @@ $(document).ready(function(){initNavTree('comp__d__ex5__output_toggle_hysteresis diff --git a/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c.html b/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c.html index 49d30c4..744d052 100644 --- a/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c.html +++ b/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html b/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html index 79afc02..bf047f3 100644 --- a/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html +++ b/Generated Documentation/html/comp__e__ex1__output_toggle_vcomp_vs_vref2_v_8c_source.html @@ -230,7 +230,7 @@ $(document).ready(function(){initNavTree('comp__e__ex1__output_toggle_vcomp_vs_v diff --git a/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c.html b/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c.html index 2c5a0c0..f7f5007 100644 --- a/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c.html +++ b/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c_source.html b/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c_source.html index 4f80752..89c5efc 100644 --- a/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c_source.html +++ b/Generated Documentation/html/comp__e__ex2__output_toggle_vcomp_vs_vref25_v_8c_source.html @@ -228,7 +228,7 @@ $(document).ready(function(){initNavTree('comp__e__ex2__output_toggle_vcomp_vs_v diff --git a/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c.html b/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c.html index 5aae565..36408b8 100644 --- a/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c.html +++ b/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c_source.html b/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c_source.html index a88bae3..6230620 100644 --- a/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c_source.html +++ b/Generated Documentation/html/comp__e__ex3__interrupt_vcomp_vs12_v_8c_source.html @@ -281,7 +281,7 @@ $(document).ready(function(){initNavTree('comp__e__ex3__interrupt_vcomp_vs12_v_8 diff --git a/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c.html b/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c.html index 4db948d..c41c43e 100644 --- a/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c.html +++ b/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html b/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html index 2fc5d3e..649fb3b 100644 --- a/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html +++ b/Generated Documentation/html/comp__e__ex4__output_toggle_vcomp_vs_half_vcc_8c_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('comp__e__ex4__output_toggle_vcomp_vs_h diff --git a/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c.html b/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c.html index 401e16d..e231ce8 100644 --- a/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c.html +++ b/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c_source.html b/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c_source.html index c8ebd55..a898445 100644 --- a/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c_source.html +++ b/Generated Documentation/html/comp__e__ex5__output_toggle_hysteresis_8c_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('comp__e__ex5__output_toggle_hysteresis diff --git a/Generated Documentation/html/crc32__ex1__calculate_crc16_8c.html b/Generated Documentation/html/crc32__ex1__calculate_crc16_8c.html index dd9cb30..7101520 100644 --- a/Generated Documentation/html/crc32__ex1__calculate_crc16_8c.html +++ b/Generated Documentation/html/crc32__ex1__calculate_crc16_8c.html @@ -141,7 +141,7 @@ Functions

CRC - Calculate CRC and check result

Breakpoints can be set at __no_operation()to compare hardware and software generated CRC values.

-

+

Tested On: MSP430FR6989

@@ -191,7 +191,7 @@ Tested On: MSP430FR6989 diff --git a/Generated Documentation/html/crc32__ex1__calculate_crc16_8c_source.html b/Generated Documentation/html/crc32__ex1__calculate_crc16_8c_source.html index c7a9346..f96317f 100644 --- a/Generated Documentation/html/crc32__ex1__calculate_crc16_8c_source.html +++ b/Generated Documentation/html/crc32__ex1__calculate_crc16_8c_source.html @@ -194,7 +194,7 @@ $(document).ready(function(){initNavTree('crc32__ex1__calculate_crc16_8c_source. diff --git a/Generated Documentation/html/crc_8c.html b/Generated Documentation/html/crc_8c.html index 1609b7d..967c65f 100644 --- a/Generated Documentation/html/crc_8c.html +++ b/Generated Documentation/html/crc_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('crc_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/crc_8c_source.html b/Generated Documentation/html/crc_8c_source.html index dddd6a4..8e3416f 100644 --- a/Generated Documentation/html/crc_8c_source.html +++ b/Generated Documentation/html/crc_8c_source.html @@ -170,7 +170,7 @@ $(document).ready(function(){initNavTree('crc_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/crc_8h.html b/Generated Documentation/html/crc_8h.html index 0064827..1307b93 100644 --- a/Generated Documentation/html/crc_8h.html +++ b/Generated Documentation/html/crc_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('crc_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/crc_8h_source.html b/Generated Documentation/html/crc_8h_source.html index 0adb7b4..ec46d7e 100644 --- a/Generated Documentation/html/crc_8h_source.html +++ b/Generated Documentation/html/crc_8h_source.html @@ -193,7 +193,7 @@ $(document).ready(function(){initNavTree('crc_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c.html b/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c.html index 5d99cee..8a77e33 100644 --- a/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c.html +++ b/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c.html @@ -260,7 +260,7 @@ Variables diff --git a/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c_source.html b/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c_source.html index 1e366da..a461e41 100644 --- a/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c_source.html +++ b/Generated Documentation/html/cs__ex1___d_c_o1_m_hz_s_w_trim_8c_source.html @@ -293,7 +293,7 @@ $(document).ready(function(){initNavTree('cs__ex1___d_c_o1_m_hz_s_w_trim_8c_sour diff --git a/Generated Documentation/html/cs__ex1__output_clock_signals_8c.html b/Generated Documentation/html/cs__ex1__output_clock_signals_8c.html index 15c861c..2cca615 100644 --- a/Generated Documentation/html/cs__ex1__output_clock_signals_8c.html +++ b/Generated Documentation/html/cs__ex1__output_clock_signals_8c.html @@ -130,7 +130,7 @@ Functions diff --git a/Generated Documentation/html/cs__ex1__output_clock_signals_8c_source.html b/Generated Documentation/html/cs__ex1__output_clock_signals_8c_source.html index ce301f5..6defe31 100644 --- a/Generated Documentation/html/cs__ex1__output_clock_signals_8c_source.html +++ b/Generated Documentation/html/cs__ex1__output_clock_signals_8c_source.html @@ -180,7 +180,7 @@ $(document).ready(function(){initNavTree('cs__ex1__output_clock_signals_8c_sourc diff --git a/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c.html b/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c.html index 6f3f514..f4e489a 100644 --- a/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c.html +++ b/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c.html @@ -155,7 +155,7 @@ Variables diff --git a/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c_source.html b/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c_source.html index 777f03a..e0023d3 100644 --- a/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c_source.html +++ b/Generated Documentation/html/cs__ex2___d_c_o16_m_hz_8c_source.html @@ -206,7 +206,7 @@ $(document).ready(function(){initNavTree('cs__ex2___d_c_o16_m_hz_8c_source.html' diff --git a/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c.html b/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c.html index 74ecfe7..3d94cf2 100644 --- a/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c.html +++ b/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c.html @@ -170,7 +170,7 @@ Variables diff --git a/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c_source.html b/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c_source.html index 505499e..9b00a1a 100644 --- a/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c_source.html +++ b/Generated Documentation/html/cs__ex2___d_c_o24_m_hz_8c_source.html @@ -184,7 +184,7 @@ $(document).ready(function(){initNavTree('cs__ex2___d_c_o24_m_hz_8c_source.html' diff --git a/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c.html b/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c.html index 2635a84..caf92a0 100644 --- a/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c.html +++ b/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c.html @@ -217,7 +217,7 @@ Variables diff --git a/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c_source.html b/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c_source.html index a9771c9..0334ca8 100644 --- a/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c_source.html +++ b/Generated Documentation/html/cs__ex2___v_l_o_sources_m_c_l_k_8c_source.html @@ -219,7 +219,7 @@ $(document).ready(function(){initNavTree('cs__ex2___v_l_o_sources_m_c_l_k_8c_sou diff --git a/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c.html b/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c.html index a4202d9..f8520a8 100644 --- a/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c.html +++ b/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c_source.html b/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c_source.html index ba25be1..85d6955 100644 --- a/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c_source.html +++ b/Generated Documentation/html/cs__ex2__calculate_clock_signals_8c_source.html @@ -183,7 +183,7 @@ $(document).ready(function(){initNavTree('cs__ex2__calculate_clock_signals_8c_so diff --git a/Generated Documentation/html/cs__ex3___x_t1_fault_8c.html b/Generated Documentation/html/cs__ex3___x_t1_fault_8c.html index 38226e0..498a7e2 100644 --- a/Generated Documentation/html/cs__ex3___x_t1_fault_8c.html +++ b/Generated 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Documentation/html/dir_fd957caaaf9933bd05516ec5a0d9bc40.html +++ b/Generated Documentation/html/dir_fd957caaaf9933bd05516ec5a0d9bc40.html @@ -112,7 +112,7 @@ Files diff --git a/Generated Documentation/html/dir_fe7c91cff9293174cda4e8ad4e82d438.html b/Generated Documentation/html/dir_fe7c91cff9293174cda4e8ad4e82d438.html index 40b3738..e48e68d 100644 --- a/Generated Documentation/html/dir_fe7c91cff9293174cda4e8ad4e82d438.html +++ b/Generated Documentation/html/dir_fe7c91cff9293174cda4e8ad4e82d438.html @@ -108,7 +108,7 @@ Files diff --git a/Generated Documentation/html/dma_8c.html b/Generated Documentation/html/dma_8c.html index 73bf128..fe60a38 100644 --- a/Generated Documentation/html/dma_8c.html +++ b/Generated Documentation/html/dma_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('dma_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/dma_8c_source.html b/Generated Documentation/html/dma_8c_source.html index 20a8751..0f790fb 100644 --- a/Generated Documentation/html/dma_8c_source.html +++ b/Generated Documentation/html/dma_8c_source.html @@ -261,7 +261,7 @@ $(document).ready(function(){initNavTree('dma_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/dma_8h.html b/Generated Documentation/html/dma_8h.html index 106f69f..68267e1 100644 --- a/Generated Documentation/html/dma_8h.html +++ b/Generated Documentation/html/dma_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('dma_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/dma_8h_source.html b/Generated Documentation/html/dma_8h_source.html index 3e19490..5a07a40 100644 --- a/Generated Documentation/html/dma_8h_source.html +++ b/Generated Documentation/html/dma_8h_source.html @@ -406,7 +406,7 @@ $(document).ready(function(){initNavTree('dma_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/dma__ex2__repeated_block_u_a_r_t_8c.html b/Generated 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b/Generated Documentation/html/dma__ex3__single_transfer_s_p_i_8c.html @@ -224,7 +224,7 @@ Variables diff --git a/Generated Documentation/html/dma__ex3__single_transfer_s_p_i_8c_source.html b/Generated Documentation/html/dma__ex3__single_transfer_s_p_i_8c_source.html index e19d61a..9f19ee8 100644 --- a/Generated Documentation/html/dma__ex3__single_transfer_s_p_i_8c_source.html +++ b/Generated Documentation/html/dma__ex3__single_transfer_s_p_i_8c_source.html @@ -324,7 +324,7 @@ $(document).ready(function(){initNavTree('dma__ex3__single_transfer_s_p_i_8c_sou diff --git a/Generated Documentation/html/dma__ex4__single_transfer_a_d_c12_8c.html b/Generated Documentation/html/dma__ex4__single_transfer_a_d_c12_8c.html index 888468f..36a8821 100644 --- a/Generated Documentation/html/dma__ex4__single_transfer_a_d_c12_8c.html +++ b/Generated Documentation/html/dma__ex4__single_transfer_a_d_c12_8c.html @@ -199,7 +199,7 @@ Variables diff --git a/Generated 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Documentation Guide
-

+

Doxygen

The program called "doxygen" (GitHub Page and Website) is what we're using to document our project and try to make things a bit simpler/easier not only for us, but also future projects or people looking at what we've done.

It simply uses a small configuration file at the root of the project /Doxyfile to store some settings, and the rest is through mainly Markdown files (.md or .markdown) and source code files.

It is setup (as of writing this) that someone can simply open the /Doxyfile in the GUI Wizard, click on the "Run" tab, then "Run doxygen", and everything will be updated... that's it.

-

+

Updating Documentation

You need to have installed the program from either the GitHub page or website, then simply open the /Doxyfile within the GUI frontend or "Wizard".

-

+

Important Notes

  • Make sure that the /Doxyfile stays where it's at! It should be kept at the root directory (just to keep things simple)
  • Make sure you use RELATIVE paths when changing configurations, or else when someone else tries running the /Doxyfile, they'll have to re-do all of them in order for it to start functioning again.
  • DO NOT put any files into the /Documentation folder manually, as they WILL BE DELETED when doxygen is run.
-

+

For Consistency

  • Please make sure the internal names ("tags") of files are using "camelCase"
      @@ -115,7 +115,7 @@ For Consistency

-

+

Adding Images

Use this pattern/format:

@image html "Documentation Guide.assets/Funny-Cat-Hidden.jpg"
@cond EXCLUDED
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initResiz diff --git a/Generated Documentation/html/eusci__a__uart_8c_source.html b/Generated Documentation/html/eusci__a__uart_8c_source.html index 750703a..aa3168b 100644 --- a/Generated Documentation/html/eusci__a__uart_8c_source.html +++ b/Generated Documentation/html/eusci__a__uart_8c_source.html @@ -337,7 +337,7 @@ $(document).ready(function(){initNavTree('eusci__a__uart_8c_source.html',''); in diff --git a/Generated Documentation/html/eusci__a__uart_8h.html b/Generated Documentation/html/eusci__a__uart_8h.html index a62b358..b63776e 100644 --- a/Generated Documentation/html/eusci__a__uart_8h.html +++ b/Generated Documentation/html/eusci__a__uart_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('eusci__a__uart_8h.html',''); initResiz diff --git a/Generated Documentation/html/eusci__a__uart_8h_source.html b/Generated Documentation/html/eusci__a__uart_8h_source.html index fc320c0..bf476df 100644 --- a/Generated Documentation/html/eusci__a__uart_8h_source.html +++ b/Generated Documentation/html/eusci__a__uart_8h_source.html @@ -392,7 +392,7 @@ $(document).ready(function(){initNavTree('eusci__a__uart_8h_source.html',''); in diff --git a/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c.html b/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c.html index a87172c..22ec955 100644 --- a/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c.html +++ b/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c.html @@ -201,7 +201,7 @@ Variables diff --git a/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c_source.html b/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c_source.html index b320694..5e6791b 100644 --- a/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c_source.html +++ b/Generated Documentation/html/eusci__a__uart__ex1__loopback115200_baud_8c_source.html @@ -249,7 +249,7 @@ $(document).ready(function(){initNavTree('eusci__a__uart__ex1__loopback115200_ba diff --git a/Generated Documentation/html/eusci__b__i2c_8c.html b/Generated Documentation/html/eusci__b__i2c_8c.html index 47df1c1..28c59af 100644 --- a/Generated Documentation/html/eusci__b__i2c_8c.html +++ b/Generated Documentation/html/eusci__b__i2c_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c_8c.html',''); initResiza diff --git a/Generated Documentation/html/eusci__b__i2c_8c_source.html b/Generated Documentation/html/eusci__b__i2c_8c_source.html index 8e775e1..331b017 100644 --- a/Generated Documentation/html/eusci__b__i2c_8c_source.html +++ b/Generated Documentation/html/eusci__b__i2c_8c_source.html @@ -680,7 +680,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c_8c_source.html',''); ini diff --git a/Generated Documentation/html/eusci__b__i2c_8h.html b/Generated Documentation/html/eusci__b__i2c_8h.html index 3ad7d3d..41612a4 100644 --- a/Generated Documentation/html/eusci__b__i2c_8h.html +++ b/Generated Documentation/html/eusci__b__i2c_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c_8h.html',''); initResiza diff --git a/Generated Documentation/html/eusci__b__i2c_8h_source.html b/Generated Documentation/html/eusci__b__i2c_8h_source.html index bc8068f..e6382d1 100644 --- a/Generated Documentation/html/eusci__b__i2c_8h_source.html +++ b/Generated Documentation/html/eusci__b__i2c_8h_source.html @@ -545,7 +545,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c_8h_source.html',''); ini diff --git a/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c.html b/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c.html index 0785a8c..fb9ff00 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c.html +++ b/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c.html @@ -177,7 +177,7 @@ Functions diff --git a/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c_source.html b/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c_source.html index 03df92d..5a0bc6c 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c_source.html +++ b/Generated Documentation/html/eusci__b__i2c__ex1__master_t_x_multiple_8c_source.html @@ -260,7 +260,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c__ex1__master_t_x_multipl diff --git a/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c.html b/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c.html index a5cc52b..eee3eca 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c.html +++ b/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c.html @@ -195,7 +195,7 @@ Functions diff --git a/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c_source.html b/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c_source.html index 6e087d6..275db49 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c_source.html +++ b/Generated Documentation/html/eusci__b__i2c__ex1__slave_r_x_multiple_8c_source.html @@ -239,7 +239,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c__ex1__slave_r_x_multiple diff --git a/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c.html b/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c.html index 856d1eb..0c603d8 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c.html +++ b/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c.html @@ -199,7 +199,7 @@ Functions diff --git a/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c_source.html b/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c_source.html index 112760a..e7a616a 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c_source.html +++ b/Generated Documentation/html/eusci__b__i2c__ex2__master_r_x_multiple_8c_source.html @@ -304,7 +304,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c__ex2__master_r_x_multipl diff --git a/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c.html b/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c.html index efb0a0c..d6316a2 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c.html +++ b/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c.html @@ -225,7 +225,7 @@ Variables diff --git a/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c_source.html b/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c_source.html index e8d8943..b71c0a5 100644 --- a/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c_source.html +++ b/Generated Documentation/html/eusci__b__i2c__ex2__slave_t_x_multiple_8c_source.html @@ -270,7 +270,7 @@ $(document).ready(function(){initNavTree('eusci__b__i2c__ex2__slave_t_x_multiple diff --git a/Generated Documentation/html/eusci__b__spi_8c.html b/Generated Documentation/html/eusci__b__spi_8c.html index 07be7d3..6f6bae9 100644 --- a/Generated Documentation/html/eusci__b__spi_8c.html +++ b/Generated Documentation/html/eusci__b__spi_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('eusci__b__spi_8c.html',''); initResiza diff --git a/Generated Documentation/html/eusci__b__spi_8c_source.html b/Generated Documentation/html/eusci__b__spi_8c_source.html index 5d66e20..651c890 100644 --- a/Generated Documentation/html/eusci__b__spi_8c_source.html +++ b/Generated Documentation/html/eusci__b__spi_8c_source.html @@ -294,7 +294,7 @@ $(document).ready(function(){initNavTree('eusci__b__spi_8c_source.html',''); ini diff --git a/Generated Documentation/html/eusci__b__spi_8h.html b/Generated Documentation/html/eusci__b__spi_8h.html index de959cd..a5c091b 100644 --- a/Generated Documentation/html/eusci__b__spi_8h.html +++ b/Generated Documentation/html/eusci__b__spi_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('eusci__b__spi_8h.html',''); initResiza diff --git a/Generated Documentation/html/eusci__b__spi_8h_source.html b/Generated Documentation/html/eusci__b__spi_8h_source.html index e78d7a9..59c2dd6 100644 --- a/Generated Documentation/html/eusci__b__spi_8h_source.html +++ b/Generated Documentation/html/eusci__b__spi_8h_source.html @@ -363,7 +363,7 @@ $(document).ready(function(){initNavTree('eusci__b__spi_8h_source.html',''); ini diff --git a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c.html b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c.html index 13e6284..db4513b 100644 --- a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c.html +++ b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c.html @@ -201,7 +201,7 @@ Variables diff --git a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c_source.html b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c_source.html index e855842..b0ef57a 100644 --- a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c_source.html +++ b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_master_8c_source.html @@ -235,7 +235,7 @@ $(document).ready(function(){initNavTree('eusci__b__spi__ex1__3_wire_master_8c_s diff --git a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c.html b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c.html index d063ccb..c594c4a 100644 --- a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c.html +++ b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c.html @@ -199,7 +199,7 @@ Variables diff --git a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c_source.html b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c_source.html index 2222ce3..09e22ce 100644 --- a/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c_source.html +++ b/Generated Documentation/html/eusci__b__spi__ex1__3_wire_slave_8c_source.html @@ -217,7 +217,7 @@ $(document).ready(function(){initNavTree('eusci__b__spi__ex1__3_wire_slave_8c_so diff --git a/Generated Documentation/html/files.html b/Generated Documentation/html/files.html index a444990..2ea1f1d 100644 --- a/Generated Documentation/html/files.html +++ b/Generated Documentation/html/files.html @@ -749,7 +749,7 @@ $(document).ready(function(){initNavTree('files.html',''); initResizable(); }); diff --git a/Generated Documentation/html/flashctl_8c.html b/Generated Documentation/html/flashctl_8c.html index e0f72c9..5985c4f 100644 --- a/Generated Documentation/html/flashctl_8c.html +++ b/Generated Documentation/html/flashctl_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('flashctl_8c.html',''); initResizable() diff --git a/Generated Documentation/html/flashctl_8c_source.html b/Generated Documentation/html/flashctl_8c_source.html index e68eff8..1aa9a3c 100644 --- a/Generated Documentation/html/flashctl_8c_source.html +++ b/Generated Documentation/html/flashctl_8c_source.html @@ -379,7 +379,7 @@ $(document).ready(function(){initNavTree('flashctl_8c_source.html',''); initResi diff --git a/Generated Documentation/html/flashctl_8h.html b/Generated Documentation/html/flashctl_8h.html index a9aad61..4968eca 100644 --- a/Generated Documentation/html/flashctl_8h.html +++ b/Generated Documentation/html/flashctl_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('flashctl_8h.html',''); initResizable() diff --git a/Generated Documentation/html/flashctl_8h_source.html b/Generated Documentation/html/flashctl_8h_source.html index 2af6477..aae1c53 100644 --- a/Generated Documentation/html/flashctl_8h_source.html +++ b/Generated Documentation/html/flashctl_8h_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('flashctl_8h_source.html',''); initResi diff --git a/Generated Documentation/html/flashctl__ex1__info_segment_write_8c.html b/Generated Documentation/html/flashctl__ex1__info_segment_write_8c.html index 4447f95..b6746d2 100644 --- a/Generated Documentation/html/flashctl__ex1__info_segment_write_8c.html +++ b/Generated Documentation/html/flashctl__ex1__info_segment_write_8c.html @@ -218,7 +218,7 @@ Variables diff --git a/Generated Documentation/html/flashctl__ex1__info_segment_write_8c_source.html b/Generated Documentation/html/flashctl__ex1__info_segment_write_8c_source.html index 3ddd52c..bfd255a 100644 --- a/Generated Documentation/html/flashctl__ex1__info_segment_write_8c_source.html +++ b/Generated Documentation/html/flashctl__ex1__info_segment_write_8c_source.html @@ -195,7 +195,7 @@ $(document).ready(function(){initNavTree('flashctl__ex1__info_segment_write_8c_s diff --git a/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c.html b/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c.html index bf13b17..5e849d0 100644 --- a/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c.html +++ b/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c.html @@ -133,7 +133,7 @@ Variables

Dummy calibration data is written to infoB. 16 locations are written with char data, 8 locations with int data and 4 locations with word data. LED toggles upon completion.

Check infoB location @ 0x1900 on execution of program.

-

+

Tested On: MSP430F5529

/|| | | | P1.0|-LED –|RST | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

    @@ -260,7 +260,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c_source.html b/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c_source.html index 9794ba3..56ad011 100644 --- a/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c_source.html +++ b/Generated Documentation/html/flashctl__ex1__write_to_info_b_8c_source.html @@ -246,7 +246,7 @@ $(document).ready(function(){initNavTree('flashctl__ex1__write_to_info_b_8c_sour diff --git a/Generated Documentation/html/flashctl__ex2__erase_copy_write_8c.html b/Generated Documentation/html/flashctl__ex2__erase_copy_write_8c.html index 4c604d4..e045714 100644 --- a/Generated Documentation/html/flashctl__ex2__erase_copy_write_8c.html +++ b/Generated Documentation/html/flashctl__ex2__erase_copy_write_8c.html @@ -154,7 +154,7 @@ Variables

This program first erases flash seg C, then it increments all values in seg C, then it erases seg D, then copies seg C to seg D. LED toggles upon completion. Starting addresses of segments defined in this code: Seg C-0x1880, Seg D-0x1800. ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz

-

+

Tested On: MSP430F5529

/|| | | | P1.0|-LED –|RST | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

MSP430F5529 Demo - Flash In-System Programming w/ Long-Word write at 0x1800

Description: This program first erases flash seg D, then it writes a 32-bit value to memory location 0x1800 using BLK write mode. BLK write provides faster write times than byte/word mode. LED toggles upon completion. ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz

-

+

Tested On: MSP430F5529

/|| | | | P1.0|-LED –|RST | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

Dummy calibration data is written to infoA. 16 locations are written with char data, 8 locations with int data and 4 locations with word data. LED toggles upon completion.

Check infoB location @ 0x1980 on execution of program.

-

+

Tested On: MSP430F5529

/|| | | | P1.0|-LED –|RST | | |

This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

Long word writes to FRAMCtl_A

Description: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz

-

+

Tested On: MSP430FR5994

@@ -143,7 +143,7 @@ Tested On: MSP430FR5994 diff --git a/Generated Documentation/html/framctl__a__ex1__write_8c_source.html b/Generated Documentation/html/framctl__a__ex1__write_8c_source.html index bfa0134..2734731 100644 --- a/Generated Documentation/html/framctl__a__ex1__write_8c_source.html +++ b/Generated Documentation/html/framctl__a__ex1__write_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('framctl__a__ex1__write_8c_source.html' diff --git a/Generated Documentation/html/functions.html b/Generated Documentation/html/functions.html index c0f220a..7561c0d 100644 --- a/Generated Documentation/html/functions.html +++ b/Generated Documentation/html/functions.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('functions.html',''); initResizable(); diff --git a/Generated Documentation/html/functions_func.html b/Generated Documentation/html/functions_func.html index 01bbffc..7e367a6 100644 --- a/Generated Documentation/html/functions_func.html +++ b/Generated Documentation/html/functions_func.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('functions_func.html',''); initResizabl diff --git a/Generated Documentation/html/globals.html b/Generated Documentation/html/globals.html index f74fea6..85537bf 100644 --- a/Generated Documentation/html/globals.html +++ b/Generated Documentation/html/globals.html @@ -122,7 +122,7 @@ $(document).ready(function(){initNavTree('globals.html',''); initResizable(); }) diff --git a/Generated Documentation/html/globals_a.html b/Generated Documentation/html/globals_a.html index 1f6244a..cbc1a01 100644 --- a/Generated Documentation/html/globals_a.html +++ b/Generated Documentation/html/globals_a.html @@ -167,7 +167,7 @@ $(document).ready(function(){initNavTree('globals_a.html',''); initResizable(); diff --git a/Generated Documentation/html/globals_b.html b/Generated Documentation/html/globals_b.html index 055e0f2..1c93b2a 100644 --- a/Generated Documentation/html/globals_b.html +++ b/Generated Documentation/html/globals_b.html @@ -121,7 +121,7 @@ $(document).ready(function(){initNavTree('globals_b.html',''); initResizable(); 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initResizabl diff --git a/Generated Documentation/html/globals_defs_c.html b/Generated Documentation/html/globals_defs_c.html index f47938a..a3b878c 100644 --- a/Generated Documentation/html/globals_defs_c.html +++ b/Generated Documentation/html/globals_defs_c.html @@ -142,7 +142,7 @@ $(document).ready(function(){initNavTree('globals_defs_c.html',''); initResizabl diff --git a/Generated Documentation/html/globals_defs_d.html b/Generated Documentation/html/globals_defs_d.html index 0a8ac66..90c38b3 100644 --- a/Generated Documentation/html/globals_defs_d.html +++ b/Generated Documentation/html/globals_defs_d.html @@ -151,7 +151,7 @@ $(document).ready(function(){initNavTree('globals_defs_d.html',''); initResizabl diff --git a/Generated Documentation/html/globals_defs_f.html b/Generated Documentation/html/globals_defs_f.html index f740dad..d22d50f 100644 --- a/Generated Documentation/html/globals_defs_f.html +++ b/Generated Documentation/html/globals_defs_f.html @@ -103,7 +103,7 @@ $(document).ready(function(){initNavTree('globals_defs_f.html',''); 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Home
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+

About

What this project is about (TODO)

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+

Documentation

For Documentation, we will use "doxygen" to easily create documentation pages for the project. This will be accessible in a variety of means, but primarily through HTML pages accessible through a browser, covering all aspects of the project.

More information here: Documentation Guide

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+

Tips from Dr. Bazuin

  • Make sub-circuits/sub-designs for schematics to keep things organized and modular/copy-able
  • @@ -119,14 +119,14 @@ Tips from Dr. Bazuin

  • Make peripherals like output on one side and inputs on the other
  • Use SPI Chip Select as a separate command (Use 3-pin SPI and then just use GPIO for Chip Select)
  • -

    +

    Tips from Dr. Gomez

    • Our requirements/specifications should be made to be more measurable
    • Need to design to safety standards, which need to be researched online
    • He said that he is available himself for anything power-related to help out with if needed
    -

    +

    TODO List

    • [ ] Make battery circuitry for Real-Time Clock/Calendar for when the vehicle is off.
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$(document).ready(function(){initNavTree('lcd__b_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/lcd__b_8h_source.html b/Generated Documentation/html/lcd__b_8h_source.html index b47c733..88ca66a 100644 --- a/Generated Documentation/html/lcd__b_8h_source.html +++ b/Generated Documentation/html/lcd__b_8h_source.html @@ -712,7 +712,7 @@ $(document).ready(function(){initNavTree('lcd__b_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/lcd__b__ex1__4mux_8c.html b/Generated Documentation/html/lcd__b__ex1__4mux_8c.html index a1b3528..0dc7970 100644 --- a/Generated Documentation/html/lcd__b__ex1__4mux_8c.html +++ b/Generated Documentation/html/lcd__b__ex1__4mux_8c.html @@ -140,7 +140,7 @@ Functions diff --git a/Generated Documentation/html/lcd__b__ex1__4mux_8c_source.html b/Generated Documentation/html/lcd__b__ex1__4mux_8c_source.html index 142c31e..ec6d2d5 100644 --- a/Generated Documentation/html/lcd__b__ex1__4mux_8c_source.html +++ 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    @@ -227,7 +227,7 @@ MSP430F5528 diff --git a/Generated Documentation/html/pmap__ex3__single_function_to_multiple_pins_8c_source.html b/Generated Documentation/html/pmap__ex3__single_function_to_multiple_pins_8c_source.html index 357b102..c3adfe5 100644 --- a/Generated Documentation/html/pmap__ex3__single_function_to_multiple_pins_8c_source.html +++ b/Generated Documentation/html/pmap__ex3__single_function_to_multiple_pins_8c_source.html @@ -296,7 +296,7 @@ $(document).ready(function(){initNavTree('pmap__ex3__single_function_to_multiple diff --git a/Generated Documentation/html/pmm_8c.html b/Generated Documentation/html/pmm_8c.html index 3132621..d9789c8 100644 --- a/Generated Documentation/html/pmm_8c.html +++ b/Generated Documentation/html/pmm_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('pmm_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/pmm_8c_source.html b/Generated Documentation/html/pmm_8c_source.html index 33ff933..b178f1a 100644 --- a/Generated Documentation/html/pmm_8c_source.html +++ b/Generated Documentation/html/pmm_8c_source.html @@ -610,7 +610,7 @@ $(document).ready(function(){initNavTree('pmm_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/pmm_8h.html b/Generated Documentation/html/pmm_8h.html index 4e48e76..e092f4d 100644 --- a/Generated Documentation/html/pmm_8h.html +++ b/Generated Documentation/html/pmm_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('pmm_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/pmm_8h_source.html b/Generated Documentation/html/pmm_8h_source.html index c103099..d715919 100644 --- a/Generated Documentation/html/pmm_8h_source.html +++ b/Generated Documentation/html/pmm_8h_source.html @@ -381,7 +381,7 @@ $(document).ready(function(){initNavTree('pmm_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/pmm__ex1__lpm4-5_8c.html b/Generated Documentation/html/pmm__ex1__lpm4-5_8c.html index 2c82ae1..9df3187 100644 --- a/Generated Documentation/html/pmm__ex1__lpm4-5_8c.html +++ b/Generated Documentation/html/pmm__ex1__lpm4-5_8c.html @@ -157,7 +157,7 @@ Functions diff --git a/Generated Documentation/html/pmm__ex1__lpm4-5_8c_source.html b/Generated Documentation/html/pmm__ex1__lpm4-5_8c_source.html index 6b4e7f1..44ed486 100644 --- a/Generated Documentation/html/pmm__ex1__lpm4-5_8c_source.html +++ b/Generated Documentation/html/pmm__ex1__lpm4-5_8c_source.html @@ -210,7 +210,7 @@ $(document).ready(function(){initNavTree('pmm__ex1__lpm4-5_8c_source.html',''); diff --git a/Generated Documentation/html/pmm__ex1__vcore3_8c.html b/Generated Documentation/html/pmm__ex1__vcore3_8c.html index 325d19e..6c4d28e 100644 --- a/Generated Documentation/html/pmm__ex1__vcore3_8c.html +++ b/Generated Documentation/html/pmm__ex1__vcore3_8c.html @@ -172,7 +172,7 @@ Variables diff --git a/Generated Documentation/html/pmm__ex1__vcore3_8c_source.html b/Generated Documentation/html/pmm__ex1__vcore3_8c_source.html index dcd2667..2219e9e 100644 --- a/Generated Documentation/html/pmm__ex1__vcore3_8c_source.html +++ b/Generated Documentation/html/pmm__ex1__vcore3_8c_source.html @@ -169,7 +169,7 @@ $(document).ready(function(){initNavTree('pmm__ex1__vcore3_8c_source.html',''); diff --git a/Generated Documentation/html/pmm__ex2__fast_wake_up_8c.html b/Generated Documentation/html/pmm__ex2__fast_wake_up_8c.html index a5fa6a5..5688c89 100644 --- a/Generated Documentation/html/pmm__ex2__fast_wake_up_8c.html +++ b/Generated Documentation/html/pmm__ex2__fast_wake_up_8c.html @@ -218,7 +218,7 @@ Functions diff --git a/Generated Documentation/html/pmm__ex2__fast_wake_up_8c_source.html b/Generated Documentation/html/pmm__ex2__fast_wake_up_8c_source.html index 56527ed..0b0d66a 100644 --- a/Generated Documentation/html/pmm__ex2__fast_wake_up_8c_source.html +++ b/Generated Documentation/html/pmm__ex2__fast_wake_up_8c_source.html @@ -274,7 +274,7 @@ $(document).ready(function(){initNavTree('pmm__ex2__fast_wake_up_8c_source.html' diff --git a/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c.html b/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c.html index bac1425..af579ce 100644 --- a/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c.html +++ b/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c.html @@ -156,7 +156,7 @@ Functions diff --git a/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c_source.html b/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c_source.html index 8491bf8..623d60c 100644 --- a/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c_source.html +++ b/Generated Documentation/html/pmm__ex2__vmon1160m_v_8c_source.html @@ -208,7 +208,7 @@ $(document).ready(function(){initNavTree('pmm__ex2__vmon1160m_v_8c_source.html', diff --git a/Generated Documentation/html/pmm__ex3__low_current_consumption_8c.html b/Generated Documentation/html/pmm__ex3__low_current_consumption_8c.html index 25f62da..f6c833a 100644 --- a/Generated Documentation/html/pmm__ex3__low_current_consumption_8c.html +++ b/Generated Documentation/html/pmm__ex3__low_current_consumption_8c.html @@ -217,7 +217,7 @@ Functions diff --git a/Generated Documentation/html/pmm__ex3__low_current_consumption_8c_source.html b/Generated Documentation/html/pmm__ex3__low_current_consumption_8c_source.html index dc59188..3b90753 100644 --- a/Generated Documentation/html/pmm__ex3__low_current_consumption_8c_source.html +++ b/Generated Documentation/html/pmm__ex3__low_current_consumption_8c_source.html @@ -280,7 +280,7 @@ $(document).ready(function(){initNavTree('pmm__ex3__low_current_consumption_8c_s diff --git a/Generated Documentation/html/power_design.html b/Generated Documentation/html/power_design.html index 62463fb..e897c8e 100644 --- a/Generated Documentation/html/power_design.html +++ b/Generated Documentation/html/power_design.html @@ -95,10 +95,13 @@ $(document).ready(function(){initNavTree('power_design.html',''); initResizable(

    Boost

    +Specifications

    +

    The boost converter is used to power the Sunseeker Lighting board. Vin will be the car battery giving a a 12V input. This will then be boosted to 16V output, with an output current of 2A. The lights do not need to turn on, the instant the battery turns on, so including a time may benefit the board.

    +

    LTSpice Simulations

      -
    • The LTSpice circuit includes input and output resistors for input and output power calculations
    • -
    • An RC circuit can be added at the input for time-delay for output capacitor charging
    • +
    • The LTSpice boost circuit includes input and output resistors for input and output power calculations per Dr. Bazuin. These resistors will not be included in the Altium schematic.
    • +
    • Dr. Bazuin suggested that an RC circuit can be added at the input for time-delay for output capacitor charging
    • Output power = (16V)(2A(max))=32 Watts
    • Input power = (12V)(Max FET current). Max FET current should be 2-3x the desired output current
    • Rsense = Vsense(min)/IL(max). Vsense is given in LT1619 Datasheet: 40mV(min). For IL, we are using max FET current
        @@ -106,17 +109,26 @@ LTSpice Simulations
      • Rsense is basically setting the current through the FET
    • -
    • Voltage divider equation can be found in datasheet for LT1619
    • +
    • Voltage divider equation can be found in datasheet for LT1619: Vout=(1.24V)(1+(R1/R2))
    • +
    • Setting the VC resistor effects the oscillation of the output voltage
    -

    +

    Altium

    • Inductor is 10uH MSS1210-103MEB. Dr. Bazuin suggested its use as Sunseeker has lots of them
    • Replaced the SI9804DY FET (used in LTSpice) with the FDS6680A as the SI is obsolete
    • Replaced the MBR735 Schottky (used in LTSpice) with the MBRD835LT4G because 735 is not surface mount
    -

    +

    Buck

    +

    +Specifications

    +

    The DC-DC buck regulator is a step-down converter used to lower the 12V input from the car battery to +3.3V to power the telemetry MCU.

    +

    The initial buck converter design utilized the

    +

    +LTSpice Simulations

    +

    +Altium

    asd

    asd

    @@ -126,7 +138,7 @@ Buck diff --git a/Generated Documentation/html/ram_8c.html b/Generated Documentation/html/ram_8c.html index b56f2a0..c399eb5 100644 --- a/Generated Documentation/html/ram_8c.html +++ b/Generated Documentation/html/ram_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('ram_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/ram_8c_source.html b/Generated Documentation/html/ram_8c_source.html index 7c228e7..0557c33 100644 --- a/Generated Documentation/html/ram_8c_source.html +++ b/Generated Documentation/html/ram_8c_source.html @@ -138,7 +138,7 @@ $(document).ready(function(){initNavTree('ram_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/ram_8h.html b/Generated Documentation/html/ram_8h.html index cf424f8..d42b70b 100644 --- a/Generated Documentation/html/ram_8h.html +++ b/Generated Documentation/html/ram_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('ram_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/ram_8h_source.html b/Generated Documentation/html/ram_8h_source.html index 8d19f75..4e50e34 100644 --- a/Generated Documentation/html/ram_8h_source.html +++ b/Generated Documentation/html/ram_8h_source.html @@ -168,7 +168,7 @@ $(document).ready(function(){initNavTree('ram_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/ram__ex1__set_sector_off_8c.html b/Generated Documentation/html/ram__ex1__set_sector_off_8c.html index 9b95f34..5340331 100644 --- a/Generated Documentation/html/ram__ex1__set_sector_off_8c.html +++ b/Generated Documentation/html/ram__ex1__set_sector_off_8c.html @@ -125,7 +125,7 @@ Functions

    RAM controller - Set sector0 to memory-retention mode.

    Setup the RAM controller to memory retention mode. Once watchdog expires and wakes up from LPM3 mode, checking the value in the sector0 and toggle P1.0 if the value is same as orignal value.

    -

    +

    Tested On: MSP430FR6989

    @@ -198,7 +198,7 @@ Tested On: MSP430FR6989 diff --git a/Generated Documentation/html/ram__ex1__set_sector_off_8c_source.html b/Generated Documentation/html/ram__ex1__set_sector_off_8c_source.html index da78116..739e50a 100644 --- a/Generated Documentation/html/ram__ex1__set_sector_off_8c_source.html +++ b/Generated Documentation/html/ram__ex1__set_sector_off_8c_source.html @@ -201,7 +201,7 @@ $(document).ready(function(){initNavTree('ram__ex1__set_sector_off_8c_source.htm diff --git a/Generated Documentation/html/ram__ex1__turn_off_sector_8c.html b/Generated Documentation/html/ram__ex1__turn_off_sector_8c.html index 5c4c0da..bf84b8e 100644 --- a/Generated Documentation/html/ram__ex1__turn_off_sector_8c.html +++ b/Generated Documentation/html/ram__ex1__turn_off_sector_8c.html @@ -170,7 +170,7 @@ Variables

    MSP430F5529 Demo - RAM controller turn off RAM sector

    Description: Switch RAM sector off instead of retention state during low low power modes.

    -

    +

    Tested On: MSP430F5529

    | | | |

    This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

      @@ -193,7 +193,7 @@ Tested On: MSP430F5529 diff --git a/Generated Documentation/html/ram__ex1__turn_off_sector_8c_source.html b/Generated Documentation/html/ram__ex1__turn_off_sector_8c_source.html index d769206..5f33866 100644 --- a/Generated Documentation/html/ram__ex1__turn_off_sector_8c_source.html +++ b/Generated Documentation/html/ram__ex1__turn_off_sector_8c_source.html @@ -203,7 +203,7 @@ $(document).ready(function(){initNavTree('ram__ex1__turn_off_sector_8c_source.ht diff --git a/Generated Documentation/html/ref_8c.html b/Generated Documentation/html/ref_8c.html index db5b064..9d87e08 100644 --- a/Generated Documentation/html/ref_8c.html +++ b/Generated Documentation/html/ref_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('ref_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/ref_8c_source.html b/Generated Documentation/html/ref_8c_source.html index 6264e6c..cae5b5a 100644 --- a/Generated Documentation/html/ref_8c_source.html +++ b/Generated Documentation/html/ref_8c_source.html @@ -191,7 +191,7 @@ $(document).ready(function(){initNavTree('ref_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/ref_8h.html b/Generated Documentation/html/ref_8h.html index eb667e7..3e923f8 100644 --- a/Generated Documentation/html/ref_8h.html +++ b/Generated Documentation/html/ref_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('ref_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/ref_8h_source.html b/Generated Documentation/html/ref_8h_source.html index e0e1871..beaf4f4 100644 --- a/Generated Documentation/html/ref_8h_source.html +++ b/Generated Documentation/html/ref_8h_source.html @@ -245,7 +245,7 @@ $(document).ready(function(){initNavTree('ref_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c.html b/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c.html index 887317a..7c1b830 100644 --- a/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c.html +++ b/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c_source.html b/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c_source.html index 2f64f2f..eab81b7 100644 --- a/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c_source.html +++ b/Generated Documentation/html/ref__a__ex1__ctl_a_d_c12_b_8c_source.html @@ -278,7 +278,7 @@ $(document).ready(function(){initNavTree('ref__a__ex1__ctl_a_d_c12_b_8c_source.h diff --git a/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c.html b/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c.html index c5bfcd6..9c6fa60 100644 --- a/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c.html +++ b/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c_source.html b/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c_source.html index a4cbac4..82acea4 100644 --- a/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c_source.html +++ b/Generated Documentation/html/ref__ex1___a_d_c12_ctl_8c_source.html @@ -229,7 +229,7 @@ $(document).ready(function(){initNavTree('ref__ex1___a_d_c12_ctl_8c_source.html' diff --git a/Generated Documentation/html/ref__ex1__internal_reference_8c.html b/Generated Documentation/html/ref__ex1__internal_reference_8c.html index 11483ae..cf08772 100644 --- a/Generated Documentation/html/ref__ex1__internal_reference_8c.html +++ b/Generated Documentation/html/ref__ex1__internal_reference_8c.html @@ -222,7 +222,7 @@ Functions diff --git a/Generated Documentation/html/ref__ex1__internal_reference_8c_source.html b/Generated Documentation/html/ref__ex1__internal_reference_8c_source.html index c88d004..003cafa 100644 --- a/Generated Documentation/html/ref__ex1__internal_reference_8c_source.html +++ b/Generated Documentation/html/ref__ex1__internal_reference_8c_source.html @@ -359,7 +359,7 @@ $(document).ready(function(){initNavTree('ref__ex1__internal_reference_8c_source diff --git a/Generated Documentation/html/resources.html b/Generated Documentation/html/resources.html index 681270e..78315bd 100644 --- a/Generated Documentation/html/resources.html +++ b/Generated Documentation/html/resources.html @@ -97,25 +97,25 @@ $(document).ready(function(){initNavTree('resources.html',''); initResizable();
    • microcontroller Microcontroller

    -

    +

    Altium Designer

    -

    +

    Learning Resources

    -

    +

    Importing Schematics/Footprints/3D Models

    -

    +

    Tips

    • Altium seems to crash upon saving, most likely due to file names/paths being too long, and it not knowing how to handle it, then crashing.
    • Whitespace characters seem to be safe to use in your file paths.
    -

    +

    Texas Instruments MSP430 Universal Clock System (UCS)

    • High-level Introductory Video
    • @@ -126,7 +126,7 @@ Texas Instruments MSP430 Universal Clock System (UCS) diff --git a/Generated Documentation/html/rtc__a_8c.html b/Generated Documentation/html/rtc__a_8c.html index 2145354..8dfc1e5 100644 --- a/Generated Documentation/html/rtc__a_8c.html +++ b/Generated Documentation/html/rtc__a_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('rtc__a_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/rtc__a_8c_source.html b/Generated Documentation/html/rtc__a_8c_source.html index 99bd7f1..99395c0 100644 --- a/Generated Documentation/html/rtc__a_8c_source.html +++ b/Generated Documentation/html/rtc__a_8c_source.html @@ -377,7 +377,7 @@ $(document).ready(function(){initNavTree('rtc__a_8c_source.html',''); initResiza diff --git a/Generated Documentation/html/rtc__a_8h.html b/Generated Documentation/html/rtc__a_8h.html index 8f4fc19..8c48925 100644 --- a/Generated Documentation/html/rtc__a_8h.html +++ b/Generated Documentation/html/rtc__a_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('rtc__a_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/rtc__a_8h_source.html b/Generated Documentation/html/rtc__a_8h_source.html index 21b08b2..685ff37 100644 --- a/Generated Documentation/html/rtc__a_8h_source.html +++ b/Generated Documentation/html/rtc__a_8h_source.html @@ -454,7 +454,7 @@ $(document).ready(function(){initNavTree('rtc__a_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/rtc__a__ex1__calendermode_8c.html b/Generated Documentation/html/rtc__a__ex1__calendermode_8c.html index 8dbd1cd..99cfef9 100644 --- a/Generated Documentation/html/rtc__a__ex1__calendermode_8c.html +++ b/Generated Documentation/html/rtc__a__ex1__calendermode_8c.html @@ -198,7 +198,7 @@ Variables diff --git a/Generated Documentation/html/rtc__a__ex1__calendermode_8c_source.html b/Generated Documentation/html/rtc__a__ex1__calendermode_8c_source.html index d8afc94..a76a528 100644 --- a/Generated Documentation/html/rtc__a__ex1__calendermode_8c_source.html +++ b/Generated Documentation/html/rtc__a__ex1__calendermode_8c_source.html @@ -251,7 +251,7 @@ $(document).ready(function(){initNavTree('rtc__a__ex1__calendermode_8c_source.ht diff --git a/Generated Documentation/html/rtc__a__ex2__countermode_8c.html b/Generated Documentation/html/rtc__a__ex2__countermode_8c.html index f694179..84c6445 100644 --- a/Generated Documentation/html/rtc__a__ex2__countermode_8c.html +++ b/Generated Documentation/html/rtc__a__ex2__countermode_8c.html @@ -169,7 +169,7 @@ Functions diff --git a/Generated Documentation/html/rtc__a__ex2__countermode_8c_source.html b/Generated Documentation/html/rtc__a__ex2__countermode_8c_source.html index be344f9..7911102 100644 --- a/Generated Documentation/html/rtc__a__ex2__countermode_8c_source.html +++ b/Generated Documentation/html/rtc__a__ex2__countermode_8c_source.html @@ -223,7 +223,7 @@ $(document).ready(function(){initNavTree('rtc__a__ex2__countermode_8c_source.htm diff --git a/Generated Documentation/html/rtc__b_8c.html b/Generated Documentation/html/rtc__b_8c.html index 1ff5045..3f80d52 100644 --- a/Generated Documentation/html/rtc__b_8c.html +++ b/Generated Documentation/html/rtc__b_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('rtc__b_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/rtc__b_8c_source.html b/Generated Documentation/html/rtc__b_8c_source.html index ba1ed6c..ef6aac7 100644 --- a/Generated Documentation/html/rtc__b_8c_source.html +++ b/Generated Documentation/html/rtc__b_8c_source.html @@ -336,7 +336,7 @@ $(document).ready(function(){initNavTree('rtc__b_8c_source.html',''); initResiza diff --git a/Generated Documentation/html/rtc__b_8h.html b/Generated Documentation/html/rtc__b_8h.html index 84c1d0b..9c83133 100644 --- a/Generated Documentation/html/rtc__b_8h.html +++ b/Generated Documentation/html/rtc__b_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('rtc__b_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/rtc__b_8h_source.html b/Generated Documentation/html/rtc__b_8h_source.html index 7e8afc8..609f3ff 100644 --- a/Generated Documentation/html/rtc__b_8h_source.html +++ b/Generated Documentation/html/rtc__b_8h_source.html @@ -378,7 +378,7 @@ $(document).ready(function(){initNavTree('rtc__b_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c.html b/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c.html index d348263..0127eae 100644 --- a/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c.html +++ b/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c.html @@ -170,7 +170,7 @@ Variables

    RTC_B in Calendar mode with LPM0, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

    This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

    -

    +

    Tested On: MSP430F6638

    /|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

    This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

      @@ -194,7 +194,7 @@ Tested On: MSP430F6638 diff --git a/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c_source.html b/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c_source.html index be85698..24b3343 100644 --- a/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c_source.html +++ b/Generated Documentation/html/rtc__b__ex1__calendermode_l_p_m0_8c_source.html @@ -242,7 +242,7 @@ $(document).ready(function(){initNavTree('rtc__b__ex1__calendermode_l_p_m0_8c_so diff --git a/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c.html b/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c.html index 60fb337..9054a7d 100644 --- a/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c.html +++ b/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c.html @@ -170,7 +170,7 @@ Variables

    RTC_B in Calendar mode with LPM3, Interruptions every 1s, 1m, and 5th day of week at 5:00pm

    This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz

    -

    +

    Tested On: MSP430F6638

    /|\ | XIN|- | | | 32kHz —|RST XOUT|- | | | P1.0 |--> Toggles every second | |

    This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board:

      @@ -195,7 +195,7 @@ Tested On: MSP430F6638 diff --git a/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c_source.html b/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c_source.html index 20fb071..5815186 100644 --- a/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c_source.html +++ b/Generated Documentation/html/rtc__b__ex2__calendermode_l_p_m3_8c_source.html @@ -248,7 +248,7 @@ $(document).ready(function(){initNavTree('rtc__b__ex2__calendermode_l_p_m3_8c_so diff --git a/Generated Documentation/html/rtc__c_8c.html b/Generated Documentation/html/rtc__c_8c.html index 965aa64..818f27f 100644 --- a/Generated Documentation/html/rtc__c_8c.html +++ b/Generated Documentation/html/rtc__c_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('rtc__c_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/rtc__c_8c_source.html b/Generated Documentation/html/rtc__c_8c_source.html index 03a6b89..5ffde04 100644 --- a/Generated Documentation/html/rtc__c_8c_source.html +++ b/Generated Documentation/html/rtc__c_8c_source.html @@ -446,7 +446,7 @@ $(document).ready(function(){initNavTree('rtc__c_8c_source.html',''); initResiza diff --git a/Generated Documentation/html/rtc__c_8h.html b/Generated Documentation/html/rtc__c_8h.html index 23f00f2..ba64ba2 100644 --- a/Generated Documentation/html/rtc__c_8h.html +++ b/Generated Documentation/html/rtc__c_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('rtc__c_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/rtc__c_8h_source.html b/Generated Documentation/html/rtc__c_8h_source.html index 3d950aa..ade9756 100644 --- a/Generated Documentation/html/rtc__c_8h_source.html +++ b/Generated Documentation/html/rtc__c_8h_source.html @@ -485,7 +485,7 @@ $(document).ready(function(){initNavTree('rtc__c_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/rtc__ex1__countmode_8c.html b/Generated Documentation/html/rtc__ex1__countmode_8c.html index b71a5b9..51a29d8 100644 --- a/Generated Documentation/html/rtc__ex1__countmode_8c.html +++ b/Generated Documentation/html/rtc__ex1__countmode_8c.html @@ -193,7 +193,7 @@ Functions diff --git a/Generated Documentation/html/rtc__ex1__countmode_8c_source.html b/Generated Documentation/html/rtc__ex1__countmode_8c_source.html index 97fb291..5f0d449 100644 --- a/Generated Documentation/html/rtc__ex1__countmode_8c_source.html +++ b/Generated Documentation/html/rtc__ex1__countmode_8c_source.html @@ -216,7 +216,7 @@ $(document).ready(function(){initNavTree('rtc__ex1__countmode_8c_source.html','' diff --git a/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c.html b/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c.html index 20592d7..5451d3b 100644 --- a/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c.html +++ b/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c.html @@ -133,7 +133,7 @@ Functions diff --git a/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c_source.html b/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c_source.html index c3b4855..39bea40 100644 --- a/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c_source.html +++ b/Generated Documentation/html/sac__ex1__oa_g_p_mode_8c_source.html @@ -183,7 +183,7 @@ $(document).ready(function(){initNavTree('sac__ex1__oa_g_p_mode_8c_source.html', diff --git a/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c.html b/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c.html index a631161..04bf460 100644 --- a/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c.html +++ b/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c.html @@ -133,7 +133,7 @@ Functions diff --git a/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c_source.html b/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c_source.html index 591e104..1ca8497 100644 --- a/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c_source.html +++ b/Generated Documentation/html/sac__ex2__unity_gain_buffer_mode_8c_source.html @@ -183,7 +183,7 @@ $(document).ready(function(){initNavTree('sac__ex2__unity_gain_buffer_mode_8c_so diff --git a/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c.html b/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c.html index e8adc21..9976db2 100644 --- a/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c.html +++ b/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c.html @@ -159,7 +159,7 @@ Variables diff --git a/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c_source.html b/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c_source.html index 13022ae..c2909ed 100644 --- a/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c_source.html +++ b/Generated Documentation/html/sac__ex3__two_stage_amplifier_8c_source.html @@ -340,7 +340,7 @@ $(document).ready(function(){initNavTree('sac__ex3__two_stage_amplifier_8c_sourc diff --git a/Generated Documentation/html/sac__ex4__ecomp_8c.html b/Generated Documentation/html/sac__ex4__ecomp_8c.html index df390e2..cb69da5 100644 --- a/Generated Documentation/html/sac__ex4__ecomp_8c.html +++ b/Generated Documentation/html/sac__ex4__ecomp_8c.html @@ -156,7 +156,7 @@ Variables diff --git a/Generated Documentation/html/sac__ex4__ecomp_8c_source.html b/Generated Documentation/html/sac__ex4__ecomp_8c_source.html index 5047b25..088c537 100644 --- a/Generated Documentation/html/sac__ex4__ecomp_8c_source.html +++ b/Generated Documentation/html/sac__ex4__ecomp_8c_source.html @@ -306,7 +306,7 @@ $(document).ready(function(){initNavTree('sac__ex4__ecomp_8c_source.html',''); i diff --git a/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c.html b/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c.html index bae6cdb..6512e9f 100644 --- a/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c.html +++ b/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c.html @@ -433,7 +433,7 @@ Variables diff --git a/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c_source.html b/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c_source.html index 6e1ee86..ab0695a 100644 --- a/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c_source.html +++ b/Generated Documentation/html/saph__a__ex3__pulse_generation_d_m_a_8c_source.html @@ -480,7 +480,7 @@ $(document).ready(function(){initNavTree('saph__a__ex3__pulse_generation_d_m_a_8 diff --git a/Generated Documentation/html/saph__ex1__pulse_generation_8c.html b/Generated Documentation/html/saph__ex1__pulse_generation_8c.html index 2518462..293ac68 100644 --- a/Generated Documentation/html/saph__ex1__pulse_generation_8c.html +++ b/Generated Documentation/html/saph__ex1__pulse_generation_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/saph__ex1__pulse_generation_8c_source.html b/Generated Documentation/html/saph__ex1__pulse_generation_8c_source.html index 80b0614..2f57254 100644 --- a/Generated Documentation/html/saph__ex1__pulse_generation_8c_source.html +++ b/Generated Documentation/html/saph__ex1__pulse_generation_8c_source.html @@ -318,7 +318,7 @@ $(document).ready(function(){initNavTree('saph__ex1__pulse_generation_8c_source. diff --git a/Generated Documentation/html/sd24__b_8c.html b/Generated Documentation/html/sd24__b_8c.html index 12d1e1f..4a9707e 100644 --- a/Generated Documentation/html/sd24__b_8c.html +++ b/Generated Documentation/html/sd24__b_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('sd24__b_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/sd24__b_8c_source.html b/Generated Documentation/html/sd24__b_8c_source.html index c3b9015..90e2640 100644 --- a/Generated Documentation/html/sd24__b_8c_source.html +++ b/Generated Documentation/html/sd24__b_8c_source.html @@ -369,7 +369,7 @@ $(document).ready(function(){initNavTree('sd24__b_8c_source.html',''); initResiz diff --git a/Generated Documentation/html/sd24__b_8h.html b/Generated Documentation/html/sd24__b_8h.html index 9d56b8b..d534fff 100644 --- a/Generated Documentation/html/sd24__b_8h.html +++ b/Generated Documentation/html/sd24__b_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('sd24__b_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/sd24__b_8h_source.html b/Generated Documentation/html/sd24__b_8h_source.html index ff94a05..8432782 100644 --- a/Generated Documentation/html/sd24__b_8h_source.html +++ b/Generated Documentation/html/sd24__b_8h_source.html @@ -546,7 +546,7 @@ $(document).ready(function(){initNavTree('sd24__b_8h_source.html',''); initResiz diff --git a/Generated Documentation/html/sd24__b__ex1__single_conv_single_channel_8c.html b/Generated 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a/Generated Documentation/html/sd24__b__ex2__single_conv_channel_group_8c.html +++ b/Generated Documentation/html/sd24__b__ex2__single_conv_channel_group_8c.html @@ -181,7 +181,7 @@ Variables diff --git a/Generated Documentation/html/sd24__b__ex2__single_conv_channel_group_8c_source.html b/Generated Documentation/html/sd24__b__ex2__single_conv_channel_group_8c_source.html index 196c129..739ff5f 100644 --- a/Generated Documentation/html/sd24__b__ex2__single_conv_channel_group_8c_source.html +++ b/Generated Documentation/html/sd24__b__ex2__single_conv_channel_group_8c_source.html @@ -271,7 +271,7 @@ $(document).ready(function(){initNavTree('sd24__b__ex2__single_conv_channel_grou diff --git a/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c.html b/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c.html index 83d91d1..4a2f5c1 100644 --- a/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c.html +++ b/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c.html @@ -200,7 +200,7 @@ Variables diff --git a/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c_source.html b/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c_source.html index 58afe9d..7896757 100644 --- a/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c_source.html +++ b/Generated Documentation/html/sd24__b__ex3__cont_conv_single_channel_8c_source.html @@ -244,7 +244,7 @@ $(document).ready(function(){initNavTree('sd24__b__ex3__cont_conv_single_channel diff --git a/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c.html b/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c.html index eb01c57..025781f 100644 --- a/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c.html +++ b/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c.html @@ -264,7 +264,7 @@ Variables diff --git a/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c_source.html b/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c_source.html index e4321b3..f453989 100644 --- a/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c_source.html +++ b/Generated Documentation/html/sd24__ex1__continuous_conversion_group_channels_8c_source.html @@ -268,7 +268,7 @@ $(document).ready(function(){initNavTree('sd24__ex1__continuous_conversion_group diff --git a/Generated Documentation/html/sd24__ex2__single_conversion_group_channels_8c.html b/Generated Documentation/html/sd24__ex2__single_conversion_group_channels_8c.html index 3f8814d..a57c3f8 100644 --- a/Generated Documentation/html/sd24__ex2__single_conversion_group_channels_8c.html +++ b/Generated Documentation/html/sd24__ex2__single_conversion_group_channels_8c.html @@ -181,7 +181,7 @@ Variables diff --git a/Generated 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Documentation/html/sd24__ex4__single_conversion_single_channel_polling_8c_source.html b/Generated Documentation/html/sd24__ex4__single_conversion_single_channel_polling_8c_source.html index f963b27..02853df 100644 --- a/Generated Documentation/html/sd24__ex4__single_conversion_single_channel_polling_8c_source.html +++ b/Generated Documentation/html/sd24__ex4__single_conversion_single_channel_polling_8c_source.html @@ -209,7 +209,7 @@ $(document).ready(function(){initNavTree('sd24__ex4__single_conversion_single_ch diff --git a/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c.html b/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c.html index 971d959..59e3577 100644 --- a/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c.html +++ b/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c.html @@ -201,7 +201,7 @@ Variables diff --git a/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c_source.html b/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c_source.html index 9ec5f31..7410cc9 100644 --- a/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c_source.html +++ b/Generated Documentation/html/sd24__ex5__single_conversion_single_channel_interrupt_8c_source.html @@ -234,7 +234,7 @@ $(document).ready(function(){initNavTree('sd24__ex5__single_conversion_single_ch diff --git a/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c.html b/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c.html index 412dedf..1ccd234 100644 --- a/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c.html +++ b/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c.html @@ -201,7 +201,7 @@ Variables diff --git a/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c_source.html b/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c_source.html index 25a42a9..51141b1 100644 --- a/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c_source.html +++ b/Generated Documentation/html/sd24__ex6__single_conversion_single_conversion_temp_sensor_8c_source.html @@ -253,7 +253,7 @@ $(document).ready(function(){initNavTree('sd24__ex6__single_conversion_single_co diff --git a/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c.html b/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c.html index 813f9b6..d48d1e2 100644 --- a/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c.html +++ b/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c_source.html b/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c_source.html index 68265bd..f7dc425 100644 --- a/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c_source.html +++ b/Generated Documentation/html/sdhs__ex1__8msps__sampling_8c_source.html @@ -389,7 +389,7 @@ $(document).ready(function(){initNavTree('sdhs__ex1__8msps__sampling_8c_source.h diff --git a/Generated Documentation/html/sfr_8c.html b/Generated Documentation/html/sfr_8c.html index fdfcb01..011b352 100644 --- a/Generated Documentation/html/sfr_8c.html +++ b/Generated Documentation/html/sfr_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('sfr_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/sfr_8c_source.html b/Generated Documentation/html/sfr_8c_source.html index f02daf4..00cf4b8 100644 --- a/Generated Documentation/html/sfr_8c_source.html +++ b/Generated Documentation/html/sfr_8c_source.html @@ -162,7 +162,7 @@ $(document).ready(function(){initNavTree('sfr_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/sfr_8h.html b/Generated Documentation/html/sfr_8h.html index 763221f..c754a79 100644 --- a/Generated Documentation/html/sfr_8h.html +++ b/Generated Documentation/html/sfr_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('sfr_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/sfr_8h_source.html b/Generated Documentation/html/sfr_8h_source.html index 9199124..6891af2 100644 --- a/Generated Documentation/html/sfr_8h_source.html +++ b/Generated Documentation/html/sfr_8h_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('sfr_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/software.html b/Generated Documentation/html/software.html index c394d49..b59d356 100644 --- a/Generated Documentation/html/software.html +++ b/Generated Documentation/html/software.html @@ -98,7 +98,7 @@ $(document).ready(function(){initNavTree('software.html',''); initResizable(); } diff --git a/Generated Documentation/html/sysctl_8c.html b/Generated Documentation/html/sysctl_8c.html index e38749b..90b7fa2 100644 --- a/Generated Documentation/html/sysctl_8c.html +++ b/Generated Documentation/html/sysctl_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('sysctl_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/sysctl_8c_source.html b/Generated Documentation/html/sysctl_8c_source.html index c8df2a6..46f1b34 100644 --- a/Generated Documentation/html/sysctl_8c_source.html +++ b/Generated Documentation/html/sysctl_8c_source.html @@ -230,7 +230,7 @@ $(document).ready(function(){initNavTree('sysctl_8c_source.html',''); initResiza diff --git a/Generated Documentation/html/sysctl_8h.html b/Generated Documentation/html/sysctl_8h.html index 12e7e8b..b7e4a71 100644 --- a/Generated Documentation/html/sysctl_8h.html +++ b/Generated Documentation/html/sysctl_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('sysctl_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/sysctl_8h_source.html b/Generated Documentation/html/sysctl_8h_source.html index 4ba9871..6cced81 100644 --- a/Generated Documentation/html/sysctl_8h_source.html +++ b/Generated Documentation/html/sysctl_8h_source.html @@ -329,7 +329,7 @@ $(document).ready(function(){initNavTree('sysctl_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/tec_8c.html b/Generated Documentation/html/tec_8c.html index 226d905..978b15d 100644 --- a/Generated Documentation/html/tec_8c.html +++ b/Generated Documentation/html/tec_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('tec_8c.html',''); initResizable(); }); diff --git a/Generated Documentation/html/tec_8c_source.html b/Generated Documentation/html/tec_8c_source.html index 382d15e..11a3b76 100644 --- a/Generated Documentation/html/tec_8c_source.html +++ b/Generated Documentation/html/tec_8c_source.html @@ -249,7 +249,7 @@ $(document).ready(function(){initNavTree('tec_8c_source.html',''); initResizable diff --git a/Generated Documentation/html/tec_8h.html b/Generated Documentation/html/tec_8h.html index d8fe46d..6d8134a 100644 --- a/Generated Documentation/html/tec_8h.html +++ b/Generated Documentation/html/tec_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('tec_8h.html',''); initResizable(); }); diff --git a/Generated Documentation/html/tec_8h_source.html b/Generated Documentation/html/tec_8h_source.html index 339a02b..11ce1b7 100644 --- a/Generated Documentation/html/tec_8h_source.html +++ b/Generated Documentation/html/tec_8h_source.html @@ -368,7 +368,7 @@ $(document).ready(function(){initNavTree('tec_8h_source.html',''); initResizable diff --git a/Generated Documentation/html/tec__ex1__sync_timers_8c.html b/Generated Documentation/html/tec__ex1__sync_timers_8c.html index 5e11154..de4f880 100644 --- a/Generated Documentation/html/tec__ex1__sync_timers_8c.html +++ b/Generated Documentation/html/tec__ex1__sync_timers_8c.html @@ -173,7 +173,7 @@ Functions diff --git a/Generated Documentation/html/tec__ex1__sync_timers_8c_source.html b/Generated Documentation/html/tec__ex1__sync_timers_8c_source.html index c0cb504..0274795 100644 --- a/Generated Documentation/html/tec__ex1__sync_timers_8c_source.html +++ b/Generated Documentation/html/tec__ex1__sync_timers_8c_source.html @@ -304,7 +304,7 @@ $(document).ready(function(){initNavTree('tec__ex1__sync_timers_8c_source.html', diff --git a/Generated Documentation/html/tec__ex2__ext_clear_input_8c.html b/Generated Documentation/html/tec__ex2__ext_clear_input_8c.html index 2cf6aae..94fe58b 100644 --- a/Generated Documentation/html/tec__ex2__ext_clear_input_8c.html +++ b/Generated Documentation/html/tec__ex2__ext_clear_input_8c.html @@ -173,7 +173,7 @@ Functions diff --git a/Generated Documentation/html/tec__ex2__ext_clear_input_8c_source.html b/Generated Documentation/html/tec__ex2__ext_clear_input_8c_source.html index e1ead6d..dcae397 100644 --- a/Generated Documentation/html/tec__ex2__ext_clear_input_8c_source.html +++ b/Generated Documentation/html/tec__ex2__ext_clear_input_8c_source.html @@ -299,7 +299,7 @@ $(document).ready(function(){initNavTree('tec__ex2__ext_clear_input_8c_source.ht diff --git a/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java.html b/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java.html index 8903414..76abe55 100644 --- a/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java.html +++ b/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java.html @@ -108,7 +108,7 @@ Data Structures diff --git a/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java_source.html b/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java_source.html index 43e545e..e93bad4 100644 --- a/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java_source.html +++ b/Generated Documentation/html/ti__mcu__msp430__driverlib__product_8java_source.html @@ -497,7 +497,7 @@ $(document).ready(function(){initNavTree('ti__mcu__msp430__driverlib__product_8j diff --git a/Generated Documentation/html/tia__ex1__two_external_inputs_8c.html b/Generated Documentation/html/tia__ex1__two_external_inputs_8c.html index e8e3ce7..2cc89bf 100644 --- a/Generated Documentation/html/tia__ex1__two_external_inputs_8c.html +++ b/Generated Documentation/html/tia__ex1__two_external_inputs_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/tia__ex1__two_external_inputs_8c_source.html b/Generated Documentation/html/tia__ex1__two_external_inputs_8c_source.html index 25133be..7280a94 100644 --- a/Generated Documentation/html/tia__ex1__two_external_inputs_8c_source.html +++ b/Generated Documentation/html/tia__ex1__two_external_inputs_8c_source.html @@ -185,7 +185,7 @@ $(document).ready(function(){initNavTree('tia__ex1__two_external_inputs_8c_sourc diff --git a/Generated Documentation/html/timer__a_8c.html b/Generated Documentation/html/timer__a_8c.html index f373ef0..96d2e2f 100644 --- a/Generated Documentation/html/timer__a_8c.html +++ b/Generated Documentation/html/timer__a_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('timer__a_8c.html',''); initResizable() diff --git a/Generated Documentation/html/timer__a_8c_source.html b/Generated Documentation/html/timer__a_8c_source.html index 722d4ad..37be3d0 100644 --- a/Generated Documentation/html/timer__a_8c_source.html +++ b/Generated Documentation/html/timer__a_8c_source.html @@ -432,7 +432,7 @@ $(document).ready(function(){initNavTree('timer__a_8c_source.html',''); initResi diff --git a/Generated Documentation/html/timer__a_8h.html b/Generated Documentation/html/timer__a_8h.html index 7662ea3..ef1194c 100644 --- a/Generated Documentation/html/timer__a_8h.html +++ b/Generated Documentation/html/timer__a_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('timer__a_8h.html',''); initResizable() diff --git a/Generated Documentation/html/timer__a_8h_source.html b/Generated Documentation/html/timer__a_8h_source.html index eee44ea..490b7f7 100644 --- a/Generated Documentation/html/timer__a_8h_source.html +++ b/Generated Documentation/html/timer__a_8h_source.html @@ -605,7 +605,7 @@ $(document).ready(function(){initNavTree('timer__a_8h_source.html',''); initResi diff --git a/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c.html b/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c.html index 5f06209..e869224 100644 --- a/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c.html +++ b/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c_source.html b/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c_source.html index 3aa368c..a8604ca 100644 --- a/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c_source.html +++ b/Generated Documentation/html/timer__a__ex1__continuous_overflow_interrupt_8c_source.html @@ -200,7 +200,7 @@ $(document).ready(function(){initNavTree('timer__a__ex1__continuous_overflow_int diff --git a/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c.html b/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c.html index b68f118..5f44d28 100644 --- a/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c.html +++ b/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c.html @@ -173,7 +173,7 @@ Functions diff --git a/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c_source.html b/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c_source.html index 8f14c6f..bfb118c 100644 --- a/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c_source.html +++ b/Generated Documentation/html/timer__a__ex2__single_p_w_m_8c_source.html @@ -195,7 +195,7 @@ $(document).ready(function(){initNavTree('timer__a__ex2__single_p_w_m_8c_source. diff --git a/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c.html b/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c.html index 8270e90..20aa46f 100644 --- a/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c.html +++ b/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c.html @@ -177,7 +177,7 @@ Functions diff --git a/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c_source.html b/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c_source.html index 4295cfe..d6140ae 100644 --- a/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c_source.html +++ b/Generated Documentation/html/timer__a__ex3__up_mode_interrupt_8c_source.html @@ -209,7 +209,7 @@ $(document).ready(function(){initNavTree('timer__a__ex3__up_mode_interrupt_8c_so diff --git a/Generated Documentation/html/timer__a__ex4__period_capture_8c.html b/Generated Documentation/html/timer__a__ex4__period_capture_8c.html index 1e4316d..5ffa7b4 100644 --- a/Generated Documentation/html/timer__a__ex4__period_capture_8c.html +++ b/Generated Documentation/html/timer__a__ex4__period_capture_8c.html @@ -224,7 +224,7 @@ Variables diff --git a/Generated Documentation/html/timer__a__ex4__period_capture_8c_source.html b/Generated Documentation/html/timer__a__ex4__period_capture_8c_source.html index d541410..1a0a825 100644 --- a/Generated Documentation/html/timer__a__ex4__period_capture_8c_source.html +++ b/Generated Documentation/html/timer__a__ex4__period_capture_8c_source.html @@ -261,7 +261,7 @@ $(document).ready(function(){initNavTree('timer__a__ex4__period_capture_8c_sourc diff --git a/Generated Documentation/html/timer__b_8c.html b/Generated Documentation/html/timer__b_8c.html index 9a37226..7a710e1 100644 --- a/Generated Documentation/html/timer__b_8c.html +++ b/Generated Documentation/html/timer__b_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('timer__b_8c.html',''); initResizable() diff --git a/Generated Documentation/html/timer__b_8c_source.html b/Generated Documentation/html/timer__b_8c_source.html index 3e6b803..c446162 100644 --- a/Generated Documentation/html/timer__b_8c_source.html +++ b/Generated Documentation/html/timer__b_8c_source.html @@ -466,7 +466,7 @@ $(document).ready(function(){initNavTree('timer__b_8c_source.html',''); initResi diff --git a/Generated Documentation/html/timer__b_8h.html b/Generated Documentation/html/timer__b_8h.html index 1e3a1d8..1f41d2f 100644 --- a/Generated Documentation/html/timer__b_8h.html +++ b/Generated Documentation/html/timer__b_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('timer__b_8h.html',''); initResizable() diff --git a/Generated Documentation/html/timer__b_8h_source.html b/Generated Documentation/html/timer__b_8h_source.html index fb9cda1..3fbf4c7 100644 --- a/Generated Documentation/html/timer__b_8h_source.html +++ b/Generated Documentation/html/timer__b_8h_source.html @@ -661,7 +661,7 @@ $(document).ready(function(){initNavTree('timer__b_8h_source.html',''); initResi diff --git a/Generated Documentation/html/timer__d_8c.html b/Generated Documentation/html/timer__d_8c.html index d2666b3..4527a9c 100644 --- a/Generated Documentation/html/timer__d_8c.html +++ b/Generated Documentation/html/timer__d_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('timer__d_8c.html',''); initResizable() diff --git a/Generated Documentation/html/timer__d_8c_source.html b/Generated Documentation/html/timer__d_8c_source.html index 39848d0..33e3e5f 100644 --- a/Generated Documentation/html/timer__d_8c_source.html +++ b/Generated Documentation/html/timer__d_8c_source.html @@ -654,7 +654,7 @@ $(document).ready(function(){initNavTree('timer__d_8c_source.html',''); initResi diff --git a/Generated Documentation/html/timer__d_8h.html b/Generated Documentation/html/timer__d_8h.html index 5c04c8a..6e07a2f 100644 --- a/Generated Documentation/html/timer__d_8h.html +++ b/Generated Documentation/html/timer__d_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('timer__d_8h.html',''); initResizable() diff --git a/Generated Documentation/html/timer__d_8h_source.html b/Generated Documentation/html/timer__d_8h_source.html index 27cae71..9f0a77a 100644 --- a/Generated Documentation/html/timer__d_8h_source.html +++ b/Generated Documentation/html/timer__d_8h_source.html @@ -921,7 +921,7 @@ $(document).ready(function(){initNavTree('timer__d_8h_source.html',''); initResi diff --git a/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c.html b/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c.html index 429494c..74866bb 100644 --- a/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c.html +++ b/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c.html @@ -321,7 +321,7 @@ Variables diff --git a/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c_source.html b/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c_source.html index 7968923..bba854a 100644 --- a/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c_source.html +++ b/Generated Documentation/html/timer__d__ex10__duty_cycle_measurement_dual_8c_source.html @@ -348,7 +348,7 @@ $(document).ready(function(){initNavTree('timer__d__ex10__duty_cycle_measurement diff --git a/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c.html b/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c.html index 4b3a19f..4587613 100644 --- a/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c.html +++ b/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c_source.html b/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c_source.html index 09d6e37..cd8a008 100644 --- a/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c_source.html +++ b/Generated Documentation/html/timer__d__ex1__cont_c_r_r0_8c_source.html @@ -218,7 +218,7 @@ $(document).ready(function(){initNavTree('timer__d__ex1__cont_c_r_r0_8c_source.h diff --git a/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c.html b/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c.html index 1620896..b3d40de 100644 --- a/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c.html +++ b/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c_source.html b/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c_source.html index a182c65..41eae4f 100644 --- a/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c_source.html +++ b/Generated Documentation/html/timer__d__ex2__overflow_i_s_r_8c_source.html @@ -220,7 +220,7 @@ $(document).ready(function(){initNavTree('timer__d__ex2__overflow_i_s_r_8c_sourc diff --git a/Generated Documentation/html/timer__d__ex3__up_down_mode_8c.html b/Generated Documentation/html/timer__d__ex3__up_down_mode_8c.html index a4d6ed3..dfa9aaa 100644 --- a/Generated Documentation/html/timer__d__ex3__up_down_mode_8c.html +++ b/Generated Documentation/html/timer__d__ex3__up_down_mode_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex3__up_down_mode_8c_source.html b/Generated Documentation/html/timer__d__ex3__up_down_mode_8c_source.html index fb9c283..1f92c7d 100644 --- a/Generated Documentation/html/timer__d__ex3__up_down_mode_8c_source.html +++ b/Generated Documentation/html/timer__d__ex3__up_down_mode_8c_source.html @@ -211,7 +211,7 @@ $(document).ready(function(){initNavTree('timer__d__ex3__up_down_mode_8c_source. diff --git a/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c.html b/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c.html index 462f0bf..48177ba 100644 --- a/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c.html +++ b/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c_source.html b/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c_source.html index 96e163d..892956c 100644 --- a/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c_source.html +++ b/Generated Documentation/html/timer__d__ex4__pwm_up_down_mode_8c_source.html @@ -202,7 +202,7 @@ $(document).ready(function(){initNavTree('timer__d__ex4__pwm_up_down_mode_8c_sou diff --git a/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c.html b/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c.html index 02b2be2..d03cda9 100644 --- a/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c.html +++ b/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c_source.html b/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c_source.html index 8682fd0..476c798 100644 --- a/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c_source.html +++ b/Generated Documentation/html/timer__d__ex5__hi_res_free_running_p_w_m_8c_source.html @@ -234,7 +234,7 @@ $(document).ready(function(){initNavTree('timer__d__ex5__hi_res_free_running_p_w diff --git a/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c.html b/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c.html index 95e6256..c42f3d8 100644 --- a/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c.html +++ b/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c.html @@ -154,7 +154,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c_source.html b/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c_source.html index 19a1209..3985bf9 100644 --- a/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c_source.html +++ b/Generated Documentation/html/timer__d__ex6__hi_res_regulated_p_w_m_8c_source.html @@ -290,7 +290,7 @@ $(document).ready(function(){initNavTree('timer__d__ex6__hi_res_regulated_p_w_m_ diff --git a/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c.html b/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c.html index d94ccbf..88c0ced 100644 --- a/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c.html +++ b/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c_source.html b/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c_source.html index 18e1437..78c6b6d 100644 --- a/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c_source.html +++ b/Generated Documentation/html/timer__d__ex7__combine_regs_p_w_m_8c_source.html @@ -228,7 +228,7 @@ $(document).ready(function(){initNavTree('timer__d__ex7__combine_regs_p_w_m_8c_s diff --git a/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c.html b/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c.html index 5ddbd61..74a27e0 100644 --- a/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c.html +++ b/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c.html @@ -321,7 +321,7 @@ Variables diff --git a/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c_source.html b/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c_source.html index 2bd0351..dd04710 100644 --- a/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c_source.html +++ b/Generated Documentation/html/timer__d__ex8__duty_cycle_measurement_single_8c_source.html @@ -359,7 +359,7 @@ $(document).ready(function(){initNavTree('timer__d__ex8__duty_cycle_measurement_ diff --git a/Generated Documentation/html/timer__d__ex9__period_measurement_8c.html b/Generated Documentation/html/timer__d__ex9__period_measurement_8c.html index 3c927ed..294dabc 100644 --- a/Generated Documentation/html/timer__d__ex9__period_measurement_8c.html +++ b/Generated Documentation/html/timer__d__ex9__period_measurement_8c.html @@ -252,7 +252,7 @@ Variables diff --git a/Generated Documentation/html/timer__d__ex9__period_measurement_8c_source.html b/Generated Documentation/html/timer__d__ex9__period_measurement_8c_source.html index 66b5a45..599b41e 100644 --- a/Generated Documentation/html/timer__d__ex9__period_measurement_8c_source.html +++ b/Generated Documentation/html/timer__d__ex9__period_measurement_8c_source.html @@ -332,7 +332,7 @@ $(document).ready(function(){initNavTree('timer__d__ex9__period_measurement_8c_s diff --git a/Generated Documentation/html/tlv_8c.html b/Generated Documentation/html/tlv_8c.html index 230d5d6..55377bb 100644 --- a/Generated Documentation/html/tlv_8c.html +++ b/Generated Documentation/html/tlv_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('tlv_8c.html',''); initResizable(); }); diff --git a/Generated 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Documentation/html/usci__b__i2c__ex1__slave_tx_single_8c_source.html +++ b/Generated Documentation/html/usci__b__i2c__ex1__slave_tx_single_8c_source.html @@ -197,7 +197,7 @@ $(document).ready(function(){initNavTree('usci__b__i2c__ex1__slave_tx_single_8c_ diff --git a/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c.html b/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c.html index e6ec2e0..44e21b7 100644 --- a/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c.html +++ b/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c.html @@ -260,7 +260,7 @@ Variables diff --git a/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c_source.html b/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c_source.html index 521a29e..73af4b1 100644 --- a/Generated Documentation/html/usci__b__i2c__ex2__master_tx_multiple_8c_source.html +++ b/Generated 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$(document).ready(function(){initNavTree('usci__b__i2c__ex2__slave_rx_multiple_8 diff --git a/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c.html b/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c.html index 006d1a5..d19a563 100644 --- a/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c.html +++ b/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c.html @@ -214,7 +214,7 @@ Variables diff --git a/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c_source.html b/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c_source.html index df3187b..e781c98 100644 --- a/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c_source.html +++ b/Generated Documentation/html/usci__b__i2c__ex3__master_tx_single_8c_source.html @@ -241,7 +241,7 @@ $(document).ready(function(){initNavTree('usci__b__i2c__ex3__master_tx_single_8c diff --git a/Generated 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23b2fa2..f99f7e9 100644 --- a/Generated Documentation/html/usci__b__i2c__ex4__master_rx_multiple_8c.html +++ b/Generated Documentation/html/usci__b__i2c__ex4__master_rx_multiple_8c.html @@ -274,7 +274,7 @@ Variables diff --git a/Generated Documentation/html/usci__b__i2c__ex4__master_rx_multiple_8c_source.html b/Generated Documentation/html/usci__b__i2c__ex4__master_rx_multiple_8c_source.html index 639b8a2..b8e3798 100644 --- a/Generated Documentation/html/usci__b__i2c__ex4__master_rx_multiple_8c_source.html +++ b/Generated Documentation/html/usci__b__i2c__ex4__master_rx_multiple_8c_source.html @@ -269,7 +269,7 @@ $(document).ready(function(){initNavTree('usci__b__i2c__ex4__master_rx_multiple_ diff --git a/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c.html b/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c.html index e247534..2658654 100644 --- a/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c.html +++ b/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c.html @@ -274,7 +274,7 @@ Variables diff --git a/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c_source.html b/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c_source.html index 88e3e2b..d4e8434 100644 --- a/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c_source.html +++ b/Generated Documentation/html/usci__b__i2c__ex4__slave_tx_multiple_8c_source.html @@ -242,7 +242,7 @@ $(document).ready(function(){initNavTree('usci__b__i2c__ex4__slave_tx_multiple_8 diff --git a/Generated Documentation/html/usci__b__spi_8c.html b/Generated Documentation/html/usci__b__spi_8c.html index dc9022f..b124660 100644 --- a/Generated Documentation/html/usci__b__spi_8c.html +++ b/Generated Documentation/html/usci__b__spi_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('usci__b__spi_8c.html',''); initResizab diff --git a/Generated Documentation/html/usci__b__spi_8c_source.html b/Generated Documentation/html/usci__b__spi_8c_source.html index b450010..b1b6ef3 100644 --- a/Generated Documentation/html/usci__b__spi_8c_source.html +++ b/Generated Documentation/html/usci__b__spi_8c_source.html @@ -295,7 +295,7 @@ $(document).ready(function(){initNavTree('usci__b__spi_8c_source.html',''); init diff --git a/Generated Documentation/html/usci__b__spi_8h.html b/Generated Documentation/html/usci__b__spi_8h.html index bdc00a3..24281d8 100644 --- a/Generated Documentation/html/usci__b__spi_8h.html +++ b/Generated Documentation/html/usci__b__spi_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('usci__b__spi_8h.html',''); initResizab diff --git a/Generated Documentation/html/usci__b__spi_8h_source.html b/Generated Documentation/html/usci__b__spi_8h_source.html index 4a775a1..6ed461e 100644 --- a/Generated Documentation/html/usci__b__spi_8h_source.html +++ b/Generated Documentation/html/usci__b__spi_8h_source.html @@ -329,7 +329,7 @@ $(document).ready(function(){initNavTree('usci__b__spi_8h_source.html',''); init diff --git a/Generated Documentation/html/usci__b__spi__ex1__master_8c.html b/Generated Documentation/html/usci__b__spi__ex1__master_8c.html index 4d5ed19..d19e248 100644 --- a/Generated Documentation/html/usci__b__spi__ex1__master_8c.html +++ b/Generated Documentation/html/usci__b__spi__ex1__master_8c.html @@ -260,7 +260,7 @@ Variables diff --git a/Generated Documentation/html/usci__b__spi__ex1__master_8c_source.html b/Generated Documentation/html/usci__b__spi__ex1__master_8c_source.html index 95015cd..d727413 100644 --- a/Generated Documentation/html/usci__b__spi__ex1__master_8c_source.html +++ b/Generated Documentation/html/usci__b__spi__ex1__master_8c_source.html @@ -269,7 +269,7 @@ $(document).ready(function(){initNavTree('usci__b__spi__ex1__master_8c_source.ht diff --git a/Generated Documentation/html/usci__b__spi__ex1__slave_8c.html b/Generated Documentation/html/usci__b__spi__ex1__slave_8c.html index 8c95aeb..d8ea93f 100644 --- a/Generated Documentation/html/usci__b__spi__ex1__slave_8c.html +++ b/Generated Documentation/html/usci__b__spi__ex1__slave_8c.html @@ -237,7 +237,7 @@ Variables diff --git a/Generated Documentation/html/usci__b__spi__ex1__slave_8c_source.html b/Generated Documentation/html/usci__b__spi__ex1__slave_8c_source.html index 67f1212..57f9aef 100644 --- a/Generated Documentation/html/usci__b__spi__ex1__slave_8c_source.html +++ b/Generated Documentation/html/usci__b__spi__ex1__slave_8c_source.html @@ -227,7 +227,7 @@ $(document).ready(function(){initNavTree('usci__b__spi__ex1__slave_8c_source.htm diff --git a/Generated Documentation/html/version_8h.html b/Generated Documentation/html/version_8h.html index 4fa2131..c5851dd 100644 --- a/Generated Documentation/html/version_8h.html +++ b/Generated Documentation/html/version_8h.html @@ -208,7 +208,7 @@ Macros diff --git a/Generated Documentation/html/version_8h_source.html b/Generated Documentation/html/version_8h_source.html index 115117d..ef8351f 100644 --- a/Generated Documentation/html/version_8h_source.html +++ b/Generated Documentation/html/version_8h_source.html @@ -109,7 +109,7 @@ $(document).ready(function(){initNavTree('version_8h_source.html',''); initResiz diff --git a/Generated Documentation/html/wdt__a_8c.html b/Generated Documentation/html/wdt__a_8c.html index 51f8276..2f1c718 100644 --- a/Generated Documentation/html/wdt__a_8c.html +++ b/Generated Documentation/html/wdt__a_8c.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('wdt__a_8c.html',''); initResizable(); diff --git a/Generated Documentation/html/wdt__a_8c_source.html b/Generated Documentation/html/wdt__a_8c_source.html index 6caba82..e0e6548 100644 --- a/Generated Documentation/html/wdt__a_8c_source.html +++ b/Generated Documentation/html/wdt__a_8c_source.html @@ -168,7 +168,7 @@ $(document).ready(function(){initNavTree('wdt__a_8c_source.html',''); initResiza diff --git a/Generated Documentation/html/wdt__a_8h.html b/Generated Documentation/html/wdt__a_8h.html index 0270dc0..a14161e 100644 --- a/Generated Documentation/html/wdt__a_8h.html +++ b/Generated Documentation/html/wdt__a_8h.html @@ -101,7 +101,7 @@ $(document).ready(function(){initNavTree('wdt__a_8h.html',''); initResizable(); diff --git a/Generated Documentation/html/wdt__a_8h_source.html b/Generated Documentation/html/wdt__a_8h_source.html index 7aacc62..ed928d2 100644 --- a/Generated Documentation/html/wdt__a_8h_source.html +++ b/Generated Documentation/html/wdt__a_8h_source.html @@ -200,7 +200,7 @@ $(document).ready(function(){initNavTree('wdt__a_8h_source.html',''); initResiza diff --git a/Generated Documentation/html/wdt__ex1__interval_mode_8c.html b/Generated Documentation/html/wdt__ex1__interval_mode_8c.html index 3d9ff5f..2cb8ce2 100644 --- a/Generated Documentation/html/wdt__ex1__interval_mode_8c.html +++ b/Generated Documentation/html/wdt__ex1__interval_mode_8c.html @@ -152,7 +152,7 @@ Functions diff --git a/Generated Documentation/html/wdt__ex1__interval_mode_8c_source.html b/Generated Documentation/html/wdt__ex1__interval_mode_8c_source.html index 6e8dfe3..1c25c10 100644 --- a/Generated Documentation/html/wdt__ex1__interval_mode_8c_source.html +++ b/Generated Documentation/html/wdt__ex1__interval_mode_8c_source.html @@ -192,7 +192,7 @@ $(document).ready(function(){initNavTree('wdt__ex1__interval_mode_8c_source.html diff --git a/Generated Documentation/html/wdt__ex2__watchdog_mode_8c.html b/Generated Documentation/html/wdt__ex2__watchdog_mode_8c.html index d3d29c5..2daba9b 100644 --- a/Generated Documentation/html/wdt__ex2__watchdog_mode_8c.html +++ b/Generated Documentation/html/wdt__ex2__watchdog_mode_8c.html @@ -132,7 +132,7 @@ Functions diff --git a/Generated Documentation/html/wdt__ex2__watchdog_mode_8c_source.html b/Generated Documentation/html/wdt__ex2__watchdog_mode_8c_source.html index 75c491f..4618fb4 100644 --- a/Generated Documentation/html/wdt__ex2__watchdog_mode_8c_source.html +++ b/Generated Documentation/html/wdt__ex2__watchdog_mode_8c_source.html @@ -191,7 +191,7 @@ $(document).ready(function(){initNavTree('wdt__ex2__watchdog_mode_8c_source.html diff --git a/Generated Documentation/html/yacctab_8py.html b/Generated Documentation/html/yacctab_8py.html index 196866e..5ba4472 100644 --- a/Generated Documentation/html/yacctab_8py.html +++ b/Generated Documentation/html/yacctab_8py.html @@ -108,7 +108,7 @@ Namespaces diff --git a/Generated Documentation/html/yacctab_8py_source.html b/Generated Documentation/html/yacctab_8py_source.html index 8ae9b6f..e4b7767 100644 --- a/Generated Documentation/html/yacctab_8py_source.html +++ b/Generated Documentation/html/yacctab_8py_source.html @@ -398,7 +398,7 @@ $(document).ready(function(){initNavTree('yacctab_8py_source.html',''); initResi diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex index 6c7f688..6df16a3 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_a62 CRC -\/ Build Signature and Rebuild to test. -The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md37}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md37} +The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md41}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md41} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex index ba17f99..ade3211 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_a628 DMA -\/ Repeated Block Transfer to-\/and-\/from RAM, Software Trigger. -A 16 word block from 1C00-\/1\+C1\+Fh is transfered to 1C20h-\/1\+C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.\+0 is toggled during DMA transfer only for demonstration purposes. $\ast$$\ast$ RAM location 0x1\+C00 -\/ 0x1\+C3F used -\/ make sure no compiler conflict $\ast$$\ast$ ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md38}{}\doxysubsubsection{Tested on MSP430\+F5529, MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md38} +A 16 word block from 1C00-\/1\+C1\+Fh is transfered to 1C20h-\/1\+C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.\+0 is toggled during DMA transfer only for demonstration purposes. $\ast$$\ast$ RAM location 0x1\+C00 -\/ 0x1\+C3F used -\/ make sure no compiler conflict $\ast$$\ast$ ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md42}{}\doxysubsubsection{Tested on MSP430\+F5529, MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md42} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/$>$ LED $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex index 9037aec..a1e7ee6 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex @@ -71,7 +71,7 @@ Referenced by USCI\+\_\+\+A0\+\_\+\+ISR(). SPI slave talks to SPI master using 3-\/wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset. -Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md39}{}\doxysubsubsection{Tesed on MSP430\+F67791A}\label{_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md39} +Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md43}{}\doxysubsubsection{Tesed on MSP430\+F67791A}\label{_m_s_p430_f5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md43} /$\vert$\textbackslash{} $\vert$ $\vert$ $\vert$ $\vert$ $\vert$ Master---+-\/$>$$\vert$\+RST $\vert$ $\vert$ $\vert$ $\vert$ P3.\+1$\vert$-\/$>$ Data Out (UCA0\+SIMO) $\vert$ $\vert$ $\vert$ P3.\+0$\vert$$<$-\/ Data In (UCA0\+SOMI) $\vert$ $\vert$ $\vert$ P3.\+2$\vert$$<$-\/ Serial Clock Out (UCA0\+CLK) This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex index d2a07bb..130ec1c 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex @@ -71,7 +71,7 @@ Referenced by USCI\+\_\+\+B0\+\_\+\+ISR(). SPI slave talks to SPI master using 3-\/wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset. -Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md40}{}\doxysubsubsection{Tesed on MSP430\+F67791A}\label{_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md40} +Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md44}{}\doxysubsubsection{Tesed on MSP430\+F67791A}\label{_m_s_p430_f5xx__6xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md44} /$\vert$\textbackslash{} $\vert$ $\vert$ $\vert$ $\vert$ $\vert$ Master---+-\/$>$$\vert$\+RST $\vert$ $\vert$ $\vert$ $\vert$ P2.\+6$\vert$-\/$>$ Data Out (UCB0\+SIMO) $\vert$ $\vert$ $\vert$ P2.\+5$\vert$$<$-\/ Data In (UCB0\+SOMI) $\vert$ $\vert$ $\vert$ P2.\+7$\vert$-\/$>$ Serial Clock Out (UCB0\+CLK) This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex index 4ef3d85..9a0185f 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md45}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md45} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md49}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md49} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex index 7234d62..6bbf554 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md46}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md46} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md50}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md50} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex index 1f2bb74..1960105 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Unsigned Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md47}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md47} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md51}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md51} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex index 1ad6731..23f3402 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mpode Underflow Test Description\+: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.\+0000 for 16 bit). Results can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md48}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md48} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md52}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md52} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex index 3c18da7..f7a32cd 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mode Overflow Test The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7\+FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md49}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md49} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md53}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md53} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex index 0dce283..c7873cb 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex @@ -43,7 +43,7 @@ MPY -\/ Fractional mode, Q15 multiplication The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md50}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md50} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md54}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md54} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex index 0497c18..33e808c 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md51}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md51} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md55}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md55} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex index 463da26..818c3e3 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md52}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md52} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md56}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md56} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex index 63e16fe..8d5bae6 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex @@ -45,7 +45,7 @@ MPY -\/ 16x16 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md53}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md53} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md57}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md57} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex index 4487352..24fcb7c 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md54}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md54} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md58}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md58} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex index 2bb1e34..bdce62e 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md55}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md55} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md59}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md59} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex index a5dfe1b..e301d0b 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_mult MPY -\/ 8x8 Unsigned Multiply Accumulate -Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md56}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md56} +Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md60}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md60} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex index 09beabc..1681dca 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md57}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md57} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md61}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md61} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex index 1899896..89c5d75 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md58}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md58} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md62}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md62} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex index 3c6d65f..92b9513 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex @@ -41,7 +41,7 @@ MPY -\/ 32x32 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md59}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md59} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md63}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md63} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex index b437ce6..ffad73b 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex @@ -57,7 +57,7 @@ RTC\+\_\+C in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz -NOTE\+: Refer device header file and pass in baseaddress parameter for RTC\+\_\+C as RTC\+\_\+\+C\+\_\+\+BASE or RTC\+\_\+\+CE\+\_\+\+BASE as defined in User\textquotesingle{}s guide\hypertarget{_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md64}{}\doxysubsubsection{Tested On\+: MSP430\+F6736}\label{_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md64} +NOTE\+: Refer device header file and pass in baseaddress parameter for RTC\+\_\+C as RTC\+\_\+\+C\+\_\+\+BASE or RTC\+\_\+\+CE\+\_\+\+BASE as defined in User\textquotesingle{}s guide\hypertarget{_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md68}{}\doxysubsubsection{Tested On\+: MSP430\+F6736}\label{_m_s_p430_f5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md68} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex index a921c51..400b6b1 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex @@ -34,7 +34,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex1\+\_\+pwm\+Single.\+c. Timer\+\_\+\+A3, PWM TA1.\+1, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md65}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md65} +Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md69}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md69} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex index 6cd7630..4e9c5fd 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mo TIMER\+\_\+A, Toggle P1.\+0, CCR0 Cont. Mode ISR, DCO SMCLK -Toggle P1.\+0 using software and TA\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TA\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md66}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md66} +Toggle P1.\+0 using software and TA\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TA\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md70}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md70} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex index e1dd3e7..1730395 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mo TIMER\+\_\+A, Toggle P1.\+0, Overflow ISR, 32k\+Hz ACLK -Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md67}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md67} +Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md71}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md71} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex index 610e19a..fa32ff9 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex @@ -46,7 +46,7 @@ Definition at line 68 of file timer\+\_\+a\+\_\+ex4\+\_\+pwm\+Multiple\+Up\+Down Timer\+\_\+\+A3, PWM TA1.\+1-\/2, Up/\+Down Mode, DCO SMCLK -Description\+: This program generates two PWM outputs on P2.\+0,P2.\+1 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P2.\+0 and 25\% on P2.\+1. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md68}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md68} +Description\+: This program generates two PWM outputs on P2.\+0,P2.\+1 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P2.\+0 and 25\% on P2.\+1. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md72}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md72} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex index bc8246d..d25f42f 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex @@ -44,7 +44,7 @@ Definition at line 65 of file timer\+\_\+a\+\_\+ex5\+\_\+pwm\+Multiple\+Up.\+c. \doxysubsubsection{\texorpdfstring{TIMER\_PERIOD}{TIMER\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+PERIOD~511} -This program generates two PWM outputs on P2.\+0,P2.\+1 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md69}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md69} +This program generates two PWM outputs on P2.\+0,P2.\+1 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md73}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md73} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex index 70fb1be..5fc529f 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex @@ -32,7 +32,7 @@ Definition at line 65 of file timer\+\_\+a\+\_\+ex6\+\_\+up\+Down\+Mode\+Operati \doxysubsubsection{\texorpdfstring{TIMER\_A\_PERIOD}{TIMER\_A\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+A\+\_\+\+PERIOD~250} -Toggle P1.\+7 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+0 also output on P1.\+7. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P1.\+7 at TACLK/2$\ast$250. Thus the output frequency on P1.\+7 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P1.\+7 output frequency is $\sim$1.045M/1000. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md70}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md70} +Toggle P1.\+7 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+0 also output on P1.\+7. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P1.\+7 at TACLK/2$\ast$250. Thus the output frequency on P1.\+7 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P1.\+7 output frequency is $\sim$1.045M/1000. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md74}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md74} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.tex index 97736e0..cf6bcea 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_m Timer\+\_\+B, Toggle P1.\+0, CCR0 Cont. Mode ISR, DCO SMCLK -Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TBCLK. During the TB\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TB\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TB\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_autotoc_md71}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_autotoc_md71} +Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TBCLK. During the TB\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TB\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TB\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_autotoc_md75}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex1__continuous_mode_c_c_r0_8c_autotoc_md75} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.tex index 3e6962a..6bf51b8 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s Timer\+\_\+B, Toggle P1.\+0, Overflow ISR, 32k\+Hz ACLK -Description\+: Toggle P1.\+0 using software and the Timer\+\_\+B overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TBIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_autotoc_md72}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_autotoc_md72} +Description\+: Toggle P1.\+0 using software and the Timer\+\_\+B overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TBIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_autotoc_md76}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex2__overflow_i_s_r_8c_autotoc_md76} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex index f454b0f..f4a970c 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_oper Timer\+\_\+B, Toggle P1.\+0, CCR0 Up Mode ISR, DCO SMCLK -Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md73}{}\doxysubsubsection{Tested On\+: MSP430\+F5229}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md73} +Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md77}{}\doxysubsubsection{Tested On\+: MSP430\+F5229}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md77} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex index 25c02b6..e995dd1 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex @@ -34,7 +34,7 @@ Definition at line 64 of file timer\+\_\+b\+\_\+ex5\+\_\+single\+PWM.\+c. Timer\+\_\+B, PWM TB0.\+1, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P5.\+7 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$500us with a 75\% duty cycle on P5.\+7 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md74}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md74} +Description\+: This program generates PWM outputs on P5.\+7 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$500us with a 75\% duty cycle on P5.\+7 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md78}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{_m_s_p430_f5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md78} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex index 6b0cb39..0dcdbfc 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex @@ -15,7 +15,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_acd \doxysubsubsection{\texorpdfstring{main()}{main()}} {\footnotesize\ttfamily void main (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})} -tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md75}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md75} +tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md79}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md79} /$\vert$$|$ $\vert$ $\vert$ $\vert$ $\vert$ --$\vert$ $\vert$ Device Type $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex index 108c395..1bd5f66 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex @@ -441,7 +441,7 @@ Referenced by read\+ADCCAL(). The contents of TLV device descriptors are read out using the TLV functions and then stored into local variables. -ACLK = n/a, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md76}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969}\label{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md76} +ACLK = n/a, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md80}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969}\label{_m_s_p430_f5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md80} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex index 50a0119..863be22 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l WDT -\/ Toggle P1.\+0, Interval Overflow ISR, DCO SMCLK -Toggle P1.\+0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = \{(default DCO 1.\+045\+MHz) / 32768\} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md77}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md77} +Toggle P1.\+0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = \{(default DCO 1.\+045\+MHz) / 32768\} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md81}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md81} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex index 53d6618..1eb25c7 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k WDT -\/ Toggle P1.\+0, Interval Overflow ISR, 32k\+Hz ACLK -Toggle P1.\+0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32k\+Hz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-\/crystal(2$^\wedge$15) by 2$^\wedge$13 with an ISR triggered @ 4Hz = \mbox{[}WDT CLK source/32768\mbox{]}. ACLK = REFO , MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md78}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md78} +Toggle P1.\+0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32k\+Hz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-\/crystal(2$^\wedge$15) by 2$^\wedge$13 with an ISR triggered @ 4Hz = \mbox{[}WDT CLK source/32768\mbox{]}. ACLK = REFO , MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md82}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md82} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex index 749bfa4..429b61e 100644 --- a/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k WDT -\/ Failsafe Clock, 10KHz VLOCLK -Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-\/safe feature by automatically selecting VLOCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.\+0 every 3 seconds in main function. VLOCLK = 10KHZ, ACLK = 32768, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md79}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md79} +Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-\/safe feature by automatically selecting VLOCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.\+0 every 3 seconds in main function. VLOCLK = 10KHZ, ACLK = 32768, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md83}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md83} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.tex index 4368b09..0cdc42d 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_a CRC -\/ Build Signature and Rebuild to test. -The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_autotoc_md83}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_autotoc_md83} +The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_autotoc_md87}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r2xx__4xx_2crc_2crc__ex1__build_signature_8c_autotoc_md87} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex index 2a83a2b..614bbb3 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md84}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md84} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md88}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md88} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex index f127785..a0db448 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md85}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md85} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md89}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md89} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex index 18a0a4e..9b4c6db 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Unsigned Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md86}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md86} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md90}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md90} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex index 939066d..65e0136 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mpode Underflow Test Description\+: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.\+0000 for 16 bit). Results can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md87}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md87} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md91}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md91} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex index b8d537b..3cd1752 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mode Overflow Test The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7\+FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md88}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md88} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md92}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md92} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex index d94f7d7..0c8e9eb 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex @@ -43,7 +43,7 @@ MPY -\/ Fractional mode, Q15 multiplication The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md89}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md89} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md93}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md93} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex index ee910cc..da8d5f9 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md90}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md90} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md94}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md94} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex index fb2b9e4..d026d1b 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md91}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md91} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md95}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md95} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex index 464d591..d374215 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex @@ -45,7 +45,7 @@ MPY -\/ 16x16 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md92}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md92} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md96}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md96} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex index 82ef5a8..b676ed7 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md93}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md93} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md97}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md97} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex index b60816d..1ed84ff 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md94}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md94} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md98}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md98} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex index 06c4272..db16ec5 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_mu MPY -\/ 8x8 Unsigned Multiply Accumulate -Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md95}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md95} +Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md99}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md99} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex index 5b8722a..2b4f058 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md96}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md96} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md100}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md100} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex index 7f91c4f..3cebb14 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md97}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md97} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md101}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md101} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex index 1e8bb0c..8d7b6bb 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex @@ -41,7 +41,7 @@ MPY -\/ 32x32 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md98}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md98} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md102}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r2xx__4xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md102} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.tex index 3fcdb76..b0c0393 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c.tex @@ -16,7 +16,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_a62 \doxysubsubsection{\texorpdfstring{main()}{main()}} {\footnotesize\ttfamily void main (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})} -\hypertarget{_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_autotoc_md99}{}\doxysubsubsection{MSP430\+FR2xx\+\_\+4xx Board}\label{_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_autotoc_md99} +\hypertarget{_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_autotoc_md103}{}\doxysubsubsection{MSP430\+FR2xx\+\_\+4xx Board}\label{_m_s_p430_f_r2xx__4xx_2pmm_2pmm___reset___l_p_mx__5_8c_autotoc_md103} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex index 596e8af..d021229 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex @@ -34,7 +34,7 @@ Definition at line 63 of file timer\+\_\+a\+\_\+ex1\+\_\+pwm\+Single.\+c. Timer\+\_\+\+A3, PWM TA1.\+2, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.048MHz SMCLK as TACLK, the timer period is $\sim$480us with a 75\% duty cycle on P4.\+0 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md100}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md100} +Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.048MHz SMCLK as TACLK, the timer period is $\sim$480us with a 75\% duty cycle on P4.\+0 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md104}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md104} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex index 13214f4..33c4a99 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_ TIMER\+\_\+A, Toggle P1.\+0, Overflow ISR, 32k\+Hz ACLK -Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+048\+MHz\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md101}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md101} +Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+048\+MHz\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md105}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md105} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex index 44ebfdd..0e41a15 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex @@ -46,7 +46,7 @@ Definition at line 67 of file timer\+\_\+a\+\_\+ex4\+\_\+pwm\+Multiple\+Up\+Down Timer\+\_\+\+A3, PWM TA1.\+1-\/2, Up/\+Down Mode, DCO SMCLK -Description\+: This program generates two PWM outputs on P4.\+0/8.3 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P4.\+0 and 25\% on P8.\+3. SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md102}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md102} +Description\+: This program generates two PWM outputs on P4.\+0/8.3 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P4.\+0 and 25\% on P8.\+3. SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md106}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md106} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex index 5150acc..aa330e1 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex @@ -44,7 +44,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex5\+\_\+pwm\+Multiple\+Up.\+c. \doxysubsubsection{\texorpdfstring{TIMER\_PERIOD}{TIMER\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+PERIOD~511} -This program generates two PWM outputs on P4.\+0, P8.\+3 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.092MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P4.\+0 and 25\% on P8.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md103}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md103} +This program generates two PWM outputs on P4.\+0, P8.\+3 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.092MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P4.\+0 and 25\% on P8.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md107}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md107} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex index 6edd0f8..3c541f4 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex @@ -32,7 +32,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex6\+\_\+up\+Down\+Mode\+Operati \doxysubsubsection{\texorpdfstring{TIMER\_A\_PERIOD}{TIMER\_A\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+A\+\_\+\+PERIOD~250} -Toggle P2.\+4 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+1 also output on P4.\+0. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P4.\+0 at TACLK/2$\ast$250. Thus the output frequency on P4.\+0 will be the TACLK/500. No CPU or software resources required. As coded with TACLK = SMCLK, P4.\+0 output frequency is $\sim$1.048M/500. SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md104}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md104} +Toggle P2.\+4 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+1 also output on P4.\+0. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P4.\+0 at TACLK/2$\ast$250. Thus the output frequency on P4.\+0 will be the TACLK/500. No CPU or software resources required. As coded with TACLK = SMCLK, P4.\+0 output frequency is $\sim$1.048M/500. SMCLK = MCLK = TACLK = default DCO $\sim$1.048MHz\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md108}{}\doxysubsubsection{Tested On\+: MSP430\+FR4133}\label{_m_s_p430_f_r2xx__4xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md108} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex index 7937b07..3826d40 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_op Timer\+\_\+B, Toggle P1.\+0, CCR0 Up Mode ISR, DCO SMCLK -Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md105}{}\doxysubsubsection{Tested On\+: MSP430\+FR2311}\label{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md105} +Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md109}{}\doxysubsubsection{Tested On\+: MSP430\+FR2311}\label{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md109} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex index 9d77e34..747b5bc 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex @@ -34,7 +34,7 @@ Definition at line 64 of file timer\+\_\+b\+\_\+ex5\+\_\+single\+PWM.\+c. Timer\+\_\+B, PWM TB0.\+1, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P2.\+6 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$488us with a 75\% duty cycle on P2.\+6 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md106}{}\doxysubsubsection{Tested On\+: MSP430\+FR2311}\label{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md106} +Description\+: This program generates PWM outputs on P2.\+6 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$488us with a 75\% duty cycle on P2.\+6 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md110}{}\doxysubsubsection{Tested On\+: MSP430\+FR2311}\label{_m_s_p430_f_r2xx__4xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md110} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.tex index 967c397..d37cc24 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c.tex @@ -15,7 +15,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c_a \doxysubsubsection{\texorpdfstring{main()}{main()}} {\footnotesize\ttfamily void main (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})} -tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md107}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md107} +tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md111}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f_r2xx__4xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md111} /$\vert$$|$ $\vert$ $\vert$ $\vert$ $\vert$ --$\vert$ $\vert$ Device Type $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c.tex index ce0c423..da0e44d 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_a6288 CRC -\/ Build Signature and Rebuild to test. -The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_autotoc_md109}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_autotoc_md109} +The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_autotoc_md113}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2crc_2crc__ex1__build_signature_8c_autotoc_md113} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.tex index 0cf3f4c..2c7cc4e 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_a6288e DMA -\/ Repeated Block Transfer to-\/and-\/from RAM, Software Trigger. -A 16 word block from 1C00-\/1\+C1\+Fh is transfered to 1C20h-\/1\+C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.\+0 is toggled during DMA transfer only for demonstration purposes. $\ast$$\ast$ RAM location 0x1\+C00 -\/ 0x1\+C3F used -\/ make sure no compiler conflict $\ast$$\ast$ ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md110}{}\doxysubsubsection{Tested on MSP430\+F5529, MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md110} +A 16 word block from 1C00-\/1\+C1\+Fh is transfered to 1C20h-\/1\+C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.\+0 is toggled during DMA transfer only for demonstration purposes. $\ast$$\ast$ RAM location 0x1\+C00 -\/ 0x1\+C3F used -\/ make sure no compiler conflict $\ast$$\ast$ ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md114}{}\doxysubsubsection{Tested on MSP430\+F5529, MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md114} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/$>$ LED $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex index bb9b4eb..269d7f8 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex @@ -67,7 +67,7 @@ Definition at line 74 of file eusci\+\_\+a\+\_\+spi\+\_\+ex1\+\_\+slave.\+c. SPI slave talks to SPI master using 3-\/wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset. -Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md111}{}\doxysubsubsection{Tesed on MSP430\+FR5969 and MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md111} +Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md115}{}\doxysubsubsection{Tesed on MSP430\+FR5969 and MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md115} /$\vert$\textbackslash{} $\vert$ $\vert$ $\vert$ $\vert$ $\vert$ Master---+-\/$>$$\vert$\+RST $\vert$ $\vert$ $\vert$ $\vert$ P2.\+0$\vert$-\/$>$ Data Out (UCA0\+SIMO) $\vert$ $\vert$ $\vert$ P2.\+1$\vert$$<$-\/ Data In (UCA0\+SOMI) $\vert$ $\vert$ $\vert$ P1.\+5$\vert$$<$-\/ Serial Clock Out (UCA0\+CLK) This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex index a50b9b7..f104c43 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c.tex @@ -67,7 +67,7 @@ Definition at line 74 of file eusci\+\_\+b\+\_\+spi\+\_\+ex1\+\_\+slave.\+c. SPI slave talks to SPI master using 3-\/wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset. -Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md112}{}\doxysubsubsection{Tesed on MSP430\+FR5969 and MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md112} +Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md116}{}\doxysubsubsection{Tesed on MSP430\+FR5969 and MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2eusci__b__spi_2eusci__b__spi__ex1__slave_8c_autotoc_md116} /$\vert$\textbackslash{} $\vert$ $\vert$ $\vert$ $\vert$ $\vert$ Master---+-\/$>$$\vert$\+RST $\vert$ $\vert$ $\vert$ $\vert$ P1.\+6$\vert$-\/$>$ Data Out (UCB0\+SIMO) $\vert$ $\vert$ $\vert$ P1.\+7$\vert$$<$-\/ Data In (UCB0\+SOMI) $\vert$ $\vert$ $\vert$ P2.\+2$\vert$$<$-\/ Serial Clock Out (UCB0\+CLK) This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.tex index 1fb8425..1f866f4 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c.tex @@ -22,7 +22,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_a6288eb Long word writes to FRAM -Description\+: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE\+: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz\hypertarget{_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_autotoc_md113}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_autotoc_md113} +Description\+: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE\+: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz\hypertarget{_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_autotoc_md117}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2framctl_2framctl__ex1__write_8c_autotoc_md117} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex index fe368b7..d0690da 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md114}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md114} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md118}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md118} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex index 9256fdf..642f345 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md115}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md115} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md119}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md119} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex index 766d83b..5a0b048 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Unsigned Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md116}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md116} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md120}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md120} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex index 8720b2c..cc8200c 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mpode Underflow Test Description\+: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.\+0000 for 16 bit). Results can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md117}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md117} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md121}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md121} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex index b3f3678..b1acc6a 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mode Overflow Test The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7\+FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md118}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md118} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md122}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md122} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex index 85e2ecd..7d5bc7f 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex @@ -43,7 +43,7 @@ MPY -\/ Fractional mode, Q15 multiplication The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md119}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md119} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md123}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md123} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex index fe31b72..58b863a 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md120}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md120} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md124}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md124} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex index 7059b54..59b94fe 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md121}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md121} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md125}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md125} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex index a12b029..944ed27 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex @@ -45,7 +45,7 @@ MPY -\/ 16x16 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md122}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md122} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md126}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md126} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex index 662051b..73d2358 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md123}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md123} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md127}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md127} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex index 173a3bf..49df6f1 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md124}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md124} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md128}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md128} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex index 9f9df9b..45f5020 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multip MPY -\/ 8x8 Unsigned Multiply Accumulate -Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md125}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md125} +Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md129}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md129} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex index f9a4ea3..f77cb73 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md126}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md126} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md130}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md130} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex index 04f3c0e..6bdefc3 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md127}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md127} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md131}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md131} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex index 311d2b0..ecf0f6a 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex @@ -41,7 +41,7 @@ MPY -\/ 32x32 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md128}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md128} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md132}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r57xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md132} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex index afccd32..a3ffdeb 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex @@ -55,7 +55,7 @@ References \+\_\+\+\_\+no\+\_\+operation(), and new\+Time. RTC\+\_\+B in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5\+:00pm -This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md129}{}\doxysubsubsection{Tested on\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md129} +This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md133}{}\doxysubsubsection{Tested on\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md133} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex index 191a445..b13b620 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex @@ -34,7 +34,7 @@ Definition at line 63 of file timer\+\_\+a\+\_\+ex1\+\_\+pwm\+Single.\+c. Timer\+\_\+\+A3, PWM TA1.\+2, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md130}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md130} +Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md134}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md134} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex index 3a5c962..301d0c2 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode TIMER\+\_\+A, Toggle P1.\+0, CCR0 Cont. Mode ISR, DCO SMCLK -Toggle P1.\+0 using software and TA\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TA\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md131}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md131} +Toggle P1.\+0 using software and TA\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TA\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md135}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md135} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex index 2daf13c..a277301 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode TIMER\+\_\+A, Toggle P1.\+0, Overflow ISR, 32k\+Hz ACLK -Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md132}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md132} +Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md136}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md136} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex index f0bbd9b..f72118d 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex @@ -46,7 +46,7 @@ Definition at line 67 of file timer\+\_\+a\+\_\+ex4\+\_\+pwm\+Multiple\+Up\+Down Timer\+\_\+\+A3, PWM TA1.\+1-\/2, Up/\+Down Mode, DCO SMCLK -Description\+: This program generates two PWM outputs on P2.\+2,3 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md133}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md133} +Description\+: This program generates two PWM outputs on P2.\+2,3 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md137}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md137} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex index cbad155..ccfb5cd 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex @@ -44,7 +44,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex5\+\_\+pwm\+Multiple\+Up.\+c. \doxysubsubsection{\texorpdfstring{TIMER\_PERIOD}{TIMER\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+PERIOD~511} -This program generates two PWM outputs on P1.\+2,P1.\+3 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md134}{}\doxysubsubsection{Tested On\+: MSP430\+FR5749}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md134} +This program generates two PWM outputs on P1.\+2,P1.\+3 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md138}{}\doxysubsubsection{Tested On\+: MSP430\+FR5749}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md138} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex index 23c6218..b379b55 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex @@ -32,7 +32,7 @@ Definition at line 65 of file timer\+\_\+a\+\_\+ex6\+\_\+up\+Down\+Mode\+Operati \doxysubsubsection{\texorpdfstring{TIMER\_A\_PERIOD}{TIMER\_A\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+A\+\_\+\+PERIOD~250} -Toggle P2.\+4 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+0 also output on P2.\+4. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P2.\+4 at TACLK/2$\ast$250. Thus the output frequency on P2.\+4 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P2.\+4 output frequency is $\sim$1.045M/1000. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md135}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md135} +Toggle P2.\+4 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+0 also output on P2.\+4. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P2.\+4 at TACLK/2$\ast$250. Thus the output frequency on P2.\+4 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P2.\+4 output frequency is $\sim$1.045M/1000. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md139}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md139} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex index 27ffef5..d3129db 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operat Timer\+\_\+B, Toggle P1.\+0, CCR0 Up Mode ISR, DCO SMCLK -Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md136}{}\doxysubsubsection{Tested On\+: MSP430\+F5\+R5739}\label{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md136} +Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md140}{}\doxysubsubsection{Tested On\+: MSP430\+F5\+R5739}\label{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md140} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex index 2efe14d..d5e7230 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex @@ -34,7 +34,7 @@ Definition at line 64 of file timer\+\_\+b\+\_\+ex5\+\_\+single\+PWM.\+c. Timer\+\_\+B, PWM TB0.\+1, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P1.\+4 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$488us with a 75\% duty cycle on P1.\+4 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md137}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md137} +Description\+: This program generates PWM outputs on P1.\+4 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$488us with a 75\% duty cycle on P1.\+4 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md141}{}\doxysubsubsection{Tested On\+: MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md141} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.tex index 5d0a712..cb70821 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c.tex @@ -15,7 +15,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c_acdef \doxysubsubsection{\texorpdfstring{main()}{main()}} {\footnotesize\ttfamily void main (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})} -tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md138}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md138} +tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md142}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md142} /$\vert$$|$ $\vert$ $\vert$ $\vert$ $\vert$ --$\vert$ $\vert$ Device Type $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex index eac7e5e..398a048 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k WDT -\/ Toggle P1.\+0, Interval Overflow ISR, DCO SMCLK -Toggle P1.\+0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = \{(default DCO 1.\+045\+MHz) / 32768\} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md139}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md139} +Toggle P1.\+0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = \{(default DCO 1.\+045\+MHz) / 32768\} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md143}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md143} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex index 9b06a61..7e46204 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8 WDT -\/ Toggle P1.\+0, Interval Overflow ISR, 32k\+Hz ACLK -Toggle P1.\+0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32k\+Hz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-\/crystal(2$^\wedge$15) by 2$^\wedge$13 with an ISR triggered @ 4Hz = \mbox{[}WDT CLK source/32768\mbox{]}. ACLK = REFO , MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md140}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md140} +Toggle P1.\+0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32k\+Hz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-\/crystal(2$^\wedge$15) by 2$^\wedge$13 with an ISR triggered @ 4Hz = \mbox{[}WDT CLK source/32768\mbox{]}. ACLK = REFO , MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md144}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md144} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex index 2841a6d..098e135 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8 WDT -\/ Failsafe Clock, 10KHz VLOCLK -Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-\/safe feature by automatically selecting VLOCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.\+0 every 3 seconds in main function. VLOCLK = 10KHZ, ACLK = 32768, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md141}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md141} +Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-\/safe feature by automatically selecting VLOCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.\+0 every 3 seconds in main function. VLOCLK = 10KHZ, ACLK = 32768, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md145}{}\doxysubsubsection{Tested On\+: MSP430\+F5529,\+MSP430\+FR5739}\label{_m_s_p430_f_r57xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md145} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex index 887a146..cb78245 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_a CRC -\/ Build Signature and Rebuild to test. -The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md142}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md142} +The CRC is first used to build a signature using a seed and multiple data values. This signature is considered as the checksum and can be sent by a UART connection along with the data to verify the correct data has been sent. The second half of this program is used to test the CRC checksum of the data that has been created, by recreating the same checksum and comparing it to the first checksum. If the two checksum are equal, then P1.\+0 is set and the LED is turned on. Breakpoints can be set before the CRC\+\_\+set\+Data() function to observe the CRC register values and see the subsequent signatures before/after each data set.\hypertarget{_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md146}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2crc_2crc__ex1__build_signature_8c_autotoc_md146} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex index 4b3d998..f65c22b 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_a6 DMA -\/ Repeated Block Transfer to-\/and-\/from RAM, Software Trigger. -A 16 word block from 1C00-\/1\+C1\+Fh is transfered to 1C20h-\/1\+C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.\+0 is toggled during DMA transfer only for demonstration purposes. $\ast$$\ast$ RAM location 0x1\+C00 -\/ 0x1\+C3F used -\/ make sure no compiler conflict $\ast$$\ast$ ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md144}{}\doxysubsubsection{Tested on MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md144} +A 16 word block from 1C00-\/1\+C1\+Fh is transfered to 1C20h-\/1\+C3fh using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to initial software setting because DMA transfer mode 5 is used. P1.\+0 is toggled during DMA transfer only for demonstration purposes. $\ast$$\ast$ RAM location 0x1\+C00 -\/ 0x1\+C3F used -\/ make sure no compiler conflict $\ast$$\ast$ ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md148}{}\doxysubsubsection{Tested on MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2dma_2dma__ex1__repeated_block_8c_autotoc_md148} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/$>$ LED $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex index 7c0ee9d..28457da 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c.tex @@ -67,7 +67,7 @@ Definition at line 75 of file eusci\+\_\+a\+\_\+spi\+\_\+ex1\+\_\+slave.\+c. SPI slave talks to SPI master using 3-\/wire mode. Data is received from master and data from slave is then transmitted back to master. USCI RX ISR is used to handle communication, CPU normally in LPM4. Prior to initial data exchange, master pulses slaves RST for complete reset. -Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md145}{}\doxysubsubsection{Tesed on MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md145} +Use with eusci\+\_\+spi\+\_\+ex1\+\_\+master code example. If the slave is in debug mode, the reset signal from the master will conflict with slave\textquotesingle{}s JTAG; to work around, use IAR\textquotesingle{}s \char`\"{}\+Release JTAG on Go\char`\"{} on slave device. If breakpoints are set in slave RX ISR, master must stopped also to avoid overrunning slave RXBUF.\hypertarget{_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md149}{}\doxysubsubsection{Tesed on MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2eusci__a__spi_2eusci__a__spi__ex1__slave_8c_autotoc_md149} /$\vert$\textbackslash{} $\vert$ $\vert$ $\vert$ $\vert$ $\vert$ Master---+-\/$>$$\vert$\+RST $\vert$ $\vert$ $\vert$ $\vert$ P2.\+0$\vert$-\/$>$ Data Out (UCA0\+SIMO) $\vert$ $\vert$ $\vert$ P2.\+1$\vert$$<$-\/ Data In (UCA0\+SOMI) $\vert$ $\vert$ $\vert$ P1.\+5$\vert$$<$-\/ Serial Clock Out (UCA0\+CLK) This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.tex index 994c670..16e3057 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_a62 Long word writes to FRAM -Description\+: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE\+: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_autotoc_md146}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_autotoc_md146} +Description\+: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE\+: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_autotoc_md150}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2framctl_2framctl__ex1__write_8c_autotoc_md150} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex index a4c2281..58500d1 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md148}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md148} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md152}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex10__32bit_signed_multiply_8c_autotoc_md152} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex index 5058a19..bc11529 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Signed Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md149}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md149} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md153}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex11__32bit_signed_multiply_accum_8c_autotoc_md153} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex index c8d681e..4892b36 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 32x32 Unsigned Multiply Accumalate Hardware multiplier is used to multiply-\/accumalate a set of numbers. The first calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed next. Results are stored in RES0, RES1, RES2 and RES3. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md150}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md150} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md154}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex12__32bit_unsigned_multiply_accum_8c_autotoc_md154} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex index e1c6c25..0890088 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mpode Underflow Test Description\+: The example illustrates a special case showing underflow. Underflow occurs when adding 2 negative numbers yields a positive result. By having the saturation mode enabled, the result if rounded off to the highest negative number (0x8000.\+0000 for 16 bit). Results can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md151}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md151} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md155}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex13__saturation_underflow_8c_autotoc_md155} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex index 325a8da..ad59517 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c.tex @@ -45,7 +45,7 @@ MPY -\/ Saturation Mode Overflow Test The example illustrates a special case showing overflow. The addition result of 2 positive numbers may exceed the highest positive number (0x7\+FFF FFFF for 32 bit result) due to overflow indicating a negative result. By having the saturation mode enabled, this result can be truncated off to this highest positive number. Results with and without saturation mode are shown. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md152}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md152} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md156}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex14__saturation_overflow_8c_autotoc_md156} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex index 9394692..09663cc 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c.tex @@ -43,7 +43,7 @@ MPY -\/ Fractional mode, Q15 multiplication The example illustrates multiplication of 2 Q15 numbers in fractional mode. The result is a Q15 (15 bit) number stored in the RES1 register. It can be viewed in the debugger window. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md153}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md153} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md157}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex15__fraction_mode_8c_autotoc_md157} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex index 7debb7a..28510de 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md154}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md154} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md158}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex1__16bit_unsigned_multiply_8c_autotoc_md158} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex index 8605d31..1d0de36 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO and RESHI. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md155}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md155} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md159}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex2__8bit_unsigned_multiply_8c_autotoc_md159} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex index 4ba8a25..2a65e43 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c.tex @@ -45,7 +45,7 @@ MPY -\/ 16x16 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. Result is also stored as Result variable. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md156}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md156} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md160}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex3__16bit_signed_multiply_8c_autotoc_md160} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex index 020f7ed..5fe9ded 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RESLO, RESHI and SUMEXT = FFFF if result is negative, SUMEXT = 0 otherwise. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md157}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md157} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md161}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex4__8bit_signed_multiply_8c_autotoc_md161} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex index 0d287b6..4162d1d 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Unsigned Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md158}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md158} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md162}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex5__16bit_unsigned_multiply_accum_8c_autotoc_md162} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex index d668753..f4e8a91 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_mu MPY -\/ 8x8 Unsigned Multiply Accumulate -Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md159}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md159} +Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the carry of the result.\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md163}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex6__8bit_unsigned_multiply_accum_8c_autotoc_md163} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex index 4170bc5..9cdfa5b 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 16x16 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply-\/accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of the result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md160}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md160} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md164}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex7__16bit_signed_multiply_accum_8c_autotoc_md164} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex index e70aab5..0517a48 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c.tex @@ -19,7 +19,7 @@ MPY -\/ 8x8 Signed Multiply Accumulate Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. A second multiply accumulate operation is performed after that. Results are stored in RESLO and RESHI. SUMEXT contains the extended sign of result. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md161}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md161} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md165}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex8__8bit_signed_multiply_accum_8c_autotoc_md165} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex index c04d88c..2d5571f 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c.tex @@ -41,7 +41,7 @@ MPY -\/ 32x32 Unsigned Multiply Hardware multiplier is used to multiply two numbers. The calculation is automatically initiated after the second operand is loaded. Results are stored in RES0, RES1, RES2 and RES3. -ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md162}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md162} +ACLK = 32.\+768k\+Hz, MCLK = SMCLK = default DCO\hypertarget{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md166}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969,\+MSP430\+FR2433}\label{_m_s_p430_f_r5xx__6xx_2mpy32_2mpy32__ex9__32bit_unsigned_multiply_8c_autotoc_md166} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex index 761efce..a8f8508 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c.tex @@ -55,7 +55,7 @@ References \+\_\+\+\_\+no\+\_\+operation(), and new\+Time. RTC\+\_\+B in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5\+:00pm -This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md164}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md164} +This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md168}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2rtc__b_2rtc__b__ex1__calendermode_8c_autotoc_md168} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex index 8257687..8af26ab 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c.tex @@ -55,7 +55,7 @@ References \+\_\+\+\_\+no\+\_\+operation(), and new\+Time. RTC\+\_\+C in Calendar mode, Interruptions every 1s, 1m, and 5th day of week at 5\+:00pm -This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md165}{}\doxysubsubsection{Tested On\+: MSP430\+FR6989}\label{_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md165} +This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md169}{}\doxysubsubsection{Tested On\+: MSP430\+FR6989}\label{_m_s_p430_f_r5xx__6xx_2rtc__c_2rtc__c__ex1__calendarmode_8c_autotoc_md169} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex index 684092b..3718e52 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c.tex @@ -34,7 +34,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex1\+\_\+pwm\+Single.\+c. Timer\+\_\+\+A3, PWM TA1.\+2, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md166}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md166} +Description\+: This program generates PWM outputs on P2.\+2 using Timer1\+\_\+A configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md170}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex1__pwm_single_8c_autotoc_md170} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex index 786398d..300f108 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_ TIMER\+\_\+A, Toggle P1.\+0, CCR0 Cont. Mode ISR, DCO SMCLK -Toggle P1.\+0 using software and TA\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TA\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md167}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md167} +Toggle P1.\+0 using software and TA\+\_\+0 ISR. Toggles every 50000 SMCLK cycles. SMCLK provides clock source for TACLK. During the TA\+\_\+0 ISR, P1.\+0 is toggled and 50000 clock cycles are added to CCR0. TA\+\_\+0 ISR is triggered every 50000 cycles. CPU is normally off and used only during TA\+\_\+\+ISR. ACLK = n/a, MCLK = SMCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md171}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex2__continous_mode_operation_with_c_c_r0_interrupt_8c_autotoc_md171} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex index aca2c96..3c0a260 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_ TIMER\+\_\+A, Toggle P1.\+0, Overflow ISR, 32k\+Hz ACLK -Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md168}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md168} +Description\+: Toggle P1.\+0 using software and the TIMER\+\_\+A overflow ISR. In this example an ISR triggers when TB overflows. Inside the ISR P1.\+0 is toggled. Toggle rate is exactly 0.\+25\+Hz = \mbox{[}32k\+Hz/\+FFFFh\mbox{]}/2. Proper use of the TAIV interrupt vector generator is demonstrated. ACLK = TBCLK = 32k\+Hz, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md172}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex3__continous_mode_operation_with_t_a_i_e_interrupt_8c_autotoc_md172} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex index 9fb4ee1..479a051 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c.tex @@ -46,7 +46,7 @@ Definition at line 67 of file timer\+\_\+a\+\_\+ex4\+\_\+pwm\+Multiple\+Up\+Down Timer\+\_\+\+A3, PWM TA1.\+1-\/2, Up/\+Down Mode, DCO SMCLK -Description\+: This program generates two PWM outputs on P2.\+2,3 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md169}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md169} +Description\+: This program generates two PWM outputs on P2.\+2,3 using Timer1\+\_\+A configured for up/down mode. The value in CCR0, 128, defines the PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$233us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md173}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex4__pwm_multiple_up_down_8c_autotoc_md173} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex index afe29e1..f6f8433 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c.tex @@ -44,7 +44,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex5\+\_\+pwm\+Multiple\+Up.\+c. \doxysubsubsection{\texorpdfstring{TIMER\_PERIOD}{TIMER\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+PERIOD~511} -This program generates two PWM outputs on P1.\+2,P1.\+3 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md170}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md170} +This program generates two PWM outputs on P1.\+2,P1.\+3 using Timer1\+\_\+A configured for up mode. The value in CCR0, 512-\/1, defines the PWM period and the values in CCR1 and CCR2 the PWM duty cycles. Using $\sim$1.045MHz SMCLK as TACLK, the timer period is $\sim$500us with a 75\% duty cycle on P2.\+2 and 25\% on P2.\+3. ACLK = n/a, SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md174}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex5__pwm_multiple_up_8c_autotoc_md174} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex index 5baddc5..c5b06f8 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c.tex @@ -32,7 +32,7 @@ Definition at line 64 of file timer\+\_\+a\+\_\+ex6\+\_\+up\+Down\+Mode\+Operati \doxysubsubsection{\texorpdfstring{TIMER\_A\_PERIOD}{TIMER\_A\_PERIOD}} {\footnotesize\ttfamily \#define TIMER\+\_\+\+A\+\_\+\+PERIOD~250} -Toggle P2.\+4 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+0 also output on P2.\+4. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P2.\+4 at TACLK/2$\ast$250. Thus the output frequency on P2.\+4 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P2.\+4 output frequency is $\sim$1.045M/1000. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md171}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md171} +Toggle P2.\+4 using hardware TA1.\+0 output. Timer1\+\_\+A is configured for up/down mode with CCR0 defining period, TA1.\+0 also output on P2.\+4. In this example, CCR0 is loaded with 250 and TA1.\+0 will toggle P2.\+4 at TACLK/2$\ast$250. Thus the output frequency on P2.\+4 will be the TACLK/1000. No CPU or software resources required. As coded with TACLK = SMCLK, P2.\+4 output frequency is $\sim$1.045M/1000. SMCLK = MCLK = TACLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md175}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__a_2timer__a__ex6__up_down_mode_operation_8c_autotoc_md175} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex index d0c020d..af4ce95 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_op Timer\+\_\+B, Toggle P1.\+0, CCR0 Up Mode ISR, DCO SMCLK -Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md172}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md172} +Description\+: Toggle P1.\+0 using software and TB\+\_\+0 ISR. Timer\+\_\+B is configured for up mode, thus the timer overflows when TBR counts to CCR0. In this example, CCR0 is loaded with 50000. ACLK = n/a, MCLK = SMCLK = TBCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md176}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex4__up_mode_operation_8c_autotoc_md176} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex index 2c16ce7..c6d7dc7 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c.tex @@ -34,7 +34,7 @@ Definition at line 64 of file timer\+\_\+b\+\_\+ex5\+\_\+single\+PWM.\+c. Timer\+\_\+B, PWM TB0.\+1, Up Mode, DCO SMCLK -Description\+: This program generates PWM outputs on P2.\+6 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$488us with a 75\% duty cycle on P2.\+6 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md173}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md173} +Description\+: This program generates PWM outputs on P2.\+6 using Timer\+\_\+B configured for up mode. The value , TIMER\+\_\+\+PERIOD, defines the PWM period and the value DUTY\+\_\+\+CYCLE the PWM duty cycle. Using $\sim$1.045MHz SMCLK as TBCLK, the timer period is $\sim$488us with a 75\% duty cycle on P2.\+6 ACLK = n/a, SMCLK = MCLK = TBCLK = default DCO $\sim$1.045MHz.\hypertarget{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md177}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2timer__b_2timer__b__ex5__single_p_w_m_8c_autotoc_md177} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex index 28170ec..690f16e 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c.tex @@ -15,7 +15,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_a \doxysubsubsection{\texorpdfstring{main()}{main()}} {\footnotesize\ttfamily void main (\begin{DoxyParamCaption}\item[{void}]{ }\end{DoxyParamCaption})} -tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md174}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md174} +tlv -\/ get\+Device\+Type\hypertarget{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md178}{}\doxysubsubsection{Tested on MSP430\+F5438\+A, MSP430\+FR5739}\label{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex1__get_device_type_8c_autotoc_md178} /$\vert$$|$ $\vert$ $\vert$ $\vert$ $\vert$ --$\vert$ $\vert$ Device Type $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex index b09a8b9..4c2a570 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c.tex @@ -349,7 +349,7 @@ Definition at line 68 of file tlv\+\_\+ex2\+\_\+read\+TLVDescriptors.\+c. The contents of TLV device descriptors are read out using the TLV functions and then stored into local variables. -ACLK = n/a, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md175}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md175} +ACLK = n/a, MCLK = SMCLK = default DCO $\sim$ 1.\+045\+MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md179}{}\doxysubsubsection{Tested On\+: MSP430\+F5438\+A,\+MSP430\+FR5739,\+MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2tlv_2tlv__ex2__read_t_l_v_descriptors_8c_autotoc_md179} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex index 21a9409..76fb60d 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c WDT -\/ Toggle P1.\+0, Interval Overflow ISR, DCO SMCLK -Toggle P1.\+0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = \{(default DCO 1.\+045\+MHz) / 32768\} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md176}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md176} +Toggle P1.\+0 using software timed by the WDT ISR. Toggle rate is approx. 30ms = \{(default DCO 1.\+045\+MHz) / 32768\} based on default DCO = SMCLK clock source used in this example for the WDT. ACLK = n/a, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md180}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex1__interval_s_m_c_l_k_8c_autotoc_md180} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex index 6a5e8bd..b80af54 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c.tex @@ -19,7 +19,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l WDT -\/ Toggle P1.\+0, Interval Overflow ISR, 32k\+Hz ACLK -Toggle P1.\+0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32k\+Hz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-\/crystal(2$^\wedge$15) by 2$^\wedge$13 with an ISR triggered @ 4Hz = \mbox{[}WDT CLK source/32768\mbox{]}. ACLK = REFO , MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md177}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md177} +Toggle P1.\+0 using software timed by WDT ISR. Toggle rate is exactly 250ms based on 32k\+Hz ACLK WDT clock source. In this example the WDT is configured to divide 32768 watch-\/crystal(2$^\wedge$15) by 2$^\wedge$13 with an ISR triggered @ 4Hz = \mbox{[}WDT CLK source/32768\mbox{]}. ACLK = REFO , MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md181}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex2__interval_a_c_l_k_8c_autotoc_md181} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex index a8c26a2..5e9df94 100644 --- a/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex +++ b/Generated Documentation/latex/_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l WDT -\/ Failsafe Clock, 39KHz LFMODCLK -Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-\/safe feature by automatically selecting LFMODCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.\+0 every 1 second in main function. LFMODCLK = 39062, ACLK = 32768, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md178}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md178} +Configure WDT in watchdog to timeout sourced by ACLK. LPM3 is entered. This example will demonstrate WDT fail-\/safe feature by automatically selecting LFMODCLK as WDT clock source if ACLK fails. Watchdog timeout will toggle on P1.\+0 every 1 second in main function. LFMODCLK = 39062, ACLK = 32768, MCLK = SMCLK = default DCO $\sim$1.045MHz\hypertarget{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md182}{}\doxysubsubsection{Tested On\+: MSP430\+FR5969}\label{_m_s_p430_f_r5xx__6xx_2wdt__a_2wdt__a__ex3__watchdog_a_c_l_k_8c_autotoc_md182} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/adc10__a__ex8__sequence_d_m_a_8c.tex b/Generated Documentation/latex/adc10__a__ex8__sequence_d_m_a_8c.tex index e41f0b2..a267a73 100644 --- a/Generated Documentation/latex/adc10__a__ex8__sequence_d_m_a_8c.tex +++ b/Generated Documentation/latex/adc10__a__ex8__sequence_d_m_a_8c.tex @@ -33,7 +33,7 @@ References \+\_\+\+\_\+bic\+\_\+\+SR\+\_\+register\+\_\+on\+\_\+exit(). ADC10\+\_\+A -\/ Sample A2-\/0 Inputs directly to DMA, 8-\/Bit Res, Single Seq. -MSP430\+F550x Demo Sample A2/\+A1/\+A0 as single sequence with reference to AVcc. Software sets ADC10\+SC to trigger sample sequence. In Mainloop MSP430 waits in LPM0 to save power until ADC10\+\_\+A conversion complete, DMA\+\_\+\+ISR will force exit from any LPMx. ADC10\+\_\+A internal oscillator times sample period (16x) and conversion (13x). DMA transfers conv results ADC\+\_\+\+Result variable. Notice that the conversions go in the order of A2, A1, then A0. \hypertarget{adc10__a__ex8__sequence_d_m_a_8c_autotoc_md35}{}\doxysubsubsection{MSP430\+F550x}\label{adc10__a__ex8__sequence_d_m_a_8c_autotoc_md35} +MSP430\+F550x Demo Sample A2/\+A1/\+A0 as single sequence with reference to AVcc. Software sets ADC10\+SC to trigger sample sequence. In Mainloop MSP430 waits in LPM0 to save power until ADC10\+\_\+A conversion complete, DMA\+\_\+\+ISR will force exit from any LPMx. ADC10\+\_\+A internal oscillator times sample period (16x) and conversion (13x). DMA transfers conv results ADC\+\_\+\+Result variable. Notice that the conversions go in the order of A2, A1, then A0. \hypertarget{adc10__a__ex8__sequence_d_m_a_8c_autotoc_md39}{}\doxysubsubsection{MSP430\+F550x}\label{adc10__a__ex8__sequence_d_m_a_8c_autotoc_md39} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ --$\vert$\+RST XOUT$\vert$-\/ $\vert$ P6.\+2/\+A2$\vert$$<$-\/ Sample Signal 1 $\vert$ P6.\+1/\+A1$\vert$$<$-\/ Sample Signal 2 $\vert$ P6.\+0/\+A0$\vert$$<$-\/ Sample Signal 3 $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/adc10__b__ex1__avcc_ref_8c.tex b/Generated Documentation/latex/adc10__b__ex1__avcc_ref_8c.tex index b27f17c..977b994 100644 --- a/Generated Documentation/latex/adc10__b__ex1__avcc_ref_8c.tex +++ b/Generated Documentation/latex/adc10__b__ex1__avcc_ref_8c.tex @@ -33,7 +33,7 @@ References \+\_\+\+\_\+bic\+\_\+\+SR\+\_\+register\+\_\+on\+\_\+exit(), GPIO\+\_ ADC10B -\/ Sample A1 Input, AVcc Ref, P1.\+0 and P3.\+5 is set if A1 $>$ 0.\+5\+AVcc -MSP430\+FR573x Demo A single sample is made on A1 with reference to AVcc. Software sets ADC10\+SC to start sample and conversion -\/ ADC10\+SC automatically cleared at EOC.\+ADC10B internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10B conversion complete, ADC10\+\_\+\+ISR will force exit from LPM0 in Mainloop on reti. If A1 $>$ 0.\+5$\ast$\+AVcc, P1.\+0 and and P3.\+5 set, else reset. \hypertarget{adc10__b__ex1__avcc_ref_8c_autotoc_md108}{}\doxysubsubsection{MSP430\+FR5739}\label{adc10__b__ex1__avcc_ref_8c_autotoc_md108} +MSP430\+FR573x Demo A single sample is made on A1 with reference to AVcc. Software sets ADC10\+SC to start sample and conversion -\/ ADC10\+SC automatically cleared at EOC.\+ADC10B internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC10B conversion complete, ADC10\+\_\+\+ISR will force exit from LPM0 in Mainloop on reti. If A1 $>$ 0.\+5$\ast$\+AVcc, P1.\+0 and and P3.\+5 set, else reset. \hypertarget{adc10__b__ex1__avcc_ref_8c_autotoc_md112}{}\doxysubsubsection{MSP430\+FR5739}\label{adc10__b__ex1__avcc_ref_8c_autotoc_md112} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $>$---$\vert$\+P1.1/\+A1 P1.\+0$\vert$-\/-\/$>$LED $\vert$ P3.\+5$\vert$-\/-\/$>$LED This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/adc__ex1__avcc_ref_8c.tex b/Generated Documentation/latex/adc__ex1__avcc_ref_8c.tex index b91859a..730284a 100644 --- a/Generated Documentation/latex/adc__ex1__avcc_ref_8c.tex +++ b/Generated Documentation/latex/adc__ex1__avcc_ref_8c.tex @@ -34,7 +34,7 @@ References \+\_\+\+\_\+bic\+\_\+\+SR\+\_\+register\+\_\+on\+\_\+exit(), GPIO\+\_ ADC -\/ Sample A7 Input, AVcc Ref, LED1 and LED2 is set if A7 $>$ 0.\+5\+AVcc -MSP430\+FR4133 Demo A single sample is made on A7 with reference to AVcc. Software sets ADC10\+SC to start sample and conversion -\/ ADC10\+SC automatically cleared at EOC.\+ADC internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC conversion complete, ADC10\+\_\+\+ISR will force exit from LPM0 in Mainloop on reti. If A7 $>$ 0.\+5$\ast$\+AVcc, LED1 and LED2 set, else reset. \hypertarget{adc__ex1__avcc_ref_8c_autotoc_md80}{}\doxysubsubsection{MSP430\+FR2xx\+\_\+4xx Board}\label{adc__ex1__avcc_ref_8c_autotoc_md80} +MSP430\+FR4133 Demo A single sample is made on A7 with reference to AVcc. Software sets ADC10\+SC to start sample and conversion -\/ ADC10\+SC automatically cleared at EOC.\+ADC internal oscillator times sample (16x) and conversion. In Mainloop MSP430 waits in LPM0 to save power until ADC conversion complete, ADC10\+\_\+\+ISR will force exit from LPM0 in Mainloop on reti. If A7 $>$ 0.\+5$\ast$\+AVcc, LED1 and LED2 set, else reset. \hypertarget{adc__ex1__avcc_ref_8c_autotoc_md84}{}\doxysubsubsection{MSP430\+FR2xx\+\_\+4xx Board}\label{adc__ex1__avcc_ref_8c_autotoc_md84} /$\vert$$|$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ --$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $>$---$\vert$\+A7 $\vert$-\/-\/$>$LED1 $\vert$ $\vert$-\/-\/$>$LED2 This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/battbak__ex1__calendermode_l_p_m3_8c.tex b/Generated Documentation/latex/battbak__ex1__calendermode_l_p_m3_8c.tex index 9fa9359..75a3bf2 100644 --- a/Generated Documentation/latex/battbak__ex1__calendermode_l_p_m3_8c.tex +++ b/Generated Documentation/latex/battbak__ex1__calendermode_l_p_m3_8c.tex @@ -55,7 +55,7 @@ References \+\_\+\+\_\+no\+\_\+operation(), and new\+Time. RTC\+\_\+B in Calendar mode with LPM3, Interruptions every 1s, 1m, and 5th day of week at 5\+:00pm -This program demonstrates the battery backup peripheral working with RTC\+\_\+B in LPM3. The LOCKBAK bit is cleared before RTC interrupt enabled and RTC interrupts will be serviced as normal interrupts. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{battbak__ex1__calendermode_l_p_m3_8c_autotoc_md36}{}\doxysubsubsection{Tested On\+: MSP430\+F6638}\label{battbak__ex1__calendermode_l_p_m3_8c_autotoc_md36} +This program demonstrates the battery backup peripheral working with RTC\+\_\+B in LPM3. The LOCKBAK bit is cleared before RTC interrupt enabled and RTC interrupts will be serviced as normal interrupts. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{battbak__ex1__calendermode_l_p_m3_8c_autotoc_md40}{}\doxysubsubsection{Tested On\+: MSP430\+F6638}\label{battbak__ex1__calendermode_l_p_m3_8c_autotoc_md40} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/crc32__ex1__calculate_crc16_8c.tex b/Generated Documentation/latex/crc32__ex1__calculate_crc16_8c.tex index 7942e67..a1302d2 100644 --- a/Generated Documentation/latex/crc32__ex1__calculate_crc16_8c.tex +++ b/Generated Documentation/latex/crc32__ex1__calculate_crc16_8c.tex @@ -34,7 +34,7 @@ Definition at line 62 of file crc32\+\_\+ex1\+\_\+calculate\+Crc16.\+c. CRC -\/ Calculate CRC and check result -Breakpoints can be set at \mbox{\hyperlink{hspll__ex1__output__ussxtosc_8c_a3116364c549eaf1afa07246f26ebc02e}{\+\_\+\+\_\+no\+\_\+operation()}}to compare hardware and software generated CRC values.\hypertarget{crc32__ex1__calculate_crc16_8c_autotoc_md143}{}\doxysubsubsection{Tested On\+: MSP430\+FR6989}\label{crc32__ex1__calculate_crc16_8c_autotoc_md143} +Breakpoints can be set at \mbox{\hyperlink{hspll__ex1__output__ussxtosc_8c_a3116364c549eaf1afa07246f26ebc02e}{\+\_\+\+\_\+no\+\_\+operation()}}to compare hardware and software generated CRC values.\hypertarget{crc32__ex1__calculate_crc16_8c_autotoc_md147}{}\doxysubsubsection{Tested On\+: MSP430\+FR6989}\label{crc32__ex1__calculate_crc16_8c_autotoc_md147} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/documentation_guide.tex b/Generated Documentation/latex/documentation_guide.tex index e70dcb2..12d6d64 100644 --- a/Generated Documentation/latex/documentation_guide.tex +++ b/Generated Documentation/latex/documentation_guide.tex @@ -1,23 +1,23 @@ -\hypertarget{documentation_guide_autotoc_md24}{}\doxysection{Doxygen}\label{documentation_guide_autotoc_md24} +\hypertarget{documentation_guide_autotoc_md28}{}\doxysection{Doxygen}\label{documentation_guide_autotoc_md28} The program called \char`\"{}doxygen\char`\"{} (\href{https://github.com/doxygen/doxygen}{\texttt{ Git\+Hub Page}} and \href{https://www.doxygen.nl/}{\texttt{ Website}}) is what we\textquotesingle{}re using to document our project and try to make things a bit simpler/easier not only for us, but also future projects or people looking at what we\textquotesingle{}ve done. It simply uses a small configuration file at the root of the project {\ttfamily /\+Doxyfile} to store some settings, and the rest is through mainly Markdown files ({\ttfamily .md} or {\ttfamily .markdown}) and source code files. -It is setup (as of writing this) that someone can simply open the {\ttfamily /\+Doxyfile} in the GUI Wizard, click on the \char`\"{}\+Run\char`\"{} tab, then \char`\"{}\+Run doxygen\char`\"{}, and everything will be updated... that\textquotesingle{}s it.\hypertarget{documentation_guide_autotoc_md25}{}\doxysection{Updating Documentation}\label{documentation_guide_autotoc_md25} -You need to have installed the program from either the Git\+Hub page or website, then simply open the {\ttfamily /\+Doxyfile} within the GUI frontend or \char`\"{}\+Wizard\char`\"{}.\hypertarget{documentation_guide_autotoc_md26}{}\doxysection{Important Notes}\label{documentation_guide_autotoc_md26} +It is setup (as of writing this) that someone can simply open the {\ttfamily /\+Doxyfile} in the GUI Wizard, click on the \char`\"{}\+Run\char`\"{} tab, then \char`\"{}\+Run doxygen\char`\"{}, and everything will be updated... that\textquotesingle{}s it.\hypertarget{documentation_guide_autotoc_md29}{}\doxysection{Updating Documentation}\label{documentation_guide_autotoc_md29} +You need to have installed the program from either the Git\+Hub page or website, then simply open the {\ttfamily /\+Doxyfile} within the GUI frontend or \char`\"{}\+Wizard\char`\"{}.\hypertarget{documentation_guide_autotoc_md30}{}\doxysection{Important Notes}\label{documentation_guide_autotoc_md30} \begin{DoxyItemize} \item Make sure that the {\ttfamily /\+Doxyfile} stays where it\textquotesingle{}s at! It should be kept at the root directory (just to keep things simple) \item Make sure you use RELATIVE paths when changing configurations, or else when someone else tries running the {\ttfamily /\+Doxyfile}, they\textquotesingle{}ll have to re-\/do all of them in order for it to start functioning again. \item {\bfseries{DO NOT}} put any files into the {\ttfamily /\+Documentation} folder manually, as they {\bfseries{WILL BE DELETED}} when doxygen is run. -\end{DoxyItemize}\hypertarget{documentation_guide_autotoc_md27}{}\doxysubsection{For Consistency}\label{documentation_guide_autotoc_md27} +\end{DoxyItemize}\hypertarget{documentation_guide_autotoc_md31}{}\doxysubsection{For Consistency}\label{documentation_guide_autotoc_md31} \begin{DoxyItemize} \item Please make sure the internal names (\char`\"{}tags\char`\"{}) of files are using \char`\"{}camel\+Case\char`\"{} \begin{DoxyItemize} \item Example\+: for \char`\"{}@page documentation\+Guide Documentation Guide\char`\"{} \char`\"{}documentation\+Guide\char`\"{} is the name/tag used internally by doxygen. \char`\"{}\+Documentation Guide\char`\"{} is what shows up on the output documentation. \end{DoxyItemize} -\end{DoxyItemize}\hypertarget{documentation_guide_autotoc_md28}{}\doxysubsection{Adding Images}\label{documentation_guide_autotoc_md28} +\end{DoxyItemize}\hypertarget{documentation_guide_autotoc_md32}{}\doxysubsection{Adding Images}\label{documentation_guide_autotoc_md32} Use this pattern/format\+: \begin{DoxyCode}{0} \DoxyCodeLine{@image html "{}Documentation Guide.assets/Funny-\/Cat-\/Hidden.jpg"{}} diff --git a/Generated Documentation/latex/flashctl__ex1__write_to_info_b_8c.tex b/Generated Documentation/latex/flashctl__ex1__write_to_info_b_8c.tex index 696e4e6..fc13bb8 100644 --- a/Generated Documentation/latex/flashctl__ex1__write_to_info_b_8c.tex +++ b/Generated Documentation/latex/flashctl__ex1__write_to_info_b_8c.tex @@ -31,7 +31,7 @@ uint32\+\_\+t \mbox{\hyperlink{flashctl__ex1__write_to_info_b_8c_a3f0f7761abeb6f Dummy calibration data is written to infoB. 16 locations are written with char data, 8 locations with int data and 4 locations with word data. LED toggles upon completion. -Check infoB location @ 0x1900 on execution of program.\hypertarget{flashctl__ex1__write_to_info_b_8c_autotoc_md41}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex1__write_to_info_b_8c_autotoc_md41} +Check infoB location @ 0x1900 on execution of program.\hypertarget{flashctl__ex1__write_to_info_b_8c_autotoc_md45}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex1__write_to_info_b_8c_autotoc_md45} /$\vert$$|$ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/\+LED --$\vert$\+RST $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/flashctl__ex2__erase_copy_write_8c.tex b/Generated Documentation/latex/flashctl__ex2__erase_copy_write_8c.tex index cd9f591..69629cf 100644 --- a/Generated Documentation/latex/flashctl__ex2__erase_copy_write_8c.tex +++ b/Generated Documentation/latex/flashctl__ex2__erase_copy_write_8c.tex @@ -45,7 +45,7 @@ Definition at line 89 of file flashctl\+\_\+ex2\+\_\+erase\+Copy\+Write.\+c. \doxysubsubsection{\texorpdfstring{INFOC\_START}{INFOC\_START}} {\footnotesize\ttfamily \#define INFOC\+\_\+\+START~(0x1880)} -This program first erases flash seg C, then it increments all values in seg C, then it erases seg D, then copies seg C to seg D. LED toggles upon completion. Starting addresses of segments defined in this code\+: Seg C-\/0x1880, Seg D-\/0x1800. ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{flashctl__ex2__erase_copy_write_8c_autotoc_md42}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex2__erase_copy_write_8c_autotoc_md42} +This program first erases flash seg C, then it increments all values in seg C, then it erases seg D, then copies seg C to seg D. LED toggles upon completion. Starting addresses of segments defined in this code\+: Seg C-\/0x1880, Seg D-\/0x1800. ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{flashctl__ex2__erase_copy_write_8c_autotoc_md46}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex2__erase_copy_write_8c_autotoc_md46} /$\vert$$|$ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/\+LED --$\vert$\+RST $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/flashctl__ex3__long_word_write_8c.tex b/Generated Documentation/latex/flashctl__ex3__long_word_write_8c.tex index a4ec4fd..b854188 100644 --- a/Generated Documentation/latex/flashctl__ex3__long_word_write_8c.tex +++ b/Generated Documentation/latex/flashctl__ex3__long_word_write_8c.tex @@ -57,7 +57,7 @@ References \+\_\+\+\_\+delay\+\_\+cycles(), calibration\+\_\+data, INFOD\+\_\+\+ MSP430\+F5529 Demo -\/ Flash In-\/\+System Programming w/ Long-\/\+Word write at 0x1800 -Description\+: This program first erases flash seg D, then it writes a 32-\/bit value to memory location 0x1800 using BLK write mode. BLK write provides faster write times than byte/word mode. LED toggles upon completion. ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{flashctl__ex3__long_word_write_8c_autotoc_md43}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex3__long_word_write_8c_autotoc_md43} +Description\+: This program first erases flash seg D, then it writes a 32-\/bit value to memory location 0x1800 using BLK write mode. BLK write provides faster write times than byte/word mode. LED toggles upon completion. ACLK = REFO = 32k\+Hz, MCLK = SMCLK = default DCO 1048576Hz\hypertarget{flashctl__ex3__long_word_write_8c_autotoc_md47}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex3__long_word_write_8c_autotoc_md47} /$\vert$$|$ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/\+LED --$\vert$\+RST $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/flashctl__ex4__write_to_info_a_8c.tex b/Generated Documentation/latex/flashctl__ex4__write_to_info_a_8c.tex index 0869f0c..0bc960c 100644 --- a/Generated Documentation/latex/flashctl__ex4__write_to_info_a_8c.tex +++ b/Generated Documentation/latex/flashctl__ex4__write_to_info_a_8c.tex @@ -31,7 +31,7 @@ uint32\+\_\+t \mbox{\hyperlink{flashctl__ex4__write_to_info_a_8c_a3f0f7761abeb6f Dummy calibration data is written to infoA. 16 locations are written with char data, 8 locations with int data and 4 locations with word data. LED toggles upon completion. -Check infoB location @ 0x1980 on execution of program.\hypertarget{flashctl__ex4__write_to_info_a_8c_autotoc_md44}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex4__write_to_info_a_8c_autotoc_md44} +Check infoB location @ 0x1980 on execution of program.\hypertarget{flashctl__ex4__write_to_info_a_8c_autotoc_md48}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{flashctl__ex4__write_to_info_a_8c_autotoc_md48} /$\vert$$|$ $\vert$ $\vert$ $\vert$ P1.\+0$\vert$-\/\+LED --$\vert$\+RST $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/framctl__a__ex1__write_8c.tex b/Generated Documentation/latex/framctl__a__ex1__write_8c.tex index e75fe76..3828d13 100644 --- a/Generated Documentation/latex/framctl__a__ex1__write_8c.tex +++ b/Generated Documentation/latex/framctl__a__ex1__write_8c.tex @@ -17,7 +17,7 @@ void \mbox{\hyperlink{framctl__a__ex1__write_8c_a6288eba0f8e8ad3ab1544ad731eb766 Long word writes to FRAMCtl\+\_\+A -Description\+: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE\+: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz\hypertarget{framctl__a__ex1__write_8c_autotoc_md147}{}\doxysubsubsection{Tested On\+: MSP430\+FR5994}\label{framctl__a__ex1__write_8c_autotoc_md147} +Description\+: Use long word write to write to 512 byte blocks of FRAM. Toggle LEDs after every 100 writes. NOTE\+: Running this example for extended periods will impact the FRAM endurance. ACLK = VLO, MCLK = SMCLK = 4MHz\hypertarget{framctl__a__ex1__write_8c_autotoc_md151}{}\doxysubsubsection{Tested On\+: MSP430\+FR5994}\label{framctl__a__ex1__write_8c_autotoc_md151} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/hardware.tex b/Generated Documentation/latex/hardware.tex index 0aebe8e..34ac491 100644 --- a/Generated Documentation/latex/hardware.tex +++ b/Generated Documentation/latex/hardware.tex @@ -255,11 +255,12 @@ In addition to trying to keep the MCU and PCB organized with the left-\/side bei \end{DoxyItemize} \end{DoxyItemize}\hypertarget{powerDesign}{}\doxysection{Power Design}\label{powerDesign} \hypertarget{power_design_autotoc_md15}{}\doxysubsection{Boost}\label{power_design_autotoc_md15} -\hypertarget{power_design_autotoc_md16}{}\doxysubsubsection{LTSpice Simulations}\label{power_design_autotoc_md16} +\hypertarget{power_design_autotoc_md16}{}\doxysubsubsection{Specifications}\label{power_design_autotoc_md16} +The boost converter is used to power the Sunseeker Lighting board. Vin will be the car battery giving a a 12V input. This will then be boosted to 16V output, with an output current of 2A. The lights do not need to turn on, the instant the battery turns on, so including a time may benefit the board.\hypertarget{power_design_autotoc_md17}{}\doxysubsubsection{LTSpice Simulations}\label{power_design_autotoc_md17} \begin{DoxyItemize} -\item The LTSpice circuit includes input and output resistors for input and output power calculations -\item An RC circuit can be added at the input for time-\/delay for output capacitor charging +\item The LTSpice boost circuit includes input and output resistors for input and output power calculations per Dr. Bazuin. These resistors will not be included in the Altium schematic. +\item Dr. Bazuin suggested that an RC circuit can be added at the input for time-\/delay for output capacitor charging \item Output power = (16V)(2A(max))=32 Watts \item Input power = (12V)(Max FET current). Max FET current should be 2-\/3x the desired output current \item Rsense = Vsense(min)/\+IL(max). Vsense is given in LT1619 Datasheet\+: 40m\+V(min). For IL, we are using max FET current @@ -267,14 +268,20 @@ In addition to trying to keep the MCU and PCB organized with the left-\/side bei \item For Rsense, a smaller R value gives less output ripple voltage in simulation. \item Rsense is basically setting the current through the FET \end{DoxyItemize} -\item Voltage divider equation can be found in datasheet for LT1619 -\end{DoxyItemize}\hypertarget{power_design_autotoc_md17}{}\doxysubsubsection{Altium}\label{power_design_autotoc_md17} +\item Voltage divider equation can be found in datasheet for LT1619\+: Vout=(1.\+24V)(1+(R1/\+R2)) +\item Setting the VC resistor effects the oscillation of the output voltage +\end{DoxyItemize}\hypertarget{power_design_autotoc_md18}{}\doxysubsubsection{Altium}\label{power_design_autotoc_md18} \begin{DoxyItemize} \item Inductor is 10uH MSS1210-\/103\+MEB. Dr. Bazuin suggested its use as Sunseeker has lots of them \item Replaced the SI9804\+DY FET (used in LTSpice) with the FDS6680A as the SI is obsolete \item Replaced the MBR735 Schottky (used in LTSpice) with the MBRD835\+LT4G because 735 is not surface mount -\end{DoxyItemize}\hypertarget{power_design_autotoc_md18}{}\doxysubsection{Buck}\label{power_design_autotoc_md18} +\end{DoxyItemize}\hypertarget{power_design_autotoc_md19}{}\doxysubsection{Buck}\label{power_design_autotoc_md19} +\hypertarget{power_design_autotoc_md20}{}\doxysubsubsection{Specifications}\label{power_design_autotoc_md20} +The DC-\/\+DC buck regulator is a step-\/down converter used to lower the 12V input from the car battery to +3.\+3V to power the telemetry MCU. + +The initial buck converter design utilized the\hypertarget{power_design_autotoc_md21}{}\doxysubsubsection{LTSpice Simulations}\label{power_design_autotoc_md21} +\hypertarget{power_design_autotoc_md22}{}\doxysubsubsection{Altium}\label{power_design_autotoc_md22} {\itshape asd} {\bfseries{asd}} \ No newline at end of file diff --git a/Generated Documentation/latex/index.tex b/Generated Documentation/latex/index.tex index aba3930..53aa053 100644 --- a/Generated Documentation/latex/index.tex +++ b/Generated Documentation/latex/index.tex @@ -1,8 +1,8 @@ -\hypertarget{index_autotoc_md19}{}\doxysection{About}\label{index_autotoc_md19} -What this project is about (TODO)\hypertarget{index_autotoc_md20}{}\doxysection{Documentation}\label{index_autotoc_md20} +\hypertarget{index_autotoc_md23}{}\doxysection{About}\label{index_autotoc_md23} +What this project is about (TODO)\hypertarget{index_autotoc_md24}{}\doxysection{Documentation}\label{index_autotoc_md24} For Documentation, we will use \char`\"{}doxygen\char`\"{} to easily create documentation pages for the project. This will be accessible in a variety of means, but primarily through HTML pages accessible through a browser, covering all aspects of the project. -More information here\+: \mbox{\hyperlink{documentation_guide}{Documentation Guide}}\hypertarget{index_autotoc_md21}{}\doxysubsection{Tips from Dr. Bazuin}\label{index_autotoc_md21} +More information here\+: \mbox{\hyperlink{documentation_guide}{Documentation Guide}}\hypertarget{index_autotoc_md25}{}\doxysubsection{Tips from Dr. Bazuin}\label{index_autotoc_md25} \begin{DoxyItemize} \item Make sub-\/circuits/sub-\/designs for schematics to keep things organized and modular/copy-\/able @@ -21,13 +21,13 @@ More information here\+: \mbox{\hyperlink{documentation_guide}{Documentation Gui \item Free samples for parts from manufacturers \item Make peripherals like output on one side and inputs on the other \item Use SPI Chip Select as a separate command (Use 3-\/pin SPI and then just use GPIO for Chip Select) -\end{DoxyItemize}\hypertarget{index_autotoc_md22}{}\doxysubsection{Tips from Dr. Gomez}\label{index_autotoc_md22} +\end{DoxyItemize}\hypertarget{index_autotoc_md26}{}\doxysubsection{Tips from Dr. Gomez}\label{index_autotoc_md26} \begin{DoxyItemize} \item Our requirements/specifications should be made to be more measurable \item Need to design to safety standards, which need to be researched online \item He said that he is available himself for anything power-\/related to help out with if needed -\end{DoxyItemize}\hypertarget{index_autotoc_md23}{}\doxysection{TODO List}\label{index_autotoc_md23} +\end{DoxyItemize}\hypertarget{index_autotoc_md27}{}\doxysection{TODO List}\label{index_autotoc_md27} \begin{DoxyItemize} \item \mbox{[} \mbox{]} Make battery circuitry for Real-\/\+Time Clock/\+Calendar for when the vehicle is off. diff --git a/Generated Documentation/latex/pmap__ex3__single_function_to_multiple_pins_8c.tex b/Generated Documentation/latex/pmap__ex3__single_function_to_multiple_pins_8c.tex index 9e94349..8248a06 100644 --- a/Generated Documentation/latex/pmap__ex3__single_function_to_multiple_pins_8c.tex +++ b/Generated Documentation/latex/pmap__ex3__single_function_to_multiple_pins_8c.tex @@ -70,7 +70,7 @@ References \+\_\+\+\_\+bic\+\_\+\+SR\+\_\+register\+\_\+on\+\_\+exit(), and \+\_ \end{DoxyCode} MSP430\+F55x Demo -\/ Port Map single function to multiple pins; Multiple runtime configurations -Description\+: The port mapping of TIMERB0 is changed with each WDT interrupt. TIMER\+\_\+\+B0 provides 4 PWMs with 4 different duty cycles. TIMER\+\_\+\+B0 is sourced from ACLK. ACLK is REFO, 32k\+Hz\hypertarget{pmap__ex3__single_function_to_multiple_pins_8c_autotoc_md60}{}\doxysubsubsection{MSP430\+F5528}\label{pmap__ex3__single_function_to_multiple_pins_8c_autotoc_md60} +Description\+: The port mapping of TIMERB0 is changed with each WDT interrupt. TIMER\+\_\+\+B0 provides 4 PWMs with 4 different duty cycles. TIMER\+\_\+\+B0 is sourced from ACLK. ACLK is REFO, 32k\+Hz\hypertarget{pmap__ex3__single_function_to_multiple_pins_8c_autotoc_md64}{}\doxysubsubsection{MSP430\+F5528}\label{pmap__ex3__single_function_to_multiple_pins_8c_autotoc_md64} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/ram__ex1__set_sector_off_8c.tex b/Generated Documentation/latex/ram__ex1__set_sector_off_8c.tex index b89460a..3a12548 100644 --- a/Generated Documentation/latex/ram__ex1__set_sector_off_8c.tex +++ b/Generated Documentation/latex/ram__ex1__set_sector_off_8c.tex @@ -24,7 +24,7 @@ void \mbox{\hyperlink{ram__ex1__set_sector_off_8c_afa209a204489cffc3a47f48db05b9 RAM controller -\/ Set sector0 to memory-\/retention mode. -Setup the RAM controller to memory retention mode. Once watchdog expires and wakes up from LPM3 mode, checking the value in the sector0 and toggle P1.\+0 if the value is same as orignal value.\hypertarget{ram__ex1__set_sector_off_8c_autotoc_md163}{}\doxysubsubsection{Tested On\+: MSP430\+FR6989}\label{ram__ex1__set_sector_off_8c_autotoc_md163} +Setup the RAM controller to memory retention mode. Once watchdog expires and wakes up from LPM3 mode, checking the value in the sector0 and toggle P1.\+0 if the value is same as orignal value.\hypertarget{ram__ex1__set_sector_off_8c_autotoc_md167}{}\doxysubsubsection{Tested On\+: MSP430\+FR6989}\label{ram__ex1__set_sector_off_8c_autotoc_md167} \tabulinesep=1mm \begin{longtabu}spread 0pt [c]{*{2}{|X[-1]}|} \hline diff --git a/Generated Documentation/latex/ram__ex1__turn_off_sector_8c.tex b/Generated Documentation/latex/ram__ex1__turn_off_sector_8c.tex index bc4ae97..8be6407 100644 --- a/Generated Documentation/latex/ram__ex1__turn_off_sector_8c.tex +++ b/Generated Documentation/latex/ram__ex1__turn_off_sector_8c.tex @@ -55,7 +55,7 @@ References return\+Value. MSP430\+F5529 Demo -\/ RAM controller turn off RAM sector -Description\+: Switch RAM sector off instead of retention state during low low power modes.\hypertarget{ram__ex1__turn_off_sector_8c_autotoc_md61}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{ram__ex1__turn_off_sector_8c_autotoc_md61} +Description\+: Switch RAM sector off instead of retention state during low low power modes.\hypertarget{ram__ex1__turn_off_sector_8c_autotoc_md65}{}\doxysubsubsection{Tested On\+: MSP430\+F5529}\label{ram__ex1__turn_off_sector_8c_autotoc_md65} $\vert$ $\vert$ $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/resources.tex b/Generated Documentation/latex/resources.tex index 49c016b..4ab0847 100644 --- a/Generated Documentation/latex/resources.tex +++ b/Generated Documentation/latex/resources.tex @@ -6,21 +6,21 @@ \end{DoxyItemize} \DoxyHorRuler{0} -\hypertarget{resources_autotoc_md30}{}\doxysection{Altium Designer}\label{resources_autotoc_md30} -\hypertarget{resources_autotoc_md31}{}\doxysubsection{Learning Resources}\label{resources_autotoc_md31} +\hypertarget{resources_autotoc_md34}{}\doxysection{Altium Designer}\label{resources_autotoc_md34} +\hypertarget{resources_autotoc_md35}{}\doxysubsection{Learning Resources}\label{resources_autotoc_md35} \begin{DoxyItemize} \item \href{https://www.youtube.com/watch?v=HZIjYeVJXeU&list=PL3aaAq2OJU5H_V1wJfcxn9RtUf2hs2FU6}{\texttt{ Official You\+Tube Series}} -\end{DoxyItemize}\hypertarget{resources_autotoc_md32}{}\doxysubsection{Importing Schematics/\+Footprints/3\+D Models}\label{resources_autotoc_md32} +\end{DoxyItemize}\hypertarget{resources_autotoc_md36}{}\doxysubsection{Importing Schematics/\+Footprints/3\+D Models}\label{resources_autotoc_md36} \begin{DoxyItemize} \item \href{https://www.youtube.com/watch?v=6h-Z_NJibI8}{\texttt{ Instructional You\+Tube Video}} -\end{DoxyItemize}\hypertarget{resources_autotoc_md33}{}\doxysubsection{Tips}\label{resources_autotoc_md33} +\end{DoxyItemize}\hypertarget{resources_autotoc_md37}{}\doxysubsection{Tips}\label{resources_autotoc_md37} \begin{DoxyItemize} \item Altium seems to crash upon saving, most likely due to file names/paths being too long, and it not knowing how to handle it, then crashing. \item Whitespace characters seem to be safe to use in your file paths. -\end{DoxyItemize}\hypertarget{resources_autotoc_md34}{}\doxysection{Texas Instruments MSP430 Universal Clock System (\+UCS)}\label{resources_autotoc_md34} +\end{DoxyItemize}\hypertarget{resources_autotoc_md38}{}\doxysection{Texas Instruments MSP430 Universal Clock System (\+UCS)}\label{resources_autotoc_md38} \begin{DoxyItemize} \item \href{https://www.youtube.com/watch?v=b4PEmSDZml4}{\texttt{ High-\/level Introductory Video}} diff --git a/Generated Documentation/latex/rtc__b__ex1__calendermode_l_p_m0_8c.tex b/Generated Documentation/latex/rtc__b__ex1__calendermode_l_p_m0_8c.tex index 64b10de..34ebc84 100644 --- a/Generated Documentation/latex/rtc__b__ex1__calendermode_l_p_m0_8c.tex +++ b/Generated Documentation/latex/rtc__b__ex1__calendermode_l_p_m0_8c.tex @@ -55,7 +55,7 @@ References \+\_\+\+\_\+no\+\_\+operation(), and new\+Time. RTC\+\_\+B in Calendar mode with LPM0, Interruptions every 1s, 1m, and 5th day of week at 5\+:00pm -This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{rtc__b__ex1__calendermode_l_p_m0_8c_autotoc_md62}{}\doxysubsubsection{Tested On\+: MSP430\+F6638}\label{rtc__b__ex1__calendermode_l_p_m0_8c_autotoc_md62} +This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{rtc__b__ex1__calendermode_l_p_m0_8c_autotoc_md66}{}\doxysubsubsection{Tested On\+: MSP430\+F6638}\label{rtc__b__ex1__calendermode_l_p_m0_8c_autotoc_md66} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Generated Documentation/latex/rtc__b__ex2__calendermode_l_p_m3_8c.tex b/Generated Documentation/latex/rtc__b__ex2__calendermode_l_p_m3_8c.tex index 5f13737..e87f3f2 100644 --- a/Generated Documentation/latex/rtc__b__ex2__calendermode_l_p_m3_8c.tex +++ b/Generated Documentation/latex/rtc__b__ex2__calendermode_l_p_m3_8c.tex @@ -55,7 +55,7 @@ References \+\_\+\+\_\+no\+\_\+operation(), and new\+Time. RTC\+\_\+B in Calendar mode with LPM3, Interruptions every 1s, 1m, and 5th day of week at 5\+:00pm -This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{rtc__b__ex2__calendermode_l_p_m3_8c_autotoc_md63}{}\doxysubsubsection{Tested On\+: MSP430\+F6638}\label{rtc__b__ex2__calendermode_l_p_m3_8c_autotoc_md63} +This program demonstrates the RTC mode by triggering an interrupt every second and minute. This code toggles P1.\+0 every second. This code recommends an external LFXT1 crystal for RTC accuracy. Note that if XT1 is not present the code loops in an infinite loop. ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz\hypertarget{rtc__b__ex2__calendermode_l_p_m3_8c_autotoc_md67}{}\doxysubsubsection{Tested On\+: MSP430\+F6638}\label{rtc__b__ex2__calendermode_l_p_m3_8c_autotoc_md67} /$\vert$\textbackslash{} $\vert$ XIN$\vert$-\/ $\vert$ $\vert$ $\vert$ 32k\+Hz ---$\vert$\+RST XOUT$\vert$-\/ $\vert$ $\vert$ $\vert$ P1.\+0 $\vert$-\/-\/$>$ Toggles every second $\vert$ $\vert$ This example uses the following peripherals and I/O signals. You must review these and change as needed for your own board\+: diff --git a/Hardware/Power Design.markdown b/Hardware/Power Design.markdown index eb5cd95..c92c424 100644 --- a/Hardware/Power Design.markdown +++ b/Hardware/Power Design.markdown @@ -2,16 +2,21 @@ # Boost +## Specifications + +The boost converter is used to power the Sunseeker Lighting board. Vin will be the car battery giving a a 12V input. This will then be boosted to 16V output, with an output current of 2A. The lights do not need to turn on, the instant the battery turns on, so including a time may benefit the board. + ## LTSpice Simulations -* The LTSpice circuit includes input and output resistors for input and output power calculations -* An RC circuit can be added at the input for time-delay for output capacitor charging +* The LTSpice boost circuit includes input and output resistors for input and output power calculations per Dr. Bazuin. These resistors will not be included in the Altium schematic. +* Dr. Bazuin suggested that an RC circuit can be added at the input for time-delay for output capacitor charging * Output power = (16V)(2A(max))=32 Watts * Input power = (12V)(Max FET current). Max FET current should be 2-3x the desired output current * Rsense = Vsense(min)/IL(max). Vsense is given in LT1619 Datasheet: 40mV(min). For IL, we are using max FET current * For Rsense, a smaller R value gives less output ripple voltage in simulation. * Rsense is basically setting the current through the FET -* Voltage divider equation can be found in datasheet for LT1619 +* Voltage divider equation can be found in datasheet for LT1619: Vout=(1.24V)(1+(R1/R2)) +* Setting the VC resistor effects the oscillation of the output voltage ## Altium @@ -23,8 +28,22 @@ + + # Buck +## Specifications + +The DC-DC buck regulator is a step-down converter used to lower the 12V input from the car battery to +3.3V to power the telemetry MCU. + +The initial buck converter design utilized the + +## LTSpice Simulations + + + +## Altium + *asd*