From ce82eb124189107c08b8e717b466eaa2731152bd Mon Sep 17 00:00:00 2001 From: William Miceli Date: Sat, 30 Jan 2021 16:48:23 -0500 Subject: [PATCH] Altium Setup --- ...0-2021 Telemetry and Lighting Board.PrjPcb | 1014 +++++++++++++++++ .../History/Sheet1.~(1).SchDoc.Zip | Bin 0 -> 1365 bytes .../History/Sheet1.~(2).SchDoc.Zip | Bin 0 -> 8574 bytes .../Sheet1.SchDoc | Bin 0 -> 58368 bytes .../__Previews/Sheet1.SchDocPreview | 14 + 5 files changed, 1028 insertions(+) create mode 100644 Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/2020-2021 Telemetry and Lighting Board.PrjPcb create mode 100644 Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/History/Sheet1.~(1).SchDoc.Zip create mode 100644 Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/History/Sheet1.~(2).SchDoc.Zip create mode 100644 Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/Sheet1.SchDoc create mode 100644 Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/__Previews/Sheet1.SchDocPreview diff --git a/Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/2020-2021 Telemetry and Lighting Board.PrjPcb b/Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/2020-2021 Telemetry and Lighting Board.PrjPcb new file mode 100644 index 0000000..04e2b60 --- /dev/null +++ b/Hardware/AltiumProject/2020-2021 Telemetry and Lighting Board/2020-2021 Telemetry and Lighting Board.PrjPcb @@ -0,0 +1,1014 @@ +[Design] +Version=1.0 +HierarchyMode=0 +ChannelRoomNamingStyle=0 +ReleasesFolder= +ChannelDesignatorFormatString=$Component_$RoomName +ChannelRoomLevelSeperator=_ +OpenOutputs=1 +ArchiveProject=0 +TimestampOutput=0 +SeparateFolders=0 +TemplateLocationPath= +PinSwapBy_Netlabel=1 +PinSwapBy_Pin=1 +AllowPortNetNames=0 +AllowSheetEntryNetNames=1 +AppendSheetNumberToLocalNets=0 +NetlistSinglePinNets=0 +DefaultConfiguration=Sources +UserID=0xFFFFFFFF +DefaultPcbProtel=1 +DefaultPcbPcad=0 +ReorderDocumentsOnCompile=1 +NameNetsHierarchically=0 +PowerPortNamesTakePriority=0 +AutoSheetNumbering=1 +PushECOToAnnotationFile=1 +DItemRevisionGUID= +ReportSuppressedErrorsInMessages=0 +FSMCodingStyle=eFMSDropDownList_OneProcess +FSMEncodingStyle=eFMSDropDownList_OneHot +IsProjectConflictPreventionWarningsEnabled=0 +OutputPath= +LogFolderPath= +ManagedProjectGUID= +IncludeDesignInRelease=0 + +[Preferences] +PrefsVaultGUID= +PrefsRevisionGUID= + +[Configuration1] +Name=Sources +ParameterCount=0 +ConstraintFileCount=0 +ReleaseItemId= +Variant=[No Variations] +OutputJobsCount=0 +ContentTypeGUID=CB6F2064-E317-11DF-B822-12313F0024A2 +ConfigurationType=Source + +[OutputGroup1] +Name=Netlist Outputs +Description= +TargetPrinter=DYMO LabelWriter 450 +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=CadnetixNetlist +OutputName1=Cadnetix Netlist +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 +OutputType2=CalayNetlist +OutputName2=Calay Netlist +OutputDocumentPath2= +OutputVariantName2= +OutputDefault2=0 +OutputType3=EDIF +OutputName3=EDIF for PCB +OutputDocumentPath3= +OutputVariantName3= +OutputDefault3=0 +OutputType4=EESofNetlist +OutputName4=EESof Netlist +OutputDocumentPath4= +OutputVariantName4= +OutputDefault4=0 +OutputType5=IntergraphNetlist +OutputName5=Intergraph Netlist +OutputDocumentPath5= +OutputVariantName5= +OutputDefault5=0 +OutputType6=MentorBoardStationNetlist +OutputName6=Mentor BoardStation Netlist +OutputDocumentPath6= +OutputVariantName6= +OutputDefault6=0 +OutputType7=MultiWire +OutputName7=MultiWire +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=OrCadPCB2Netlist +OutputName8=Orcad/PCB2 Netlist +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=PADSNetlist +OutputName9=PADS ASCII Netlist +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 +OutputType10=Pcad +OutputName10=Pcad for PCB +OutputDocumentPath10= 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