16 #ifdef __MSP430_HAS_ADC12_PLUS__
21 bool ADC12_A_init (uint16_t baseAddress,
22 uint16_t sampleHoldSignalSourceSelect,
23 uint8_t clockSourceSelect,
24 uint16_t clockSourceDivider)
27 HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ENC;
32 HWREG16(baseAddress + OFS_ADC12CTL0) &= ~(ADC12ON + ADC12OVIE + ADC12TOVIE
33 + ADC12ENC + ADC12SC);
34 HWREG16(baseAddress + OFS_ADC12IE) &= 0x0000;
35 HWREG16(baseAddress + OFS_ADC12IFG) &= 0x0000;
38 HWREG16(baseAddress + OFS_ADC12CTL1) =
39 sampleHoldSignalSourceSelect
40 + (clockSourceDivider & ADC12DIV_7)
44 HWREG16(baseAddress + OFS_ADC12CTL2) =
45 (clockSourceDivider & ADC12PDIV)
51 void ADC12_A_enable (uint16_t baseAddress)
54 HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ON;
57 void ADC12_A_disable (uint16_t baseAddress)
60 HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~ADC12ON;
63 void ADC12_A_setupSamplingTimer (uint16_t baseAddress,
64 uint16_t clockCycleHoldCountLowMem,
65 uint16_t clockCycleHoldCountHighMem,
66 uint16_t multipleSamplesEnabled)
68 HWREG16(baseAddress + OFS_ADC12CTL1) |= ADC12SHP;
71 HWREG16(baseAddress + OFS_ADC12CTL0) &=
72 ~(ADC12SHT0_15 + ADC12SHT1_15 + ADC12MSC);
75 HWREG16(baseAddress + OFS_ADC12CTL0) |= clockCycleHoldCountLowMem
76 + (clockCycleHoldCountHighMem << 4)
77 + multipleSamplesEnabled;
81 void ADC12_A_disableSamplingTimer (uint16_t baseAddress)
83 HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12SHP);
87 void ADC12_A_configureMemory(uint16_t baseAddress,
88 ADC12_A_configureMemoryParam *
param)
91 assert( !(
HWREG16(baseAddress + OFS_ADC12CTL0) & ADC12ENC) );
93 if(!(
HWREG16(baseAddress + OFS_ADC12CTL0) & ADC12ENC))
96 uint16_t memoryBufferControlOffset =
97 (OFS_ADC12MCTL0 +
param->memoryBufferControlIndex);
100 HWREG8(baseAddress + memoryBufferControlOffset) =
101 param->inputSourceSelect
102 +
param->positiveRefVoltageSourceSelect
103 +
param->negativeRefVoltageSourceSelect
104 +
param->endOfSequence;
107 void ADC12_A_enableInterrupt (uint16_t baseAddress,
108 uint32_t interruptMask)
110 if (interruptMask & ADC12_A_CONVERSION_TIME_OVERFLOW_IE) {
111 HWREG16(baseAddress + OFS_ADC12CTL0) |= ADC12TOVIE;
112 interruptMask &= ~ADC12_A_CONVERSION_TIME_OVERFLOW_IE;
114 if (interruptMask & ADC12_A_OVERFLOW_IE) {
115 HWREG16(baseAddress + OFS_ADC12CTL0) |= ADC12OVIE;
116 interruptMask &= ~ADC12_A_OVERFLOW_IE;
119 HWREG16(baseAddress + OFS_ADC12IE) |= interruptMask;
122 void ADC12_A_disableInterrupt (uint16_t baseAddress,
123 uint32_t interruptMask)
125 if (interruptMask & ADC12_A_CONVERSION_TIME_OVERFLOW_IE) {
126 HWREG16(baseAddress + OFS_ADC12CTL0) &= ~(ADC12TOVIE);
127 interruptMask &= ~ADC12_A_CONVERSION_TIME_OVERFLOW_IE;
129 if (interruptMask & ADC12_A_OVERFLOW_IE) {
130 HWREG16(baseAddress + OFS_ADC12CTL0) &= ~(ADC12OVIE);
131 interruptMask &= ~ADC12_A_OVERFLOW_IE;
134 HWREG16(baseAddress + OFS_ADC12IE) &= ~(interruptMask);
137 void ADC12_A_clearInterrupt (uint16_t baseAddress,
138 uint16_t memoryInterruptFlagMask)
140 HWREG16(baseAddress + OFS_ADC12IFG) &= ~(memoryInterruptFlagMask);
143 uint16_t ADC12_A_getInterruptStatus (uint16_t baseAddress,
144 uint16_t memoryInterruptFlagMask)
146 return (
HWREG16(baseAddress + OFS_ADC12IFG) & memoryInterruptFlagMask );
149 void ADC12_A_startConversion (uint16_t baseAddress,
150 uint16_t startingMemoryBufferIndex,
151 uint8_t conversionSequenceModeSelect)
155 HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
157 HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12CSTARTADD_15 + ADC12CONSEQ_3);
159 HWREG8(baseAddress + OFS_ADC12CTL1_H) |= (startingMemoryBufferIndex << 4);
160 HWREG8(baseAddress + OFS_ADC12CTL1_L) |= conversionSequenceModeSelect;
161 HWREG8(baseAddress + OFS_ADC12CTL0_L) |= ADC12ENC + ADC12SC;
164 void ADC12_A_disableConversions (uint16_t baseAddress,
bool preempt)
166 if (ADC12_A_PREEMPTCONVERSION == preempt) {
167 HWREG8(baseAddress + OFS_ADC12CTL1_L) &= ~(ADC12CONSEQ_3);
170 else if (~(
HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12CONSEQ_3)) {
173 while (ADC12_A_isBusy(baseAddress)) ;
176 HWREG8(baseAddress + OFS_ADC12CTL0_L) &= ~(ADC12ENC);
179 uint16_t ADC12_A_getResults (uint16_t baseAddress, uint8_t memoryBufferIndex)
182 return (
HWREG16(baseAddress + (0x20 + (memoryBufferIndex * 2))) );
185 void ADC12_A_setResolution (uint16_t baseAddress,
186 uint8_t resolutionSelect)
188 HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12RES_3);
189 HWREG8(baseAddress + OFS_ADC12CTL2_L) |= resolutionSelect;
192 void ADC12_A_setSampleHoldSignalInversion (uint16_t baseAddress,
193 uint16_t invertedSignal)
195 HWREG16(baseAddress + OFS_ADC12CTL1) &= ~(ADC12ISSH);
196 HWREG16(baseAddress + OFS_ADC12CTL1) |= invertedSignal;
199 void ADC12_A_setDataReadBackFormat (uint16_t baseAddress,
200 uint8_t readBackFormat)
202 HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12DF);
203 HWREG8(baseAddress + OFS_ADC12CTL2_L) |= readBackFormat;
206 void ADC12_A_enableReferenceBurst (uint16_t baseAddress)
208 HWREG8(baseAddress + OFS_ADC12CTL2_L) |= ADC12REFBURST;
211 void ADC12_A_disableReferenceBurst (uint16_t baseAddress)
213 HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12REFBURST);
216 void ADC12_A_setReferenceBufferSamplingRate (uint16_t baseAddress,
217 uint8_t samplingRateSelect)
219 HWREG8(baseAddress + OFS_ADC12CTL2_L) &= ~(ADC12SR);
220 HWREG8(baseAddress + OFS_ADC12CTL2_L) |= samplingRateSelect;
223 uint32_t ADC12_A_getMemoryAddressForDMA (uint16_t baseAddress,
226 return ( baseAddress + (0x20 + (memoryIndex * 2)) );
229 uint16_t ADC12_A_isBusy (uint16_t baseAddress)
231 return (
HWREG8(baseAddress + OFS_ADC12CTL1_L) & ADC12BUSY);
MPU_initThreeSegmentsParam param