2020-2021 Sunseeker Telemetry and Lighting System
timer_b.c
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1 //*****************************************************************************
2 //
3 // timer_b.c - Driver for the timer_b Module.
4 //
5 //*****************************************************************************
6 
7 //*****************************************************************************
8 //
11 //
12 //*****************************************************************************
13 
14 #include "inc/hw_memmap.h"
15 
16 #ifdef __MSP430_HAS_TxB7__
17 #include "timer_b.h"
18 
19 #include <assert.h>
20 
21 void Timer_B_startCounter ( uint16_t baseAddress,
22  uint16_t timerMode
23  )
24 {
25  HWREG16(baseAddress + OFS_TBxCTL) |= timerMode;
26 }
27 
28 void Timer_B_initContinuousMode(uint16_t baseAddress,
29  Timer_B_initContinuousModeParam *param)
30 {
31 
32  HWREG16(baseAddress +
33  OFS_TBxCTL) &= ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
34  TIMER_B_UPDOWN_MODE +
35  TIMER_B_DO_CLEAR +
36  TIMER_B_TBIE_INTERRUPT_ENABLE +
37  CNTL_3 +
38  ID__8
39  );
40  HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
41 
42  HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
43 
44  HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
45  param->timerClear +
46  param->timerInterruptEnable_TBIE +
47  ((param->clockSourceDivider>>3)<<6));
48 
49  if(param->startTimer) {
50  HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_CONTINUOUS_MODE;
51  }
52 }
53 
54 void Timer_B_initUpMode (uint16_t baseAddress,
55  Timer_B_initUpModeParam *param)
56 {
57 
58  HWREG16(baseAddress + OFS_TBxCTL) &=
59  ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
60  TIMER_B_UPDOWN_MODE +
61  TIMER_B_DO_CLEAR +
62  TIMER_B_TBIE_INTERRUPT_ENABLE +
63  CNTL_3
64  );
65  HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
66 
67  HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
68 
69  HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
70  param->timerClear +
71  param->timerInterruptEnable_TBIE +
72  ((param->clockSourceDivider>>3)<<6));
73 
74  if (param->startTimer) {
75  HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_UP_MODE;
76  }
77 
78  if (TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE ==
79  param->captureCompareInterruptEnable_CCR0_CCIE){
80  HWREG16(baseAddress + OFS_TBxCCTL0) |= TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
81  } else {
82  HWREG16(baseAddress + OFS_TBxCCTL0) &= ~TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
83  }
84 
85  HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
86 }
87 
88 void Timer_B_initUpDownMode(uint16_t baseAddress,
89  Timer_B_initUpDownModeParam *param)
90 {
91  HWREG16(baseAddress + OFS_TBxCTL) &=
92  ~(TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
93  TIMER_B_UPDOWN_MODE +
94  TIMER_B_DO_CLEAR +
95  TIMER_B_TBIE_INTERRUPT_ENABLE +
96  CNTL_3
97  );
98  HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
99 
100  HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
101 
102  HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
103  TIMER_B_STOP_MODE +
104  param->timerClear +
105  param->timerInterruptEnable_TBIE +
106  ((param->clockSourceDivider>>3)<<6));
107 
108  if (param->startTimer) {
109  HWREG16(baseAddress + OFS_TBxCTL) |= TIMER_B_UPDOWN_MODE;
110  }
111 
112  if (TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE ==
113  param->captureCompareInterruptEnable_CCR0_CCIE){
114  HWREG16(baseAddress + OFS_TBxCCTL0) |= TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
115  } else {
116  HWREG16(baseAddress + OFS_TBxCCTL0) &= ~TIMER_B_CCIE_CCR0_INTERRUPT_ENABLE;
117  }
118 
119  HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
120 }
121 
122 void Timer_B_initCaptureMode(uint16_t baseAddress,
123  Timer_B_initCaptureModeParam *param)
124 {
125 
126  HWREG16(baseAddress + param->captureRegister ) |= CAP;
127 
128  HWREG16(baseAddress + param->captureRegister) &=
129  ~(TIMER_B_CAPTUREMODE_RISING_AND_FALLING_EDGE +
130  TIMER_B_CAPTURE_INPUTSELECT_Vcc +
131  TIMER_B_CAPTURE_SYNCHRONOUS +
132  TIMER_B_DO_CLEAR +
133  TIMER_B_TBIE_INTERRUPT_ENABLE +
134  CM_3
135  );
136 
137  HWREG16(baseAddress + param->captureRegister) |= (param->captureMode +
138  param->captureInputSelect +
139  param->synchronizeCaptureSource +
140  param->captureInterruptEnable +
141  param->captureOutputMode
142  );
143 }
144 
145 void Timer_B_initCompareMode(uint16_t baseAddress,
146  Timer_B_initCompareModeParam *param)
147 {
148 
149  HWREG16(baseAddress + param->compareRegister ) &= ~CAP;
150 
151  HWREG16(baseAddress + param->compareRegister) &=
152  ~(TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE +
153  TIMER_B_OUTPUTMODE_RESET_SET
154  );
155 
156  HWREG16(baseAddress + param->compareRegister) |= (param->compareInterruptEnable +
157  param->compareOutputMode
158  );
159 
160  HWREG16(baseAddress + param->compareRegister + OFS_TBxR) = param->compareValue;
161 }
162 
163 void Timer_B_enableInterrupt (uint16_t baseAddress)
164 {
165  HWREG16(baseAddress + OFS_TBxCTL) |= TBIE;
166 }
167 
168 void Timer_B_disableInterrupt (uint16_t baseAddress)
169 {
170  HWREG16(baseAddress + OFS_TBxCTL) &= ~TBIE;
171 }
172 
173 uint32_t Timer_B_getInterruptStatus (uint16_t baseAddress)
174 {
175  return ( HWREG16(baseAddress + OFS_TBxCTL) & TBIFG );
176 }
177 
178 void Timer_B_enableCaptureCompareInterrupt (uint16_t baseAddress,
179  uint16_t captureCompareRegister
180  )
181 {
182  HWREG16(baseAddress + captureCompareRegister) |= CCIE;
183 }
184 
185 void Timer_B_disableCaptureCompareInterrupt (uint16_t baseAddress,
186  uint16_t captureCompareRegister
187  )
188 {
189  HWREG16(baseAddress + captureCompareRegister) &= ~CCIE;
190 }
191 
192 uint32_t Timer_B_getCaptureCompareInterruptStatus (uint16_t baseAddress,
193  uint16_t captureCompareRegister,
194  uint16_t mask
195  )
196 {
197  return ( HWREG16(baseAddress + captureCompareRegister) & mask );
198 }
199 
200 void Timer_B_clear (uint16_t baseAddress)
201 {
202  HWREG16(baseAddress + OFS_TBxCTL) |= TBCLR;
203 }
204 
205 uint8_t Timer_B_getSynchronizedCaptureCompareInput
206  (uint16_t baseAddress,
207  uint16_t captureCompareRegister,
208  uint16_t synchronized
209  )
210 {
211  if (HWREG16(baseAddress + captureCompareRegister) & synchronized){
212  return ( TIMER_B_CAPTURECOMPARE_INPUT_HIGH) ;
213  } else {
214  return ( TIMER_B_CAPTURECOMPARE_INPUT_LOW) ;
215  }
216 }
217 
218 uint8_t Timer_B_getOutputForOutputModeOutBitValue
219  (uint16_t baseAddress,
220  uint16_t captureCompareRegister
221  )
222 {
223 
224  if (HWREG16(baseAddress + captureCompareRegister) & OUT){
225  return ( TIMER_B_OUTPUTMODE_OUTBITVALUE_HIGH) ;
226  } else {
227  return ( TIMER_B_OUTPUTMODE_OUTBITVALUE_LOW) ;
228  }
229 }
230 
231 uint16_t Timer_B_getCaptureCompareCount
232  (uint16_t baseAddress,
233  uint16_t captureCompareRegister
234  )
235 {
236  return (HWREG16(baseAddress + OFS_TBxR + captureCompareRegister));
237 }
238 
239 void Timer_B_setOutputForOutputModeOutBitValue
240  (uint16_t baseAddress,
241  uint16_t captureCompareRegister,
242  uint16_t outputModeOutBitValue
243  )
244 {
245  HWREG16(baseAddress + captureCompareRegister) &= ~OUT;
246  HWREG16(baseAddress + captureCompareRegister) |= outputModeOutBitValue;
247 }
248 
249 void Timer_B_outputPWM(uint16_t baseAddress, Timer_B_outputPWMParam *param)
250 {
251 
252  HWREG16(baseAddress + OFS_TBxCTL) &=
253  ~( TIMER_B_CLOCKSOURCE_INVERTED_EXTERNAL_TXCLK +
254  TIMER_B_UPDOWN_MODE + TIMER_B_DO_CLEAR +
255  TIMER_B_TBIE_INTERRUPT_ENABLE
256  );
257  HWREG16(baseAddress + OFS_TBxEX0) &= ~TBIDEX_7;
258 
259  HWREG16(baseAddress + OFS_TBxEX0) |= param->clockSourceDivider&0x7;
260 
261  HWREG16(baseAddress + OFS_TBxCTL) |= (param->clockSource +
262  TIMER_B_UP_MODE +
263  TIMER_B_DO_CLEAR +
264  ((param->clockSourceDivider>>3)<<6));
265 
266  HWREG16(baseAddress + OFS_TBxCCR0) = param->timerPeriod;
267 
268  HWREG16(baseAddress + OFS_TBxCCTL0) &=
269  ~(TIMER_B_CAPTURECOMPARE_INTERRUPT_ENABLE +
270  TIMER_B_OUTPUTMODE_RESET_SET
271  );
272 
273  HWREG16(baseAddress + param->compareRegister) |= param->compareOutputMode;
274 
275  HWREG16(baseAddress + param->compareRegister + OFS_TBxR) = param->dutyCycle;
276 }
277 
278 void Timer_B_stop ( uint16_t baseAddress )
279 {
280  HWREG16(baseAddress + OFS_TBxCTL) &= ~MC_3;
281 }
282 
283 
284 void Timer_B_setCompareValue ( uint16_t baseAddress,
285  uint16_t compareRegister,
286  uint16_t compareValue
287  )
288 {
289  HWREG16(baseAddress + compareRegister + OFS_TBxR) = compareValue;
290 }
291 
292 void Timer_B_clearTimerInterrupt (uint16_t baseAddress)
293 {
294  HWREG16(baseAddress + OFS_TBxCTL) &= ~TBIFG;
295 }
296 
297 void Timer_B_clearCaptureCompareInterrupt (uint16_t baseAddress,
298  uint16_t captureCompareRegister
299  )
300 {
301  HWREG16(baseAddress + captureCompareRegister) &= ~CCIFG;
302 }
303 
304 void Timer_B_selectCounterLength (uint16_t baseAddress,
305  uint16_t counterLength
306  )
307 {
308  HWREG16(baseAddress + OFS_TBxCTL) &= ~CNTL_3;
309  HWREG16(baseAddress + OFS_TBxCTL) |= counterLength;
310 }
311 
312 void Timer_B_selectLatchingGroup(uint16_t baseAddress,
313  uint16_t groupLatch)
314 {
315  HWREG16(baseAddress + OFS_TBxCTL) &= ~TBCLGRP_3;
316  HWREG16(baseAddress + OFS_TBxCTL) |= groupLatch;
317 }
318 
319 void Timer_B_initCompareLatchLoadEvent(uint16_t baseAddress,
320  uint16_t compareRegister,
321  uint16_t compareLatchLoadEvent
322  )
323 {
324  HWREG16(baseAddress + compareRegister) &= ~CLLD_3;
325  HWREG16(baseAddress + compareRegister) |= compareLatchLoadEvent;
326 }
327 
328 uint16_t Timer_B_getCounterValue (uint16_t baseAddress)
329 {
330  uint16_t voteOne, voteTwo, res;
331 
332  voteTwo = HWREG16(baseAddress + OFS_TBxR);
333 
334  do
335  {
336  voteOne = voteTwo;
337  voteTwo = HWREG16(baseAddress + OFS_TBxR);
338 
339  if(voteTwo > voteOne) {
340  res = voteTwo - voteOne;
341  } else if(voteOne > voteTwo) {
342  res = voteOne - voteTwo;
343  } else{
344  res = 0;
345  }
346 
347  } while ( res > TIMER_B_THRESHOLD);
348 
349  return voteTwo;
350 }
351 
352 void Timer_B_setOutputMode(uint16_t baseAddress,
353  uint16_t compareRegister,
354  uint16_t compareOutputMode)
355 {
356  uint16_t temp = HWREG16(baseAddress + compareRegister);
357  HWREG16(baseAddress + compareRegister) = temp & ~(OUTMOD_7) | compareOutputMode;
358 }
359 
360 
361 #endif
362 //*****************************************************************************
363 //
366 //
367 //*****************************************************************************
MPU_initThreeSegmentsParam param
long temp
#define HWREG16(x)
Definition: hw_memmap.h:39