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Senior-Design-Project_WMU-S…/Hardware/Power Design.markdown
2021-04-06 20:46:33 -04:00

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@page powerDesign Power Design

Boost

LTSpice Simulations

  • The LTSpice circuit includes input and output resistors for input and output power calculations
  • An RC circuit can be added at the input for time-delay for output capacitor charging
  • Output power = (16V)(2A(max))=32 Watts
  • Input power = (12V)(Max FET current). Max FET current should be 2-3x the desired output current
  • Rsense = Vsense(min)/IL(max). Vsense is given in LT1619 Datasheet: 40mV(min). For IL, we are using max FET current
    • For Rsense, a smaller R value gives less output ripple voltage in simulation.
    • Rsense is basically setting the current through the FET
  • Voltage divider equation can be found in datasheet for LT1619

Altium

  • Inductor is 10uH MSS1210-103MEB. Dr. Bazuin suggested its use as Sunseeker has lots of them

  • Replaced the SI9804DY FET (used in LTSpice) with the FDS6680A as the SI is obsolete

  • Replaced the MBR735 Schottky (used in LTSpice) with the MBRD835LT4G because 735 is not surface mount

Buck

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