From 02d9ac30036ceefd301a6de787dc775fcbafa035 Mon Sep 17 00:00:00 2001 From: William Miceli Date: Tue, 18 May 2021 12:57:24 -0400 Subject: [PATCH] I believe the Debug_BlinkyLED-Advanced is now complete; need to test now --- .../SunseekerTelemetry2021.h | 3 +- .../Debug_BlinkyLED-Advanced/clock_init.c | 99 ++++++++--------- .../Debug_BlinkyLED-Advanced/clock_init.h | 9 ++ .../Debug_BlinkyLED-Advanced/interrupts.c | 28 ++++- .../Debug_BlinkyLED-Advanced/interrupts.h | 5 - .../Debug_BlinkyLED-Advanced/io_init.c | 103 ++++++++++++++++++ .../Debug_BlinkyLED-Advanced/io_init.h | 10 ++ Telem_Debug/Debug_BlinkyLED-Advanced/main.c | 16 ++- Telem_Debug/Debug_BlinkyLED-Advanced/timers.c | 16 +++ Telem_Debug/Debug_BlinkyLED-Advanced/timers.h | 6 + 10 files changed, 230 insertions(+), 65 deletions(-) create mode 100644 Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.h create mode 100644 Telem_Debug/Debug_BlinkyLED-Advanced/io_init.c create mode 100644 Telem_Debug/Debug_BlinkyLED-Advanced/io_init.h create mode 100644 Telem_Debug/Debug_BlinkyLED-Advanced/timers.c create mode 100644 Telem_Debug/Debug_BlinkyLED-Advanced/timers.h diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/SunseekerTelemetry2021.h b/Telem_Debug/Debug_BlinkyLED-Advanced/SunseekerTelemetry2021.h index 162fed4..681d49f 100644 --- a/Telem_Debug/Debug_BlinkyLED-Advanced/SunseekerTelemetry2021.h +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/SunseekerTelemetry2021.h @@ -9,7 +9,8 @@ * */ -#ifndef SUNSEEKERTELEMETRY2021_H_RY2021_H_SUNSEEKERTELEMETRY2021_H_ERTELEMETRY2021_H_ +#ifndef SUNSEEKERTELEMETRY2021_H_ +#define SUNSEEKERTELEMETRY2021_H_ #include #include diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.c b/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.c index 5c57f4e..2d10d53 100644 --- a/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.c +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.c @@ -14,17 +14,13 @@ * */ #include - - -void Port_Init(void); -void Clock_XT1_Init(void); -void Clock_XT2_Init(void); -void SetVCoreUp(unsigned int level); +#include "SunseekerTelemetry2021.h" +#include "clock_init.h" void clock_init(void) { - WDTCTL = WDTPW + WDTHOLD; //Stop watchdog timer + WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer; `WDTPW` is the "WatchDog Timer PassWord", required for all `WDTCTL` operations Port_Init(); //ensure clock pins are configured @@ -40,16 +36,16 @@ void clock_init(void) void Port_Init(void) { //Clock Source TEST PINS ACLK/MCLK/SMCLK - P11DIR |= (1 << 0) | (1 << 1) | (1 << 2); //set P11.0:P11.2 as output ACLK/MCLK/SMCLK - P11SEL |= (1 << 0) | (1 << 1) | (1 << 2); //set P11.0:P11.2 as ACLK/MCLK/SMCLK function + P11DIR |= ACLK_TEST | MCLK_TEST | SMCLK_TEST; // Set P11.0:P11.2 as output ACLK/MCLK/SMCLK + P11SEL |= ACLK_TEST | MCLK_TEST | SMCLK_TEST; // Set P11.0:P11.2 as ACLK/MCLK/SMCLK function //XT1 ALTERNATE PIN CONFIG - P7SEL |= (1 << 0) | (1 << 1); //set P7.0 & P7.1 as XT1IN/XT1OUT peripheral - P7DIR |= (1 << 0) | (1 << 1); + P7SEL |= XT1IN | XT1OUT; // Set P7.0 & P7.1 as XT1IN/XT1OUT peripheral + P7DIR |= XT1IN | XT1OUT; //XT2 ALTERNATE PIN CONFIG - P5SEL |= (1 << 2) | (1 << 3); //set P5.2 & P5.3 as XT2IN/XT2OUT peripheral - P5DIR |= (1 << 2) | (1 << 3); + P5SEL |= XT2IN | XT2OUT; // Set P5.2 & P5.3 as XT2IN/XT2OUT peripheral + P5DIR |= XT2IN | XT2OUT; } void Clock_XT1_Init(void) @@ -57,19 +53,20 @@ void Clock_XT1_Init(void) char i; //XT1 CLOCK CONFIG - UCSCTL6 &= ~(XT1OFF); //Enable XT1 - UCSCTL6 &= ~(XT1DRIVE1 | XT1DRIVE0); //lowest drive current LF 32KHz oscillator + UCSCTL6 &= ~(XT1OFF); // Enable XT1 + UCSCTL6 &= ~(XT1DRIVE1 | XT1DRIVE0); // Lowest drive current LF 32KHz oscillator - do - { - UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);//Clear XT2,XT1,DCO fault flags - SFRIFG1 &= ~OFIFG; //Clear fault flags - for(i=255;i>0;i--); //Delay for Osc to stabilize + do{ + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); // Clear XT2,XT1,DCO fault flags + SFRIFG1 &= ~OFIFG; // Clear fault flags + for(i=255;i>0;i--){ // Delay for oscillator to stabilize + _NOP(); // "No Operation" + } } - while ((SFRIFG1 & OFIFG) != 0); //Test oscillator fault flag + while((SFRIFG1 & OFIFG) != 0); // Test oscillator fault flag - UCSCTL4 |= SELA__XT1CLK; //Clock Source ACLK = XT1 = 32kHz - UCSCTL5 |= DIVA_0; //Divide ACLK/1 = 32kHz + UCSCTL4 |= SELA__XT1CLK; // Clock Source ACLK = XT1 = 32kHz + UCSCTL5 |= DIVA_0; // Divide ACLK/1 = 32kHz } @@ -78,20 +75,21 @@ void Clock_XT2_Init(void) char i; //XT2 CLOCK CONFIG - UCSCTL6 &= ~(XT2OFF); //Enable XT2 - UCSCTL6 |= XT2DRIVE_3; //Drive current 16-24 MHz Clock - UCSCTL6 &= ~XT2BYPASS; //XT2 Sourced Externally from pin - 20MHz + UCSCTL6 &= ~(XT2OFF); // Enable XT2 + UCSCTL6 |= XT2DRIVE_3; // Drive current 16-24 MHz Clock + UCSCTL6 &= ~XT2BYPASS; // XT2 Sourced Externally from pin - 20MHz - do - { - UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);//Clear XT2,XT1,DCO fault flags - SFRIFG1 &= ~OFIFG; //Clear fault flags - for(i=255;i>0;i--); //Delay for Osc to stabilize + do{ + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); // Clear XT2,XT1,DCO fault flags + SFRIFG1 &= ~OFIFG; // Clear fault flags + for(i=255;i>0;i--){ // Delay for oscillator to stabilize + _NOP(); // "No Operation" + } } - while ((SFRIFG1 & OFIFG) != 0); //Test oscillator fault flag + while((SFRIFG1 & OFIFG) != 0); // Test oscillator fault flag - UCSCTL4 |= (SELS__XT2CLK | SELM__XT2CLK);//Clock Source SMCLK=MCLK = XT2 = 20MHz - UCSCTL5 |= DIVM_0 | DIVS_1; //MCLK:XT2/1 = 20MHz SMCLK:XT2/2 = 10MHz + UCSCTL4 |= (SELS__XT2CLK | SELM__XT2CLK); // Clock Source SMCLK=MCLK = XT2 = 20MHz + UCSCTL5 |= DIVM_0 | DIVS_1; // MCLK:XT2/1 = 20MHz SMCLK:XT2/2 = 10MHz } @@ -105,25 +103,16 @@ void Clock_XT2_Init(void) ************************************************************/ void SetVCoreUp (unsigned int level) { - // Open PMM registers for write access - PMMCTL0_H = 0xA5; - // Set SVS/SVM high side new level - SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level; - // Set SVM low side to new level - SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level; - // Wait till SVM is settled - while ((PMMIFG & SVSMLDLYIFG) == 0); - // Clear already set flags - PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); - // Set VCore to new level - PMMCTL0_L = PMMCOREV0 * level; - // Wait till new level reached - if ((PMMIFG & SVMLIFG)) - while ((PMMIFG & SVMLVLRIFG) == 0); - // Set SVS/SVM low side to new level - SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level; - // Wait till SVM is settled - while ((PMMIFG & SVSMLDLYIFG) == 0); - // Lock PMM registers for write access - PMMCTL0_H = 0x00; + PMMCTL0_H = 0xA5; // Open PMM registers for write access + SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level; // Set SVS/SVM high side new level + SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level; // Set SVM low side to new level + while((PMMIFG & SVSMLDLYIFG) == 0); // Wait till SVM is settled + PMMIFG &= ~(SVMLVLRIFG + SVMLIFG); // Clear already set flags + PMMCTL0_L = PMMCOREV0 * level; // Set VCore to new level + if(PMMIFG & SVMLIFG){ + while((PMMIFG & SVMLVLRIFG) == 0); // Wait till new level reached + } + SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level; // Set SVS/SVM low side to new level + while((PMMIFG & SVSMLDLYIFG) == 0); // Wait till SVM is settled + PMMCTL0_H = 0x00; // Lock PMM registers for write access } diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.h b/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.h new file mode 100644 index 0000000..890afbb --- /dev/null +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/clock_init.h @@ -0,0 +1,9 @@ +#ifndef CLOCK_INIT_H_ +#define CLOCK_INIT_H_ + +void Port_Init(void); +void Clock_XT1_Init(void); +void Clock_XT2_Init(void); +void SetVCoreUp(unsigned int level); + +#endif /* CLOCK_INIT_H_ */ diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.c b/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.c index e18635d..ba30c68 100644 --- a/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.c +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.c @@ -1,7 +1,31 @@ +#include "SunseekerTelemetry2021.h" +#include "interrupts.h" + +extern volatile unsigned char status_flag; + /* - * interrupts.c + * Timer B CCR0 Interrupt Service Routine + * - Interrupts on Timer B CCR0 match at 10Hz + * - Sets Time_Flag variable */ +/* + * GNU interrupt semantics + * interrupt(TIMERB0_VECTOR) timer_b0(void) + */ +#pragma vector = TIMERB0_VECTOR +__interrupt void timer_b0(void) +{ + static unsigned int status_count = TELEM_STATUS_COUNT; - + // Primary System Heart beat + status_count--; + if(status_count == 0){ + status_count = TELEM_STATUS_COUNT; + status_flag = TRUE; + P8OUT &= ~LEDG; // Turn off the green LED + }else{ + P8OUT |= LEDG; // Turn on the green LED + } +} diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.h b/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.h index 13fe2a7..0e8a74d 100644 --- a/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.h +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/interrupts.h @@ -1,12 +1,7 @@ -/* - * interrupts.h - */ - #ifndef INTERRUPTS_H_ #define INTERRUPTS_H_ - #endif /* INTERRUPTS_H_ */ diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/io_init.c b/Telem_Debug/Debug_BlinkyLED-Advanced/io_init.c new file mode 100644 index 0000000..9cecb36 --- /dev/null +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/io_init.c @@ -0,0 +1,103 @@ +/* + * I/O Initialization + */ + +/* + * Initialize I/O port directions and states + * Drive unused pins as outputs to avoid floating inputs and wasting power + * + */ + +#include "SunseekerTelemetry2021.h" +#include "io_init.h" + +void io_init(void) +{ + /******************************PORT 1**************************************/ + P1OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P1DIR = P1_UNUSED; // Set to output + P1DIR &= ~(RTC_MFP | IMU_INTn); // Set to input + /*Interrupts Enable*/ +// P1SEL = RTC_MFP | IMU_INTn; +// P1IE = RTC_MFP | IMU_INTn; // Enable Interrupts + P1IES = IMU_INTn; // High to low + P1IFG = 0x00; // Clear all interrupt flags on Port 1 + delay(); + + /******************************PORT 2**************************************/ + P2OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P2DIR = P2_UNUSED; // Set to output + /*Interrupts Enable */ +// P2SEL = CAN0_INTn | CAN1_INTn | GPS_INTn; // Interrupts Select +// P2IES = CAN0_INTn | CAN1_INTn | GPS_INTn; +// P2IE = CAN0_INTn | CAN1_INTn | GPS_INTn; // Enable Interrupts +// P2SEL |= CAN0_RXB0n | CAN0_RXB1n | CAN1_RXB0n | CAN1_RXB1n; // Interrupts Select +// P2IES |= CAN0_RXB0n | CAN0_RXB1n | CAN1_RXB0n | CAN1_RXB1n; +// P2IE |= CAN0_RXB0n | CAN0_RXB1n | CAN1_RXB0n | CAN1_RXB1n; // Enable Interrupts + P2IFG = 0x00; // Clear all interrupt flags on Port 2 + delay(); + + /******************************PORT 3**************************************/ + P3OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P3DIR = CAN0_SCLK | CAN0_MOSI | SDC_SCLK | SDC_SIMO | CAN1_SCLK | P3_UNUSED; // Set to output + P3OUT |= CAN0_SCLK | CAN0_MOSI | SDC_SCLK | SDC_SIMO | CAN1_SCLK; // Pull used output pins high + P3DIR &= ~(CAN0_MISO | SDC_SOMI); + P3SEL = CAN0_SCLK | CAN0_MOSI | CAN0_MISO | SDC_SCLK | SDC_SIMO | SDC_SOMI | CAN1_SCLK | IMU_SDA; + + /******************************PORT 4**************************************/ + P4OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P4DIR = CAN0_RSTn | CAN0_CSn | CAN1_RSTn | CAN1_CSn | P4_UNUSED; // Set to output + P4OUT = CAN0_RSTn | CAN0_CSn | CAN1_RSTn | CAN1_CSn; // Pull used output pins high + delay(); + P4OUT &= ~(CAN0_RSTn | CAN1_RSTn) ; + delay(); + delay(); + P4OUT |= (CAN0_RSTn | CAN1_RSTn) ; + + /******************************PORT 5**************************************/ + P5OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P5DIR = XT2OUT | CAN1_MOSI | P5_UNUSED; + P5OUT = CAN1_MOSI; + P5DIR &= ~(CAN1_MISO); + P5SEL = XT2IN | XT2OUT | IMU_SCL | CAN1_MOSI | CAN1_MISO; + + /******************************PORT 6**************************************/ + P6OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P6DIR = P6_UNUSED; + P6SEL = 0x00; + + /******************************PORT 7**************************************/ + P7OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P7DIR = XT1OUT | P7_UNUSED; + P7SEL = XT1IN | XT1OUT; + + /******************************PORT 8**************************************/ + P8OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P8DIR = LEDG | LEDR | LEDY0 | LEDY1 | P8_UNUSED; + P8DIR &= ~(Button0); // Set to input + P8SEL = 0x00; + + /******************************PORT 9**************************************/ + P9OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P9DIR = USB_TX | SDC_CSn | GPS_CSn | P9_UNUSED; + P9OUT = SDC_CSn | GPS_CSn; + P9SEL = RTC_SDA | RTC_SCL | USB_TX | USB_RX; + + /******************************PORT 10**************************************/ + P10OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P10DIR = BT_CSn | BT_MOSI | BT_SCLK | UART_TX | BT_EN |P10_UNUSED; + P10OUT = BT_CSn | BT_MOSI | BT_SCLK; + P10SEL = BT_MOSI | BT_MISO | BT_SCLK | UART_TX | UART_RX; + + + /******************************PORT 11**************************************/ + P11OUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + P11DIR = ACLK_TEST | MCLK_TEST | SMCLK_TEST; + P11OUT = ACLK_TEST | MCLK_TEST | SMCLK_TEST; + P11SEL = ACLK_TEST | MCLK_TEST | SMCLK_TEST; + + /******************************PORT J**************************************/ + PJOUT = 0x00; // Pull pins low, only affects ports set as output, no effect on inputs + PJDIR = 0x0F; // Set to output as per user's guide + +} diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/io_init.h b/Telem_Debug/Debug_BlinkyLED-Advanced/io_init.h new file mode 100644 index 0000000..2616501 --- /dev/null +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/io_init.h @@ -0,0 +1,10 @@ +/* + * io_init.h + */ + +#ifndef IO_INIT_H_ +#define IO_INIT_H_ + +void io_init(void); + +#endif /* IO_INIT_H_ */ diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/main.c b/Telem_Debug/Debug_BlinkyLED-Advanced/main.c index 0ff1372..0e20334 100644 --- a/Telem_Debug/Debug_BlinkyLED-Advanced/main.c +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/main.c @@ -3,6 +3,12 @@ */ #include "SunseekerTelemetry2021.h" +#include "clock_init.h" +#include "interrupts.h" +#include "io_init.h" +#include "timers.h" + +volatile unsigned char status_flag = FALSE; int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer; `WDTPW` is the "WatchDog Timer PassWord", required for all `WDTCTL` operations @@ -11,8 +17,14 @@ int main(void) { clock_init(); // Configure HF and LF clocks delay(); - P8DIR = LEDG | LEDR | LEDY0 | LEDY1; // Set all four main LEDs as output - P8OUT |= LEDG; // Turn on permanently the green LED + timerB_init(); // Initialize timer B + delay(); + + io_init(); // Initialize all input/output pins + delay(); + + P8OUT &= ~LEDY0; // Initially set LEDY0 to High + P8OUT |= LEDY1; // Initially set LEDY1 to Low _EINT(); //enable global interrupts diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/timers.c b/Telem_Debug/Debug_BlinkyLED-Advanced/timers.c new file mode 100644 index 0000000..9595e77 --- /dev/null +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/timers.c @@ -0,0 +1,16 @@ + +/* +* Initialize Timer B +* - Provides timer tick timebase at 100 Hz +*/ + +#include "SunseekerTelemetry2021.h" +#include "timers.h" + +void timerB_init(void) +{ + TBCTL = CNTL_0 | TBSSEL_1 | ID_3 | TBCLR; // ACLK/8, clear TBR + TBCCR0 = (ACLK_RATE/8/TICK_RATE); // Set timer to count to this value = TICK_RATE overflow + TBCCTL0 = CCIE; // Enable CCR0 interrupt + TBCTL |= MC_1; // Set timer to 'up' count mode +} diff --git a/Telem_Debug/Debug_BlinkyLED-Advanced/timers.h b/Telem_Debug/Debug_BlinkyLED-Advanced/timers.h new file mode 100644 index 0000000..89aca96 --- /dev/null +++ b/Telem_Debug/Debug_BlinkyLED-Advanced/timers.h @@ -0,0 +1,6 @@ +#ifndef TIMERS_H_ +#define TIMERS_H_ + +void timerB_init(void); + +#endif /* TIMERS_H_ */