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Sunseeker Lab A-216
2021-05-06 17:42:30 -04:00
parent fe095eada0
commit 47ce3522ea
612 changed files with 245803 additions and 0 deletions
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Telem_Debug/Debug2/.ccsproject Normal file
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Telem_Debug/Debug2/.cproject Normal file
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/*
* Tritium MCP2515 CAN Interface
* Copyright (c) 2006, Tritium Pty Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer
* in the documentation and/or other materials provided with the distribution.
* - Neither the name of Tritium Pty Ltd nor the names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* Last Modified: J.Kennedy, Tritium Pty Ltd, 18 December 2006
*
* - Implements the following CAN interface functions
* - can_init
* - can_transmit
* - can_receive
*
*/
// Include files
#include "Sunseeker2021.h"
#define can0_select() P4OUT &= ~CAN0_CSn
#define can0_deselect() P4OUT |= CAN0_CSn
// Public structures
can_message TX_can_message;
can_message RX_can_message;
// Public variables
unsigned char canctrl = 0;
unsigned char canctrlold = 0;
char canstat;
extern unsigned long can_msg_count;
extern unsigned long can_err_count;
extern unsigned long can_read_cnt;
// Private variables
unsigned char buffer[16];
void can0_canctrl(unsigned char mask, unsigned char value) {
can0_read(CANCTRL, &canctrlold, 1);
canctrl = (canctrl & ~mask) | (value & mask);
can0_write(CANCTRL, &canctrl, 1);
}
/**************************************************************************************************
* PUBLIC FUNCTIONS
*************************************************************************************************/
/*
* Initialises MCP2515 CAN controller
* - Resets MCP2515 via SPI port (switches to config mode, clears errors)
* - Changes CLKOUT to /4 rate (4 MHz)
* - Sets up bit timing for 1 Mbit operation
* - Sets up receive filters and masks
* - Rx Filter 0 = Motor controller velocity
* - Rx Filter 1 = Unused
* - Rx Filter 2 = Driver controls packets (for remote frame requests)
* - Rx Filter 3 = Unused
* - Rx Filter 4 = Unused
* - Rx Filter 5 = Unused
* - Rx Mask 0 = Exact message must match (all 11 bits)
* - Rx Mask 1 = Block address must match (upper 6 bits)
* - Enables ERROR and RX interrupts on IRQ pin
* - Switches to normal (operating) mode
*/
void can0_init()
{
// Set up reset and clocking
can0_reset();
//can_mode(interface, CANCTRL, 0x03, 0x02); // CANCTRL register, modify lower 2 bits, CLK = /4
canctrl = 0x87;
// Set up bit timing & interrupts
buffer[0] = 0x02; // CNF3 register: PHSEG2 = 3Tq, No wakeup, CLKOUT = CLK
buffer[1] = 0xC9; // CNF2 register: set PHSEG2 in CNF3, Triple sample, PHSEG1= 2Tq, PROP = 2Tq
// buffer[2] = 0x00; // CNF1 register: SJW = 1Tq, BRP = 0
buffer[2] = 0x03; // CNF1 register: SJW = 1Tq, BRP = 0
buffer[3] = 0x23; // CANINTE register: enable ERROR, RX0 & RX1 interrupts on IRQ pin
buffer[4] = 0x00; // CANINTF register: clear all IRQ flags
buffer[5] = 0x00; // EFLG register: clear all user-changable error flags
can0_write(CNF3, &buffer[0], 6);// Write to registers
// Set up external interrupt pins RX_BF and RX1BF
buffer[0] = 0x0F; // BFPCTRL register: enabele RXxBF as interrupts
buffer[1] = 0x00; // TXRTSCTRL register: request to send TX
can0_write(BFPCTRL, &buffer[0], 2);// Write to registers
// Set up receive filtering & masks
// RXF0 - Buffer 0
buffer[ 0] = (unsigned char)((DC_CAN_BASE + DC_SWITCH) >> 3);
buffer[ 1] = (unsigned char)((DC_CAN_BASE + DC_SWITCH) << 5);
buffer[ 2] = 0x00;
buffer[ 3] = 0x00;
// RXF1 - Buffer 0
buffer[ 4] = 0x00;
buffer[ 5] = 0x00;
buffer[ 6] = 0x00;
buffer[ 7] = 0x00;
// RXF2 - Buffer 1
// buffer[ 8] = (unsigned char)((DC_CAN_BASE + DC_SWITCH) >> 3);
// buffer[ 9] = (unsigned char)((DC_CAN_BASE + DC_SWITCH) << 5);
buffer[ 8] = (unsigned char)((MC_CAN_BASE1) >> 3);
buffer[ 9] = (unsigned char)((MC_CAN_BASE1) << 5);
buffer[10] = 0x00;
buffer[11] = 0x00;
can0_write(RXF0SIDH, &buffer[0], 12 );
// RXF3 - Buffer 1
buffer[ 0] = 0x00;
buffer[ 1] = 0x00;
buffer[ 2] = 0x00;
buffer[ 3] = 0x00;
// RXF4 - Buffer 1
buffer[ 4] = 0x00;
buffer[ 5] = 0x00;
buffer[ 6] = 0x00;
buffer[ 7] = 0x00;
// RXF5 - Buffer 1
buffer[ 8] = 0x00;
buffer[ 9] = 0x00;
buffer[10] = 0x00;
buffer[11] = 0x00;
can0_write(RXF3SIDH, &buffer[0], 12 );
// RXM0 - Buffer 0
// buffer[ 0] = 0xFF; // Match entire 11 bit ID (ID is left-justified in 32-bit mask register)
buffer[ 0] = 0xC0; // Match 2 MSB of 11 bit ID (ID is left-justified in 32-bit mask register)
// buffer[ 1] = 0xE0;
buffer[ 1] = 0x00;
buffer[ 2] = 0x00;
buffer[ 3] = 0x00;
// RXM1 - Buffer 1
// buffer[ 4] = 0xFF; // Match entire 11 bit ID (ID is left-justified in 32-bit mask register)
buffer[ 4] = 0xC0; //Match 2 MSB of 11 bit ID (ID is left-justified in 32-bit mask register)
// buffer[ 5] = 0xE0;
buffer[ 5] = 0x00;
buffer[ 6] = 0x00;
buffer[ 7] = 0x00;
can0_write(RXM0SIDH, &buffer[0], 8 );
// buffer[0] = 0x04; //enable filters & rollover
// can0_write(RXB0CTRL, &buffer[0], 1);
// buffer[0] = 0x04; //enable filters
// can0_write(RXB1CTRL, &buffer[0], 1);
// Switch out of config mode into normal operating mode
//can_mode(interface, CANCTRL, 0xE0, 0x00 ); // CANCTRL register, modify upper 3 bits, mode = Normal
can0_canctrl(0xE0, 0x00);
}
void can2_init()
{
}
void can0_sources(unsigned addr0, unsigned addr1) {
// can_read(interface, CANCTRL, &buffer[0], 1);
// buffer[0] = (buffer[0] & 0x1F) | 0x84;
// can_write(interface, CANCTRL, &buffer[0], 1);
can0_canctrl(0xE0, 0x80);
buffer[0] = buffer[4] = 0xFF;
buffer[1] = buffer[5] = 0xE0;
buffer[2] = buffer[6] = 0x00;
buffer[3] = buffer[7] = 0x00;
can0_write(RXM0SIDH, &buffer[0], 8);
buffer[0] = (unsigned char)(addr0 >> 3);
buffer[1] = (unsigned char)(addr0 << 5);
buffer[2] = buffer[3] = 0;
buffer[4] = (unsigned char)(addr1 >> 3);
buffer[5] = (unsigned char)(addr1 << 5);
buffer[6] = buffer[7] = 0;
buffer[8] = buffer[9] = 0;
buffer[10] = buffer[11] = 0;
can0_write(RXF0SIDH, &buffer[0], 12);
buffer[0] = buffer[1] = 0;
buffer[4] = buffer[5] = 0;
can0_write(RXF3SIDH, &buffer[0], 12);
//can_read(interface, CANCTRL, &buffer[0], 1);
//buffer[0] = buffer[0] & 0x1F;
//can_write(interface, CANCTRL, &buffer[0], 1);
can0_canctrl(0xE0, 0x00);
}
/*
* Receives a CAN message from the MCP2515
* - Run this routine when an IRQ is received
* - Query the controller to identify the source of the IRQ
* - If it was an ERROR IRQ, read & clear the Error Flag register, and return it
* - If it was an RX IRQ, read the message and address, and return them
* - If both, handle the error preferentially to the message
* - Clear the appropriate IRQ flag bits
*/
void can0_receive()
{
can_message *RXPtr_can_message;
unsigned char flags;
extern char ucFLAG;
can_msg_count++;
// if (can_msg_count == 0x0040)
// {
// can_msg_count = 0; // Breakpoint to observe message queue
// }
RXPtr_can_message=&(*decode_queue.PutPt);
// RXPtr_can_message=&(decode_queue.msg_fifo[0]);
// RXPtr_can_message=&decode_queue[decode_queue->PutPt];
// RXPtr_can_message = &RX_can_message; // Local storage
// Read out the interrupt flags register
can0_read(CANINTF, &flags, 1 );
// Check for errors
if(( flags & MCP_IRQ_ERR ) != 0x00 )
{
// Read error flags and counters
can0_read(EFLAG, &buffer[0], 1 );
can0_read(TEC, &buffer[1], 2 );
// Clear error flags
can0_mode(EFLAG, buffer[0], 0x00 ); // Modify (to '0') all bits that were set
// Return error code, a blank address field, and error registers in data field
RXPtr_can_message->status = CAN_ERROR;
RXPtr_can_message->address = 0x0000;
RXPtr_can_message->data[0] = flags; // CANINTF
RXPtr_can_message->data[1] = buffer[0]; // EFLG
RXPtr_can_message->data[2] = buffer[1]; // TEC
RXPtr_can_message->data[3] = buffer[2]; // REC
// Clear the IRQ flag
can0_mode(CANINTF, MCP_IRQ_ERR, 0x00 );
can_err_count++;
}
// No error, check for received messages, buffer 0
else if(( flags & MCP_IRQ_RXB0 ) != 0x00 ){
// Read in the info, address & message data
can0_read(RXB0CTRL, &buffer[0], 14 );
// Clear the IRQ flag as fast as possible
can0_mode(CANINTF, MCP_IRQ_RXB0, 0x00 );
// Fill out return structure
// check for Remote Frame requests and indicate the status correctly
if(( buffer[0] & MCP_RXB0_RTR ) == 0x00 )
{
RXPtr_can_message->status = CAN_OK; // We've received a standard data packet
fill_data(RXPtr_can_message, buffer); // Fill in the data
}
else
{
RXPtr_can_message->status = CAN_RTR; // We've received a remote frame request - data irrelevant
}
RXPtr_can_message->address = ((int)(buffer[1]) << 3) | ((int)(buffer[2]) >> 5); //convert address
//add message to queue to be decoded
message_fifo_PUT(&decode_queue, *RXPtr_can_message);
ucFLAG |= 0x20;
can_read_cnt++;
}
// No error, check for received messages, buffer 1
else if(( flags & MCP_IRQ_RXB1 ) != 0x00 )
{
// Read in the info, address & message data
can0_read(RXB1CTRL, &buffer[0], 14 );
// Clear the IRQ flag as fast as possible
can0_mode(CANINTF, MCP_IRQ_RXB1, 0x00 );
// Fill out return structure
// check for Remote Frame requests and indicate the status correctly
if(( buffer[0] & MCP_RXB1_RTR ) == 0x00 )
{
RXPtr_can_message->status = CAN_OK; // We've received a standard data packet
fill_data(RXPtr_can_message, buffer); // Fill in the data
}
else
{
RXPtr_can_message->status = CAN_RTR; // We've received a remote frame request - data irrelevant
}
RXPtr_can_message->address = ((int)(buffer[1]) << 3) | ((int)(buffer[2]) >> 5); //convert address
message_fifo_PUT(&decode_queue, *RXPtr_can_message); //add message to queue to be decoded
ucFLAG |= 0x20;
can_read_cnt++;
}
//not handled by buffers or errors
else
{
RXPtr_can_message->status = CAN_ERROR;
RXPtr_can_message->address = 0x0001;
RXPtr_can_message->data[0] = flags; // CANINTF
can_err_count++;
}
//added to tritum code to account for the fact that we could have more then one intrrupt pending at a given time
//NOTE: YOU MUST CLEAR THE MAIN_MODE STATUS BEFORE ENTERING THIS FUNCTION OR YOU WILL CLEAR THE RETURN FLAG
if((P2IN & CAN0_INTn)==0){
can0_read(CANINTF, &flags, 1 );
if(( flags & MCP_IRQ_ERR ) != 0x00 )
{
canstat = 1;
can0_read(EFLAG, &buffer[0], 1 );
can0_read(TEC, &buffer[1], 2 );
// Clear error flags
can0_mode(EFLAG, buffer[0], 0x00 ); // Modify (to '0') all bits that were set
// Clear the IRQ flag
can0_mode(CANINTF, MCP_IRQ_ERR, 0x00 );
}
}
}
/*
* Transmits a CAN message to the bus
* - Busy waits while message is sent to CAN controller
* - Uses all available transmit buffers (3 available in CAN controller) to maximise throughput
* - Only modifies address information if it's different from what is already set up in CAN controller
* - Assumes constant 8-byte data length value
*/
void can0_transmit()
{
static unsigned int buf_addr[3] = {0xFFFF, 0xFFFF, 0xFFFF};
// Fill data into buffer, it's used by any address
// Allow room at the start of the buffer for the address info if needed
buffer[ 5] = TX_can_message.data[0];
buffer[ 6] = TX_can_message.data[1];
buffer[ 7] = TX_can_message.data[2];
buffer[ 8] = TX_can_message.data[3];
buffer[ 9] = TX_can_message.data[4];
buffer[10] = TX_can_message.data[5];
buffer[11] = TX_can_message.data[6];
buffer[12] = TX_can_message.data[7];
// Check if the incoming address has already been configured in a mailbox
if( TX_can_message.address == buf_addr[0] ){
// Mailbox 0 setup matches our new message
// Write to TX Buffer 0, start at data registers, and initiate transmission
can0_write_tx(0x01, &buffer[5] );
can0_rts(0);
}
else if( TX_can_message.address == buf_addr[1] ){
// Mailbox 1 setup matches our new message
// Write to TX Buffer 1, start at data registers, and initiate transmission
can0_write_tx(0x03, &buffer[5] );
can0_rts(1 );
}
else if( TX_can_message.address == buf_addr[2] ){
// Mailbox 2 setup matches our new message
// Write to TX Buffer 2, start at data registers, and initiate transmission
can0_write_tx(0x05, &buffer[5] );
can0_rts(2 );
}
else{
// No matches in existing mailboxes
// No mailboxes already configured, so we'll need to load an address - set it up
buffer[0] = (unsigned char)(TX_can_message.address >> 3);
buffer[1] = (unsigned char)(TX_can_message.address << 5);
buffer[2] = 0x00; // EID8
buffer[3] = 0x00; // EID0
buffer[4] = 0x08; // DLC = 8 bytes
// Check if we've got any un-setup mailboxes free and use them
// Otherwise, find a non-busy mailbox and set it up with our new address
if( buf_addr[0] == 0xFFFF ){ // Mailbox 0 is free
// Write to TX Buffer 0, start at address registers, and initiate transmission
can0_write_tx(0x00, &buffer[0] );
can0_rts(0);
buf_addr[0] = TX_can_message.address;
}
else if( buf_addr[1] == 0xFFFF ){ // Mailbox 1 is free
// Write to TX Buffer 1, start at address registers, and initiate transmission
can0_write_tx(0x02, &buffer[0] );
can0_rts(1);
buf_addr[1] = TX_can_message.address;
}
else if( buf_addr[2] == 0xFFFF ){ // Mailbox 2 is free
// Write to TX Buffer 2, start at address registers, and initiate transmission
can0_write_tx(0x04, &buffer[0] );
can0_rts(2);
buf_addr[2] = TX_can_message.address;
}
else {
// No mailboxes free, wait until at least one is not busy
while(( can0_read_status() & 0x54 ) == 0x54);
// Is it mailbox 0?
if(( can0_read_status() & 0x04 ) == 0x00) {
// Setup mailbox 0 and send the message
can0_write_tx(0x00, &buffer[0] );
can0_rts(0);
buf_addr[0] = TX_can_message.address;
}
// Is it mailbox 1?
else if(( can0_read_status() & 0x10 ) == 0x00) {
// Setup mailbox 1 and send the message
can0_write_tx(0x02, &buffer[0] );
can0_rts(1);
buf_addr[1] = TX_can_message.address;
}
// Is it mailbox 2?
else if(( can0_read_status() & 0x40 ) == 0x00) {
// Setup mailbox 2 and send the message
can0_write_tx(0x04, &buffer[0] );
can0_rts(2);
buf_addr[2] = TX_can_message.address;
}
}
}
}
/**************************************************************************************************
* PRIVATE FUNCTIONS
*************************************************************************************************/
//fills data of a message from the buffer
void fill_data(can_message *can, unsigned char buff[])
{
can->data[0] = buffer[ 6];
can->data[1] = buffer[ 7];
can->data[2] = buffer[ 8];
can->data[3] = buffer[ 9];
can->data[4] = buffer[10];
can->data[5] = buffer[11];
can->data[6] = buffer[12];
can->data[7] = buffer[13];
}
/*
* Resets MCP2515 CAN controller via SPI port
* - SPI port must be already initialised
*/
void can0_reset()
{
can0_select();
spi1_transmit(MCP_RESET );
can0_deselect();
}
/*
* Reads data bytes from the MCP2515
* - Pass in starting address, pointer to array of bytes for return data, and number of bytes to read
*/
unsigned char can0_result[10] = {0,0,0,0,0,0,0,0,0,0};
void can0_read(unsigned char address, unsigned char *ptr, unsigned char bytes )
{
unsigned char i;
if(bytes > 1) {
can0_select();
spi1_transmit(MCP_READ );
spi1_transmit(address );
for( i = 0; i < bytes; i++ )
{
*ptr++ = spi1_exchange(0x00);
}
can0_deselect();
if(address == CANCTRL) can0_result[0] = *--ptr;
} else {
can0_select();
spi1_transmit(MCP_READ);
spi1_transmit(address);
*ptr = spi1_exchange(0);
can0_deselect();
if(address == CANCTRL) can0_result[0] = *ptr;
if(address == 0x2C) can0_result[1] = *ptr;
}
}
/*
* Reads data bytes from receive buffers
* - Pass in buffer number and start position as defined in MCP2515 datasheet
* - For starting at data, returns 8 bytes
* - For starting at address, returns 13 bytes
*/
void can0_read_rx(unsigned char address, unsigned char *ptr )
{
unsigned char i;
address &= 0x03; // Force upper bits of address to be zero (they're invalid)
address <<= 1; // Shift input bits to correct location in command byte
address |= MCP_READ_RX; // Construct command byte for MCP2515
can0_select();
spi1_transmit(address );
if(( address & 0x02 ) == 0x00 ) // Start at address registers
{
for( i = 0; i < 13; i++ )
{
*ptr++ = spi1_exchange(0x00);
}
}
else // Start at data registers
{
for( i = 0; i < 8; i++ )
{
*ptr++ = spi1_exchange(0x00 );
}
}
can0_deselect();
}
/*
* Writes data bytes to the MCP2515
* - Pass in starting address, pointer to array of bytes, and number of bytes to write
*/
void can0_write(unsigned char address, unsigned char *ptr, unsigned char bytes )
{
unsigned char i;
can0_select();
spi1_transmit(MCP_WRITE );
spi1_transmit(address );
for( i = 0; i < (bytes-1); i++ ){
spi1_transmit(*ptr++ );
}
spi1_transmit(*ptr );
can0_deselect();
}
/*
* Writes data bytes to transmit buffers
* - Pass in buffer number and start position as defined in MCP2515 datasheet
* - For starting at data, accepts 8 bytes
* - For starting at address, accepts 13 bytes
*/
void can0_write_tx(unsigned char address, unsigned char *ptr )
{
unsigned char i;
address &= 0x07; // Force upper bits of address to be zero (they're invalid)
address |= MCP_WRITE_TX; // Construct command byte for MCP2515
can0_select();
spi1_transmit(address );
if(( address & 0x01 ) == 0x00 ){ // Start at address registers
for( i = 0; i < 13; i++ ){
spi1_transmit(*ptr++);
}
}
else{ // Start at data registers
for( i = 0; i < 8; i++ ){
spi1_transmit(*ptr++);
}
}
can0_deselect();
}
/*
* Request to send selected transmit buffer
* - Pass in address of buffer to transmit: 0, 1 or 2
*/
void can0_rts(unsigned char address )
{
unsigned char i;
// Set up address bits in command byte
i = MCP_RTS;
if( address == 0 ) i |= 0x01;
else if( address == 1 ) i |= 0x02;
else if( address == 2 ) i |= 0x04;
// Write command
can0_select();
spi1_transmit(i);
can0_deselect();
}
/*
* Reads MCP2515 status register
*/
unsigned char can0_read_status()
{
unsigned char status;
can0_select();
spi1_transmit(MCP_STATUS );
status = spi1_exchange(0x00 );
can0_deselect();
return status;
}
/*
* Reads MCP2515 RX status (filter match) register
*/
unsigned char can0_read_filter()
{
unsigned char status;
can0_select();
spi1_transmit(MCP_FILTER );
status = spi1_exchange(0x00);
can0_deselect();
return status;
}
/*
* Modifies selected register in MCP2515
* - Pass in register to be modified, bit mask, and bit data
*/
void can0_mode(unsigned char address, unsigned char mask, unsigned char data )
{
can0_select();
spi1_transmit(MCP_MODIFY);
spi1_transmit(address);
spi1_transmit(mask);
spi1_transmit(data);
can0_deselect();
}

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/*
* Tritium MCP2515 CAN interface header
* Copyright (c) 2007, Tritium Pty Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer
* in the documentation and/or other materials provided with the distribution.
* - Neither the name of Tritium Pty Ltd nor the names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* Last Modified: J.Kennedy, Tritium Pty Ltd, 17 January 2007
*
* - Implements the following CAN interface functions
* - can_init
* - can_transmit
* - can_receive
*
*/
#ifndef CAN_H
#define CAN_H
// Public function prototypes
extern void can0_init();
extern void can2_init();
extern void can0_transmit();
extern void can0_receive();
extern void can0_sources(unsigned addr0, unsigned addr1);
// Public variables
typedef struct _can_variables
{
unsigned int status;
unsigned int address;
unsigned char data[8];
} can_variables;
extern can_variables can;
extern can_variables can_2;
extern can_variables can_3;
extern unsigned char canctrl;
void can0_canctrl(unsigned char mask, unsigned char value);
// Private function prototypes
void fill_data(can_message *can, unsigned char buff[]);
void can0_reset();
void can0_read(unsigned char address, unsigned char *ptr, unsigned char bytes );
void can0_read_rx(unsigned char address, unsigned char *ptr );
void can0_write(unsigned char address, unsigned char *ptr, unsigned char bytes );
void can0_write_tx(unsigned char address, unsigned char *ptr );
void can0_rts(unsigned char address );
unsigned char can0_read_status();
unsigned char can0_read_filter();
void can0_mode(unsigned char address, unsigned char mask, unsigned char data );
void can0_select();
void can0_deselect();
void can0_set_mask(unsigned id, unsigned mode);
void can0_set_filter(unsigned id, unsigned addr);
// Device can0_SERIAL number
#define CAN1_CAN1_SERIAL 0x00000001
#define CAN2_CAN1_SERIAL 0x00000002
// Status values (for message reception)
#define CAN_ERROR 0xFFFF
#define CAN_MERROR 0xFFFE
#define CAN_WAKE 0xFFFD
#define CAN_RTR 0xFFFC
#define CAN_OK 0x0001
// MCP2515 command bytes
#define MCP_RESET 0xC0
#define MCP_READ 0x03
#define MCP_READ_RX 0x90 // When used, needs to have RX_BUFFER address inserted into lower bits 0nm0'b
#define MCP_WRITE 0x02
#define MCP_WRITE_TX 0x40 // When used, needs to have TX_BUFFER address inserted into lower bits 0abc'b
#define MCP_RTS 0x80 // When used, needs to have buffer to transmit inserted into lower bits 0nnn'b
#define MCP_STATUS 0xA0
#define MCP_FILTER 0xB0
#define MCP_MODIFY 0x05
//Read RX Buffer Addressess-MCP_READ_RX //n m addressPTR Address
#define RXB_0SIDH 0x00 //0 0 RXB0SIDH 0x61
#define RXB_0D0 0x02 //0 1 RXB0D0 0x66
#define RXB_1SIDH 0x04 //1 0 RXB1SIDH 0x71
#define RXB_1D0 0x06 //1 1 RXB1D0 0x76
//Load TX Buffer Addressess-MCP_WRITE_TX //a b c addressPTR Address
#define TXB_0SIDH 0x00 //0 0 0 TXB0SIDH 0x31
#define TXB_0D0 0x01 //0 0 1 TXB0D0 0x36
#define TXB_1SIDH 0x02 //0 1 0 TXB1SIDH 0x41
#define TXB_1D0 0x03 //0 1 1 TXB1D0 0x46
#define TXB_2SIDH 0x04 //1 0 0 TXB2SIDH 0x51
#define TXB_2D0 0x05 //1 0 1 TXB2SIDH 0x56
// MCP2515 register names
#define RXF0SIDH 0x00
#define RXF0SIDL 0x01
#define RXF0EID8 0x02
#define RXF0EID0 0x03
#define RXF1SIDH 0x04
#define RXF1SIDL 0x05
#define RXF1EID8 0x06
#define RXF1EID0 0x07
#define RXF2SIDH 0x08
#define RXF2SIDL 0x09
#define RXF2EID8 0x0A
#define RXF2EID0 0x0B
#define BFPCTRL 0x0C
#define TXRTSCTRL 0x0D
#define CANSTAT 0x0E
#define CANCTRL 0x0F
#define RXF3SIDH 0x10
#define RXF3SIDL 0x11
#define RXF3EID8 0x12
#define RXF3EID0 0x13
#define RXF4SIDH 0x14
#define RXF4SIDL 0x15
#define RXF4EID8 0x16
#define RXF4EID0 0x17
#define RXF5SIDH 0x18
#define RXF5SIDL 0x19
#define RXF5EID8 0x1A
#define RXF5EID0 0x1B
#define TEC 0x1C
#define REC 0x1D
#define RXM0SIDH 0x20
#define RXM0SIDL 0x21
#define RXM0EID8 0x22
#define RXM0EID0 0x23
#define RXM1SIDH 0x24
#define RXM1SIDL 0x25
#define RXM1EID8 0x26
#define RXM1EID0 0x27
#define CNF3 0x28
#define CNF2 0x29
#define CNF1 0x2A
#define CANINTE 0x2B
#define CANINTF 0x2C
#define EFLAG 0x2D
#define TXB0CTRL 0x30
#define TXB0SIDH 0x31
#define TXB0SIDL 0x32
#define TXB0EID8 0x33
#define TXB0EID0 0x34
#define TXB0DLC 0x35
#define TXB0D0 0x36
#define TXB0D1 0x37
#define TXB0D2 0x38
#define TXB0D3 0x39
#define TXB0D4 0x3A
#define TXB0D5 0x3B
#define TXB0D6 0x3C
#define TXB0D7 0x3D
#define TXB1CTRL 0x40
#define TXB1SIDH 0x41
#define TXB1SIDL 0x42
#define TXB1EID8 0x43
#define TXB1EID0 0x44
#define TXB1DLC 0x45
#define TXB1D0 0x46
#define TXB1D1 0x47
#define TXB1D2 0x48
#define TXB1D3 0x49
#define TXB1D4 0x4A
#define TXB1D5 0x4B
#define TXB1D6 0x4C
#define TXB1D7 0x4D
#define TXB2CTRL 0x50
#define TXB2SIDH 0x51
#define TXB2SIDL 0x52
#define TXB2EID8 0x53
#define TXB2EID0 0x54
#define TXB2DLC 0x55
#define TXB2D0 0x56
#define TXB2D1 0x57
#define TXB2D2 0x58
#define TXB2D3 0x59
#define TXB2D4 0x5A
#define TXB2D5 0x5B
#define TXB2D6 0x5C
#define TXB2D7 0x5D
#define RXB0CTRL 0x60
#define RXB0SIDH 0x61
#define RXB0SIDL 0x62
#define RXB0EID8 0x63
#define RXB0EID0 0x64
#define RXB0DLC 0x65
#define RXB0D0 0x66
#define RXB0D1 0x67
#define RXB0D2 0x68
#define RXB0D3 0x69
#define RXB0D4 0x6A
#define RXB0D5 0x6B
#define RXB0D6 0x6C
#define RXB0D7 0x6D
#define RXB1CTRL 0x70
#define RXB1SIDH 0x71
#define RXB1SIDL 0x72
#define RXB1EID8 0x73
#define RXB1EID0 0x74
#define RXB1DLC 0x75
#define RXB1D0 0x76
#define RXB1D1 0x77
#define RXB1D2 0x78
#define RXB1D3 0x79
#define RXB1D4 0x7A
#define RXB1D5 0x7B
#define RXB1D6 0x7C
#define RXB1D7 0x7D
// MCP2515 RX ctrl bit definitions
#define MCP_RXB0_RTR 0x08
#define MCP_RXB1_RTR 0x08
// MCP2515 Interrupt flag register bit definitions
#define MCP_IRQ_MERR 0x80
#define MCP_IRQ_WAKE 0x40
#define MCP_IRQ_ERR 0x20
#define MCP_IRQ_TXB2 0x10
#define MCP_IRQ_TXB1 0x08
#define MCP_IRQ_TXB0 0x04
#define MCP_IRQ_RXB1 0x02
#define MCP_IRQ_RXB0 0x01
//CANCTL Bit definitions
#define MCP_CTL_CLKPRE_0 0x00
#define MCP_CTL_CLKPRE_2 0x01
#define MCP_CTL_CLKPRE_4 0x02
#define MCP_CTL_CLKPRE_8 0x03
#define MCP_CTL_CLKEN 0x04 //Enable CLKOUT Pin
#define MCP_CTL_OSM 0x08 //One Shot Mode
#define MCP_CTL_ABAT 0x10 //Abort all Pending Transmissions
//Request Operation Modes & Mode Status
#define MCP_NML_MOD 0x00 //Normal Mode
#define MCP_SLP_MOD 0x20 //Sleep Mode
#define MCP_LB_MOD 0x40 //Loopback Mode
#define MCP_LO_MOD 0x60 //Listen Only Mode
#define MCP_CNF_MOD 0x80 //Configuration Mode
//READ_STATUS definitions
//RX_status definitions
#define MESS_REC 0xC0 //Received Message Filter
#define RM_0 0x00 //no message
#define RM_RXB0 0x40 //RX buff 0
#define RM_RXB1 0x80 //RX buff 1
#define RM_BOTH 0xC0 //both
#define MSG_TYP 0x18 //Message Type Filter
#define MT_SDF 0x00 //standard data frame
#define MT_SRF 0x08 //standard remote frame
#define MT_EDF 0x10 //extended data frame
#define MT_ERF 0x18 //extended remote frame
#define FIL_MATCH 0x07 //Filter Match Filter
#define FM_RXF0 0x00 //RXF0
#define FM_RXF1 0x01 //RXF1
#define FM_RXF2 0x02 //RXF2
#define FM_RXF3 0x03 //RXF3
#define FM_RXF4 0x04 //RXF4
#define FM_RXF5 0x05 //RXF5
#define FM_RXF0_B1 0x06 //RXF0 - rollover to RXB1
#define FM_RXF1_B1 0x07 //RXF1 - rollover to RXB1
#endif

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# FIXED
CAN.obj: ../CAN.c
CAN.obj: ../Sunseeker2021.h
CAN.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
CAN.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
CAN.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
CAN.obj: ../UART.h
CAN.obj: ../MODEM.h
CAN.obj: ../SPI.h
CAN.obj: ../PACKET.h
CAN.obj: ../char_FIFO.h
CAN.obj: ../message_FIFO.h
CAN.obj: ../CAN.h
CAN.obj: ../RTC.h
../CAN.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

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# FIXED
MODEM.obj: ../MODEM.c
MODEM.obj: ../Sunseeker2021.h
MODEM.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
MODEM.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
MODEM.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
MODEM.obj: ../UART.h
MODEM.obj: ../MODEM.h
MODEM.obj: ../SPI.h
MODEM.obj: ../PACKET.h
MODEM.obj: ../char_FIFO.h
MODEM.obj: ../message_FIFO.h
MODEM.obj: ../CAN.h
MODEM.obj: ../RTC.h
../MODEM.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

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# FIXED
RTC.obj: ../RTC.c
RTC.obj: ../Sunseeker2021.h
RTC.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
RTC.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
RTC.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
RTC.obj: ../UART.h
RTC.obj: ../MODEM.h
RTC.obj: ../SPI.h
RTC.obj: ../PACKET.h
RTC.obj: ../char_FIFO.h
RTC.obj: ../message_FIFO.h
RTC.obj: ../CAN.h
RTC.obj: ../RTC.h
../RTC.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

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"./CAN.obj" "./MODEM.obj" "./RTC.obj" "./RTCASMFunctions_CCE.obj" "./char_FIFO.obj" "./clock_init.obj" "./io_init.obj" "./main.obj" "./message_FIFO.obj" "../lnk_msp430f5438a.cmd" -llibmath.a -llibc.a

51
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# FIXED
char_FIFO.obj: ../char_FIFO.c
char_FIFO.obj: ../Sunseeker2021.h
char_FIFO.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
char_FIFO.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
char_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
char_FIFO.obj: ../UART.h
char_FIFO.obj: ../MODEM.h
char_FIFO.obj: ../SPI.h
char_FIFO.obj: ../PACKET.h
char_FIFO.obj: ../char_FIFO.h
char_FIFO.obj: ../message_FIFO.h
char_FIFO.obj: ../CAN.h
char_FIFO.obj: ../RTC.h
../char_FIFO.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

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Telem_Debug/Debug2/Debug/clock_init.d Normal file
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@@ -0,0 +1,13 @@
# FIXED
clock_init.obj: ../clock_init.c
clock_init.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
clock_init.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
clock_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
clock_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
../clock_init.c:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:

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51
Telem_Debug/Debug2/Debug/io_init.d Normal file
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@@ -0,0 +1,51 @@
# FIXED
io_init.obj: ../io_init.c
io_init.obj: ../Sunseeker2021.h
io_init.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
io_init.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
io_init.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
io_init.obj: ../UART.h
io_init.obj: ../MODEM.h
io_init.obj: ../SPI.h
io_init.obj: ../PACKET.h
io_init.obj: ../char_FIFO.h
io_init.obj: ../message_FIFO.h
io_init.obj: ../CAN.h
io_init.obj: ../RTC.h
../io_init.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

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Telem_Debug/Debug2/Debug/main.d Normal file
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@@ -0,0 +1,51 @@
# FIXED
main.obj: ../main.c
main.obj: ../Sunseeker2021.h
main.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
main.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
main.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
main.obj: ../UART.h
main.obj: ../MODEM.h
main.obj: ../SPI.h
main.obj: ../PACKET.h
main.obj: ../char_FIFO.h
main.obj: ../message_FIFO.h
main.obj: ../CAN.h
main.obj: ../RTC.h
../main.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

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@@ -0,0 +1,174 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
SHELL = cmd.exe
CG_TOOL_ROOT := C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS
GEN_OPTS__FLAG :=
GEN_CMDS__FLAG :=
ORDERED_OBJS += \
"./CAN.obj" \
"./MODEM.obj" \
"./RTC.obj" \
"./RTCASMFunctions_CCE.obj" \
"./char_FIFO.obj" \
"./clock_init.obj" \
"./io_init.obj" \
"./main.obj" \
"./message_FIFO.obj" \
"../lnk_msp430f5438a.cmd" \
$(GEN_CMDS__FLAG) \
-llibmath.a \
-llibc.a \
-include ../makefile.init
RM := DEL /F
RMDIR := RMDIR /S/Q
# All of the sources participating in the build are defined here
-include sources.mk
-include subdir_vars.mk
-include subdir_rules.mk
-include objects.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(S_DEPS)),)
-include $(S_DEPS)
endif
ifneq ($(strip $(S_UPPER_DEPS)),)
-include $(S_UPPER_DEPS)
endif
ifneq ($(strip $(S62_DEPS)),)
-include $(S62_DEPS)
endif
ifneq ($(strip $(C64_DEPS)),)
-include $(C64_DEPS)
endif
ifneq ($(strip $(ASM_DEPS)),)
-include $(ASM_DEPS)
endif
ifneq ($(strip $(CC_DEPS)),)
-include $(CC_DEPS)
endif
ifneq ($(strip $(SV7A_DEPS)),)
-include $(SV7A_DEPS)
endif
ifneq ($(strip $(S55_DEPS)),)
-include $(S55_DEPS)
endif
ifneq ($(strip $(C67_DEPS)),)
-include $(C67_DEPS)
endif
ifneq ($(strip $(CLA_DEPS)),)
-include $(CLA_DEPS)
endif
ifneq ($(strip $(C??_DEPS)),)
-include $(C??_DEPS)
endif
ifneq ($(strip $(CPP_DEPS)),)
-include $(CPP_DEPS)
endif
ifneq ($(strip $(S??_DEPS)),)
-include $(S??_DEPS)
endif
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
ifneq ($(strip $(C62_DEPS)),)
-include $(C62_DEPS)
endif
ifneq ($(strip $(CXX_DEPS)),)
-include $(CXX_DEPS)
endif
ifneq ($(strip $(C++_DEPS)),)
-include $(C++_DEPS)
endif
ifneq ($(strip $(ASM_UPPER_DEPS)),)
-include $(ASM_UPPER_DEPS)
endif
ifneq ($(strip $(K_DEPS)),)
-include $(K_DEPS)
endif
ifneq ($(strip $(C43_DEPS)),)
-include $(C43_DEPS)
endif
ifneq ($(strip $(INO_DEPS)),)
-include $(INO_DEPS)
endif
ifneq ($(strip $(S67_DEPS)),)
-include $(S67_DEPS)
endif
ifneq ($(strip $(SA_DEPS)),)
-include $(SA_DEPS)
endif
ifneq ($(strip $(S43_DEPS)),)
-include $(S43_DEPS)
endif
ifneq ($(strip $(OPT_DEPS)),)
-include $(OPT_DEPS)
endif
ifneq ($(strip $(PDE_DEPS)),)
-include $(PDE_DEPS)
endif
ifneq ($(strip $(S64_DEPS)),)
-include $(S64_DEPS)
endif
ifneq ($(strip $(C_UPPER_DEPS)),)
-include $(C_UPPER_DEPS)
endif
ifneq ($(strip $(C55_DEPS)),)
-include $(C55_DEPS)
endif
endif
-include ../makefile.defs
# Add inputs and outputs from these tool invocations to the build variables
EXE_OUTPUTS += \
Debug2.out \
EXE_OUTPUTS__QUOTED += \
"Debug2.out" \
BIN_OUTPUTS += \
Debug2.hex \
BIN_OUTPUTS__QUOTED += \
"Debug2.hex" \
# All Target
all: Debug2.out
# Tool invocations
Debug2.out: $(OBJS) $(CMD_SRCS) $(GEN_CMDS)
@echo 'Building target: $@'
@echo 'Invoking: MSP430 Linker'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal -z -m"Debug2.map" --stack_size=160 --heap_size=160 --cinit_hold_wdt=on -i"C:/ti/ccsv6/ccs_base/msp430/include" -i"C:/ti/ccsv6/ccs_base/msp430/lib/5xx_6xx_FRxx" -i"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/lib" -i"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --reread_libs --warn_sections --display_error_number --diag_wrap=off --xml_link_info="Debug2_linkInfo.xml" --use_hw_mpy=F5 --rom_model -o "Debug2.out" $(ORDERED_OBJS)
@echo 'Finished building target: $@'
@echo ' '
Debug2.hex: $(EXE_OUTPUTS)
@echo 'Invoking: MSP430 Hex Utility'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/hex430" --memwidth=8 --romwidth=8 -o "Debug2.hex" $(EXE_OUTPUTS__QUOTED)
@echo 'Finished building: $@'
@echo ' '
# Other Targets
clean:
-$(RM) $(EXE_OUTPUTS__QUOTED)$(BIN_OUTPUTS__QUOTED)
-$(RM) "CAN.d" "MODEM.d" "RTC.d" "char_FIFO.d" "clock_init.d" "io_init.d" "main.d" "message_FIFO.d"
-$(RM) "CAN.obj" "MODEM.obj" "RTC.obj" "RTCASMFunctions_CCE.obj" "char_FIFO.obj" "clock_init.obj" "io_init.obj" "main.obj" "message_FIFO.obj"
-$(RM) "RTCASMFunctions_CCE.d"
-@echo 'Finished clean'
-@echo ' '
.PHONY: all clean dependents
.SECONDARY:
-include ../makefile.targets

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# FIXED
message_FIFO.obj: ../message_FIFO.c
message_FIFO.obj: ../Sunseeker2021.h
message_FIFO.obj: C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h
message_FIFO.obj: C:/ti/ccsv6/ccs_base/msp430/include/in430.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h
message_FIFO.obj: C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h
message_FIFO.obj: ../UART.h
message_FIFO.obj: ../MODEM.h
message_FIFO.obj: ../SPI.h
message_FIFO.obj: ../PACKET.h
message_FIFO.obj: ../char_FIFO.h
message_FIFO.obj: ../message_FIFO.h
message_FIFO.obj: ../CAN.h
message_FIFO.obj: ../RTC.h
../message_FIFO.c:
../Sunseeker2021.h:
C:/ti/ccsv6/ccs_base/msp430/include/msp430x54xa.h:
C:/ti/ccsv6/ccs_base/msp430/include/in430.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/intrinsics_legacy_undefs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdio.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/linkage.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdarg.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/stdlib.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/ctype.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_isfuncdcl.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/string.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/math.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/_defs.h:
C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include/float.h:
../UART.h:
../MODEM.h:
../SPI.h:
../PACKET.h:
../char_FIFO.h:
../message_FIFO.h:
../CAN.h:
../RTC.h:

BIN
Telem_Debug/Debug2/Debug/message_FIFO.obj Normal file
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Binary file not shown.

8
Telem_Debug/Debug2/Debug/objects.mk Normal file
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@@ -0,0 +1,8 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
USER_OBJS :=
LIBS := -llibmath.a -llibc.a

115
Telem_Debug/Debug2/Debug/sources.mk Normal file
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@@ -0,0 +1,115 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
O_SRCS :=
CPP_SRCS :=
K_SRCS :=
LD_SRCS :=
S67_SRCS :=
LDS_SRCS :=
CMD_SRCS :=
EXE_SRCS :=
CXX_SRCS :=
CMD_UPPER_SRCS :=
ELF_SRCS :=
C43_SRCS :=
S55_SRCS :=
LD_UPPER_SRCS :=
C62_SRCS :=
S_UPPER_SRCS :=
A_SRCS :=
SA_SRCS :=
C55_SRCS :=
LDS_UPPER_SRCS :=
C_UPPER_SRCS :=
OUT_SRCS :=
INO_SRCS :=
OBJ_SRCS :=
S62_SRCS :=
LIB_SRCS :=
PDE_SRCS :=
SV7A_SRCS :=
ASM_SRCS :=
ASM_UPPER_SRCS :=
C++_SRCS :=
CLA_SRCS :=
S??_SRCS :=
C_SRCS :=
C67_SRCS :=
S_SRCS :=
S43_SRCS :=
OPT_SRCS :=
C64_SRCS :=
CC_SRCS :=
C??_SRCS :=
S64_SRCS :=
OBJS :=
BIN_OUTPUTS :=
S_DEPS :=
S_UPPER_DEPS :=
S62_DEPS :=
C64_DEPS :=
ASM_DEPS :=
CC_DEPS :=
SV7A_DEPS :=
S55_DEPS :=
C67_DEPS :=
CLA_DEPS :=
C??_DEPS :=
CPP_DEPS :=
S??_DEPS :=
C_DEPS :=
C62_DEPS :=
EXE_OUTPUTS :=
CXX_DEPS :=
C++_DEPS :=
ASM_UPPER_DEPS :=
K_DEPS :=
C43_DEPS :=
INO_DEPS :=
S67_DEPS :=
SA_DEPS :=
S43_DEPS :=
OPT_DEPS :=
PDE_DEPS :=
S64_DEPS :=
C_UPPER_DEPS :=
C55_DEPS :=
CPP_DEPS__QUOTED :=
C67_DEPS__QUOTED :=
INO_DEPS__QUOTED :=
C??_DEPS__QUOTED :=
S_UPPER_DEPS__QUOTED :=
CLA_DEPS__QUOTED :=
ASM_UPPER_DEPS__QUOTED :=
C62_DEPS__QUOTED :=
CXX_DEPS__QUOTED :=
EXE_OUTPUTS__QUOTED :=
S67_DEPS__QUOTED :=
BIN_OUTPUTS__QUOTED :=
C_DEPS__QUOTED :=
C_UPPER_DEPS__QUOTED :=
OPT_DEPS__QUOTED :=
S_DEPS__QUOTED :=
K_DEPS__QUOTED :=
S??_DEPS__QUOTED :=
C64_DEPS__QUOTED :=
C++_DEPS__QUOTED :=
OBJS__QUOTED :=
CC_DEPS__QUOTED :=
S43_DEPS__QUOTED :=
S55_DEPS__QUOTED :=
SA_DEPS__QUOTED :=
C55_DEPS__QUOTED :=
PDE_DEPS__QUOTED :=
C43_DEPS__QUOTED :=
S62_DEPS__QUOTED :=
ASM_DEPS__QUOTED :=
SV7A_DEPS__QUOTED :=
S64_DEPS__QUOTED :=
# Every subdirectory with source files must be described here
SUBDIRS := \
. \

69
Telem_Debug/Debug2/Debug/subdir_rules.mk Normal file
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@@ -0,0 +1,69 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Each subdirectory must supply rules for building sources it contributes
CAN.obj: ../CAN.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="CAN.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
MODEM.obj: ../MODEM.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="MODEM.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
RTC.obj: ../RTC.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="RTC.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
RTCASMFunctions_CCE.obj: ../RTCASMFunctions_CCE.s43 $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="RTCASMFunctions_CCE.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
char_FIFO.obj: ../char_FIFO.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="char_FIFO.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
clock_init.obj: ../clock_init.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="clock_init.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
io_init.obj: ../io_init.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="io_init.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
main.obj: ../main.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="main.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '
message_FIFO.obj: ../message_FIFO.c $(GEN_OPTS) | $(GEN_HDRS)
@echo 'Building file: $<'
@echo 'Invoking: MSP430 Compiler'
"C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/bin/cl430" -vmspx --data_model=restricted --use_hw_mpy=F5 --include_path="C:/ti/ccsv6/ccs_base/msp430/include" --include_path="C:/ti/ccsv6/tools/compiler/msp430_15.12.3.LTS/include" --advice:power=all -g --define=__MSP430F5438A__ --diag_warning=225 --diag_wrap=off --display_error_number --silicon_errata=CPU21 --silicon_errata=CPU22 --silicon_errata=CPU23 --silicon_errata=CPU40 --printf_support=minimal --preproc_with_compile --preproc_dependency="message_FIFO.d" $(GEN_OPTS__FLAG) "$<"
@echo 'Finished building: $<'
@echo ' '

83
Telem_Debug/Debug2/Debug/subdir_vars.mk Normal file
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@@ -0,0 +1,83 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
CMD_SRCS += \
../lnk_msp430f5438a.cmd
C_SRCS += \
../CAN.c \
../MODEM.c \
../RTC.c \
../char_FIFO.c \
../clock_init.c \
../io_init.c \
../main.c \
../message_FIFO.c
S43_SRCS += \
../RTCASMFunctions_CCE.s43
OBJS += \
./CAN.obj \
./MODEM.obj \
./RTC.obj \
./RTCASMFunctions_CCE.obj \
./char_FIFO.obj \
./clock_init.obj \
./io_init.obj \
./main.obj \
./message_FIFO.obj
C_DEPS += \
./CAN.d \
./MODEM.d \
./RTC.d \
./char_FIFO.d \
./clock_init.d \
./io_init.d \
./main.d \
./message_FIFO.d
S43_DEPS += \
./RTCASMFunctions_CCE.d
C_DEPS__QUOTED += \
"CAN.d" \
"MODEM.d" \
"RTC.d" \
"char_FIFO.d" \
"clock_init.d" \
"io_init.d" \
"main.d" \
"message_FIFO.d"
OBJS__QUOTED += \
"CAN.obj" \
"MODEM.obj" \
"RTC.obj" \
"RTCASMFunctions_CCE.obj" \
"char_FIFO.obj" \
"clock_init.obj" \
"io_init.obj" \
"main.obj" \
"message_FIFO.obj"
S43_DEPS__QUOTED += \
"RTCASMFunctions_CCE.d"
C_SRCS__QUOTED += \
"../CAN.c" \
"../MODEM.c" \
"../RTC.c" \
"../char_FIFO.c" \
"../clock_init.c" \
"../io_init.c" \
"../main.c" \
"../message_FIFO.c"
S43_SRCS__QUOTED += \
"../RTCASMFunctions_CCE.s43"

80
Telem_Debug/Debug2/MODEM.c Normal file
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@@ -0,0 +1,80 @@
//
// Telemetry MODEM Code
//
#include "Sunseeker2021.h"
int synccount = 0;
//Initialize the MODEM (RS1) Interface
//
//
void MODEM_init()
{
UART3CTL1 |= UCSWRST | UCSSEL_2; //put state machine in reset & SMCLK
UART3CTL0 |= UCMODE_0;
UART3BRW = (int)(SMCLK_RATE/MODEM_BR1); //10MHZ/115200
UART3MCTL |= UCBRF_0 + (char)MODEM_UCBRS1; //modulation UCBRSx=computed from baud rate UCBRFx=0
UART3IFG &= ~UCTXIFG; //Clear Xmit and Rec interrupt flags
UART3IFG &= ~UCRXIFG;
UART3CTL1 &= ~UCSWRST; //initalize state machine
UART3ABCTL |= UCABDEN;
//UART3IE |= UCRXIE|UCTXIE; //enable TX & RX interrupt
}
// The Initialization/Synchronization sequence for the modem
//
void MODEM_command(char data[])
{
char respRX[4];
int ii;
UART1_TXN(RFCommand,3);
// UART1_RXN(respRX,3); // Hangs if no powered MODEM present
for (ii=0;ii<0x100;ii++) delay();
//for(int i = 0;i<0xffff;i++);
synccount++;
UART1_TX(data);
// Note: after the completion of the data send
// an "OK" is sent of the command is executed
// an "ERROR" is sent of there is an error
}
// The MODEM transmission with sync
//
int MODEM_TX(char data[], int size)
{
MODEM_command(RFModemS);
UART1_TXN(data,size);
return 1;
}
int MODEM_TX_PCK(char data[])
{
UART1_TX(data);
return 1;
}
//
//#pragma vector=USCI_A1_VECTOR
//__interrupt void USCI_A1_ISR(void)
//{
// switch(__even_in_range(UCA1IV,4))
// {
// case 0:break; // Vector 0 - no interrupt
// case 2: // Vector 2 - RXIFG
// UCA1IFG &= ~(UCRXIFG);
// break;
// case 4: // Vector 4 - TXIFG
//
// // UCA1TXBUF = send[txcount++]; //send char and inc txcount
// UCA1IFG &= UCTXIFG; //reset TX flag
// // if(txcount > 16)
// {
//// txcount = 0; ///reset txcount
// }
//
// break;
// default: break;
// }
//}

29
Telem_Debug/Debug2/MODEM.h Normal file
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@@ -0,0 +1,29 @@
#ifndef MODEM_H
#define MODEM_H
//public declarations constants
static char RFCommand[5] = "+++\r\0";
// 2008 Initialization using 9600 baud
// Sunseeker telemetry PCB initialization
// ATAM, MY 786, DT 786 <Enter>
// ATRR 3, RN 4<Enter>
// ATPK (message length),RB 474,RO 1B4<Enter>
// ATPL 2<Enter>
// ATBD 3<Enter>
// ATCN<Enter>
//static char RFModem[74] = "ATAM,MY 786,DT 786\rATRR 3,RN 4\rATPK 474,RB 474,RO 1B4\rATPL 2\rATBD 3\rATCN\r";
// 2010 Initialization
static char RFModemH[76] = "ATAM,MY 786,DT 786\rATRR 3,RN 4\rATPK 201,RB 12F,RO 128\rATPL 2\rATBD 3\rATCN\r\0\0";
static char RFModemL[76] = "ATAM,MY 786,DT 786\rATRR 3,RN 4\rATPK 201,RB 12F,RO 128\rATPL 2\rATBD 3\rATCN\r\0\0";
static char RFModemS[76] = "ATAM,MY 786,DT 786\rATRR 3,RN 4\rATPK 201,RB 1A7,RO 128\rATPL 2\rATBD 3\rATCN\r\0\0";
//Baud rate change command
static char RFModemBaud[14] = "ATBD 7\rATCN\r\0\0";
extern void MODEM_init();
extern void MODEM_command (char data[]);
extern int MODEM_high_baud();
extern int MODEM_TX(char data[], int size);
extern int MODEM_TX_PCK(char data[]);
#endif

75
Telem_Debug/Debug2/PACKET.h Normal file
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@@ -0,0 +1,75 @@
#ifndef PACKET_H
#define PACKET_H
#define HF_MSG_PACKET 10 //number of messages per packet in high frequency
#define LF_MSG_PACKET 0 //number of messages per packet in low frequency
#define ST_MSG_PACKET 0 //number of messages that we receive and don't send out
#define No_MSG_PACKET 38 //number of messages that we receive and don't send out
#define LOOKUP_ROWS HF_MSG_PACKET+LF_MSG_PACKET+ST_MSG_PACKET+No_MSG_PACKET
#define NAME_LOOKUP_ROWS LOOKUP_ROWS
//#define TIME_SIZE 30 //number of characters in time
#define MSG_SIZE 30 //number of characters in single message
// char xmit[638];
//char hf_flash[638] = "ABCDE\r\nTIME MO/DY/YEAR HH:MM.SS /r/nMC_LIM,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_BUS,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_VEL,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_PHA,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_VVC,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_IVC,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_BEM,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_RL1,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_RL2,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_FAN,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_TP1,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_TP2,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_TP3,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_CML,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_CML,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_DRV,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_PWR,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_RET,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_SWT,0xZZZZZZZZ,OxZZZZZZZZ\r\n\0";
//char lf_flash[638] = "ABCDE\r\nTIME MO/DY/YEAR HH:MM.SS /r/nMC_LIM,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_BUS,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_VEL,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_PHA,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_VVC,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_IVC,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_BEM,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_RL1,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_RL2,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_FAN,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_TP1,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_TP2,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_TP3,0xZZZZZZZZ,OxZZZZZZZZ\r\nMC_CML,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_CML,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_DRV,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_PWR,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_RET,0xZZZZZZZZ,OxZZZZZZZZ\r\nDC_SWT,0xZZZZZZZZ,OxZZZZZZZZ\r\n\0";
typedef struct _pre_message
{
char pre_msg[8];// = "ABCDEF\r\n";
} pck_pre_message;
typedef struct _time_message
{
char time_msg[17];// = "TL_TIM,HH:MM:SS\r\n";
} pck_time_message;
typedef struct _message
{
char message[MSG_SIZE];// = "XXXXXX,0x00000000,0x00000000\r\n";
} pck_message;
typedef struct _post_message
{
char post_msg[9];// = "UVWXYZ\r\n\0";
} pck_post_message;
typedef struct _hf_packet
{
unsigned int msg_filled; //each bit represents a msg that needs to be filled 1-filled 0-empty
pck_pre_message prexmit;
pck_message xmit[HF_MSG_PACKET]; //character array to be sent to modem/USB
pck_time_message timexmit;
pck_post_message postxmit;
} hf_packet;
typedef struct _lf_packet
{
unsigned int msg_filled; //each bit represents a msg that needs to be filled 1-filled 0-empty
pck_pre_message prexmit;
pck_message xmit[LF_MSG_PACKET]; //character array to be sent to modem/USB
pck_time_message timexmit;
pck_post_message postxmit;
} lf_packet;
typedef struct _status_packet
{
unsigned int msg_filled; //each bit represents a msg that needs to be filled 1-filled 0-empty
pck_pre_message prexmit;
pck_message xmit[ST_MSG_PACKET]; //character array to be sent to modem/USB
pck_time_message timexmit;
pck_post_message postxmit;
} status_packet;
typedef struct _no_packet
{
unsigned int msg_filled; //each bit represents a msg that needs to be filled 1-filled 0-empty
pck_pre_message prexmit;
pck_message xmit[No_MSG_PACKET]; //character array to be sent to modem/USB
pck_time_message timexmit;
pck_post_message postxmit;
} no_packet;
#endif

98
Telem_Debug/Debug2/RTC.c Normal file
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@@ -0,0 +1,98 @@
//
// Telemetry Real Time Clock
//
#include "Sunseeker2021.h"
/*************************************************************
/ Name: setRTC
/ IN: int hour, int minute, int second, int month, int day, int year
/ OUT: 1 if succesful
/ DESC: This function is used to set the Real Time Clock Values
************************************************************/
void init_RTC(void)
{
RTCCTL01 |= RTCBCD+RTCHOLD+RTCMODE; // RTC enable, BCD mode,
// alarm every Minute,
// enable RTC interrupt
// P1OUT ^= (LED5 | LED6 | LED7| LED8);
// setRTC(0,0,0,5,4,2016);
RTCCTL01 &= ~RTCHOLD; // Enable counting
}
//
// char time_msg[17];// = "TL_TIM,HH:MM:SS\r\n";
//
int insert_time(char *time_string)
{
char h1, h0, m1, m0, s1, s0;
extern int thrs, tmin, tsec;
h1 = ((thrs>>4) & 0x0F)+'0';
h0 = (thrs & 0x0F)+'0';
time_string[7] = h1;
time_string[8] = h0;
m1 = ((tmin>>4) & 0x0F)+'0';
m0 = (tmin & 0x0F)+'0';
time_string[10] = m1;
time_string[11] = m0;
s1 = ((tsec>>4) & 0x0F)+'0';
s0 = (tsec & 0x0F)+'0';
time_string[13] = s1;
time_string[14] = s0;
return 1;
}
/*************************************************************
/ Name: setRTC
/ IN: int hour, int minute, int second, int month, int day, int year
/ OUT: 1 if succesful
/ DESC: This function is used to set the Real Time Clock Values
************************************************************/
int setRTC(int h, int m, int s, int mo, int d, int y)
{
SetRTCYEAR(y);
delay();
// P1OUT ^= (LED5);
SetRTCMON(mo);
delay();
//P1OUT ^= (LED5 | LED6);
SetRTCDAY(d);
delay();
// P1OUT ^= (LED5);
SetRTCHOUR(h);
delay();
//P1OUT ^= (LED5 | LED6 | LED7);
SetRTCMIN(m);
delay();
// P1OUT ^= (LED5 );
SetRTCSEC(s);
delay();
//P1OUT ^= (LED5 | LED6 );
return 1;
}
/*************************************************************
/ Name: getTime
/ IN: int *hour, int *minute, int *second
/ OUT: void
/ DESC: This function returns the current time of the Real time clock
************************************************************/
void getTime(int *h, int *m, int *s)
{
int min_sec;
while((RTCCTL0 && RTCRDYIFG) == 0);
*h = GetRTCHOUR();
while((RTCCTL0 && RTCRDYIFG) == 0);
min_sec = GetRTCTIM0();
*m = (min_sec & 0xFF00)>>8;
*s = min_sec & 0x00FF;
}

54
Telem_Debug/Debug2/RTC.h Normal file
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/******************************************************************************
/ Program to set and keep track of a clock/calender updated by the RTC
/
/
/
/
/
/
/
/
*******************************************************************************/
#ifndef RTC_H_
#define RTC_H_
typedef struct _Time { int Year, Month, DayOfWeek, Day, Hour, Minute, Second; }time;
// User defined functions
extern void init_RTC(void);
extern int setRTC(int h, int m, int s, int mo, int d, int y);
extern void getTime(int *h, int *m, int *s);
extern int insert_time(char *time_string);
// Provided functions
extern int SetRTCYEAR(int year);
extern int SetRTCMON(int month);
extern int SetRTCDAY(int day);
extern int SetRTCDOW(int dow);
extern int SetRTCHOUR(int hour);
extern int SetRTCMIN(int min);
extern int SetRTCSEC(int sec);
extern int GetRTCTIM0(void);
extern int GetRTCTIM1(void);
extern int GetRTCDATE(void);
extern int GetRTCYEAR(void);
extern int GetRTCMON(void);
extern int GetRTCDOW(void);
extern int GetRTCDAY(void);
extern int GetRTCHOUR(void);
extern int GetRTCMIN(void);
extern int GetRTCSEC(void);
int TestRTCYear(time TaD);
int TestRTCMonth(time TaD);
int TestRTCDow(time TaD);
int TestRTCDay(time TaD);
int TestRTCHour(time TaD);
int TestRTCMinute(time TaD);
int TestRTCSecond(time TaD);
#endif /*RTC_H_*/

338
Telem_Debug/Debug2/RTCASMFunctions_CCE.s43 Normal file
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;******************************************************************************
; MSP430FG5438 - Real Time Clock Workaround
;
; Description: This program demonstrates the RTC Workaround for the RTC
; Errata deailed in the XMS '5438 Errata under RTC3
; Assembly functions for the RTC workaround
; Allows safe access to the RTC registers that potentially have a write issue
; Code is aligned so that the lower 5 bits of the address of the instruction
; fetch following the RTC register write are equal
; Do not change the code in the ASM file (.s43) all nops in there are needed.
;
; Texas Instruments Inc.
; October 2008
; Built with CCE version 3.2.2
;
;*******************************************************************************
; !!!!!! Do not change the code. Every nop has a function !!!!!!
;*******************************************************************************
.cdecls C,LIST,"msp430x54x.h" ; Include device header file
;-------------------------------------------------------------------------------
.text ; Progam Start
;-------------------------------------------------------------------------------
.align 32
;-------------------------------------------------------------------------------
.global SetRTCYEAR
; int SetRTCYEAR(int year)
; year will be set in the RTCYEAR register
; return value is read back from the RTCYEAR register
; Works only in calendar mode (RTCMODE = 1)
; argument year is in R12
; return value is in R12
SetRTCYEAR: nop
nop
nop
nop
dint
nop
nop
nop
mov.w R12,&RTCYEAR ; Set RTCYEAR to year
nop
nop
mov.w &RTCYEAR,R12 ; Return value
nop
eint
nop
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global SetRTCMON
; int SetRTCMON(int month)
; month will be set in the RTCMON register
; Workaround requires to write 16 bits into RTCDATE
; return value is read back from the RTCMON register
; argument month is in R12
; return value is in R12
SetRTCMON: push.w R5 ; push R5
mov.b &RTCDAY,R5 ; read RTCDAY into R5
swpb R12 ; R12 holds month - swap lower and upper byte
bis.w R12,R5 ; combine read RTCDAY and new RTCMON
dint
nop
mov.w R5,&RTCDATE ; write to RTCDATE
nop
nop
nop
nop
eint
nop
mov.b &RTCMON,R12 ; Read RTCMON register
pop.w R5 ; pop R5
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global SetRTCDAY
; int SetRTCDAY(int day)
; day will be set in the RTCDAY register
; Workaround requires to write 16 bits into RTCDATE
; return value is read back from the RTCDAY register
; argument day is in R12
; return value is in R12
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
SetRTCDAY: ; R12 holds day in lower byte
push.w R5 ; push R5
mov.b &RTCMON,R5 ; read RTCMON into lower byte of R5
swpb R5 ; month is now in higher byte of R5
bic.w #00FFh,R5 ; clear lower byte of R5
bis.w R12,R5 ; combine read RTCDAY and new RTCMON
dint
nop
mov.w R5,&RTCDATE ; write to RTCDATE
nop
eint
nop
mov.b &RTCDAY,R12 ; Read RTCDAY register
pop.w R5 ; pop R5
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global SetRTCDOW
; int SetRTCDOW(int dow)
; dow will be set in the RTCDOW register
; Workaround requires to write 16 bits into RTCTIM1
; return value is read back from the RTCDOW register
; argument dow is in R12
; return value is in R12
SetRTCDOW: push.w R5 ; push R5
mov.b &RTCHOUR,R5 ; read RTCHOUR into R5
swpb R12 ; R12 holds dow - swap lower and upper byte
bis.w R12, R5 ; combine read RTCHOUR and new RTCDOW
dint
nop
mov.w R5,&RTCTIM1 ; write to RTCTIM1
nop
eint
nop
mov.b &RTCDOW,R12 ; Read RTCDOW register
pop.w R5 ; pop R5
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global SetRTCHOUR
; int SetRTCHOUR(int hour)
; hour will be set in the RTCHOUR register
; Workaround requires to write 16 bits into RTCTIM1
; return value is read back from the RTCHOUR register
; argument hour is in R12
; return value is in R12
SetRTCHOUR: ; R12 holds day in lower byte
push.w R5 ; push R5
mov.b &RTCDOW,R5 ; read RTCDOW into lower byte of R5
swpb R5 ; dow is now in higher byte of R5
bis.w R12,R5 ; combine read RTCDOW and new RTCHOUR
dint
nop
nop
mov.w R5,&RTCTIM1 ; write to RTCTIM1
nop
eint
nop
mov.b &RTCHOUR,R12 ; Read RTCHOUR register
pop.w R5 ; pop R5
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global SetRTCMIN
; int SetRTCMIN(int min)
; min will be set in the RTCMIN register
; Workaround requires to write 16 bits into RTCTIM0
; return value is read back from the RTCDOW register
; argument min is in R12
; return value is in R12
SetRTCMIN: push.w R5 ; push R5
mov.b &RTCSEC, R5 ; read RTCSEC into R5
swpb R12 ; R12 holds min - swap lower and upper byte
bis.w R12,R5 ; combine read RTCMIN and new RTCSEC
dint
nop
mov.w R5,&RTCTIM0 ; write to RTCTIM0
nop
eint
nop
mov.b &RTCMIN,R12 ; Read RTCDOW register
pop.w R5 ; pop R5
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global SetRTCSEC
; int SetRTCSEC(int sec)
; sec will be set in the RTCSEC register
; Workaround requires to write 16 bits into RTCTIM0
; return value is read back from the RTCSEC register
; argument sec is in R12
; return value is in R12
SetRTCSEC: ; R12 holds day in lower byte
push.w R5 ; push R5
mov.b &RTCMIN, R5 ; read RTCMIN into lower byte of R5
swpb R5 ; min is now in higher byte of R5
bis.w R12, R5 ; combine read RTCMIN and new RTCSEC
dint
nop
nop
mov.w R5,&RTCTIM0 ; write to RTCTIM0
nop
eint
nop
mov.b &RTCSEC, R12 ; Read RTCSEC register
pop.w R5 ; pop R5
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
;-------------------------------------------------------------------------------
.global GetRTCTIM0
; Read the RTC registers RTCTIM0
; return the values
GetRTCTIM0:
mov.w &RTCTIM0,R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCTIM1
; Read the RTC register RTCTIM1
; return the values
GetRTCTIM1:
mov.w &RTCTIM1,R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCDATE
; Read the RTC register RTCDATE
; return the values
GetRTCDATE:
mov.w &RTCDATE,R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCYEAR
; Read the RTC registers RTCYEAR
; return the values
GetRTCYEAR:
mov.w &RTCYEAR, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCMON
; Read the RTC register RTCMON
; return the values
GetRTCMON:
mov.b &RTCMON, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCDOW
; Read the RTC register RTCDOW
; return the values
GetRTCDOW:
mov.b &RTCDOW, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCDAY
; Read the RTC register RTCDOW
; return the values
GetRTCDAY:
mov.b &RTCDAY, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCHOUR
; Read the RTC register RTCDOW
; return the values
GetRTCHOUR:
mov.b &RTCHOUR, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCMIN
; Read the RTC register RTCDOW
; return the values
GetRTCMIN:
mov.b &RTCMIN, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif
.global GetRTCSEC
; Read the RTC register RTCDOW
; return the values
GetRTCSEC:
mov.b &RTCSEC, R12
.if $isdefed("__LARGE_CODE_MODEL__") = 0
ret
.else
reta
.endif

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Telem_Debug/Debug2/SPI.h Normal file
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/*
* Tritium MSP430 SPI interface header file
* Copyright (c) 2006, Tritium Pty Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* - Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer
* in the documentation and/or other materials provided with the distribution.
* - Neither the name of Tritium Pty Ltd nor the names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* Last Modified: J.Kennedy, Tritium Pty Ltd, 18 December 2006
*
*/
#ifndef SPI_H
#define SPI_H
#define SPI1CTL1 (*(volatile unsigned char *)(0x05E0+0x00))
#define SPI1CTL0 (*(volatile unsigned char *)(0x05E0+0x01))
#define SPI1BR0 (*(volatile unsigned char *)(0x05E0+0x06))
#define SPI1BR1 (*(volatile unsigned char *)(0x05E0+0x07))
#define SPI1STAT (*(volatile unsigned char *)(0x05E0+0x0A))
#define SPI1RXBUF (*(volatile unsigned char *)(0x05E0+0x0C))
#define SPI1TXBUF (*(volatile unsigned char *)(0x05E0+0x0E))
#define SPI1IE (*(volatile unsigned char *)(0x05E0+0x1C))
#define SPI1IFG (*(volatile unsigned char *)(0x05E0+0x1D))
#define SPI1IV (*(volatile unsigned int *)(0x05E0+0x1E))
#define SPI2CTL1 (*(volatile unsigned char *)(0x0620+0x00))
#define SPI2CTL0 (*(volatile unsigned char *)(0x0620+0x01))
#define SPI2BR0 (*(volatile unsigned char *)(0x0620+0x06))
#define SPI2BR1 (*(volatile unsigned char *)(0x0620+0x07))
#define SPI2STAT (*(volatile unsigned char *)(0x0620+0x0A))
#define SPI2RXBUF (*(volatile unsigned char *)(0x0620+0x0C))
#define SPI2TXBUF (*(volatile unsigned char *)(0x0620+0x0E))
#define SPI2IE (*(volatile unsigned char *)(0x0620+0x1C))
#define SPI2IFG (*(volatile unsigned char *)(0x0620+0x1D))
#define SPI2IV (*(volatile unsigned int *)(0x0620+0x1E))
// Public Function prototypes
static void spi1_init()
{
SPI1CTL1 |= UCSWRST; //software reset
SPI1CTL0 |= UCCKPH | UCMSB | UCMST | UCMODE_0 | UCSYNC; //data-capt then change; MSB first; Master; 3-pin SPI; sync
SPI1CTL1 |= UCSSEL_2; //set SMCLK
SPI1BR0 = 0x01; //set clk prescaler to 2
SPI1BR1 = 0x00;
SPI1STAT = 0x00; //not in loopback mode
SPI1CTL1 &= ~UCSWRST; //SPI enable turn off software reset
}
static void spi2_init() {} //FIXME:EMPTY
/*
* Transmits data on SPI connection
* - Busy waits until entire shift is complete
* - On devices with hardware SPI support, this function is identical to spi_exchange,
* with the execption of not returning a value
* - On devices with software (bit-bashed) SPI support, this function can run faster
* because it does not require data reception code
*/
static inline void spi1_transmit(unsigned char data)
{
SPI1TXBUF = data;
while((SPI1IFG & UCRXIFG) == 0x00); // Wait for Rx completion (implies Tx is also complete)
SPI1RXBUF;
}
/*
* Exchanges data on SPI connection
* - Busy waits until entire shift is complete
* - This function is safe to use to control hardware lines that rely on shifting being finalised
*/
static inline unsigned char spi1_exchange(unsigned char data)
{
SPI1TXBUF = data;
while((SPI1IFG & UCRXIFG) == 0x00); // Wait for Rx completion (implies Tx is also complete)
return(SPI1RXBUF);
}
#define spi1_transmit2(data) SPI1TXBUF = data; forceread = SPI1RXBUF
#define spi1_wait() while((SPI1IFG & UCRXIFG) == 0x00)
static inline unsigned char spi1_exchange2(unsigned char data) {
SPI1TXBUF = data;
spi1_wait();
return SPI1RXBUF;
}
#endif

372
Telem_Debug/Debug2/Sunseeker2021.h Normal file
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/*
* Sunseeker Telemetry 2021
*
* Last modified May 2021 by B. Bazuin
*
* Main CLK : MCLK = XT2 = 20 MHz
* Sub-Main CLK : SMCLK = XT2/2 = 10 MHz
* Aux CLK : ACLK = XT1 = 32.768 kHz
*
*/
#ifndef SUNSEEKER2021_H_
#define SUNSEEKER2021_H_
#include <msp430x54xa.h>
#include <stdio.h>
#include <stdlib.h>
#include <msp430x54xa.h>
#include <ctype.h>
#include <string.h>
#include <math.h>
#include <float.h>
void clock_init(void);
void timerB_init(void);
void io_init(void);
static inline void delay(void)
{
volatile int jj;
volatile int ii;
for (ii = 0; ii < 4; ii++)
{
for (jj = 0; jj < 1000; jj++)
{
asm(" nop"); //The space is necessary or else the assember things nop is a label!
}
}
}
// Event timing
#define SMCLK_RATE 10000000 // Hz
#define ACLK_RATE 32768 // Hz
#define TICK_RATE 16 // Hz
#define TELEM_STATUS_COUNT 16 // Number of ticks per event: 5 sec
#define HS_COMMS_SPEED 16*5 // Number of ticks per event: 5 sec
#define LS_COMMS_SPEED 16*10 // Number of ticks per event: 15 sec
#define ST_COMMS_SPEED 16*20 // Number of ticks per event: 60 sec
// Constant Definitions
#define TRUE 1
#define FALSE 0
#ifndef MODEM_BR1
#define MODEM_BR1 9600
#define MODEM_UCBRS1 0x04 // 2*ROUND(SMCLK_RATE/MODEM_BR-INT(SMCLK_RATE/MODEM_BR))*8
#endif
#ifndef MODEM_BR2
#define MODEM_BR2 115200
#define MODEM_UCBRS2 0x0A // 2*ROUND(SMCLK_RATE/MODEM_BR-INT(SMCLK_RATE/MODEM_BR))*8
#endif
#ifndef USB_BR
#define USB_BR 9600
#define USB_UCBRS 0x04 // 2*ROUND(SMCLK_RATE/UART_BR-INT(SMCLK_RATE/UART_BR))*8
#endif
#ifndef UART_BR
#define UART_BR 19200
#define UART_UCBRS 0x0D // 2*ROUND(SMCLK_RATE/UART_BR-INT(SMCLK_RATE/UART_BR))*8
#endif
#include "UART.h"
#include "MODEM.h"
#include "SPI.h"
#include "PACKET.h" //order important
#include "char_FIFO.h"
#include "message_FIFO.h"
#include "CAN.h"
#include "RTC.h"
/******************** Pin Definitions *************************/
// PORT 1
#define P10 0x01
#define P11 0x02
#define P12 0x04
#define P13 0x08
#define P14 0x10
#define P15 0x20
#define RTC_MFP 0x40
#define IMU_INTn 0x80
#define P1_UNUSED 0x01 | 0x02 | 0x04 | 0x08 | 0x10 | 0x20
// PORT 2
#define CAN0_INTn 0x01
#define CAN0_RXB0n 0x02
#define CAN0_RXB1n 0x04
#define CAN1_INTn 0x08
#define CAN1_RXB0n 0x10
#define CAN1_RXB1n 0x20
#define GPS_INTn 0x40
#define P27 0x80
#define P2_UNUSED 0x80
// PORT 3
#define CAN0_SCLK 0x01
#define SDC_SIMO 0x02
#define SDC_SOMI 0x04
#define SDC_SCLK 0x08
#define CAN0_MOSI 0x10
#define CAN0_MISO 0x20
#define CAN1_CLK 0x40
#define IMU_SDA 0x80
#define P3_UNUSED 0x00
// PORT 4
#define CAN0_RSTn 0x01
#define CAN0_CSn 0x02
#define CAN1_RSTn 0x04
#define CAN1_CSn 0x08
#define SDC_WPn 0x10
#define SDC_CDn 0x20
#define P46 0x40
#define P47 0x80
#define P4_UNUSED 0x40 | 0x80
// PORT 5
#define P50 0x01
#define P51 0x02
#define XT2IN 0x04
#define XT2OUT 0x08
#define IMU_SCL 0x10
#define P55 0x20
#define CAN1_MOSI 0x40
#define CAN1_MISO 0x80
#define P5_UNUSED 0x01 | 0x02 | 0x20
// PORT 6
#define P60 0x01
#define P61 0x02
#define P62 0x04
#define P63 0x08
#define P64 0x10
#define P65 0x20
#define P66 0x40
#define P67 0x80
#define P6_UNUSED 0x01 | 0x02 | 0x04 | 0x08 | 0x10 | 0x20 | 0x40 | 0x80
// PORT 7
#define XT1IN 0x01
#define XT1OUT 0x02
#define P72 0x04
#define P73 0x08
#define P74 0x10
#define P75 0x20
#define P76 0x40
#define P77 0x80
#define P7_UNUSED 0x04 | 0x08 | 0x10 | 0x20 | 0x40 | 0x80
// PORT 8
#define P80 0x01
#define P81 0x02
#define P82 0x04
#define LEDG 0x08
#define LEDR 0x10
#define LEDY0 0x20
#define LEDY1 0x40
#define Button0 0x80
#define P8_UNUSED 0x01 | 0x02 | 0x04
// PORT 9
#define P90 0x01
#define RTC_SDA 0x02
#define RTC_SCL 0x04
#define P93 0x08
#define USB_TX 0x10
#define USB_RX 0x20
#define SDC_CSn 0x40
#define GPS_CSn 0x80
#define P9_UNUSED 0x40 | 0x80
// PORT 10
#define BT_CSn 0x01
#define BT_MOSI 0x02
#define BT_MISO 0x04
#define BT_SCLK 0x08
#define UART_TX 0x10
#define UART_RX 0x20
#define BT_EN 0x40
#define P107 0x80
#define P10_UNUSED 0x80
// PORT 11
#define ACLK_TEST 0x01
#define MCLK_TEST 0x02
#define SMCLK_TEST 0x04
// PORT J
#define JTAG_TDO 0x01
#define JTAG_TDI 0x02
#define JTAG_TMS 0x04
#define JTAG_TCK 0x08
// Motor controller CAN base address and packet offsets
#define MC_CAN_BASE1 0x400 // High = CAN1_SERIAL Number Low = 0x00004003 P=1s
#define MC_CAN_BASE2 0x420 // High = CAN1_SERIAL Number Low = 0x00004003 P=1s
#define MC_LIMITS 0x01 // High = CAN_Err,Active Motor Low = Error & Limit flags P=200ms
#define MC_BUS 0x02 // High = Bus Current Low = Bus Voltage P=200ms
#define MC_VELOCITY 0x03 // High = Velocity (m/s) Low = Velocity (rpm) P=200ms
#define MC_PHASE 0x04 // High = Phase C Current Low = Phase B Current P=200ms
#define MC_V_VECTOR 0x05 // High = Vd vector Low = Vq vector P=200ms
#define MC_I_VECTOR 0x06 // High = Id vector Low = Iq vector P=200ms
#define MC_BEMF_VECTOR 0x07 // High = BEMFd vector Low = BEMFq vector P=200ms
#define MC_RAIL1 0x08 // High = 15V Low = Reserved P=1s
#define MC_RAIL2 0x09 // High = 3.3V Low = 1.9V P=1s
//#define MC_FAN 0x0A // High = Reserved Low = Reserved P=
#define MC_TEMP1 0x0B // High = Heatsink Temp (case) Low = Motor Temp (internal) P=1s
#define MC_TEMP2 0x0C // High = Reserved Low = DSP Temp P=1s
//#define MC_TEMP3 0x0D // High = Outlet Temp Low = Capacitor Temp P=
#define MC_CUMULATIVE 0x0E // High = DC Bus AmpHours (A-Hr) Low = Odometer (m) P=1s
#define MC_SLIPSPEED 0x17 // High = Slip Speed (Hz ) Low = Reserved P=200ms
// Driver controls CAN base address and packet offsets
#define DC_CAN_BASE 0x500 // High = CAN1_SERIAL Number Low = "TRIb" string P=1s
#define DC_DRIVE 0x01 // High = Motor Current Setpoint Low = Motor Velocity Setpoint P=100ms
#define DC_POWER 0x02 // High = Bus Current Setpoint Low = Unused P=100ms
#define DC_RESET 0x03 // High = Unused Low = Unused P=
#define DC_SWITCH 0x04 // High = Switch position Low = Switch state change P=100ms
//Battery Protection System base address and packet offsets
#define BP_CAN_BASE 0x580 // High = "BPV1" string or nulls Low = CAN1_SERIAL Number P=10s
#define BP_VMAX 0x01 // High = Max. Voltage Value Low = Max. Voltage Cell Num. P=10s
#define BP_VMIN 0x02 // High = Min. Voltage Value Low = Min. Voltage Cell Num. P=10s
#define BP_TMAX 0x03 // High = Max. Temperature Low = Max. Temperature Cell P=10s
#define BP_PCDONE 0x04 // High = "BPV2" or "0000" string Low = CAN1_SERIAL Number P=When Ready
#define BP_ISH 0x05 // High = Shunt Current Low = Battery Voltage P=1s
//Battery Protection System base address and packet offsets
#define AC_CAN_BASE 0x5C0 // High = "ACV1" string or nulls Low = CAN1_SERIAL Number P=10s
#define AC_M1 0x01 // High = Array Voltage Average Low = Array Current Average P=10s
#define AC_M2 0x02 // High = Array Voltage Average Low = Array Current Average P=10s
#define AC_M3 0x03 // High = Array Voltage Average Low = Array Current Average P=10s
#define AC_ISH 0x04 // High = Shunt Current Low = Battery Voltage P=1s
#define AC_TMAX 0x05 // High = Max. Temperature Low = Max. Temperature MPPT P=10s
#define AC_TVAL1 0x06 // High = Temp AC1 Low = Temp AC2 P=10s
#define AC_TVAL2 0x06 // High = Temp AC3 Low = Reserved P=10s
#define AC_BP_CHARGE 0x07 // High = "ACV1" or "0000" string Low = CAN1_SERIAL Number P=When Charge
static int addr_lookup[LOOKUP_ROWS][5] = {
//address ASCII Offset MSG_REC position Packet(0-HF:1-LF:2-Status) Filter Priority
{MC_CAN_BASE1, 0, 0x0001, 3, 29}, //0-0x400 High = CAN1_SERIAL Number Low = "TRIa" string
{MC_CAN_BASE1 + MC_LIMITS, 0, 0x0001, 3, 15}, //1-0x01 High = Active Motor Low = Error & Limit flags
{MC_CAN_BASE1 + MC_BUS, 0, 0x0002, 0, 1}, //2-0x02 High = Bus Current Low = Bus Voltage
{MC_CAN_BASE1 + MC_VELOCITY, 1, 0x0004, 0, 2}, //3-0x03 High = Velocity (m/s) Low = Velocity (rpm)
{MC_CAN_BASE1 + MC_PHASE, 1, 0x0001, 3, 30}, //4-0x04 High = Phase A Current Low = Phase B Current
{MC_CAN_BASE1 + MC_V_VECTOR, 2, 0x0002, 3, 31}, //5-0x05 High = Vd vector Low = Vq vector
{MC_CAN_BASE1 + MC_I_VECTOR, 3, 0x0004, 3, 32}, //6-0x06 High = Id vector Low = Iq vector
{MC_CAN_BASE1 + MC_BEMF_VECTOR, 4, 0x0008, 3, 33}, //7-0x07 High = BEMFd vector Low = BEMFq vector
{MC_CAN_BASE1 + MC_RAIL1, 1, 0x0002, 3, 16}, //8-0x08 High = 15V Low = Reserved
{MC_CAN_BASE1 + MC_RAIL2, 2, 0x0004, 3, 17}, //9-0x09 High = 3.3V Low = 1.9V
{MC_CAN_BASE1 + MC_TEMP1, 0, 0x0001, 3, 7}, //10-0x0B High = Heatsink Temp Low = Motor Temp
{MC_CAN_BASE1 + MC_TEMP2, 1, 0x0002, 3, 8}, //11-0x0C High = Inlet Temp Low = CPU Temp
{MC_CAN_BASE1 + MC_CUMULATIVE, 3, 0x0008, 3, 18}, //12-x0E High = DC Bus AmpHours Low = Odometer
{MC_CAN_BASE1 + MC_SLIPSPEED, 5, 0x0010, 3, 34}, //13-0x17 High =Slip Speed (Hz) Low = Reserved
{MC_CAN_BASE2, 6, 0x0020, 3, 35}, //14-0x420 High = CAN1_SERIAL Number Low = "TRIa" string
{MC_CAN_BASE2 + MC_LIMITS, 4, 0x0010, 3, 19}, //15-0x01 High = Active Motor Low = Error & Limit flags
{MC_CAN_BASE2 + MC_BUS, 2, 0x0010, 0, 3}, //16-0x02 High = Bus Current Low = Bus Voltage
{MC_CAN_BASE2 + MC_VELOCITY, 3, 0x0020, 0, 4}, //17-0x03 High = Velocity (m/s) Low = Velocity (rpm)
{MC_CAN_BASE2 + MC_PHASE, 7, 0x0040, 3, 36}, //18-0x04 High = Phase A Current Low = Phase B Current
{MC_CAN_BASE2 + MC_V_VECTOR, 8, 0x0080, 3, 37}, //19-0x05 High = Vd vector Low = Vq vector
{MC_CAN_BASE2 + MC_I_VECTOR, 9, 0x0100, 3, 38}, //20-0x06 High = Id vector Low = Iq vector
{MC_CAN_BASE2 + MC_BEMF_VECTOR, 10, 0x0200, 3, 39}, //21-0x07 High = BEMFd vector Low = BEMFq vector
{MC_CAN_BASE2 + MC_RAIL1, 5, 0x0020, 3, 20}, //22-0x08 High = 15V Low = Reserved
{MC_CAN_BASE2 + MC_RAIL2, 6, 0x0040, 3, 21}, //23-0x09 High = 3.3V Low = 1.9V
{MC_CAN_BASE2 + MC_TEMP1, 2, 0x0004, 3, 9}, //24-0x0B High = Heatsink Temp Low = Motor Temp
{MC_CAN_BASE2 + MC_TEMP2, 3, 0x0008, 3, 10}, //25-0x0C High = Inlet Temp Low = CPU Temp
{MC_CAN_BASE2 + MC_CUMULATIVE, 7, 0x0080, 3, 22}, //26-0x0E High = DC Bus AmpHours Low = Odometer
{MC_CAN_BASE2 + MC_SLIPSPEED, 11, 0x0400, 3, 40}, //27-0x17 High =Slip Speed (Hz) Low = Reserved
{DC_CAN_BASE, 12, 0x0800, 3, 41}, //28-0x500 High = CAN1_SERIAL Number Low = "TRIb" string
{DC_CAN_BASE + DC_DRIVE, 4, 0x0800, 0, 23}, //29-0x01 High = Motor Current Setpoint Low = Motor Velocity Setpoint
{DC_CAN_BASE + DC_POWER, 9, 0x0200, 3, 24}, //30-0x02 High = Bus Current Setpoint Low = Unused
{DC_CAN_BASE + DC_RESET, 13, 0x1000, 3, 42}, //31-0x03 High = Unused Low = Unused
{DC_CAN_BASE + DC_SWITCH, 5, 0x0080, 0, 25}, //32-0x04 High = Switch position Low = Switch state change
{BP_CAN_BASE, 14, 0x2000, 3, 43}, //33-0x580 High = BPV2" string or nulls Low = CAN1_SERIAL Number
{BP_CAN_BASE + BP_VMAX, 6, 0x0010, 0, 11}, //34-0x01 High = Max Voltage Low = Cell Number
{BP_CAN_BASE + BP_VMIN, 7, 0x0020, 0, 12}, //35-0x02 High = Min Voltage Low = Cell Number
{BP_CAN_BASE + BP_TMAX, 8, 0x0040, 0, 13}, //36-0x03 High = Temp Max Low = Cell Number
{BP_CAN_BASE + BP_PCDONE, 15, 0x0200, 3, 44}, //37-0x04 High = "BPV1" string Low = CAN1_SERIAL Number
{BP_CAN_BASE + BP_ISH, 9, 0x0010, 0, 5}, //38-0x05 High = Shunt Current Low = Battery Voltage
{AC_CAN_BASE, 16, 0x8000, 3, 45}, //39-0x5C0 High = ACV1" string or nulls Low = CAN1_SERIAL Number
{AC_CAN_BASE + AC_M1, 11, 0x0800, 3, 26}, //40-0x01 High = Array Voltage Average Low = Array Current Average
{AC_CAN_BASE + AC_M2, 12, 0x1000, 3, 27}, //41-0x02 High = Array Voltage Average Low = Array Current Average
{AC_CAN_BASE + AC_M3, 13, 0x2000, 3, 28}, //42-0x03 High = Array Voltage Average Low = Array Current Average
{AC_CAN_BASE + AC_ISH, 5, 0x0020, 3, 6}, //43-0x04 High = Shunt Current Low = Battery Voltage
{AC_CAN_BASE + AC_TMAX, 7, 0x0080, 3, 14}, //44-0x05 High = Max. Temperature Low = Max. Temperature MPPT
{AC_CAN_BASE + AC_TVAL1, 17, 0x1000, 3, 46}, //45-0x03 High = Temp AC1 Low = Temp AC2
{AC_CAN_BASE + AC_TVAL2, 18, 0x2000, 3, 47}, //46-0x04 High = Temp AC3 Low = Reserved
{AC_CAN_BASE + AC_BP_CHARGE, 19, 0x4000, 3, 48}, //47-0x05 High = "ACV1" or "0000" string Low = CAN1_SERIAL Number
};
// removed
//{MC_CAN_BASE1 + MC_FAN, -, 0x----, -, --}, //xx-0x0A High = Fan speed (rpm) Low = Fan drive (%)
//{MC_CAN_BASE1 + MC_TEMP3, -, 0x----, -, --}, //xx-0x0D High = Outlet Temp Low = Capacitor Temp
//{MC_CAN_BASE2 + MC_FAN, -, 0x----, -, --}, //xx-0x0A High = Fan speed (rpm) Low = Fan drive (%)
//{MC_CAN_BASE2 + MC_TEMP3, -, 0x----, -, --}, //xx-0x0D High = Outlet Temp Low = Capacitor Temp
//static char lut_blacklist[] = {32,11,4,5,11,12,13,14,15,23,24,25,3,26,27,28};
//static char lut_blacklist[] = {44};
static char lut_blacklist[] = {49};
static char *name_lookup[NAME_LOOKUP_ROWS] = {
//name
"MC1BAS", //MC_CAN_BASE1_
"MC1LIM", //MC_CAN_BASE1 + MC_LIMITS
"MC1BUS", //MC_CAN_BASE1 + MC_BUS
"MC1VEL", //MC_CAN_BASE1 + MC_VELOCITY
"MC1PHA", //MC_CAN_BASE1 + MC_PHASE
"MC1VVC", //MC_CAN_BASE1 + MC_V_VECTOR
"MC1IVC", //MC_CAN_BASE1 + MC_I_VECTOR
"MC1BEM", //MC_CAN_BASE1 + MC_BEMF_VECTOR
"MC1RL1", //MC_CAN_BASE1 + MC_RAIL1
"MC1RL2", //MC_CAN_BASE1 + MC_RAIL2
"MC1TP1", //MC_CAN_BASE1 + MC_TEMP1
"MC1TP2", //MC_CAN_BASE1 + MC_TEMP2
"MC1CUM", //MC_CAN_BASE1 + MC_CUMULATIVE
"MC1SLS", //MC_CAN_BASE1 + MC_SLIPSPEED
"MC2BAS", //MC_CAN_BASE2
"MC2LIM", //MC_CAN_BASE2 + MC_LIMITS
"MC2BUS", //MC_CAN_BASE2 + MC_BUS
"MC2VEL", //MC_CAN_BASE2 + MC_VELOCITY
"MC2PHA", //MC_CAN_BASE2 + MC_PHASE
"MC2VVC", //MC_CAN_BASE2 + MC_V_VECTOR
"MC2IVC", //MC_CAN_BASE2 + MC_I_VECTOR
"MC2BEM", //MC_CAN_BASE2 + MC_BEMF_VECTOR
"MC2RL1", //MC_CAN_BASE2 + MC_RAIL1
"MC2RL2", //MC_CAN_BASE2 + MC_RAIL2
"MC2TP1", //MC_CAN_BASE2 + MC_TEMP1
"MC2TP2", //MC_CAN_BASE2 + MC_TEMP2
"MC2CUM", //MC_CAN_BASE2 + MC_CUMULATIVE
"MC2SLS", //MC_CAN_BASE2 + MC_SLIPSPEED
"DC_BAS", //DC_CAN_BASE
"DC_DRV", //DC_CAN_BASE + DC_DRIVE
"DC_POW", //DC_CAN_BASE + DC_POWER
"DC_RST", //DC_CAN_BASE + DC_RESET
"DC_SWC", //DC_CAN_BASE + DC_SWITCH
"BP_BAS", //BP_CAN_BASE
"BP_VMX", //BP_CAN_BASE + BP_VMAX
"BP_VMN", //BP_CAN_BASE + BP_VMIN
"BP_TMX", //BP_CAN_BASE + BP_TMAX
"BP_PCD", //BP_CAN_BASE + BP_PCDONE
"BP_ISH", //BP_CAN_BASE + BP_ISH
"AC_BAS", //AC_CAN_BASE
"AC_MP1", //AC_CAN_BASE + AC_M1
"AC_MP2", //AC_CAN_BASE + AC_M2
"AC_MP3", //AC_CAN_BASE + AC_M3
"AC_ISH", //AC_CAN_BASE + AC_ISH
"AC_TMX", //AC_CAN_BASE + AC_TMAX
"AC_TV1", //AC_CAN_BASE + AC_TVAL1
"AC_TV2", //AC_CAN_BASE + AC_TVAL2
"AC_BPC", //AC_CAN_BASE + AC_BP_CHARGE
};
// removed
// "MC1FAN", //MC_CAN_BASE1 + MC_FAN
// "MC1TP3", //MC_CAN_BASE1 + MC_TEMP3
// "MC2FAN", //MC_CAN_BASE2 + MC_FAN
//"MC2TP3", //MC_CAN_BASE2 + MC_TEMP3
#endif /* SUNSEEKER2021_H_ */

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#ifndef UART_H
#define UART_H
#define UART1CTL1 (*(volatile unsigned char *)(0x0600+0x00))
#define UART1CTL0 (*(volatile unsigned char *)(0x0600+0x01))
#define UART1BRW (*(volatile unsigned int *)(0x0600+0x06))
#define UART1MCTL (*(volatile unsigned char *)(0x0600+0x08))
#define UART1STAT (*(volatile unsigned char *)(0x0600+0x0A))
#define UART1RXBUF (*(volatile unsigned char *)(0x0600+0x0C))
#define UART1TXBUF (*(volatile unsigned char *)(0x0600+0x0E))
#define UART1ABCTL (*(volatile unsigned char *)(0x0600+0x10))
#define UART1IE (*(volatile unsigned char *)(0x0600+0x1C))
#define UART1IFG (*(volatile unsigned char *)(0x0600+0x1D))
#define UART1IV (*(volatile unsigned int *)(0x0600+0x1E))
#define UART2CTL1 (*(volatile unsigned char *)(0x0640+0x00))
#define UART2CTL0 (*(volatile unsigned char *)(0x0640+0x01))
#define UART2BRW (*(volatile unsigned int *)(0x0640+0x06))
#define UART2MCTL (*(volatile unsigned char *)(0x0640+0x08))
#define UART2STAT (*(volatile unsigned char *)(0x0640+0x0A))
#define UART2RXBUF (*(volatile unsigned char *)(0x0640+0x0C))
#define UART2TXBUF (*(volatile unsigned char *)(0x0640+0x0E))
#define UART2ABCTL (*(volatile unsigned char *)(0x0640+0x10))
#define UART2IE (*(volatile unsigned char *)(0x0640+0x1C))
#define UART2IFG (*(volatile unsigned char *)(0x0640+0x1D))
#define UART2IV (*(volatile unsigned int *)(0x0640+0x1E))
//USB interface
#define UART3CTL1 (*(volatile unsigned char *)(0x0680+0x00))
#define UART3CTL0 (*(volatile unsigned char *)(0x0680+0x01))
#define UART3BRW (*(volatile unsigned int *)(0x0680+0x06))
#define UART3MCTL (*(volatile unsigned char *)(0x0680+0x08))
#define UART3STAT (*(volatile unsigned char *)(0x0680+0x0A))
#define UART3RXBUF (*(volatile unsigned char *)(0x0680+0x0C))
#define UART3TXBUF (*(volatile unsigned char *)(0x0680+0x0E))
#define UART3ABCTL (*(volatile unsigned char *)(0x0680+0x10))
#define UART3IE (*(volatile unsigned char *)(0x0680+0x1C))
#define UART3IFG (*(volatile unsigned char *)(0x0680+0x1D))
#define UART3IV (*(volatile unsigned int *)(0x0680+0x1E))
//UART1 init is in MODEM_init()!
//public functions
static void uart2_init() {
//1. Set UCSWRST
//2. Initialize all USCI registers with UCSWRST = 1 including UCAxCTL1
//3. Configure Ports
//4. Clear UCSWRST via software
//5. Enable interrupts (optional) via UCRXIE a/o UCTXI
UART2CTL1 |= UCSWRST | UCSSEL_2; //put state machine in reset & SMCLK
UART2CTL0 |= UCMODE_0;
UART2BRW = (int)(SMCLK_RATE/UART_BR); //1MHZ 115200
UART2MCTL |= UCBRF_0 + (char)UART_UCBRS; //modulation UCBRSx=6 UCBRFx=0
UART2IFG &= ~UCTXIFG; //Clear Xmit and Rec interrupt flags
UART2IFG &= ~UCRXIFG;
UART2CTL1 &= ~UCSWRST; //initalize state machine
UART2ABCTL |= UCABDEN;
//UART2IE |= UCRXIE|UCTXIE; //enable TX & RX interrupts
}
static inline void tx1_poll ()
{
int z;
//this works!
//while(UCA1IFG & UCTXIFG);
//for (int z = 0; z < 50; z++);
while((UART1IFG & UCTXIFG) == 0);
for (z = 0; z < 1000; z++);
}
static inline void UART1_TXN(char data[], int size)
{
int z;
for (z = 0; z < size; z++) {
tx1_poll();
UART1TXBUF = data[z];
}
}
static inline void UART1_TX(char data[])
{
int z = 0;
while(data[z] != '\0')
{
tx1_poll();
UART1TXBUF = data[z++];
}
}
static inline void UART1_RX(char data[])
{
int z = 0;
// int i;
do
{
while((UART1IFG & UCRXIFG) == 0);
// for (i = 0; i < 1000; i++);
data[z++] = UART1RXBUF;
} while(data[z-1] != '\0');
}
static inline void UART1_RXN(char data[], int size)
{
int z = 0;
// int i;
do
{
while((UART1IFG & UCRXIFG) == 0);
// for (i = 0; i < 1000; i++);
data[z++] = UART1RXBUF;
} while(z < size);
}
#endif

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//
// Telemetry Character FIFO
//
#include "Sunseeker2021.h"
void CHAR_FIFO_INIT(char_fifo queue)
{
queue.GetPt=&queue.fifo[0];
queue.PutPt=&queue.fifo[0];
}
int CHAR_FIFO_PUT(char_fifo *queue, char data)
{
unsigned char *tempPt;
tempPt = queue->PutPt;
*(tempPt++) = data;
if(tempPt == &queue->fifo[fifo_size])
{
tempPt = &queue->fifo[0]; //need to wrap around
}
if(tempPt == queue->GetPt)
{
return(0); //Failure FIFO Full
}
else
{
queue->PutPt = tempPt;
return(1); //successful
}
}
int CHAR_FIFO_GET(char_fifo *queue, unsigned char volatile *data)
{
if(queue->PutPt == queue->GetPt)
{
return(0); //failure FIFO empty
}
else
{
*data = *(queue->GetPt++);
if(queue->GetPt == &queue->fifo[fifo_size])
{
queue->GetPt = &queue->fifo[0]; //need to wrap around
}
return(1);
}
}
int CHAR_FIFO_STAT(char_fifo *queue)
{
return (queue->GetPt != queue->PutPt);
}

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#ifndef char_FIFO_H
#define char_FIFO_H
#ifndef fifo_size
#define fifo_size 16
#endif
typedef struct _char_fifo
{
unsigned char fifo[fifo_size];
unsigned char *PutPt;
unsigned char *GetPt;
} char_fifo;
extern void CHAR_FIFO_INIT(char_fifo queue);
extern int CHAR_FIFO_PUT(char_fifo *queue, char data);
extern int CHAR_FIFO_GET(char_fifo *queue,unsigned char volatile *data);
extern int CHAR_FIFO_STAT(char_fifo *queue);
#endif

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/*
* Clock Initialization Code MSP430F5438A
* Initialize Clock Source XT1 @ 32768 Hz
* Initialize Clock Source XT2 @ 20MHz
*
* Sunseeker Telemetry 2021
*
* Last modified October 2015 by Scott Haver
* Last modified May 2021 by B. Bazuin
*
* Main CLK : MCLK = XT2 = 20 MHz
* Sub-Main CLK : SMCLK = XT2/2 = 10 MHz
* Aux CLK : ACLK = XT1 = 32.768 kHz
*
*/
#include <msp430x54xa.h>
void Port_Init(void);
void Clock_XT1_Init(void);
void Clock_XT2_Init(void);
void SetVCoreUp(unsigned int level);
void clock_init(void)
{
WDTCTL = WDTPW + WDTHOLD; //Stop watchdog timer
Port_Init(); //ensure clock pins are configured
SetVCoreUp(1); //Configure MCU core voltage for HF clock
SetVCoreUp(2); //
SetVCoreUp(3); //
Clock_XT1_Init(); //LF clock source init
Clock_XT2_Init(); //HF clock source init
}
void Port_Init(void)
{
//Clock Source TEST PINS ACLK/MCLK/SMCLK
P11DIR |= (1 << 0) | (1 << 1) | (1 << 2); //set P11.0:P11.2 as output ACLK/MCLK/SMCLK
P11SEL |= (1 << 0) | (1 << 1) | (1 << 2); //set P11.0:P11.2 as ACLK/MCLK/SMCLK function
//XT1 ALTERNATE PIN CONFIG
P7SEL |= (1 << 0) | (1 << 1); //set P7.0 & P7.1 as XT1IN/XT1OUT periph
P7DIR |= (1 << 0) | (1 << 1);
//XT2 ALTERNATE PIN CONFIG
P5SEL |= (1 << 2) | (1 << 3); //set P5.2 & P5.3 as XT2IN/XT2OUT periph
P5DIR |= (1 << 2) | (1 << 3);
}
void Clock_XT1_Init(void)
{
char i;
//XT1 CLOCK CONFIG
UCSCTL6 &= ~(XT1OFF); //Enable XT1
UCSCTL6 &= ~(XT1DRIVE1 | XT1DRIVE0); //lowest drive current LF 32KHz oscillator
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);//Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; //Clear fault flags
for(i=255;i>0;i--); //Delay for Osc to stabilize
}
while ((SFRIFG1 & OFIFG) != 0); //Test oscillator fault flag
UCSCTL4 |= SELA__XT1CLK; //Clock Source ACLK = XT1 = 32kHz
UCSCTL5 |= DIVA_0; //Divide ACLK/1 = 32kHz
}
void Clock_XT2_Init(void)
{
char i;
//XT2 CLOCK CONFIG
UCSCTL6 &= ~(XT2OFF); //Enable XT2
UCSCTL6 |= XT2DRIVE_3; //Drive current 16-24 MHz Clock
UCSCTL6 &= ~XT2BYPASS; //XT2 Sourced Externally from pin - 20MHz
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);//Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; //Clear fault flags
for(i=255;i>0;i--); //Delay for Osc to stabilize
}
while ((SFRIFG1 & OFIFG) != 0); //Test oscillator fault flag
UCSCTL4 |= (SELS__XT2CLK | SELM__XT2CLK);//Clock Source SMCLK=MCLK = XT2 = 20MHz
UCSCTL5 |= DIVM_0 | DIVS_1; //MCLK:XT2/1 = 20MHz SMCLK:XT2/2 = 10MHz
}
/*************************************************************
/ Name: SetVCoreUp
/ IN: int Level
/ OUT: void
/ DESC: This function is used to set the voltage of the VCORE to
/ The level specified in input
/ Reference: Users Guide page 74
************************************************************/
void SetVCoreUp (unsigned int level)
{
// Open PMM registers for write access
PMMCTL0_H = 0xA5;
// Set SVS/SVM high side new level
SVSMHCTL = SVSHE + SVSHRVL0 * level + SVMHE + SVSMHRRL0 * level;
// Set SVM low side to new level
SVSMLCTL = SVSLE + SVMLE + SVSMLRRL0 * level;
// Wait till SVM is settled
while ((PMMIFG & SVSMLDLYIFG) == 0);
// Clear already set flags
PMMIFG &= ~(SVMLVLRIFG + SVMLIFG);
// Set VCore to new level
PMMCTL0_L = PMMCOREV0 * level;
// Wait till new level reached
if ((PMMIFG & SVMLIFG))
while ((PMMIFG & SVMLVLRIFG) == 0);
// Set SVS/SVM low side to new level
SVSMLCTL = SVSLE + SVSLRVL0 * level + SVMLE + SVSMLRRL0 * level;
// Wait till SVM is settled
while ((PMMIFG & SVSMLDLYIFG) == 0);
// Lock PMM registers for write access
PMMCTL0_H = 0x00;
}

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/*
* Battery Protection Software for BPS PCB Development
* Originally Written for BPS_V1 2012
*
* Modified for BPS_V2 2015 by Scott Haver
* WMU Sunseeker 2015
*
* I/O Initialization
*/
// Include files
#include "Sunseeker2021.h"
/*
* Initialise I/O port directions and states
* Drive unused pins as outputs to avoid floating inputs
*
*/
void io_init( void )
{
/******************************PORT 1**************************************/
P1OUT = 0x00; // Pull pins low
P1DIR = P1_UNUSED; //set to output
P1DIR &= ~(RTC_MFP | IMU_INTn); //set to input
/*Interrupts Enable*/
// P1SEL = RTC_MFP | IMU_INTn;
// P1IE = RTC_MFP | IMU_INTn; // Enable Interrupts
P1IES = IMU_INTn; //high to low
P1IFG = 0x00; //Clears all interrupt flags on Port 1
delay();
/******************************PORT 2**************************************/
P2OUT = 0x00; // Pull pins low
P2DIR = P2_UNUSED; //set to output
/*Interrupts Enable */
// P2SEL = CAN0_INTn | CAN1_INTn | GPS_INTn; //Interrupts Select
// P2IES = CAN0_INTn | CAN1_INTn | GPS_INTn;
// P2IE = CAN0_INTn | CAN1_INTn | GPS_INTn; // Enable Interrupts
// P2SEL |= CAN0_RXB0n | CAN0_RXB1n | CAN1_RXB0n | CAN1_RXB1n; //Interrupts Select
// P2IES |= CAN0_RXB0n | CAN0_RXB1n | CAN1_RXB0n | CAN1_RXB1n;
// P2IE |= CAN0_RXB0n | CAN0_RXB1n | CAN1_RXB0n | CAN1_RXB1n; // Enable Interrupts
P2IFG = 0x00; //Clears all interrupt flags on Port 2
delay();
/******************************PORT 3**************************************/
P3OUT = 0x00; // Pull pins low
P3DIR = CAN0_SCLK | CAN0_MOSI | SDC_SCLK | SDC_SIMO | CAN1_CLK | P3_UNUSED;
P3OUT |= CAN0_SCLK | CAN0_MOSI | SDC_SCLK | SDC_SIMO | CAN1_CLK;
P3DIR &= ~(CAN0_MISO | SDC_SOMI);
P3SEL = CAN0_SCLK | CAN0_MOSI | CAN0_MISO | SDC_SCLK | SDC_SIMO | SDC_SOMI | CAN1_CLK | IMU_SDA;
/******************************PORT 4**************************************/
P4OUT = 0x00; // Pull pins low
P4DIR = CAN0_RSTn | CAN0_CSn | CAN1_RSTn | CAN1_CSn | P4_UNUSED;
P4OUT = CAN0_RSTn | CAN0_CSn | CAN1_RSTn | CAN1_CSn;
delay();
P4OUT &= ~(CAN0_RSTn | CAN1_RSTn) ;
delay();
delay();
P4OUT |= (CAN0_RSTn | CAN1_RSTn) ;
/******************************PORT 5**************************************/
P5OUT = 0x00; // Pull pins low
P5DIR = XT2OUT | CAN1_MOSI | P5_UNUSED;
P5OUT = CAN1_MOSI;
P5DIR &= ~(CAN1_MISO);
P5SEL = XT2IN | XT2OUT | IMU_SCL | CAN1_MOSI | CAN1_MISO;
/******************************PORT 6**************************************/
P6OUT = 0x00; // Pull pins low
P6DIR = P6_UNUSED;
P6SEL = 0x00;
/******************************PORT 7**************************************/
P7OUT = 0x00; // Pull pins low
P7DIR = XT1OUT | P7_UNUSED;
P7SEL = XT1IN | XT1OUT;
/******************************PORT 8**************************************/
P8OUT = 0x00; // Pull pins low
P8DIR = LEDG | LEDR | LEDY0 | LEDY1 | P8_UNUSED;
P8DIR &= ~(Button0);
P8SEL = 0x00;
/******************************PORT 9**************************************/
P9OUT = 0x00; // Pull pins low
P9DIR = USB_TX | SDC_CSn | GPS_CSn | P9_UNUSED;
P9OUT = SDC_CSn | GPS_CSn;
P9SEL = RTC_SDA | RTC_SCL | USB_TX | USB_RX;
/******************************PORT 10**************************************/
P10OUT = 0x00; // Pull pins low
P10DIR = BT_CSn | BT_MOSI | BT_SCLK | UART_TX | BT_EN |P10_UNUSED;
P10OUT = BT_CSn | BT_MOSI | BT_SCLK;
P10SEL = BT_MOSI | BT_MISO | BT_SCLK | UART_TX | UART_RX;
/******************************PORT 11**************************************/
P11OUT = 0x00; // Pull pins low
P11DIR = ACLK_TEST | MCLK_TEST | SMCLK_TEST;
P11OUT = ACLK_TEST | MCLK_TEST | SMCLK_TEST;
P11SEL = ACLK_TEST | MCLK_TEST | SMCLK_TEST;
/******************************PORT J**************************************/
PJOUT = 0x00;
PJDIR = 0x0F; //set to output as per user's guide
}

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/* ============================================================================ */
/* Copyright (c) 2016, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/******************************************************************************/
/* lnk_msp430f5438a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5438A PROGRAMS */
/* */
/* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */
/* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */
/* */
/*----------------------------------------------------------------------------*/
/* These linker options are for command line linking only. For IDE linking, */
/* you should set your linker options in Project Properties */
/* -c LINK USING C CONVENTIONS */
/* -stack 0x0100 SOFTWARE STACK SIZE */
/* -heap 0x0100 HEAP AREA SIZE */
/* */
/*----------------------------------------------------------------------------*/
/* Version: 1.192 */
/*----------------------------------------------------------------------------*/
/****************************************************************************/
/* Specify the system memory map */
/****************************************************************************/
MEMORY
{
SFR : origin = 0x0000, length = 0x0010
PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0
PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100
RAM : origin = 0x1C00, length = 0x4000
INFOA : origin = 0x1980, length = 0x0080
INFOB : origin = 0x1900, length = 0x0080
INFOC : origin = 0x1880, length = 0x0080
INFOD : origin = 0x1800, length = 0x0080
FLASH : origin = 0x5C00, length = 0xA380
FLASH2 : origin = 0x10000,length = 0x35C00
INT00 : origin = 0xFF80, length = 0x0002
INT01 : origin = 0xFF82, length = 0x0002
INT02 : origin = 0xFF84, length = 0x0002
INT03 : origin = 0xFF86, length = 0x0002
INT04 : origin = 0xFF88, length = 0x0002
INT05 : origin = 0xFF8A, length = 0x0002
INT06 : origin = 0xFF8C, length = 0x0002
INT07 : origin = 0xFF8E, length = 0x0002
INT08 : origin = 0xFF90, length = 0x0002
INT09 : origin = 0xFF92, length = 0x0002
INT10 : origin = 0xFF94, length = 0x0002
INT11 : origin = 0xFF96, length = 0x0002
INT12 : origin = 0xFF98, length = 0x0002
INT13 : origin = 0xFF9A, length = 0x0002
INT14 : origin = 0xFF9C, length = 0x0002
INT15 : origin = 0xFF9E, length = 0x0002
INT16 : origin = 0xFFA0, length = 0x0002
INT17 : origin = 0xFFA2, length = 0x0002
INT18 : origin = 0xFFA4, length = 0x0002
INT19 : origin = 0xFFA6, length = 0x0002
INT20 : origin = 0xFFA8, length = 0x0002
INT21 : origin = 0xFFAA, length = 0x0002
INT22 : origin = 0xFFAC, length = 0x0002
INT23 : origin = 0xFFAE, length = 0x0002
INT24 : origin = 0xFFB0, length = 0x0002
INT25 : origin = 0xFFB2, length = 0x0002
INT26 : origin = 0xFFB4, length = 0x0002
INT27 : origin = 0xFFB6, length = 0x0002
INT28 : origin = 0xFFB8, length = 0x0002
INT29 : origin = 0xFFBA, length = 0x0002
INT30 : origin = 0xFFBC, length = 0x0002
INT31 : origin = 0xFFBE, length = 0x0002
INT32 : origin = 0xFFC0, length = 0x0002
INT33 : origin = 0xFFC2, length = 0x0002
INT34 : origin = 0xFFC4, length = 0x0002
INT35 : origin = 0xFFC6, length = 0x0002
INT36 : origin = 0xFFC8, length = 0x0002
INT37 : origin = 0xFFCA, length = 0x0002
INT38 : origin = 0xFFCC, length = 0x0002
INT39 : origin = 0xFFCE, length = 0x0002
INT40 : origin = 0xFFD0, length = 0x0002
INT41 : origin = 0xFFD2, length = 0x0002
INT42 : origin = 0xFFD4, length = 0x0002
INT43 : origin = 0xFFD6, length = 0x0002
INT44 : origin = 0xFFD8, length = 0x0002
INT45 : origin = 0xFFDA, length = 0x0002
INT46 : origin = 0xFFDC, length = 0x0002
INT47 : origin = 0xFFDE, length = 0x0002
INT48 : origin = 0xFFE0, length = 0x0002
INT49 : origin = 0xFFE2, length = 0x0002
INT50 : origin = 0xFFE4, length = 0x0002
INT51 : origin = 0xFFE6, length = 0x0002
INT52 : origin = 0xFFE8, length = 0x0002
INT53 : origin = 0xFFEA, length = 0x0002
INT54 : origin = 0xFFEC, length = 0x0002
INT55 : origin = 0xFFEE, length = 0x0002
INT56 : origin = 0xFFF0, length = 0x0002
INT57 : origin = 0xFFF2, length = 0x0002
INT58 : origin = 0xFFF4, length = 0x0002
INT59 : origin = 0xFFF6, length = 0x0002
INT60 : origin = 0xFFF8, length = 0x0002
INT61 : origin = 0xFFFA, length = 0x0002
INT62 : origin = 0xFFFC, length = 0x0002
RESET : origin = 0xFFFE, length = 0x0002
}
/****************************************************************************/
/* Specify the sections allocation into memory */
/****************************************************************************/
SECTIONS
{
.bss : {} > RAM /* Global & static vars */
.data : {} > RAM /* Global & static vars */
.TI.noinit : {} > RAM /* For #pragma noinit */
.sysmem : {} > RAM /* Dynamic memory allocation area */
.stack : {} > RAM (HIGH) /* Software system stack */
#ifndef __LARGE_DATA_MODEL__
.text : {} > FLASH /* Code */
#else
.text : {} >> FLASH2 | FLASH /* Code */
#endif
.text:_isr : {} > FLASH /* ISR Code space */
.cinit : {} > FLASH /* Initialization tables */
#ifndef __LARGE_DATA_MODEL__
.const : {} > FLASH /* Constant data */
#else
.const : {} >> FLASH | FLASH2 /* Constant data */
#endif
.cio : {} > RAM /* C I/O Buffer */
.pinit : {} > FLASH /* C++ Constructor tables */
.binit : {} > FLASH /* Boot-time Initialization tables */
.init_array : {} > FLASH /* C++ Constructor tables */
.mspabi.exidx : {} > FLASH /* C++ Constructor tables */
.mspabi.extab : {} > FLASH /* C++ Constructor tables */
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
#ifndef __LARGE_DATA_MODEL__
.TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT)
#else
.TI.ramfunc : {} load=FLASH | FLASH2, run=RAM, table(BINIT)
#endif
#endif
#endif
.infoA : {} > INFOA /* MSP430 INFO FLASH Memory segments */
.infoB : {} > INFOB
.infoC : {} > INFOC
.infoD : {} > INFOD
/* MSP430 Interrupt vectors */
.int00 : {} > INT00
.int01 : {} > INT01
.int02 : {} > INT02
.int03 : {} > INT03
.int04 : {} > INT04
.int05 : {} > INT05
.int06 : {} > INT06
.int07 : {} > INT07
.int08 : {} > INT08
.int09 : {} > INT09
.int10 : {} > INT10
.int11 : {} > INT11
.int12 : {} > INT12
.int13 : {} > INT13
.int14 : {} > INT14
.int15 : {} > INT15
.int16 : {} > INT16
.int17 : {} > INT17
.int18 : {} > INT18
.int19 : {} > INT19
.int20 : {} > INT20
.int21 : {} > INT21
.int22 : {} > INT22
.int23 : {} > INT23
.int24 : {} > INT24
.int25 : {} > INT25
.int26 : {} > INT26
.int27 : {} > INT27
.int28 : {} > INT28
.int29 : {} > INT29
.int30 : {} > INT30
.int31 : {} > INT31
.int32 : {} > INT32
.int33 : {} > INT33
.int34 : {} > INT34
.int35 : {} > INT35
.int36 : {} > INT36
.int37 : {} > INT37
.int38 : {} > INT38
.int39 : {} > INT39
.int40 : {} > INT40
RTC : { * ( .int41 ) } > INT41 type = VECT_INIT
PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT
USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT
USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT
USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT
USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT
PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT
TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT
TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT
DMA : { * ( .int50 ) } > INT50 type = VECT_INIT
USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT
USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT
TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT
TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT
ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT
USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT
USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT
WDT : { * ( .int58 ) } > INT58 type = VECT_INIT
TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT
TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT
UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT
SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT
.reset : {} > RESET /* MSP430 Reset vector */
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
-l msp430f5438a.cmd

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//
// Telemetry
//
// Modified by Erik in 2010-2011
//
/* Modifications for 2013 by B. Bazuin
* - 2013v1
* - reworked to operate continuously with CAN at 250 kbps
* - no USB device code included
* - no ADC code
* - table values collected only the first time captured
* - 2014V2 MODIFICATIONS
* - Reordered and eliminated some messages
* - HF rate 10 sec, LF rate 30 sec, ST rate 60 sec
* - BP_PCDONE and BP_ISH added
* - Precharge Controller Removed
*/
/* Modifications for 2016 by B. Bazuin
* -New BPS and Array Controller
*
*/
#include "Sunseeker2021.h"
// structures
message_fifo decode_queue;
char_fifo USB_FIFO, MODEM_FIFO;
hf_packet pckHF;
lf_packet pckLF;
status_packet pckST;
unsigned volatile char forceread;
unsigned int can_mask0, can_mask1;
enum MODE {INIT, CANREAD, DECODE, MODEMTX, USBTX, LOWP, LOOP} ucMODE;
unsigned volatile char can_status_test, can_rcv_status_test;
unsigned long can_msg_count = 0, can_stall_cnt = 0;
unsigned long can_err_count = 0, can_read_cnt = 0;
int thrs, tmin, tsec;
char ucFLAG,usbENABLE;
char CAN1_INT_FLAG = FALSE;
volatile unsigned char status_flag = FALSE;
volatile unsigned char hs_comms_flag = FALSE;
volatile unsigned char ls_comms_flag = FALSE;
volatile unsigned char st_comms_flag = FALSE;
static char init_msg_data[21] = "0xHHHHHHHH,0xHHHHHHHH";
// General Variables
// CAN Communication Variables
volatile unsigned char cancomm_flag = FALSE; //used for CAN transmission timing
volatile unsigned char send_can = FALSE; //used for CAN transmission timing
volatile unsigned char rcv_can = FALSE; //used for CAN transmission timing
volatile unsigned char can_full = FALSE; //used for CAN transmission status
int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
_DINT(); //disables interrupts
clock_init(); //Configure HF and LF clocks
delay();
timerB_init(); //init timer B
delay();
io_init();
delay();
MODEM_init();
delay();
MODEM_command(RFModemS);
_EINT(); //enable global interrupts
ucMODE = INIT;
while(1)
{
if(status_flag){
status_flag = FALSE;
P8OUT ^= BIT3; // Toggle P1.0
P8OUT ^= BIT6; // Toggle P1.0
}
// __delay_cycles(100000); // Delay
}
return 0;
}
/*
* Initialise Timer B
* - Provides timer tick timebase at 100 Hz
*/
void timerB_init( void )
{
TBCTL = CNTL_0 | TBSSEL_1 | ID_3 | TBCLR; // ACLK/8, clear TBR
TBCCR0 = (ACLK_RATE/8/TICK_RATE); // Set timer to count to this value = TICK_RATE overflow
TBCCTL0 = CCIE; // Enable CCR0 interrrupt
TBCTL |= MC_1; // Set timer to 'up' count mode
}
/*
* Timer B CCR0 Interrupt Service Routine
* - Interrupts on Timer B CCR0 match at 10Hz
* - Sets Time_Flag variable
*/
/*
* GNU interropt symantics
* interrupt(TIMERB0_VECTOR) timer_b0(void)
*/
#pragma vector = TIMERB0_VECTOR
__interrupt void timer_b0(void)
{
static unsigned int status_count = TELEM_STATUS_COUNT;
static unsigned int hs_comms_count = HS_COMMS_SPEED;
static unsigned int ls_comms_count = LS_COMMS_SPEED;
static unsigned int st_comms_count = ST_COMMS_SPEED;
if (ucMODE != INIT)
{
// Trigger comms events (hs command packet transmission)
hs_comms_count--;
if( hs_comms_count == 0 ){
hs_comms_count = HS_COMMS_SPEED;
hs_comms_flag = TRUE;
}
ls_comms_count--;
if( ls_comms_count == 0 ){
ls_comms_count = LS_COMMS_SPEED;
ls_comms_flag = TRUE;
}
st_comms_count--;
if( st_comms_count == 0 ){
st_comms_count = ST_COMMS_SPEED;
st_comms_flag = TRUE;
}
}
// Primary System Heart beat
status_count--;
if( status_count == 0 )
{
status_count = TELEM_STATUS_COUNT;
status_flag = TRUE;
}
}

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//
// Telemetry Messgae FIFO
//
#include "Sunseeker2021.h"
void message_fifo_INIT(void)
{
can_message *temptestPt;
temptestPt = &decode_queue.msg_fifo[0];
decode_queue.PutPt = temptestPt;
decode_queue.GetPt = temptestPt;
}
int message_fifo_PUT(message_fifo *queue, can_message toPut)
{
can_message *tempPt;
tempPt = queue->PutPt;
*(tempPt++) = toPut;
if(tempPt == &queue->msg_fifo[msg_fifo_size])
{
tempPt = &queue->msg_fifo[0]; //need to wrap around
}
if(tempPt == queue->GetPt)
{
return(0); //Failure FIFO Full
}
else
{
queue->PutPt = tempPt;
return(1); //successful
}
}
int message_fifo_GET(message_fifo *queue, can_message *toGet)
{
if(queue->PutPt == queue->GetPt)
{
return(0); //failure FIFO empty
}
else
{
*toGet = *(queue->GetPt++);
if(queue->GetPt == &queue->msg_fifo[msg_fifo_size])
{
queue->GetPt = &queue->msg_fifo[0]; //need to wrap around
}
return(1);
}
}
int message_fifo_STAT(message_fifo *queue)
{
return (queue->GetPt != queue->PutPt);
}

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#ifndef message_FIFO_H
#define message_FIFO_H
#ifndef msg_fifo_size
#define msg_fifo_size 16
#endif
//structure to hold an individual message for a can frame
typedef struct _can_message
{
unsigned int status;
unsigned int address;
char data[8];
} can_message;
//structure to hold incoming can messages before decoding
typedef struct _message_fifo
{
can_message msg_fifo[msg_fifo_size];
can_message *PutPt;
can_message *GetPt;
} message_fifo;
//public structure
extern message_fifo decode_queue;
//public functions
extern void message_fifo_INIT(void);
extern int message_fifo_PUT(message_fifo *queue, can_message toPut);
extern int message_fifo_GET(message_fifo *queue, can_message *toGet);
extern int message_fifo_STAT(message_fifo *queue);
#endif

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Telem_Debug/Debug2/targetConfigs/MSP430F5438A.ccxml Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="configuration_0">
<instance XML_version="1.2" desc="TI MSP430 USB1" href="connections/TIMSP430-USB.xml" id="TI MSP430 USB1" xml="TIMSP430-USB.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="TI MSP430 USB1">
<instance XML_version="1.2" href="drivers/msp430_emu.xml" id="drivers" xml="msp430_emu.xml" xmlpath="drivers"/>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="MSP430F5438A" href="devices/MSP430F5438A.xml" id="MSP430F5438A" xml="MSP430F5438A.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>

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The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based
on the device and connection settings specified in your project on the Properties > General page.
Please note that in automatic target-configuration management, changes to the project's device and/or
connection settings will either modify an existing or generate a new target-configuration file. Thus,
if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively,
you may create your own target-configuration file for this project and manage it manually. You can
always switch back to automatic target-configuration management by checking the "Manage the project's
target-configuration automatically" checkbox on the project's Properties > General page.