diff --git a/Telem_Debug/Debug_RTC/usci.c b/Telem_Debug/Debug_RTC/usci.c
index 029857b..208e786 100644
--- a/Telem_Debug/Debug_RTC/usci.c
+++ b/Telem_Debug/Debug_RTC/usci.c
@@ -147,15 +147,31 @@ void usci_B1_init(void){
     /*************************************************************************/
 
 void usci_B2_init(void){
-    UCB2CTL1 |= UCSWRST;                                                        // Software Reset Enable - Set high, disabling the USCI module; Changes to USCI configuration registers can only be made when the UCSWRST bit = 1
+    UCB2CTL1 |= UCSWRST;                                                        // Software Reset Enabled - Set high, disabling the USCI module; Changes to USCI configuration registers can only be made when the UCSWRST bit = 1
     UCB2CTL0 &= ~UCA10;                                                         // Use 7-bit addressing mode for itself
     UCB2CTL0 &= ~UCSLA10;                                                       // Use 7-bit addressing mode for slaves
     UCB2CTL0 &= ~UCMM;                                                          // Single-master environment only
     UCB2CTL0 |= UCMST;                                                          // Master mode selected
     UCB2CTL0 |= UCMODE_3;                                                       // I2C mode selected for the USCI
-    UCB2CTL1 |= UCSSEL__SMCLK;                                                  // Use SMCLK as the USCi's clock source
+    UCB2CTL0 |= UCSYNC;                                                         // Synchronous Mode Enabled
+    UCB2CTL1 |= UCSSEL__SMCLK;                                                  // SMCLK selected as clock source
+    UCB2CTL1 |= UCTR;                                                           // Set as Transmitter
+    UCB2CTL1 &= ~UCTXNACK;                                                      // Acknowledge normally, do not generate NACK
+    UCB2CTL1 &= ~UCTXSTP;                                                       // Do not generate STOP condition
+    UCB2CTL1 &= ~UCTXSTT;                                                       // Do not generate START condition
+    UCB2BRW = 25;                                                               // Prescaler for baud rate set to 25
 }
 
+void usci_B2_enable(void){
+    UCB2CTL1 &= ~UCSWRST;                                                       // Software Reset Disabled - Set low, enabling the USCI module
+}
+
+void usci_B2_disable(void){
+    UCB2CTL1 |= UCSWRST;                                                        // Software Reset Enabled - Set high, disabling the USCI module
+}
+
+
+
     /*************************************************************************/
     /******************************** USCI B3 ********************************/
     /*************************************************************************/
diff --git a/Telem_Debug/Debug_RTC/usci.h b/Telem_Debug/Debug_RTC/usci.h
index 088a0d8..c904f7e 100644
--- a/Telem_Debug/Debug_RTC/usci.h
+++ b/Telem_Debug/Debug_RTC/usci.h
@@ -20,7 +20,7 @@ void usci_A1_init(void);
  * USCI A2 Initialization [UART Mode]
  *
  * The FTDI FT230XS-R that was selected can handle up to 3 Mbaud, so we'll target 1 Mbaud
- * The SMCLK is currently at 10 MHz
+ * The SMCLK is currently set to 10 MHz
  *
  * Using the "MSP430 USCI/EUSCI UART Baud Rate Calculation" tool at:
  * http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
@@ -59,9 +59,16 @@ void usci_B1_init(void);
  *
  * The Microchip Technology MCP7940M supports up to 400 kHz I2C communication.
  *
+ * The SMCLK is currently set to 10 MHz
+ * 10 MHz / 25 = 400 kHz
+ * Therefore, the prescaler needs to be set to 25
  */
 void usci_B2_init(void);
 
+void usci_B2_enable(void);
+
+void usci_B2_disable(void);
+
 void usci_B3_init(void);
 
 #endif /* USCI_H_ */