diff --git a/lab2CA.srcs/sources_1/new/ALU.v b/lab2CA.srcs/sources_1/new/ALU.v
index ed0435b..9d5deb4 100644
--- a/lab2CA.srcs/sources_1/new/ALU.v
+++ b/lab2CA.srcs/sources_1/new/ALU.v
@@ -11,17 +11,40 @@ module ALU(
     wire [8:0] result_A,result_B,result_C,result_D,result_E,result_F,result_G,result_H;
     
     // A (000) - Add
-    adder_9bit(
+    add_9bit add0(
         .A(operand0),
         .B(operand1),
         .Cin(1'b0),
         .Sum(result_A));
     // B (001) - Subtract
+    sub_9bit sub0(
+        .A(operand0),
+        .B(operand1),
+        .C(result_B));
     // C (010) - OR
+    or_9bit or0(
+        .A(operand0),
+        .B(operand1),
+        .C(result_C));
     // D (011) - NOR
+    nor_9bit nor0(
+        .A(operand0),
+        .B(operand1),
+        .C(result_D));
     // E (100) - AND
+    and_9bit and0(
+        .A(operand0),
+        .B(operand1),
+        .Cin(1'b0),
+        .Sum(result_E));
     // F (101) - Shift Logical Left
+    shift_logical_left sll(
+        .A(operand0),
+        .B(result_F));
     // G (110) - Shift Logical Right
+    shift_logical_right slr(
+        .A(operand0),
+        .B(result_G));
     // H (111)