diff --git a/lab2CA.cache/wt/webtalk_pa.xml b/lab2CA.cache/wt/webtalk_pa.xml index 68c22ae..103fcfd 100644 --- a/lab2CA.cache/wt/webtalk_pa.xml +++ b/lab2CA.cache/wt/webtalk_pa.xml @@ -3,7 +3,7 @@ - +
@@ -35,14 +35,14 @@ This means code written to parse this file will need to be revisited each subseq - - + + - + @@ -64,14 +64,14 @@ This means code written to parse this file will need to be revisited each subseq - + - + - - - + + + @@ -102,7 +102,7 @@ This means code written to parse this file will need to be revisited each subseq - + @@ -126,9 +126,9 @@ This means code written to parse this file will need to be revisited each subseq - + - + @@ -140,7 +140,7 @@ This means code written to parse this file will need to be revisited each subseq - + @@ -153,11 +153,11 @@ This means code written to parse this file will need to be revisited each subseq - + - + @@ -166,29 +166,29 @@ This means code written to parse this file will need to be revisited each subseq - - + + - + - + - + - +
diff --git a/lab2CA.runs/synth_1/gen_run.xml b/lab2CA.runs/synth_1/gen_run.xml index fbd2015..1fb9d36 100644 --- a/lab2CA.runs/synth_1/gen_run.xml +++ b/lab2CA.runs/synth_1/gen_run.xml @@ -3,8 +3,6 @@ - - diff --git a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl index 3d5902e..00b7f5f 100644 --- a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl +++ b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl @@ -1,10 +1,10 @@ -webtalk_init -webtalk_dir C:/REPOSITORIES/Educational/Western Michigan University/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/ +webtalk_init -webtalk_dir C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/ webtalk_register_client -client project -webtalk_add_data -client project -key date_generated -value "Sun Mar 24 19:25:23 2019" -context "software_version_and_target_device" +webtalk_add_data -client project -key date_generated -value "Sun Mar 24 19:55:57 2019" -context "software_version_and_target_device" webtalk_add_data -client project -key product_version -value "XSIM v2018.3 (64-bit)" -context "software_version_and_target_device" webtalk_add_data -client project -key build_version -value "2405991" -context "software_version_and_target_device" webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device" -webtalk_add_data -client project -key registration_id -value "" -context "software_version_and_target_device" +webtalk_add_data -client project -key registration_id -value "174150793_174150794_210688225_140" -context "software_version_and_target_device" webtalk_add_data -client project -key tool_flow -value "xsim_vivado" -context "software_version_and_target_device" webtalk_add_data -client project -key beta -value "FALSE" -context "software_version_and_target_device" webtalk_add_data -client project -key route_design -value "FALSE" -context "software_version_and_target_device" @@ -12,21 +12,21 @@ webtalk_add_data -client project -key target_family -value "not_applicable" -con webtalk_add_data -client project -key target_device -value "not_applicable" -context "software_version_and_target_device" webtalk_add_data -client project -key target_package -value "not_applicable" -context "software_version_and_target_device" webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device" -webtalk_add_data -client project -key random_id -value "f67bb5263bf851bf9c1beaa84fe1017c" -context "software_version_and_target_device" +webtalk_add_data -client project -key random_id -value "4e917e26-7591-4435-9135-15bd446b0238" -context "software_version_and_target_device" webtalk_add_data -client project -key project_id -value "0a5803efda44405bb28bbf43ba22e808" -context "software_version_and_target_device" -webtalk_add_data -client project -key project_iteration -value "48" -context "software_version_and_target_device" +webtalk_add_data -client project -key project_iteration -value "138" -context "software_version_and_target_device" webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment" webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment" -webtalk_add_data -client project -key cpu_name -value "Intel(R) Core(TM) i7-3630QM CPU @ 2.40GHz" -context "user_environment" -webtalk_add_data -client project -key cpu_speed -value "2395 MHz" -context "user_environment" +webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" -context "user_environment" +webtalk_add_data -client project -key cpu_speed -value "3492 MHz" -context "user_environment" webtalk_add_data -client project -key total_processors -value "1" -context "user_environment" -webtalk_add_data -client project -key system_ram -value "17.000 GB" -context "user_environment" +webtalk_add_data -client project -key system_ram -value "34.000 GB" -context "user_environment" webtalk_register_client -client xsim webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command_line_options" webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage" -webtalk_add_data -client xsim -key runtime -value "50020 ns" -context "xsim\\usage" +webtalk_add_data -client xsim -key runtime -value "50015 ns" -context "xsim\\usage" webtalk_add_data -client xsim -key iteration -value "0" -context "xsim\\usage" -webtalk_add_data -client xsim -key Simulation_Time -value "0.30_sec" -context "xsim\\usage" -webtalk_add_data -client xsim -key Simulation_Memory -value "9684_KB" -context "xsim\\usage" -webtalk_transmit -clientid 3966238694 -regid "" -xml C:/REPOSITORIES/Educational/Western Michigan University/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/REPOSITORIES/Educational/Western Michigan University/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/REPOSITORIES/Educational/Western Michigan University/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "

XSIM Usage Report


" +webtalk_add_data -client xsim -key Simulation_Time -value "0.25_sec" -context "xsim\\usage" +webtalk_add_data -client xsim -key Simulation_Memory -value "7896_KB" -context "xsim\\usage" +webtalk_transmit -clientid 2553943341 -regid "174150793_174150794_210688225_140" -xml C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "

XSIM Usage Report


" webtalk_terminate diff --git a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem index a211095..8c73c77 100644 Binary files a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem and b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem differ diff --git a/lab2CA.sim/sim_1/behav/xsim/xvlog.pb b/lab2CA.sim/sim_1/behav/xsim/xvlog.pb index 912913c..cb4f1a0 100644 Binary files a/lab2CA.sim/sim_1/behav/xsim/xvlog.pb and b/lab2CA.sim/sim_1/behav/xsim/xvlog.pb differ diff --git a/lab2CA.srcs/sources_1/new/BasicModules.v b/lab2CA.srcs/sources_1/new/BasicModules.v index d033266..4f274be 100644 --- a/lab2CA.srcs/sources_1/new/BasicModules.v +++ b/lab2CA.srcs/sources_1/new/BasicModules.v @@ -850,6 +850,40 @@ module register_tb(); end endmodule +module fDPipReg( + input wire clk, + input wire reset, + input wire En, + input wire [42:0] Din, + output reg [42:0] Dout); + + always @(posedge clk) begin + if (reset == 1'b1) begin + Dout <= 23'b0000; + end + else if (En == 1'b0) begin + Dout <= Din; + end + end +endmodule + +module eMPipReg( + input wire clk, + input wire reset, + input wire En, + input wire [42:0] Din, + output reg [42:0] Dout); + + always @(posedge clk) begin + if (reset == 1'b1) begin + Dout <= 23'b0000; + end + else if (En == 1'b0) begin + Dout <= Din; + end + end +endmodule + module shift_left( input wire [8:0] A, output wire [8:0] B); diff --git a/lab2CA.srcs/sources_1/new/dataMemory.v b/lab2CA.srcs/sources_1/new/dataMemory.v index 04644fd..147b49d 100644 --- a/lab2CA.srcs/sources_1/new/dataMemory.v +++ b/lab2CA.srcs/sources_1/new/dataMemory.v @@ -10,8 +10,8 @@ module dataMemory( initial begin //Equation Solver Memory - memory[0] <= 9'b000000001; - memory[1] <= 9'b000000010; +// memory[0] <= 9'b000000001; +// memory[1] <= 9'b000000010; // String Compare Memory // memory[0] <= 9'b000000100; diff --git a/lab2CA.srcs/sources_1/new/instructionMemory.v b/lab2CA.srcs/sources_1/new/instructionMemory.v index c7cc954..83b3e27 100644 --- a/lab2CA.srcs/sources_1/new/instructionMemory.v +++ b/lab2CA.srcs/sources_1/new/instructionMemory.v @@ -10,15 +10,15 @@ module instructionMemory( initial begin //Equation Solver - memory[0] <= 9'b000000000; - memory[1] <= 9'b011000000; //add0 - memory[1] <= 9'b011001001; //add1 - memory[1] <= 9'b000100000; //load - memory[2] <= 9'b000101000; //load - memory[3] <= 9'b010100010; //add - memory[4] <= 9'b111100000; //shift left - memory[5] <= 9'b111100000; //shift left - memory[6] <= 9'b000000000; //halt +// memory[0] <= 9'b000000000; +// memory[1] <= 9'b011000000; //add0 +// memory[1] <= 9'b011001001; //add1 +// memory[1] <= 9'b000100000; //load +// memory[2] <= 9'b000101000; //load +// memory[3] <= 9'b010100010; //add +// memory[4] <= 9'b111100000; //shift left +// memory[5] <= 9'b111100000; //shift left +// memory[6] <= 9'b000000000; //halt // //Testing all instructions // memory[6] <= 9'b010100011; //sub diff --git a/lab2CA.xpr b/lab2CA.xpr index b288b98..202a4e9 100644 --- a/lab2CA.xpr +++ b/lab2CA.xpr @@ -3,7 +3,7 @@ - + + + + + + + + +