diff --git a/lab2CA.cache/wt/webtalk_pa.xml b/lab2CA.cache/wt/webtalk_pa.xml index d7c1572..dd80781 100644 --- a/lab2CA.cache/wt/webtalk_pa.xml +++ b/lab2CA.cache/wt/webtalk_pa.xml @@ -3,10 +3,10 @@ - +
- +
@@ -17,25 +17,25 @@ This means code written to parse this file will need to be revisited each subseq - - + + - - - + + + - + - - + + @@ -43,8 +43,8 @@ This means code written to parse this file will need to be revisited each subseq - - + + @@ -52,26 +52,26 @@ This means code written to parse this file will need to be revisited each subseq - - - + + + - - - + + + - + - - + + - + @@ -84,11 +84,11 @@ This means code written to parse this file will need to be revisited each subseq - + - + @@ -97,18 +97,16 @@ This means code written to parse this file will need to be revisited each subseq - - - - - - + + + + - + @@ -116,10 +114,9 @@ This means code written to parse this file will need to be revisited each subseq - - + - + @@ -127,10 +124,10 @@ This means code written to parse this file will need to be revisited each subseq - + - - + + @@ -138,34 +135,39 @@ This means code written to parse this file will need to be revisited each subseq + - - + + - + - - + - - + + - + - + - + + + + + +
diff --git a/lab2CA.runs/impl_1/gen_run.xml b/lab2CA.runs/impl_1/gen_run.xml index b1887da..063b89e 100644 --- a/lab2CA.runs/impl_1/gen_run.xml +++ b/lab2CA.runs/impl_1/gen_run.xml @@ -1,74 +1,55 @@ - + - - - - - - - - - - - - - - - - + + + - - - - - - - - + - - + - - - - + - - - - - - - - - - - - + + + + + + + + + + + + + + + + + diff --git a/lab2CA.runs/synth_1/gen_run.xml b/lab2CA.runs/synth_1/gen_run.xml index f07d47e..f4a1049 100644 --- a/lab2CA.runs/synth_1/gen_run.xml +++ b/lab2CA.runs/synth_1/gen_run.xml @@ -1,14 +1,11 @@ - + - + - - - diff --git a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl index d825740..2c7f553 100644 --- a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl +++ b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl @@ -1,10 +1,10 @@ -webtalk_init -webtalk_dir C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/ +webtalk_init -webtalk_dir C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/ webtalk_register_client -client project -webtalk_add_data -client project -key date_generated -value "Sun Mar 24 12:08:19 2019" -context "software_version_and_target_device" +webtalk_add_data -client project -key date_generated -value "Sun Mar 24 14:11:52 2019" -context "software_version_and_target_device" webtalk_add_data -client project -key product_version -value "XSIM v2018.3 (64-bit)" -context "software_version_and_target_device" webtalk_add_data -client project -key build_version -value "2405991" -context "software_version_and_target_device" webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device" -webtalk_add_data -client project -key registration_id -value "" -context "software_version_and_target_device" +webtalk_add_data -client project -key registration_id -value "174150793_174150794_210688225_140" -context "software_version_and_target_device" webtalk_add_data -client project -key tool_flow -value "xsim_vivado" -context "software_version_and_target_device" webtalk_add_data -client project -key beta -value "FALSE" -context "software_version_and_target_device" webtalk_add_data -client project -key route_design -value "FALSE" -context "software_version_and_target_device" @@ -12,21 +12,21 @@ webtalk_add_data -client project -key target_family -value "not_applicable" -con webtalk_add_data -client project -key target_device -value "not_applicable" -context "software_version_and_target_device" webtalk_add_data -client project -key target_package -value "not_applicable" -context "software_version_and_target_device" webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device" -webtalk_add_data -client project -key random_id -value "17336daf-0d92-4f07-b4a4-ff1c52043edb" -context "software_version_and_target_device" +webtalk_add_data -client project -key random_id -value "4e917e26-7591-4435-9135-15bd446b0238" -context "software_version_and_target_device" webtalk_add_data -client project -key project_id -value "0a5803efda44405bb28bbf43ba22e808" -context "software_version_and_target_device" -webtalk_add_data -client project -key project_iteration -value "81" -context "software_version_and_target_device" +webtalk_add_data -client project -key project_iteration -value "60" -context "software_version_and_target_device" webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment" webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment" -webtalk_add_data -client project -key cpu_name -value "Intel(R) Core(TM) i5-3230M CPU @ 2.60GHz" -context "user_environment" -webtalk_add_data -client project -key cpu_speed -value "2594 MHz" -context "user_environment" +webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" -context "user_environment" +webtalk_add_data -client project -key cpu_speed -value "3492 MHz" -context "user_environment" webtalk_add_data -client project -key total_processors -value "1" -context "user_environment" -webtalk_add_data -client project -key system_ram -value "8.000 GB" -context "user_environment" +webtalk_add_data -client project -key system_ram -value "34.000 GB" -context "user_environment" webtalk_register_client -client xsim webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command_line_options" webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage" webtalk_add_data -client xsim -key runtime -value "515 ns" -context "xsim\\usage" webtalk_add_data -client xsim -key iteration -value "0" -context "xsim\\usage" -webtalk_add_data -client xsim -key Simulation_Time -value "0.05_sec" -context "xsim\\usage" -webtalk_add_data -client xsim -key Simulation_Memory -value "5776_KB" -context "xsim\\usage" -webtalk_transmit -clientid 2651684860 -regid "" -xml C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "

XSIM Usage Report


" +webtalk_add_data -client xsim -key Simulation_Time -value "0.08_sec" -context "xsim\\usage" +webtalk_add_data -client xsim -key Simulation_Memory -value "6364_KB" -context "xsim\\usage" +webtalk_transmit -clientid 346626644 -regid "174150793_174150794_210688225_140" -xml C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "

XSIM Usage Report


" webtalk_terminate diff --git a/lab2CA.sim/sim_1/behav/xsim/xvlog.pb b/lab2CA.sim/sim_1/behav/xsim/xvlog.pb index b155e40..8eae0ad 100644 Binary files a/lab2CA.sim/sim_1/behav/xsim/xvlog.pb and b/lab2CA.sim/sim_1/behav/xsim/xvlog.pb differ diff --git a/lab2CA.srcs/sources_1/new/dataMemory.v b/lab2CA.srcs/sources_1/new/dataMemory.v index 60f1479..bfc0d48 100644 --- a/lab2CA.srcs/sources_1/new/dataMemory.v +++ b/lab2CA.srcs/sources_1/new/dataMemory.v @@ -9,17 +9,18 @@ module dataMemory( reg [8:0] memory [15:0]; initial begin - memory[0] <= 9'b000000000; - memory[1] <= 9'b000000000; - memory[2] <= 9'b000000000; - memory[3] <= 9'b000000000; - memory[4] <= 9'b000000000; - memory[5] <= 9'b000000000; - memory[6] <= 9'b000000000; + // String Compare Memory + memory[0] <= 9'b000000100; + memory[1] <= 9'b000001000; + memory[2] <= 9'b000001100; + memory[3] <= 9'b010101010; + memory[4] <= 9'b000001111; + memory[5] <= 9'b000000100; + memory[6] <= 9'b000000011; memory[7] <= 9'b000000000; - memory[8] <= 9'b000000000; - memory[9] <= 9'b000000000; - memory[10] <= 9'b000000000; + memory[8] <= 9'b000001111; + memory[9] <= 9'b000000100; + memory[10] <= 9'b000000010; memory[11] <= 9'b000000000; memory[12] <= 9'b000000000; memory[13] <= 9'b000000000; diff --git a/lab2CA.srcs/sources_1/new/instructionMemory.v b/lab2CA.srcs/sources_1/new/instructionMemory.v index ca5612d..9bac97a 100644 --- a/lab2CA.srcs/sources_1/new/instructionMemory.v +++ b/lab2CA.srcs/sources_1/new/instructionMemory.v @@ -10,40 +10,70 @@ module instructionMemory( initial begin //Equation Solver +// memory[0] <= 9'b000000000; +// memory[1] <= 9'b000100000; //load +// memory[2] <= 9'b000101000; //load +// memory[3] <= 9'b010100010; //add +// memory[4] <= 9'b111100000; //shift left +// memory[5] <= 9'b111100000; //shift left + +// //Testing all instructions +// memory[6] <= 9'b010100011; //sub +// memory[7] <= 9'b011001011; //addi +// memory[8] <= 9'b011110000; //slt +// memory[9] <= 9'b110111000; //nor +// memory[10] <= 9'b111011000; //or +// memory[11] <= 9'b111011001; //and +// memory[12] <= 9'b111111000; //sll +// memory[13] <= 9'b111111001; //srl +// // memory[14] <= 9'b100100010; //j +// memory[14] <= 9'b010001000; //zero +// memory[15] <= 9'b110001101; //beq +// memory[16] <= 9'b100001000; //jr +// memory[17] <= 9'b100111100; //j + + + //String Compare memory[0] <= 9'b000000000; - memory[1] <= 9'b000100000; //load - memory[2] <= 9'b000101000; //load - memory[3] <= 9'b010100010; //add - memory[4] <= 9'b111100000; //shift left - memory[5] <= 9'b111100000; //shift left - - //Testing all instructions - memory[6] <= 9'b010100011; //sub - memory[7] <= 9'b011001011; //addi - memory[8] <= 9'b011110000; //slt - memory[9] <= 9'b110111000; //nor - memory[10] <= 9'b111011000; //or - memory[11] <= 9'b111011001; //and - memory[12] <= 9'b111111000; //sll - //memory[13] <= 9'b111111001; //srl - //------------------------------ - memory[13] <= 9'b010000000; //zero - memory[14] <= 9'b011000011; //addi - memory[15] <= 9'b101000000; //banks - memory[16] <= 9'b010000000; //zero - memory[17] <= 9'b101000001; //bankl - memory[18] <= 9'b010000000; //zero - memory[19] <= 9'b101000000; //banks - // memory[14] <= 9'b100100010; //j - //memory[18] <= 9'b010001000; //zero - //memory[19] <= 9'b110001101; //beq - //memory[20] <= 9'b100001000; //jr - - - - - //memory[17] <= 9'b100111100; //j - memory[20] <= 9'b000000000; + memory[1] <= 9'b010000000; + memory[2] <= 9'b010001000; + memory[3] <= 9'b010010000; + memory[4] <= 9'b010011000; + memory[5] <= 9'b000100000; + memory[6] <= 9'b011001001; + memory[7] <= 9'b000101010; + memory[8] <= 9'b011010010; + memory[9] <= 9'b000110100; + memory[10] <= 9'b011011011; + memory[11] <= 9'b000111110; + memory[12] <= 9'b101010000; + memory[13] <= 9'b101000010; + memory[14] <= 9'b101010100; + memory[15] <= 9'b101011110; //ends initialization + memory[16] <= 9'b101000011; + memory[17] <= 9'b101001101; + memory[18] <= 9'b000110000; + memory[19] <= 9'b000111010; + memory[20] <= 9'b110010001; + memory[21] <= 9'b100100001; + memory[22] <= 9'b100110000; + memory[23] <= 9'b110011001; + memory[24] <= 9'b100100001; + memory[25] <= 9'b100101101; + memory[26] <= 9'b011000001; + memory[27] <= 9'b011001001; + memory[28] <= 9'b101000010; + memory[29] <= 9'b101001100; + memory[30] <= 9'b010110111; + memory[31] <= 9'b110010001; + memory[32] <= 9'b101110010; + memory[33] <= 9'b101000000; + memory[34] <= 9'b101001110; + memory[35] <= 9'b001001000; + memory[36] <= 9'b011000001; + memory[37] <= 9'b101000000; + memory[38] <= 9'b101111000; + memory[39] <= 9'b000000000; end