diff --git a/lab2CA.srcs/sources_1/new/dataMemory.v b/lab2CA.srcs/sources_1/new/dataMemory.v
index 05c4b77..a39032f 100644
--- a/lab2CA.srcs/sources_1/new/dataMemory.v
+++ b/lab2CA.srcs/sources_1/new/dataMemory.v
@@ -239,14 +239,12 @@ module dataMemory(
 
     end
 
-    always @ (address, clk, memory) begin
-        if(clk == 1'b1)begin
+    always @ (posedge clk)
+    begin
+        if(writeEnable == 1'b1)
+            memory[address] <= writeData;
+        else
             readData <= memory[address];
-            if(writeEnable == 1'b1)
-                memory[address] <= writeData;
-            else
-                memory[address] <= memory[address];
-        end
     end      
 endmodule