From 39b9ea781e4eaa8755f2079de869bfe33a17718a Mon Sep 17 00:00:00 2001 From: WilliamMiceli Date: Mon, 25 Feb 2019 13:28:28 -0500 Subject: [PATCH] Removed MUX 16:1 as it's not needed --- lab2CA.srcs/sources_1/new/BasicModules.v | 29 ------------------------ 1 file changed, 29 deletions(-) diff --git a/lab2CA.srcs/sources_1/new/BasicModules.v b/lab2CA.srcs/sources_1/new/BasicModules.v index 9e3a5d7..328f5c7 100644 --- a/lab2CA.srcs/sources_1/new/BasicModules.v +++ b/lab2CA.srcs/sources_1/new/BasicModules.v @@ -494,35 +494,6 @@ module mux_8_1_tb(); end endmodule -module mux_16_1( - input wire [3:0] switch, - input wire [8:0] A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P, - output reg [8:0] out); - - always @(A,B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,switch) begin - case (switch) - 4'b0000 : out = A; - 4'b0001 : out = B; - 4'b0010 : out = C; - 4'b0011 : out = D; - 4'b0100 : out = E; - 4'b0101 : out = F; - 4'b0110 : out = G; - 4'b0111 : out = H; - 4'b1000 : out = I; - 4'b1001 : out = J; - 4'b1010 : out = K; - 4'b1011 : out = L; - 4'b1100 : out = M; - 4'b1101 : out = N; - 4'b1110 : out = O; - 4'b1111 : out = P; - default : out = 9'bxxxxxxxxx; - endcase - end - -endmodule - module nor_1bit( input wire A, input wire B,