diff --git a/lab2CA.runs/.jobs/vrs_config_23.xml b/lab2CA.runs/.jobs/vrs_config_23.xml
new file mode 100644
index 0000000..955267b
--- /dev/null
+++ b/lab2CA.runs/.jobs/vrs_config_23.xml
@@ -0,0 +1,11 @@
+<?xml version="1.0"?>
+<Runs Version="1" Minor="0">
+	<Run Id="synth_1" LaunchDir="C:/Users/JoseIgnacio/CA Lab/lab2CA.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>
+	<Run Id="impl_1" LaunchDir="C:/Users/JoseIgnacio/CA Lab/lab2CA.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="route_design">
+		<Parent Id="synth_1"/>
+	</Run>
+	<Parameters>
+		<Parameter Name="runs.monitorLSFJobs" Val="true" Type="bool"/>
+	</Parameters>
+</Runs>
+
diff --git a/lab2CA.sim/sim_1/behav/xsim/webtalk_10344.backup.jou b/lab2CA.sim/sim_1/behav/xsim/webtalk_10344.backup.jou
new file mode 100644
index 0000000..d926d13
--- /dev/null
+++ b/lab2CA.sim/sim_1/behav/xsim/webtalk_10344.backup.jou
@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.3 (64-bit)
+# SW Build 2405991 on Thu Dec  6 23:38:27 MST 2018
+# IP Build 2404404 on Fri Dec  7 01:43:56 MST 2018
+# Start of session at: Wed Feb 20 11:30:13 2019
+# Process ID: 10344
+# Current directory: C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/regFile_tb_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/regFile_tb_behav/webtalk/xsim_webtalk.tcl -notrace
diff --git a/lab2CA.sim/sim_1/behav/xsim/webtalk_6516.backup.jou b/lab2CA.sim/sim_1/behav/xsim/webtalk_6516.backup.jou
new file mode 100644
index 0000000..4eb8fc3
--- /dev/null
+++ b/lab2CA.sim/sim_1/behav/xsim/webtalk_6516.backup.jou
@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.3 (64-bit)
+# SW Build 2405991 on Thu Dec  6 23:38:27 MST 2018
+# IP Build 2404404 on Fri Dec  7 01:43:56 MST 2018
+# Start of session at: Thu Feb 21 14:24:16 2019
+# Process ID: 6516
+# Current directory: C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/regFile_tb_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source C:/Users/JoseIgnacio/CA -notrace
diff --git a/regFile_tb_behav.wcfg b/regFile_tb_behav.wcfg
new file mode 100644
index 0000000..1dbd77a
--- /dev/null
+++ b/regFile_tb_behav.wcfg
@@ -0,0 +1,71 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<wave_config>
+   <wave_state>
+   </wave_state>
+   <db_ref_list>
+      <db_ref path="regFile_tb_behav.wdb" id="1">
+         <top_modules>
+            <top_module name="glbl" />
+            <top_module name="regFile_tb" />
+         </top_modules>
+      </db_ref>
+   </db_ref_list>
+   <zoom_setting>
+      <ZoomStartTime time="0fs"></ZoomStartTime>
+      <ZoomEndTime time="10131fs"></ZoomEndTime>
+      <Cursor1Time time="0fs"></Cursor1Time>
+   </zoom_setting>
+   <column_width_setting>
+      <NameColumnWidth column_width="127"></NameColumnWidth>
+      <ValueColumnWidth column_width="136"></ValueColumnWidth>
+   </column_width_setting>
+   <WVObjectSize size="12" />
+   <wvobject fp_name="/regFile_tb/write_d" type="array">
+      <obj_property name="ElementShortName">write_d[8:0]</obj_property>
+      <obj_property name="ObjectShortName">write_d[8:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/w_idx" type="array">
+      <obj_property name="ElementShortName">w_idx[1:0]</obj_property>
+      <obj_property name="ObjectShortName">w_idx[1:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/op0_idx" type="array">
+      <obj_property name="ElementShortName">op0_idx[1:0]</obj_property>
+      <obj_property name="ObjectShortName">op0_idx[1:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/op1_idx" type="array">
+      <obj_property name="ElementShortName">op1_idx[1:0]</obj_property>
+      <obj_property name="ObjectShortName">op1_idx[1:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/reset" type="logic">
+      <obj_property name="ElementShortName">reset</obj_property>
+      <obj_property name="ObjectShortName">reset</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/op0" type="array">
+      <obj_property name="ElementShortName">op0[8:0]</obj_property>
+      <obj_property name="ObjectShortName">op0[8:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/op1" type="array">
+      <obj_property name="ElementShortName">op1[8:0]</obj_property>
+      <obj_property name="ObjectShortName">op1[8:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/clk" type="logic">
+      <obj_property name="ElementShortName">clk</obj_property>
+      <obj_property name="ObjectShortName">clk</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/regFile0/r0_out" type="array">
+      <obj_property name="ElementShortName">r0_out[8:0]</obj_property>
+      <obj_property name="ObjectShortName">r0_out[8:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/regFile0/r1_out" type="array">
+      <obj_property name="ElementShortName">r1_out[8:0]</obj_property>
+      <obj_property name="ObjectShortName">r1_out[8:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/regFile0/r2_out" type="array">
+      <obj_property name="ElementShortName">r2_out[8:0]</obj_property>
+      <obj_property name="ObjectShortName">r2_out[8:0]</obj_property>
+   </wvobject>
+   <wvobject fp_name="/regFile_tb/regFile0/r3_out" type="array">
+      <obj_property name="ElementShortName">r3_out[8:0]</obj_property>
+      <obj_property name="ObjectShortName">r3_out[8:0]</obj_property>
+   </wvobject>
+</wave_config>