diff --git a/StringCompare.wcfg b/StringCompare.wcfg
new file mode 100644
index 0000000..4b5c25c
--- /dev/null
+++ b/StringCompare.wcfg
@@ -0,0 +1,81 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ clk
+ clk
+
+
+ reset
+ reset
+
+
+ done
+ done
+
+
+ instr[8:0]
+ instr[8:0]
+
+
+
+ AddrOut[8:0]
+ AddrOut[8:0]
+
+
+ r0_out[8:0]
+ r0_out[8:0]
+
+
+ r1_out[8:0]
+ r1_out[8:0]
+
+
+ r2_out[8:0]
+ r2_out[8:0]
+
+
+ r3_out[8:0]
+ r3_out[8:0]
+
+
+ r0_out[8:0]
+ r0_out[8:0]
+
+
+ r1_out[8:0]
+ r1_out[8:0]
+
+
+ r2_out[8:0]
+ r2_out[8:0]
+
+
+ r3_out[8:0]
+ r3_out[8:0]
+
+
+ memory[15:0][8:0]
+ memory[15:0][8:0]
+
+
+
diff --git a/lab2CA.cache/wt/webtalk_pa.xml b/lab2CA.cache/wt/webtalk_pa.xml
index 852d7f4..5dc712a 100644
--- a/lab2CA.cache/wt/webtalk_pa.xml
+++ b/lab2CA.cache/wt/webtalk_pa.xml
@@ -3,7 +3,7 @@
-
+
@@ -17,7 +17,7 @@ This means code written to parse this file will need to be revisited each subseq
-
-
+
@@ -34,7 +34,7 @@ This means code written to parse this file will need to be revisited each subseq
-
+
@@ -46,7 +46,8 @@ This means code written to parse this file will need to be revisited each subseq
-
+
+
@@ -54,45 +55,44 @@ This means code written to parse this file will need to be revisited each subseq
-
-
+
+
-
-
+
-
-
+
+
-
+
-
+
-
+
-
-
+
+
-
+
-
+
-
-
+
+
@@ -111,7 +111,7 @@ This means code written to parse this file will need to be revisited each subseq
-
+
@@ -119,7 +119,7 @@ This means code written to parse this file will need to be revisited each subseq
-
+
@@ -130,7 +130,7 @@ This means code written to parse this file will need to be revisited each subseq
-
+
@@ -139,15 +139,16 @@ This means code written to parse this file will need to be revisited each subseq
-
+
-
+
-
+
+
@@ -160,20 +161,20 @@ This means code written to parse this file will need to be revisited each subseq
-
+
-
+
-
-
+
-
+
diff --git a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
index 7530080..0ede6bd 100644
--- a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
+++ b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
@@ -1,10 +1,10 @@
-webtalk_init -webtalk_dir C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/
+webtalk_init -webtalk_dir C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/
webtalk_register_client -client project
-webtalk_add_data -client project -key date_generated -value "Sun Mar 24 17:29:22 2019" -context "software_version_and_target_device"
+webtalk_add_data -client project -key date_generated -value "Sun Mar 24 17:04:55 2019" -context "software_version_and_target_device"
webtalk_add_data -client project -key product_version -value "XSIM v2018.3 (64-bit)" -context "software_version_and_target_device"
webtalk_add_data -client project -key build_version -value "2405991" -context "software_version_and_target_device"
webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device"
-webtalk_add_data -client project -key registration_id -value "" -context "software_version_and_target_device"
+webtalk_add_data -client project -key registration_id -value "174150793_174150794_210688225_140" -context "software_version_and_target_device"
webtalk_add_data -client project -key tool_flow -value "xsim_vivado" -context "software_version_and_target_device"
webtalk_add_data -client project -key beta -value "FALSE" -context "software_version_and_target_device"
webtalk_add_data -client project -key route_design -value "FALSE" -context "software_version_and_target_device"
@@ -12,21 +12,21 @@ webtalk_add_data -client project -key target_family -value "not_applicable" -con
webtalk_add_data -client project -key target_device -value "not_applicable" -context "software_version_and_target_device"
webtalk_add_data -client project -key target_package -value "not_applicable" -context "software_version_and_target_device"
webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device"
-webtalk_add_data -client project -key random_id -value "17336daf-0d92-4f07-b4a4-ff1c52043edb" -context "software_version_and_target_device"
+webtalk_add_data -client project -key random_id -value "4e917e26-7591-4435-9135-15bd446b0238" -context "software_version_and_target_device"
webtalk_add_data -client project -key project_id -value "0a5803efda44405bb28bbf43ba22e808" -context "software_version_and_target_device"
-webtalk_add_data -client project -key project_iteration -value "98" -context "software_version_and_target_device"
+webtalk_add_data -client project -key project_iteration -value "111" -context "software_version_and_target_device"
webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment"
webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment"
-webtalk_add_data -client project -key cpu_name -value "Intel(R) Core(TM) i5-3230M CPU @ 2.60GHz" -context "user_environment"
-webtalk_add_data -client project -key cpu_speed -value "2594 MHz" -context "user_environment"
+webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" -context "user_environment"
+webtalk_add_data -client project -key cpu_speed -value "3492 MHz" -context "user_environment"
webtalk_add_data -client project -key total_processors -value "1" -context "user_environment"
-webtalk_add_data -client project -key system_ram -value "8.000 GB" -context "user_environment"
+webtalk_add_data -client project -key system_ram -value "34.000 GB" -context "user_environment"
webtalk_register_client -client xsim
webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command_line_options"
webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage"
-webtalk_add_data -client xsim -key runtime -value "520 ns" -context "xsim\\usage"
+webtalk_add_data -client xsim -key runtime -value "870 ns" -context "xsim\\usage"
webtalk_add_data -client xsim -key iteration -value "0" -context "xsim\\usage"
-webtalk_add_data -client xsim -key Simulation_Time -value "0.01_sec" -context "xsim\\usage"
-webtalk_add_data -client xsim -key Simulation_Memory -value "5832_KB" -context "xsim\\usage"
-webtalk_transmit -clientid 567316716 -regid "" -xml C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "XSIM Usage Report
"
+webtalk_add_data -client xsim -key Simulation_Time -value "0.05_sec" -context "xsim\\usage"
+webtalk_add_data -client xsim -key Simulation_Memory -value "6432_KB" -context "xsim\\usage"
+webtalk_transmit -clientid 2385566918 -regid "174150793_174150794_210688225_140" -xml C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "XSIM Usage Report
"
webtalk_terminate
diff --git a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem
index 90fe9b6..b25dad4 100644
Binary files a/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem and b/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem differ
diff --git a/lab2CA.srcs/sources_1/new/CPU9bits.v b/lab2CA.srcs/sources_1/new/CPU9bits.v
index 21a04ec..e16b212 100644
--- a/lab2CA.srcs/sources_1/new/CPU9bits.v
+++ b/lab2CA.srcs/sources_1/new/CPU9bits.v
@@ -190,7 +190,7 @@ module CPU9bits_tb();
reset = 1'b1;
#10
reset = 1'b0;
- #500
+ #850
diff --git a/lab2CA.srcs/sources_1/new/dataMemory.v b/lab2CA.srcs/sources_1/new/dataMemory.v
index d88881c..c35f3d9 100644
--- a/lab2CA.srcs/sources_1/new/dataMemory.v
+++ b/lab2CA.srcs/sources_1/new/dataMemory.v
@@ -9,6 +9,23 @@ module dataMemory(
reg [8:0] memory [15:0];
initial begin
+ // String Compare Memory
+ memory[0] <= 9'b000000100;
+ memory[1] <= 9'b000001000;
+ memory[2] <= 9'b000001100;
+ memory[3] <= 9'b010101010;
+ memory[4] <= 9'b000001111;
+ memory[5] <= 9'b000000100;
+ memory[6] <= 9'b000000011;
+ memory[7] <= 9'b000000111;
+ memory[8] <= 9'b000001111;
+ memory[9] <= 9'b000000100;
+ memory[10] <= 9'b000000010;
+ memory[11] <= 9'b000000000;
+ memory[12] <= 9'b000000000;
+ memory[13] <= 9'b000000000;
+ memory[14] <= 9'b000000000;
+ memory[15] <= 9'b000000000;
// // String Compare Memory
// memory[0] <= 9'b000000100;
// memory[1] <= 9'b000001000;
@@ -27,27 +44,54 @@ module dataMemory(
// memory[14] <= 9'b000000000;
// memory[15] <= 9'b000000000;
+ // Bubble Sort Initial Memory
+
+ memory[0] <= 9'b000011000;
+ memory[1] <= 9'b000000000;
+ memory[2] <= 9'b000100000;
+ memory[3] <= 9'b010001000;
+ memory[4] <= 9'b010010000;
+ memory[5] <= 9'b010011000;
+ memory[6] <= 9'b101001000;
+ memory[7] <= 9'b101001010;
+ memory[8] <= 9'b000100011;
+ memory[9] <= 9'b101001001;
+ memory[10] <= 9'b011001001;
+ memory[11] <= 9'b001001000;
+ memory[12] <= 9'b101001001;
+ memory[13] <= 9'b011101000;
+ memory[14] <= 9'b110001010;
+ memory[15] <= 9'b000100001;
+ memory[16] <= 9'b100110100;
+ memory[17] <= 9'b000001001;
+ memory[18] <= 9'b011001001;
+ memory[19] <= 9'b000110010;
+ memory[20] <= 9'b000000001;
+ memory[21] <= 9'b000111010;
+ memory[22] <= 9'b101011110;
+ memory[23] <= 9'b011111100;
+
// Binary Search Memory
- memory[0] <= 9'b000000000;
- memory[1] <= 9'b000000111;
- memory[2] <= 9'b000000001;
- memory[3] <= 9'b000000010;
- memory[4] <= 9'b000000011;
- memory[5] <= 9'b000000100;
- memory[6] <= 9'b000000101;
- memory[7] <= 9'b000000110;
- memory[8] <= 9'b000000111;
- memory[9] <= 9'b000001000;
- memory[10] <= 9'b000001001;
- memory[11] <= 9'b000001010;
- memory[12] <= 9'b000001011;
- memory[13] <= 9'b000001100;
- memory[14] <= 9'b000001101;
- memory[15] <= 9'b000001110;
- memory[16] <= 9'b000001111;
- memory[17] <= 9'b000010000;
- memory[18] <= 9'b000010001;
- memory[19] <= 9'b000010010;
+// memory[0] <= 9'b000000000;
+// memory[1] <= 9'b000000111;
+// memory[2] <= 9'b000000001;
+// memory[3] <= 9'b000000010;
+// memory[4] <= 9'b000000011;
+// memory[5] <= 9'b000000100;
+// memory[6] <= 9'b000000101;
+// memory[7] <= 9'b000000110;
+// memory[8] <= 9'b000000111;
+// memory[9] <= 9'b000001000;
+// memory[10] <= 9'b000001001;
+// memory[11] <= 9'b000001010;
+// memory[12] <= 9'b000001011;
+// memory[13] <= 9'b000001100;
+// memory[14] <= 9'b000001101;
+// memory[15] <= 9'b000001110;
+// memory[16] <= 9'b000001111;
+// memory[17] <= 9'b000010000;
+// memory[18] <= 9'b000010001;
+// memory[19] <= 9'b000010010;
end
@@ -110,4 +154,4 @@ module dataMemory_tb();
#5
$finish;
end
-endmodule
\ No newline at end of file
+endmodule
diff --git a/lab2CA.srcs/sources_1/new/instructionMemory.v b/lab2CA.srcs/sources_1/new/instructionMemory.v
index 58c6ac6..7cc47fa 100644
--- a/lab2CA.srcs/sources_1/new/instructionMemory.v
+++ b/lab2CA.srcs/sources_1/new/instructionMemory.v
@@ -34,6 +34,47 @@ module instructionMemory(
//String Compare
+ memory[0] <= 9'b000000000;
+ memory[1] <= 9'b010000000;
+ memory[2] <= 9'b010001000;
+ memory[3] <= 9'b010010000;
+ memory[4] <= 9'b010011000;
+ memory[5] <= 9'b000100000;
+ memory[6] <= 9'b011001001;
+ memory[7] <= 9'b000101010;
+ memory[8] <= 9'b011010010;
+ memory[9] <= 9'b000110100;
+ memory[10] <= 9'b011011011;
+ memory[11] <= 9'b000111110;
+ memory[12] <= 9'b101010000;
+ memory[13] <= 9'b101000010;
+ memory[14] <= 9'b101001100;
+ memory[15] <= 9'b101011110; //ends initialization
+ memory[16] <= 9'b101000011;
+ memory[17] <= 9'b101001101;
+ memory[18] <= 9'b000110000;
+ memory[19] <= 9'b000111010;
+ memory[20] <= 9'b110010001;
+ memory[21] <= 9'b100100001;
+ memory[22] <= 9'b100110000;
+ memory[23] <= 9'b110011001;
+ memory[24] <= 9'b100100001;
+ memory[25] <= 9'b100101101;
+ memory[26] <= 9'b011000001;
+ memory[27] <= 9'b011001001;
+ memory[28] <= 9'b101000010;
+ memory[29] <= 9'b101001100;
+ memory[30] <= 9'b010110111;
+ memory[31] <= 9'b110010001;
+ memory[32] <= 9'b101110001;
+ memory[33] <= 9'b101000001;
+ memory[34] <= 9'b101001111;
+ memory[35] <= 9'b001001000;
+ memory[36] <= 9'b011000001;
+ memory[37] <= 9'b101000000;
+ memory[38] <= 9'b101110111;
+ memory[39] <= 9'b000000000;
+
// memory[0] <= 9'b000000000;
// memory[1] <= 9'b010000000;
// memory[2] <= 9'b010001000;
@@ -75,6 +116,55 @@ module instructionMemory(
// memory[38] <= 9'b101111000;
// memory[39] <= 9'b000000000;
+
+ // Bubble Sort
+ memory[0] <= 9'b000000001;
+ memory[1] <= 9'b010000000;
+ memory[2] <= 9'b000100000;
+ memory[3] <= 9'b010001000;
+ memory[4] <= 9'b010010000;
+ memory[5] <= 9'b010011000;
+ memory[6] <= 9'b101001000;
+ memory[7] <= 9'b101001010;
+ memory[8] <= 9'b100100011;
+ memory[9] <= 9'b101001001;
+ memory[10] <= 9'b011001001;
+ memory[11] <= 9'b101001000;
+ memory[12] <= 9'b101001001;
+ memory[13] <= 9'b011101000;
+ memory[14] <= 9'b110001010;
+ memory[15] <= 9'b100100001;
+ memory[16] <= 9'b100110100;
+ memory[17] <= 9'b101001001;
+ memory[18] <= 9'b011001001;
+ memory[19] <= 9'b000110010;
+ memory[20] <= 9'b011001001;
+ memory[21] <= 9'b000111010;
+ memory[22] <= 9'b101011110;
+ memory[23] <= 9'b011111100;
+ memory[24] <= 9'b110011010;
+ memory[25] <= 9'b100100001;
+ memory[26] <= 9'b101110010;
+ memory[27] <= 9'b101001001;
+ memory[28] <= 9'b011001001;
+ memory[29] <= 9'b101011111;
+ memory[30] <= 9'b001011010;
+ memory[31] <= 9'b011001001;
+ memory[32] <= 9'b001010010;
+ memory[33] <= 9'b010001000;
+ memory[34] <= 9'b011001001;
+ memory[35] <= 9'b101001010;
+ memory[36] <= 9'b101111100;
+ memory[37] <= 9'b101001011;
+ memory[38] <= 9'b110001001;
+ memory[39] <= 9'b100100001;
+ memory[40] <= 9'b100100011;
+ memory[41] <= 9'b010001000;
+ memory[42] <= 9'b101001000;
+ memory[43] <= 9'b101111011;
+ memory[44] <= 9'b000000000;
+
+
// Binary Search
memory[0] <= 9'b000000000;
@@ -186,4 +276,4 @@ module instructionMemory_tb();
#5
$finish;
end
-endmodule
\ No newline at end of file
+endmodule