From 5bd244f9baee9e51a4a16db34282aad46f3edafe Mon Sep 17 00:00:00 2001 From: WilliamMiceli Date: Fri, 29 Mar 2019 16:13:07 -0400 Subject: [PATCH] Now Asynchronous and recognized by Vivado as RTL_ROM --- lab2CA.srcs/sources_1/new/instructionMemory.v | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/lab2CA.srcs/sources_1/new/instructionMemory.v b/lab2CA.srcs/sources_1/new/instructionMemory.v index c11da7d..184cbc7 100644 --- a/lab2CA.srcs/sources_1/new/instructionMemory.v +++ b/lab2CA.srcs/sources_1/new/instructionMemory.v @@ -210,11 +210,8 @@ module instructionMemory( end - always@(address, clk)begin - if(clk == 1'b1)begin - readData <= memory[address]; - end - end + always @ (address) + readData <= memory[address]; endmodule