From 858c1b8e9861bfbac197fa1edc71cd650968eef3 Mon Sep 17 00:00:00 2001 From: WilliamMiceli Date: Sat, 6 Apr 2019 16:09:05 -0400 Subject: [PATCH] Added a lot of points --- CPU9bits_tb_behav.wcfg | 477 +++++++++++++++++++++++++++++++++++------ 1 file changed, 417 insertions(+), 60 deletions(-) diff --git a/CPU9bits_tb_behav.wcfg b/CPU9bits_tb_behav.wcfg index fbb7e7a..3a75952 100644 --- a/CPU9bits_tb_behav.wcfg +++ b/CPU9bits_tb_behav.wcfg @@ -3,119 +3,472 @@ - + - + - - - + + + - + - - - reset - reset - - - Registers + + + CPU label - + + reset reset - - op0_idx[1:0] - op0_idx[1:0] + + clk + clk - - op1_idx[1:0] - op1_idx[1:0] + + result[8:0] + result[8:0] - - write_data[8:0] - write_data[8:0] + + done + done - - op0[8:0] - op0[8:0] + + instr[8:0] + instr[8:0] - + op1[8:0] op1[8:0] - + + op0[8:0] + op0[8:0] + + + FUAddr[8:0] + FUAddr[8:0] + + + FUJB[8:0] + FUJB[8:0] + + + PCout[8:0] + PCout[8:0] + + + JBRes[8:0] + JBRes[8:0] + + + FUJ[8:0] + FUJ[8:0] + + + FUB[8:0] + FUB[8:0] + + + AddiOut[8:0] + AddiOut[8:0] + + + AluOut[8:0] + AluOut[8:0] + + + RFIn[8:0] + RFIn[8:0] + + + loadMux[8:0] + loadMux[8:0] + + + dataMemOut[8:0] + dataMemOut[8:0] + + + linkData[8:0] + linkData[8:0] + + + SE1N[8:0] + SE1N[8:0] + + + SE2N[8:0] + SE2N[8:0] + + + SE3N[8:0] + SE3N[8:0] + + + bankData[8:0] + bankData[8:0] + + + bankOP[8:0] + bankOP[8:0] + + + jumpNeg[8:0] + jumpNeg[8:0] + + + aluOp[3:0] + aluOp[3:0] + + + FU[2:0] + FU[2:0] + + + bankS[1:0] + bankS[1:0] + + + addiS + addiS + + + RegEn + RegEn + + + loadS + loadS + + + fetchBranch + fetchBranch + + + halt + halt + + + cout0 + cout0 + + + cout1 + cout1 + + + link + link + + + js + js + + + dataMemEn + dataMemEn + + + + Control Unit + label + + instIn[3:0] + instIn[3:0] + + + functBit + functBit + + + aluOut[3:0] + aluOut[3:0] + + + FU[2:0] + FU[2:0] + + + bank[1:0] + bank[1:0] + + + addi + addi + + + mem + mem + + + dataMemEn + dataMemEn + + + RegEn + RegEn + + + halt + halt + + + link + link + + + js + js + + + + Fetch Unit + label + + clk + clk + + + reset + reset + + + op_idx + op_idx + + + AddrIn[8:0] + AddrIn[8:0] + + + AddrOut[8:0] + AddrOut[8:0] + + + progC_out[8:0] + progC_out[8:0] + + + result_m[8:0] + result_m[8:0] + + + cout + cout + + + + ALU + label + + opcode[3:0] + opcode[3:0] + + + operand0[8:0] + operand0[8:0] + + + operand1[8:0] + operand1[8:0] + + + result[8:0] + result[8:0] + + + result_A[8:0] + result_A[8:0] + + + result_B[8:0] + result_B[8:0] + + + result_C[8:0] + result_C[8:0] + + + result_D[8:0] + result_D[8:0] + + + result_E[8:0] + result_E[8:0] + + + result_F[8:0] + result_F[8:0] + + + result_G[8:0] + result_G[8:0] + + + result_H[8:0] + result_H[8:0] + + + result_I[8:0] + result_I[8:0] + + + result_J[8:0] + result_J[8:0] + + + result_K[8:0] + result_K[8:0] + + + result_L[8:0] + result_L[8:0] + + + result_M[8:0] + result_M[8:0] + + + result_N[8:0] + result_N[8:0] + + + result_O[8:0] + result_O[8:0] + + + result_P[8:0] + result_P[8:0] + + + cout + cout + + + + Registers + label + + clk + clk + + + reset + reset + + + enable + enable + + + write_index[1:0] + write_index[1:0] + + + op0_idx[1:0] + op0_idx[1:0] + + + op1_idx[1:0] + op1_idx[1:0] + + + write_data[8:0] + write_data[8:0] + + + op0[8:0] + op0[8:0] + + + op1[8:0] + op1[8:0] + + + decOut[3:0] + decOut[3:0] + + r0_out[8:0] r0_out[8:0] - + r1_out[8:0] r1_out[8:0] - + r2_out[8:0] r2_out[8:0] - + r3_out[8:0] r3_out[8:0] - + Banks label - + + clk + clk + + reset reset - + + enable + enable + + write_index[1:0] write_index[1:0] - + op0_idx[1:0] op0_idx[1:0] - + op1_idx[1:0] op1_idx[1:0] - + write_data[8:0] write_data[8:0] - + op0[8:0] op0[8:0] - + op1[8:0] op1[8:0] - + decOut[3:0] decOut[3:0] - + r0_out[8:0] r0_out[8:0] - + r1_out[8:0] r1_out[8:0] - + r2_out[8:0] r2_out[8:0] - + r3_out[8:0] r3_out[8:0] @@ -124,44 +477,48 @@ Divider label - + Instruction Memory label - + address[8:0] address[8:0] - + + memory[100:0][8:0] + memory[100:0][8:0] + + readData[8:0] readData[8:0] - - label - memory[100:0][8:0] - memory[100:0][8:0] - Instruction Memory - - + Data Memory label - + + clk + clk + + + writeEnable + writeEnable + + address[8:0] address[8:0] - + writeData[8:0] writeData[8:0] - + readData[8:0] readData[8:0] - - label + memory[100:0][8:0] memory[100:0][8:0] - Data Memory