From 9d759edbec0399007346e290e1b174f50ae6e6b8 Mon Sep 17 00:00:00 2001
From: WilliamMiceli <git@williammiceli.me>
Date: Tue, 12 Mar 2019 11:07:50 -0400
Subject: [PATCH] ALU now has 4 bits of it's own opcode

---
 lab2CA.srcs/sources_1/new/ALU.v | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/lab2CA.srcs/sources_1/new/ALU.v b/lab2CA.srcs/sources_1/new/ALU.v
index 95b0519..813ef54 100644
--- a/lab2CA.srcs/sources_1/new/ALU.v
+++ b/lab2CA.srcs/sources_1/new/ALU.v
@@ -1,7 +1,7 @@
 `timescale 1ns / 1ps
 
 module ALU(
-    input wire [2:0] opcode, // NOT the same as the instruction set opcode
+    input wire [3:0] opcode, // NOT the same as the instruction set opcode
     input wire [8:0] operand0,
     input wire [8:0] operand1,
     output wire [8:0] result 
@@ -10,41 +10,41 @@ module ALU(
     // Wires for connecting the modules to the mux
     wire [8:0] result_A,result_B,result_C,result_D,result_E,result_F,result_G,result_H;
     
-    // A (000) - Add
+    // A (0000) - Add
     add_9bit add0(
         .A(operand0),
         .B(operand1),
         .Cin(1'b0),
         .Sum(result_A));
-    // B (001) - Subtract
+    // B (0001) - Subtract
     sub_9bit sub0(
         .A(operand0),
         .B(operand1),
         .C(result_B));
-    // C (010) - OR
+    // C (0010) - OR
     or_9bit or0(
         .A(operand0),
         .B(operand1),
         .C(result_C));
-    // D (011) - NOR
+    // D (0011) - NOR
     nor_9bit nor0(
         .A(operand0),
         .B(operand1),
         .C(result_D));
-    // E (100) - AND
+    // E (0100) - AND
     and_9bit and0(
         .A(operand0),
         .B(operand1),
         .C(result_E));
-    // F (101) - Shift Left
+    // F (0101) - Shift Left
     shift_left sl(
         .A(operand0),
         .B(result_F));
-    // G (110) - Shift Logical Right
+    // G (0110) - Shift Right Logical
     shift_right_logical srl(
         .A(operand0),
         .B(result_G));
-    // H (111) //slt
+    // H (0111) - Shift Right Arithmetic
     
     
     // MUX chooses which result to show based on the ALU's opcode