diff --git a/lab2CA.srcs/sources_1/new/dataMemory.v b/lab2CA.srcs/sources_1/new/dataMemory.v
index cc065ff..d2ff236 100644
--- a/lab2CA.srcs/sources_1/new/dataMemory.v
+++ b/lab2CA.srcs/sources_1/new/dataMemory.v
@@ -6,7 +6,8 @@ module dataMemory(
     output reg [8:0] readData
     );
     
-    reg [8:0] memory [100:0];
+    reg [8:0] memory [512:0];   // Maximum of 512 memory locations
+                                // Vivado will give warnings of unconnected ports on the "address" bus if they are unused
     
     initial begin
 
@@ -284,7 +285,27 @@ module dataMemory_tb();
         address = 9'b000000010;
         writeData = 9'b000000101;
         #10
-        address = 9'b000000011;
+        writeEnable = 1'b0;
+        address = 9'b001000000;
+        writeData = 9'b010101010;
+        #10
+        address = 9'b001000001;
+        writeData = 9'b000001111;
+        #10
+        address = 9'b000011010;
+        writeData = 9'b000000101;
+        #10
+        writeEnable = 1'b1;
+        address = 9'b100111000;
+        writeData = 9'b010101010;
+        #10
+        address = 9'b100100001;
+        writeData = 9'b000001111;
+        #10
+        address = 9'b110000010;
+        writeData = 9'b000000101;
+        #10
+        address = 9'b111110011;
         writeData = 9'b000000011;
         #10
         address = 9'b00000010;