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Simplified bitwise NOR

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WilliamMiceli
2019-03-12 10:46:08 -04:00
parent 9519460187
commit a555728a48
1 changed files with 1 additions and 83 deletions
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84
lab2CA.srcs/sources_1/new/BasicModules.v
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@@ -455,94 +455,12 @@ module mux_8_1_tb();
end end
endmodule endmodule
module nor_1bit(
input wire A,
input wire B,
output wire C);
//assign C = A |~ B;
assign C = ~(A | B);
endmodule
//testbench
module nor_1bit_tb();
reg a;
reg b;
wire c;
nor_1bit nor0(
.A(a),
.B(b),
.C(c));
initial begin
a = 0;
b = 0;
#5
a = 0;
b = 1;
#5
a = 1;
b = 0;
#5
a = 1;
b = 1;
#5
$finish;
end
endmodule
module nor_9bit( module nor_9bit(
input wire [8:0] A, input wire [8:0] A,
input wire [8:0] B, input wire [8:0] B,
output wire [8:0] C); output wire [8:0] C);
nor_1bit nor0( assign C = ~(A | B);
.A(A[0]),
.B(B[0]),
.C(C[0]));
nor_1bit nor1(
.A(A[1]),
.B(B[1]),
.C(C[1]));
nor_1bit nor2(
.A(A[2]),
.B(B[2]),
.C(C[2]));
nor_1bit nor3(
.A(A[3]),
.B(B[3]),
.C(C[3]));
nor_1bit nor4(
.A(A[4]),
.B(B[4]),
.C(C[4]));
nor_1bit nor5(
.A(A[5]),
.B(B[5]),
.C(C[5]));
nor_1bit nor6(
.A(A[6]),
.B(B[6]),
.C(C[6]));
nor_1bit nor7(
.A(A[7]),
.B(B[7]),
.C(C[7]));
nor_1bit nor8(
.A(A[8]),
.B(B[8]),
.C(C[8]));
endmodule endmodule