diff --git a/lab2CA.runs/impl_1/init_design.pb b/lab2CA.runs/impl_1/init_design.pb
index 9a09608..2ee50ec 100644
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diff --git a/lab2CA.runs/impl_1/opt_design.pb b/lab2CA.runs/impl_1/opt_design.pb
index 2ef3276..47eea53 100644
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diff --git a/lab2CA.runs/impl_1/place_design.pb b/lab2CA.runs/impl_1/place_design.pb
index e673217..8269e0e 100644
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diff --git a/lab2CA.runs/impl_1/route_design.pb b/lab2CA.runs/impl_1/route_design.pb
index 1cd7c64..956e80a 100644
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diff --git a/lab2CA.runs/synth_1/vivado.pb b/lab2CA.runs/synth_1/vivado.pb
index befb12c..27f246f 100644
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diff --git a/lab2CA.srcs/sources_1/new/dataMemory.v b/lab2CA.srcs/sources_1/new/dataMemory.v
index 9054504..0e0b528 100644
--- a/lab2CA.srcs/sources_1/new/dataMemory.v
+++ b/lab2CA.srcs/sources_1/new/dataMemory.v
@@ -6,14 +6,14 @@ module dataMemory(
     output reg [8:0] readData
     );
     
-    reg [8:0] memory [1:0];   // Maximum of 512 memory locations
+    reg [8:0] memory [100:0];   // Maximum of 512 memory locations
                                 // Vivado will give warnings of unconnected ports on the "address" bus if they are unused
     
     initial begin
 
 
 
-        //Equation Solver Memory
+        // Equation Solver Memory
 
         memory[0] <= 9'b000000001;
         memory[1] <= 9'b000000010;