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Added bank to CPU9bits

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jose.rodriguezlabra
2019-03-24 12:11:12 -04:00
parent 191ca46f2d
commit bab680ea27
59 changed files with 629 additions and 2560 deletions
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lab2CA.runs/impl_1/CPU9bits_bus_skew_routed.rpt
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Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2018.3 (win64) Build 2405991 Thu Dec 6 23:38:27 MST 2018
| Date : Wed Mar 20 10:55:21 2019
| Host : DESKTOP-8QFGS52 running 64-bit major release (build 9200)
| Command : report_bus_skew -warn_on_violation -file CPU9bits_bus_skew_routed.rpt -pb CPU9bits_bus_skew_routed.pb -rpx CPU9bits_bus_skew_routed.rpx
| Design : CPU9bits
| Device : 7k160ti-fbg484
| Speed File : -2L PRODUCTION 1.12 2017-02-17
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Bus Skew Report
No bus skew constraints