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Implemented SEs

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This commit is contained in:
jose.rodriguezlabra
2019-03-16 14:09:53 -04:00
parent 5cbe490aae
commit dfd8753a62
3 changed files with 69 additions and 56 deletions
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20
lab2CA.srcs/sources_1/new/CPU9bits.v
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@@ -6,7 +6,7 @@ module CPU9bits(
output wire done
);
wire [8:0] op1, op0, FUAddr,FUJB,PCout,JBRes,FUJ,FUB,AddiOut,AluOut,RFIn, loadMux, dataMemOut, linkData;
wire [8:0] op1, op0, FUAddr,FUJB,PCout,JBRes,FUJ,FUB,AddiOut,AluOut,RFIn, loadMux, dataMemOut, linkData, SE1N, SE2N, SE3N;
wire [2:0] FU;
wire [3:0] aluOp;
wire addiS, RegEn, loadS, fetchBranch, halt, cout0, cout1, link;
@@ -67,11 +67,19 @@ module CPU9bits(
.switch(FU[1]));
mux_2_1 mux2(
.A({4'b0000,instr[4:0]}), //Jump -- Change with signer module!
.B({6'b000000,instr[2:0]}),//Branch -- Change with signer module!
.A(SE2N), //Jump -- Change with signer module!
.B(SE1N),//Branch -- Change with signer module!
.out(JBRes),
.switch(FU[2]));
sign_extend_2bit SE1(
.A(instr[2:0]),
.B(SE1N));
sign_extend_4bit SE2(
.A(instr[4:0]),
.B(SE2N));
bit1_mux_2_1 BranMux( // BEQ MUX
.A(FU[0]),
.B(op0[0]),
@@ -81,11 +89,15 @@ module CPU9bits(
///--------------------------Addi Stuff
add_9bit Addier(
.A({6'b000000,instr[2:0]}), // Change with signer module!
.A(SE3N), // Change with signer module!
.B(op0),
.Cin(1'b0),
.Sum(AddiOut),
.Cout(cout1));
sign_extend_2bit SE3(
.A(instr[2:0]),
.B(SE3N));
mux_2_1 mux3(
.A(AluOut),