BEQ and LD fix

2019-03-24 16:05:16 -04:00
parent 27f6d24b88
commit e8ada91e08
12 changed files with 193 additions and 131 deletions
--- a/lab2CA.srcs/sources_1/new/instructionMemory.v
+++ b/lab2CA.srcs/sources_1/new/instructionMemory.v
@@ -28,7 +28,7 @@ module instructionMemory(
 //        memory[13] <= 9'b111111001; //srl
 //   //     memory[14] <= 9'b100100010; //j
 //        memory[14] <= 9'b010001000; //zero
-//        memory[15] <= 9'b110001101; //beq
+//        memory[15] <= 9'b110001001; //beq
 //        memory[16] <= 9'b100001000; //jr
 //        memory[17] <= 9'b100111100; //j
        
@@ -48,7 +48,7 @@ module instructionMemory(
        memory[11] <= 9'b000111110;
        memory[12] <= 9'b101010000;
        memory[13] <= 9'b101000010;
-        memory[14] <= 9'b101010100;
+        memory[14] <= 9'b101001100;
        memory[15] <= 9'b101011110; //ends initialization
        memory[16] <= 9'b101000011;
        memory[17] <= 9'b101001101;