reset reset Registers label reset reset op0_idx[1:0] op0_idx[1:0] op1_idx[1:0] op1_idx[1:0] write_data[8:0] write_data[8:0] op0[8:0] op0[8:0] op1[8:0] op1[8:0] r0_out[8:0] r0_out[8:0] r1_out[8:0] r1_out[8:0] r2_out[8:0] r2_out[8:0] r3_out[8:0] r3_out[8:0] Banks label reset reset write_index[1:0] write_index[1:0] op0_idx[1:0] op0_idx[1:0] op1_idx[1:0] op1_idx[1:0] write_data[8:0] write_data[8:0] op0[8:0] op0[8:0] op1[8:0] op1[8:0] decOut[3:0] decOut[3:0] r0_out[8:0] r0_out[8:0] r1_out[8:0] r1_out[8:0] r2_out[8:0] r2_out[8:0] r3_out[8:0] r3_out[8:0] Divider label Instruction Memory label address[8:0] address[8:0] readData[8:0] readData[8:0] label memory[100:0][8:0] memory[100:0][8:0] Instruction Memory Data Memory label address[8:0] address[8:0] writeData[8:0] writeData[8:0] readData[8:0] readData[8:0] label memory[100:0][8:0] memory[100:0][8:0] Data Memory