jose.rodriguezlabra 84e3725fdb new thing

2019-02-16 13:04:06 -05:00

..

ALU.v

All current arithmetic and logical operations are now implemented

2019-02-15 17:51:05 -05:00

BasicModules.v

new thing

2019-02-16 13:04:06 -05:00

fetchFile.v

fetch unit

2019-02-15 11:20:14 -05:00

FetchUnit.v

Erased weird numbers

2019-02-16 12:50:02 -05:00

lab2testing.v

fetch unit

2019-02-16 12:28:49 -05:00

RegFile.v

Added outputs to the MUXes for the registers

2019-02-15 17:01:43 -05:00