Johannes ace0eca65a Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2 ...

# Conflicts:
#	lab2CA.xpr

2019-03-24 16:06:29 -04:00

..

ALU.v

Added zeroing instr

2019-03-16 14:34:36 -04:00

BasicModules.v

Added zeroing instr

2019-03-16 14:34:36 -04:00

ControlUnit.v

Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2

2019-03-24 16:06:29 -04:00

CPU9bits.v

BEQ and LD fix

2019-03-24 16:05:16 -04:00

dataMemory.v

BEQ and LD fix

2019-03-24 16:05:16 -04:00

FetchUnit.v

Better Sim

2019-03-14 14:37:58 -04:00

instructionMemory.v

BEQ and LD fix

2019-03-24 16:05:16 -04:00

RegFile.v

Fixed bugs, finished BEQ, Added Halt

2019-03-13 11:14:52 -04:00