Fixed and applied JLCPCB (PCB Manufacturer) Capabilties into DRC rules and the three main PCB layouts currently in Altium; added ".rul" file
This commit is contained in:
William Miceli
@@ -24,6 +24,7 @@ ReorderDocumentsOnCompile=1
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NameNetsHierarchically=0
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PowerPortNamesTakePriority=0
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AutoSheetNumbering=1
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AutoCrossReferences=0
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PushECOToAnnotationFile=1
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DItemRevisionGUID=
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ReportSuppressedErrorsInMessages=0
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@@ -655,6 +656,10 @@ DocumentUniqueId=IDSJHEBK
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DocumentPath=Project Outputs for 2020-2021 Telemetry and Lighting Board\2020-2021 Telemetry and Lighting Board.nsx
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DItemRevisionGUID=
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[GeneratedDocument2]
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DocumentPath=Project Outputs for 2020-2021 Telemetry and Lighting Board\Design Rule Check - Stage 1 - Telemetry And Lighting.html
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DItemRevisionGUID=
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[Configuration1]
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Name=Sources
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ParameterCount=0
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@@ -816,12 +821,22 @@ OutputName20=WireList Netlist
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OutputDocumentPath20=
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OutputVariantName20=
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OutputDefault20=0
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OutputType21=XSpiceNetlist
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OutputName21=XSpice Netlist
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OutputDocumentPath21=
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OutputVariantName21=
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OutputDefault21=0
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[OutputGroup2]
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Name=Simulator Outputs
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Description=
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TargetPrinter=Microsoft Print to PDF
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PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
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OutputType1=AdvSimNetlist
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OutputName1=Mixed Sim
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OutputDocumentPath1=
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OutputVariantName1=
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OutputDefault1=0
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[OutputGroup3]
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Name=Documentation Outputs
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Binary file not shown.
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@@ -0,0 +1,614 @@
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Protel Design System Design Rule Check
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PCB File : C:\SunseekerTelemetry\Hardware\AltiumProject\2020-2021 Telemetry and Lighting Board\Stage 1 - Telemetry And Lighting.PcbDoc
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Date : 4/4/2021
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Time : 7:52:36 PM
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WARNING: Zero hole size multi-layer pad(s) detected
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Pad U8-38(1136.2mm,456.25mm) on Multi-Layer on Net GND
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WARNING: Multilayer Pads with 0 size Hole found
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Pad U8-38(1136.2mm,456.25mm) on Multi-Layer
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Processing Rule : Clearance Constraint (Gap=0.2mm) (OnLayer('Top Layer')),(All)
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Rule Violations :0
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Processing Rule : Clearance Constraint (Gap=0.2mm) (OnLayer('Bottom Layer')),(All)
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Rule Violations :0
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Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
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Rule Violations :0
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Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
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Rule Violations :0
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Processing Rule : Un-Routed Net Constraint ( (All) )
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Violation between Un-Routed Net Constraint: Net NetBB1_10 Between Track (1047.5mm,428mm)(1048mm,427.5mm) on Top Layer And Pad BB1-10(1146.28mm,354.29mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_11 Between Track (1047mm,427.5mm)(1047.5mm,427mm) on Top Layer And Pad BB1-11(1143.74mm,354.29mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_12 Between Track (1046.5mm,439mm)(1046.5mm,439mm) on Top Layer And Pad BB1-12(1141.2mm,354.29mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_9 Between Track (1039mm,419.5mm)(1039.5mm,419mm) on Top Layer And Pad BB1-9(1148.82mm,354.29mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C11-1(1043mm,469.5mm) on Top Layer And Pad R10-2(1070mm,470.65mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V Between Pad C14-1(1023mm,467mm) on Multi-Layer And Via (1091mm,488.5mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad R39-2(982.5mm,466.675mm) on Top Layer And Pad C14-2(1028.08mm,467mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C14-2(1028.08mm,467mm) on Multi-Layer And Via (1042mm,467mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C16-1(1128.947mm,397mm) on Top Layer And Pad C67-1(1140mm,398.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1023mm,387.5mm) from Top Layer to Bottom Layer And Pad C20-1(1034.447mm,387.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V Between Pad C6_CAN_1-1(987.5mm,327mm) on Top Layer And Pad C25-1(1054.5mm,326.376mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Via (975mm,310.5mm) from Top Layer to Bottom Layer And Pad C29-2(1059mm,311mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C3_CAN_0-1(966.5mm,338mm) on Top Layer And Via (975mm,333mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad U13-1(1063.5mm,333.5mm) on Top Layer And Pad C31-2(1073.553mm,333.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Track (1035.45mm,378.5mm)(1036.7mm,379.75mm) on Top Layer And Pad C32-2(1075.947mm,378.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C33-2(1132.947mm,469.5mm) on Top Layer And Pad C34-2(1144.553mm,469.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C4_CAN_0-1(966.5mm,343mm) on Top Layer And Pad C5_CAN_0-2(990.053mm,347mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1082.5mm,394.5mm) from Top Layer to Bottom Layer And Pad C67-2(1137.447mm,398.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad C9-1(1043mm,464.5mm) on Top Layer And Pad R9-2(1070mm,462.65mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V Between Pad D1-1(1032mm,454mm) on Top Layer And Via (1093.5mm,422.5mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad J12-M1(1146.92mm,378.96mm) on Multi-Layer And Pad SW2-4(1150.01mm,372.255mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net GND Between Via (1140mm,403mm) from Top Layer to Bottom Layer And Pad J12-M2(1146.92mm,403.96mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_12 Between Track (1103.5mm,342mm)(1128.91mm,342mm) on Top Layer And Pad J16-1(1112.5mm,339.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_9 Between Pad U1_CAN_1-13(987.1mm,315.65mm) on Top Layer And Pad J17-1(1112.5mm,324.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_9 Between Track (1103.5mm,327mm)(1121.53mm,327mm) on Top Layer And Pad J17-1(1112.5mm,324.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_10 Between Pad U1_CAN_1-15(987.1mm,318.19mm) on Top Layer And Pad J18-1(1112.5mm,329.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_10 Between Track (1103.5mm,332mm)(1123.99mm,332mm) on Top Layer And Pad J18-1(1112.5mm,329.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_11 Between Pad U1_CAN_1-14(987.1mm,316.92mm) on Top Layer And Pad J19-1(1112.5mm,334.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetBB1_11 Between Track (1103.5mm,337mm)(1126.45mm,337mm) on Top Layer And Pad J19-1(1112.5mm,334.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ28_UART_ESP32_1 Between Pad J28_UART_ESP32-1(1087mm,482mm) on Top Layer And Pad U8-34(1138.92mm,446mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ29_UART_MCU_1 Between Track (1047.5mm,437mm)(1048mm,437.5mm) on Top Layer And Pad J29_UART_MCU-1(1090mm,421.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANV Between Pad J3_CAN_1-2(939.5mm,320.04mm) on Multi-Layer And Pad J3_CAN_0-2(939.5mm,342.54mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad J3_CAN_1-1(939.5mm,316.5mm) on Multi-Layer And Track (945.85mm,315mm)(947.12mm,316.27mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad J33-2(1114.46mm,449mm) on Multi-Layer And Pad U8-38(1144mm,446mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad J33-2(1114.46mm,449mm) on Multi-Layer And Via (1135.5mm,454.85mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net R\S\T\ Between Track (939.5mm,503mm)(943.5mm,503mm) on Top Layer And Pad J6-11(1024.8mm,486.5mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad R46-2(982.5mm,486.175mm) on Top Layer And Pad J6-9(1027.34mm,486.5mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net NetLED6_UART_MCU_2 Between Pad R50_UART_MCU-2(1124.15mm,426.5mm) on Top Layer And Pad LED6_UART_MCU-2(1126.5mm,426.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V Between Pad LED7-1(1117mm,316.5mm) on Top Layer And Via (1139.5mm,317.15mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad SW1-4(933.49mm,499.745mm) on Multi-Layer And Pad Q24-3(975mm,492.849mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GeneralPurposeSwitch0 Between Track (1050mm,434.5mm)(1050.5mm,435mm) on Top Layer And Pad R11-2(1141mm,369.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Pad R2-2(939.5mm,498.85mm) on Top Layer And Via (1084.5mm,472mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad R31-2(982.5mm,434.175mm) on Top Layer And Via (1002.5mm,435mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad R33-2(982.5mm,427.675mm) on Top Layer And Via (1002.5mm,427.5mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net Braking0 Between Pad R37-1(982.5mm,475.825mm) on Top Layer And Pad U3-52(1045.225mm,427mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad R38-2(982.5mm,382.175mm) on Top Layer And Track (1030mm,379.75mm)(1030mm,380mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Braking1 Between Pad R39-1(982.5mm,469.325mm) on Top Layer And Track (1045.225mm,428.5mm)(1045.225mm,428.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Braking2 Between Pad R41-1(982.5mm,462.825mm) on Top Layer And Pad U3-56(1045.225mm,429mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Braking3 Between Pad R43-1(982.5mm,456.325mm) on Top Layer And Pad U3-68(1045.225mm,435mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Extra0 Between Pad R44-1(982.5mm,495.325mm) on Top Layer And Track (1045.225mm,429.5mm)(1045.225mm,429.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad R44-2(982.5mm,492.675mm) on Top Layer And Track (1027.34mm,489.515mm)(1028.5mm,490.675mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Braking4 Between Pad R45-1(982.5mm,449.825mm) on Top Layer And Track (1045.225mm,436.5mm)(1045.225mm,436.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Extra1 Between Pad R46-1(982.5mm,488.825mm) on Top Layer And Track (1045.225mm,430mm)(1045.225mm,430mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Extra2 Between Pad R48-1(982.5mm,482.325mm) on Top Layer And Track (1045.225mm,430.5mm)(1045.225mm,430.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Track (1037.5mm,451mm)(1038.724mm,452.224mm) on Top Layer And Pad R8-2(1070mm,454.65mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Track (989mm,348.171mm)(990.053mm,349.224mm) on Top Layer And Pad SD1-12(1022.025mm,357.8mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Track (1064.5mm,309mm)(1064.5mm,309.276mm) on Top Layer And Pad SW3-3(1150.01mm,309.745mm) on Multi-Layer
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Violation between Un-Routed Net Constraint: Net CANbus0_R\X\1\B\F\ Between Pad U1_CAN_0-10(987.1mm,334.34mm) on Top Layer And Track (1031.5mm,423mm)(1032mm,423.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus0_R\X\0\B\F\ Between Pad U1_CAN_0-11(987.1mm,335.61mm) on Top Layer And Track (1031mm,423.5mm)(1031mm,423.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus0_I\N\T\ Between Pad U1_CAN_0-12(987.1mm,336.88mm) on Top Layer And Track (1028.5mm,426mm)(1029mm,426.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetU1_CAN_0_13 Between Pad U1_CAN_0-13(987.1mm,338.15mm) on Top Layer And Track (1034.5mm,420mm)(1035mm,420.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetU1_CAN_0_14 Between Pad U1_CAN_0-14(987.1mm,339.42mm) on Top Layer And Track (1038mm,418.5mm)(1038.5mm,418mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetU1_CAN_0_15 Between Pad U1_CAN_0-15(987.1mm,340.69mm) on Top Layer And Track (1038.5mm,419mm)(1039mm,418.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus0_SPI_C\S\ Between Pad U1_CAN_0-16(987.1mm,341.96mm) on Top Layer And Track (1040.5mm,421mm)(1041mm,420.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus0_R\E\S\E\T\ Between Pad U1_CAN_0-17(987.1mm,343.23mm) on Top Layer And Track (1040mm,420.5mm)(1040.5mm,420mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Via (975mm,333mm) from Top Layer to Bottom Layer And Pad U1_CAN_0-9(978mm,334.34mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus1_R\X\1\B\F\ Between Pad U1_CAN_1-10(987.1mm,311.84mm) on Top Layer And Track (1033mm,421.5mm)(1033.5mm,422mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus1_R\X\0\B\F\ Between Pad U1_CAN_1-11(987.1mm,313.11mm) on Top Layer And Track (1032.5mm,422mm)(1032.5mm,422mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus1_I\N\T\ Between Pad U1_CAN_1-12(987.1mm,314.38mm) on Top Layer And Track (1032mm,422.5mm)(1032.5mm,423mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus1_SPI_C\S\ Between Pad U1_CAN_1-16(987.1mm,319.46mm) on Top Layer And Track (1041.5mm,422mm)(1042mm,421.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net CANbus1_R\E\S\E\T\ Between Pad U1_CAN_1-17(987.1mm,320.73mm) on Top Layer And Track (1041.5mm,421mm)(1041.5mm,421mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Track (1057.45mm,323.35mm)(1057.5mm,323.4mm) on Top Layer And Pad U12-2(1072.85mm,323.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Left1 Between Track (982.5mm,412mm)(984mm,412mm) on Top Layer And Pad U3-2(1029.775mm,438mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Left2 Between Track (982.5mm,405.5mm)(984mm,405.5mm) on Top Layer And Pad U3-3(1029.775mm,437.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Left3 Between Track (982.5mm,399mm)(984mm,399mm) on Top Layer And Pad U3-4(1029.775mm,437mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Right0 Between Track (982.5mm,392.5mm)(984mm,392.5mm) on Top Layer And Pad U3-5(1029.775mm,436.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Right1 Between Track (982.5mm,386mm)(984mm,386mm) on Top Layer And Pad U3-6(1029.775mm,436mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ22_1 Between Pad U3-69(1045.225mm,435.5mm) on Top Layer And Track (1080.5mm,397mm)(1080.5mm,398.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Right2 Between Track (982.5mm,379.5mm)(984mm,379.5mm) on Top Layer And Pad U3-7(1029.775mm,435.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ28_UART_MCU_1 Between Pad U3-73(1045.225mm,437.5mm) on Top Layer And Track (1083.5mm,418.5mm)(1090mm,418.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ11_1 Between Track (1045mm,385.5mm)(1045mm,402.5mm) on Top Layer And Pad U3-74(1045.225mm,438mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ25_1 Between Pad U3-77(1043mm,440.225mm) on Top Layer And Pad U8-30(1133.84mm,446mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ24_1 Between Pad U3-78(1042.5mm,440.225mm) on Top Layer And Pad U8-29(1132.57mm,446mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ26_1 Between Pad U3-79(1042mm,440.225mm) on Top Layer And Track (1135mm,446.11mm)(1135mm,447mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Running1 Between Track (982.5mm,438mm)(984mm,438mm) on Top Layer And Pad U3-98(1032.5mm,440.225mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Running2 Between Track (982.5mm,431.5mm)(984mm,431.5mm) on Top Layer And Pad U3-99(1032mm,440.225mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetU3_80 Between Track (1041.5mm,443mm)(1042mm,443.5mm) on Top Layer And Pad U4-11(1140.75mm,390.75mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetU3_81 Between Track (1041.5mm,444mm)(1041.5mm,444mm) on Top Layer And Pad U4-12(1140.75mm,391.4mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Pad U8-15(1126.22mm,463.5mm) on Top Layer And Via (1129.5mm,467mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net NetJ29_UART_ESP32_1 Between Track (1079mm,485mm)(1087mm,485mm) on Top Layer And Pad U8-35(1140.19mm,446mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net GND Between Track (1008.1mm,437.1mm)(1009.847mm,437.1mm) on Top Layer And Via (1012.5mm,435mm) from Top Layer to Bottom Layer
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Violation between Un-Routed Net Constraint: Net SDCard_WriteProtect Between Track (1021mm,395mm)(1021mm,402.5mm) on Top Layer And Track (1042mm,422.5mm)(1042.5mm,422mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ13_1 Between Track (1026mm,397mm)(1026mm,402.5mm) on Top Layer And Track (1035mm,419.5mm)(1035mm,419.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetR24_1 Between Track (1027.5mm,427mm)(1028mm,427.5mm) on Top Layer And Track (1074.5mm,396mm)(1074.5mm,398.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetJ15_1 Between Track (1028.5mm,397mm)(1028.5mm,402.5mm) on Top Layer And Track (1036mm,419.5mm)(1036mm,424.775mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net Left0 Between Track (982.5mm,418.5mm)(984mm,418.5mm) on Top Layer And Track (1028.5mm,439mm)(1029mm,438.5mm) on Top Layer
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Violation between Un-Routed Net Constraint: Net NetU3_24 Between Track (1028mm,426.5mm)(1028mm,426.5mm) on Top Layer And Track (1075.5mm,328.5mm)(1075.5mm,344mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net Right3 Between Track (982.5mm,373mm)(984mm,373mm) on Top Layer And Track (1029.775mm,435mm)(1029.775mm,435mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Track (1031.025mm,450.025mm)(1031.025mm,451.975mm) on Top Layer And Track (1040mm,450.947mm)(1041.276mm,452.224mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net Running3 Between Track (982.5mm,425mm)(984mm,425mm) on Top Layer And Track (1031.5mm,440.225mm)(1031.5mm,441mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net Running0 Between Track (982.5mm,444.5mm)(984mm,444.5mm) on Top Layer And Track (1032.5mm,443mm)(1032.5mm,443mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net GPSReceiver_Interrupt Between Track (1033.5mm,421mm)(1033.5mm,421mm) on Top Layer And Track (1103.5mm,322mm)(1134.12mm,322mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net NetJ14_1 Between Track (1036.5mm,397mm)(1036.5mm,402.5mm) on Top Layer And Track (1036.5mm,419mm)(1036.5mm,424.775mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net NetJ21_1 Between Track (1040mm,419.5mm)(1040mm,419.5mm) on Top Layer And Track (1065.5mm,346.5mm)(1065.5mm,348.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net SDCard_C\h\i\p\D\e\t\e\c\t\i\o\n\ Between Track (1041.5mm,394mm)(1041.5mm,402.5mm) on Top Layer And Track (1042.5mm,423mm)(1043mm,422.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net NetR26_1 Between Track (1041mm,444.5mm)(1041mm,444.5mm) on Top Layer And Track (1101.5mm,463.5mm)(1109mm,463.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net NetJ27_1 Between Track (1043.5mm,441mm)(1044mm,441.5mm) on Top Layer And Track (1101.5mm,443.5mm)(1103.5mm,443.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net NetJ23_1 Between Track (1045.225mm,436mm)(1045.225mm,436mm) on Top Layer And Track (1075.5mm,397mm)(1075.5mm,398.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net NetJ20_1 Between Track (1046mm,426.5mm)(1046.5mm,426mm) on Top Layer And Track (1066mm,346.5mm)(1066mm,348.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Track (1049.325mm,357.8mm)(1050.025mm,358.5mm) on Top Layer And Track (1063.5mm,358.85mm)(1064mm,358.85mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (990mm,322.5mm) from Top Layer to Bottom Layer And Track (1054.726mm,323.624mm)(1055.6mm,322.75mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1056.5mm,327.5mm) from Top Layer to Bottom Layer And Track (1068.65mm,338.5mm)(1068.65mm,338.825mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Track (987.1mm,322mm)(987.699mm,322mm) on Top Layer And Track (1073.5mm,323.5mm)(1073.5mm,323.921mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Track (938.75mm,339.75mm)(939.5mm,339mm) on Top Layer And Track (945.35mm,337.5mm)(945.85mm,337.5mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Track (951mm,317.54mm)(951.166mm,317.706mm) on Top Layer And Via (1114.5mm,316.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (959.5mm,319mm) from Top Layer to Bottom Layer And Track (987.1mm,322mm)(987.699mm,322mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (959.5mm,341.5mm) from Top Layer to Bottom Layer And Track (987.663mm,344.5mm)(987.823mm,344.66mm) on Top Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (985.5mm,349.5mm) from Top Layer to Bottom Layer And Via (1023mm,387.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1033mm,392mm) from Top Layer to Bottom Layer And Via (1076.5mm,394.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Via (1036.319mm,407.5mm) from Top Layer to Bottom Layer And Via (1139mm,372mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1036mm,428mm) from Top Layer to Bottom Layer And Via (1039mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1036mm,432.25mm) from Top Layer to Bottom Layer And Via (1039mm,431mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1036mm,432.25mm) from Top Layer to Bottom Layer And Via (1039mm,434mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1036mm,437mm) from Top Layer to Bottom Layer And Via (1039mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Via (1041.276mm,457.5mm) from Top Layer to Bottom Layer And Via (1084.5mm,456mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Via (1041.276mm,457.5mm) from Top Layer to Bottom Layer And Via (1084.5mm,464mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (990mm,322.5mm) from Top Layer to Bottom Layer And Via (1053.5mm,332.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1066mm,429.1mm) from Top Layer to Bottom Layer And Via (1093.5mm,414.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1069.5mm,310.5mm) from Top Layer to Bottom Layer And Via (1126.5mm,312mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1072mm,448mm) from Top Layer to Bottom Layer And Via (1111.5mm,449mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1072mm,456mm) from Top Layer to Bottom Layer And Via (1111.5mm,449mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1072mm,472mm) from Top Layer to Bottom Layer And Via (1091mm,480.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1073.5mm,343.5mm) from Top Layer to Bottom Layer And Via (1140mm,357mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1076.5mm,394.5mm) from Top Layer to Bottom Layer And Via (1079.5mm,394.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1079.5mm,394.5mm) from Top Layer to Bottom Layer And Via (1082.5mm,394.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1083.5mm,363.5mm) from Top Layer to Bottom Layer And Via (1132mm,360mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Via (1084.5mm,448mm) from Top Layer to Bottom Layer And Via (1084.5mm,456mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V-MCU Between Via (1084.5mm,464mm) from Top Layer to Bottom Layer And Via (1084.5mm,472mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1091mm,488.5mm) from Top Layer to Bottom Layer And Via (1142mm,471.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1093.5mm,414.5mm) from Top Layer to Bottom Layer And Via (1127mm,399mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (1093.5mm,422.5mm) from Top Layer to Bottom Layer And Via (1137.5mm,403mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (1129.5mm,467mm) from Top Layer to Bottom Layer And Via (1135.5mm,457.65mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (959.5mm,316.447mm) from Top Layer to Bottom Layer And Via (964.5mm,318mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (959.5mm,316.447mm) from Top Layer to Bottom Layer And Via (975mm,310.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (959.5mm,339mm) from Top Layer to Bottom Layer And Via (964.5mm,340.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net +3.3V Between Via (959.5mm,341.5mm) from Top Layer to Bottom Layer And Via (985.5mm,327mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (975mm,333mm) from Top Layer to Bottom Layer And Via (990mm,322.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,370.5mm) from Top Layer to Bottom Layer And Via (978.5mm,377mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,377mm) from Top Layer to Bottom Layer And Via (978.5mm,383.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,383.5mm) from Top Layer to Bottom Layer And Via (978.5mm,390mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,390mm) from Top Layer to Bottom Layer And Via (978.5mm,396.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,396.5mm) from Top Layer to Bottom Layer And Via (978.5mm,403mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,403mm) from Top Layer to Bottom Layer And Via (978.5mm,409.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,409.5mm) from Top Layer to Bottom Layer And Via (978.5mm,416mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,416mm) from Top Layer to Bottom Layer And Via (978.5mm,422.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,422.5mm) from Top Layer to Bottom Layer And Via (978.5mm,429mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,435.5mm) from Top Layer to Bottom Layer And Via (978.5mm,442mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,442mm) from Top Layer to Bottom Layer And Via (978.5mm,448.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,448.5mm) from Top Layer to Bottom Layer And Via (978.5mm,455mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,455mm) from Top Layer to Bottom Layer And Via (978.5mm,461.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,461.5mm) from Top Layer to Bottom Layer And Via (978.5mm,468mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,468mm) from Top Layer to Bottom Layer And Via (978.5mm,474.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,474.5mm) from Top Layer to Bottom Layer And Via (978.5mm,481mm) from Top Layer to Bottom Layer
|
||||
Violation between Un-Routed Net Constraint: Net GND Between Via (978.5mm,481mm) from Top Layer to Bottom Layer And Via (978.5mm,487.5mm) from Top Layer to Bottom Layer
|
||||
Rule Violations :164
|
||||
|
||||
Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Width Constraint (Min=0.127mm) (Max=2.54mm) (Preferred=0.254mm) (All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Width Constraint (Min=0.09mm) (Max=2.54mm) (Preferred=0.254mm) (OnLayer('Bottom Layer'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Width Constraint (Min=0.09mm) (Max=2.54mm) (Preferred=0.254mm) (OnLayer('Top Layer'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Minimum Annular Ring (Minimum=0.13mm) (All)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1134.8mm,455.55mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1134.8mm,456.95mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1135.5mm,454.85mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1135.5mm,456.25mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1135.5mm,457.65mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1136.2mm,455.55mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1136.2mm,456.95mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1136.9mm,454.85mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1136.9mm,456.25mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1136.9mm,457.65mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1137.6mm,455.55mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Violation between Minimum Annular Ring: (Collision < 0.13mm) Via (1137.6mm,456.95mm) from Top Layer to Bottom Layer (Annular Ring=0mm) On (Top Layer)
|
||||
Rule Violations :12
|
||||
|
||||
Processing Rule : Hole Size Constraint (Min=0.2mm) (Max=6.3mm) (All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Minimum Solder Mask Sliver (Gap=0.1mm) (All),(All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Silk To Solder Mask (Clearance=0.15mm) (IsPad),(All)
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J3_CAN_0-5(942.04mm,340.77mm) on Multi-Layer And Track (942.548mm,330.737mm)(942.548mm,350.803mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J3_CAN_1-5(942.04mm,318.27mm) on Multi-Layer And Track (942.548mm,308.237mm)(942.548mm,328.303mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J31-2(947.8mm,442mm) on Multi-Layer And Track (947.8mm,439.3mm)(947.8mm,444.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J34-2(947.8mm,409.5mm) on Multi-Layer And Track (947.8mm,406.8mm)(947.8mm,412.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J35-2(947.8mm,435.5mm) on Multi-Layer And Track (947.8mm,432.8mm)(947.8mm,438.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J36-2(947.8mm,403mm) on Multi-Layer And Track (947.8mm,400.3mm)(947.8mm,405.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J37-2(947.8mm,429mm) on Multi-Layer And Track (947.8mm,426.3mm)(947.8mm,431.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J38-2(947.8mm,396.5mm) on Multi-Layer And Track (947.8mm,393.8mm)(947.8mm,399.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J39-2(947.8mm,422.5mm) on Multi-Layer And Track (947.8mm,419.8mm)(947.8mm,425.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J40-2(947.8mm,390mm) on Multi-Layer And Track (947.8mm,387.3mm)(947.8mm,392.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J41-2(947.8mm,474.5mm) on Multi-Layer And Track (947.8mm,471.8mm)(947.8mm,477.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J42-2(947.8mm,383.5mm) on Multi-Layer And Track (947.8mm,380.8mm)(947.8mm,386.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J43-2(947.8mm,468mm) on Multi-Layer And Track (947.8mm,465.3mm)(947.8mm,470.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J44-2(947.8mm,377mm) on Multi-Layer And Track (947.8mm,374.3mm)(947.8mm,379.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J45-2(947.8mm,461.5mm) on Multi-Layer And Track (947.8mm,458.8mm)(947.8mm,464.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J46-2(947.8mm,370.5mm) on Multi-Layer And Track (947.8mm,367.8mm)(947.8mm,373.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J47-2(947.8mm,455mm) on Multi-Layer And Track (947.8mm,452.3mm)(947.8mm,457.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J48-2(947.8mm,494mm) on Multi-Layer And Track (947.8mm,491.3mm)(947.8mm,496.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J49-2(947.8mm,448.5mm) on Multi-Layer And Track (947.8mm,445.8mm)(947.8mm,451.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J50-2(947.8mm,487.5mm) on Multi-Layer And Track (947.8mm,484.8mm)(947.8mm,490.2mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J51-2(947.8mm,416mm) on Multi-Layer And Track (947.8mm,413.3mm)(947.8mm,418.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad J52-2(947.8mm,481mm) on Multi-Layer And Track (947.8mm,478.3mm)(947.8mm,483.7mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED1-1(1084.5mm,445.5mm) on Top Layer And Track (1080.436mm,443.976mm)(1085.516mm,443.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED1-1(1084.5mm,445.5mm) on Top Layer And Track (1080.436mm,447.024mm)(1085.516mm,447.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED1-2(1081.5mm,445.5mm) on Top Layer And Track (1080.436mm,443.976mm)(1085.516mm,443.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED1-2(1081.5mm,445.5mm) on Top Layer And Track (1080.436mm,447.024mm)(1085.516mm,447.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED2-1(1084.5mm,453.5mm) on Top Layer And Track (1080.436mm,451.976mm)(1085.516mm,451.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED2-1(1084.5mm,453.5mm) on Top Layer And Track (1080.436mm,455.024mm)(1085.516mm,455.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED2-2(1081.5mm,453.5mm) on Top Layer And Track (1080.436mm,451.976mm)(1085.516mm,451.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED2-2(1081.5mm,453.5mm) on Top Layer And Track (1080.436mm,455.024mm)(1085.516mm,455.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED3-1(1084.5mm,461.5mm) on Top Layer And Track (1080.436mm,459.976mm)(1085.516mm,459.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED3-1(1084.5mm,461.5mm) on Top Layer And Track (1080.436mm,463.024mm)(1085.516mm,463.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED3-2(1081.5mm,461.5mm) on Top Layer And Track (1080.436mm,459.976mm)(1085.516mm,459.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED3-2(1081.5mm,461.5mm) on Top Layer And Track (1080.436mm,463.024mm)(1085.516mm,463.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED4-1(1084.5mm,469.5mm) on Top Layer And Track (1080.436mm,467.976mm)(1085.516mm,467.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED4-1(1084.5mm,469.5mm) on Top Layer And Track (1080.436mm,471.024mm)(1085.516mm,471.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED4-2(1081.5mm,469.5mm) on Top Layer And Track (1080.436mm,467.976mm)(1085.516mm,467.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED4-2(1081.5mm,469.5mm) on Top Layer And Track (1080.436mm,471.024mm)(1085.516mm,471.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_ESP32-1(1126.5mm,502mm) on Top Layer And Track (1122.436mm,500.476mm)(1127.516mm,500.476mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_ESP32-1(1126.5mm,502mm) on Top Layer And Track (1122.436mm,503.524mm)(1127.516mm,503.524mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_ESP32-2(1123.5mm,502mm) on Top Layer And Track (1122.436mm,500.476mm)(1127.516mm,500.476mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_ESP32-2(1123.5mm,502mm) on Top Layer And Track (1122.436mm,503.524mm)(1127.516mm,503.524mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_MCU-1(1129.5mm,436mm) on Top Layer And Track (1125.436mm,434.476mm)(1130.516mm,434.476mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_MCU-1(1129.5mm,436mm) on Top Layer And Track (1125.436mm,437.524mm)(1130.516mm,437.524mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_MCU-2(1126.5mm,436mm) on Top Layer And Track (1125.436mm,434.476mm)(1130.516mm,434.476mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED5_UART_MCU-2(1126.5mm,436mm) on Top Layer And Track (1125.436mm,437.524mm)(1130.516mm,437.524mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_ESP32-1(1126.5mm,492.5mm) on Top Layer And Track (1122.436mm,490.976mm)(1127.516mm,490.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_ESP32-1(1126.5mm,492.5mm) on Top Layer And Track (1122.436mm,494.024mm)(1127.516mm,494.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_ESP32-2(1123.5mm,492.5mm) on Top Layer And Track (1122.436mm,490.976mm)(1127.516mm,490.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_ESP32-2(1123.5mm,492.5mm) on Top Layer And Track (1122.436mm,494.024mm)(1127.516mm,494.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_MCU-1(1129.5mm,426.5mm) on Top Layer And Track (1125.436mm,424.976mm)(1130.516mm,424.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_MCU-1(1129.5mm,426.5mm) on Top Layer And Track (1125.436mm,428.024mm)(1130.516mm,428.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_MCU-2(1126.5mm,426.5mm) on Top Layer And Track (1125.436mm,424.976mm)(1130.516mm,424.976mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED6_UART_MCU-2(1126.5mm,426.5mm) on Top Layer And Track (1125.436mm,428.024mm)(1130.516mm,428.024mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED7-1(1117mm,316.5mm) on Top Layer And Track (1115.476mm,312.436mm)(1115.476mm,317.516mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED7-1(1117mm,316.5mm) on Top Layer And Track (1118.524mm,312.436mm)(1118.524mm,317.516mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED7-2(1117mm,313.5mm) on Top Layer And Track (1115.476mm,312.436mm)(1115.476mm,317.516mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.15mm) Between Pad LED7-2(1117mm,313.5mm) on Top Layer And Track (1118.524mm,312.436mm)(1118.524mm,317.516mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-10(1108.334mm,483.19mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-11(1108.334mm,483.825mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-12(1108.334mm,484.46mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-13(1108.334mm,485.095mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-14(1108.334mm,485.73mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-15(1108.334mm,486.365mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-16(1108.334mm,487mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.143mm < 0.15mm) Between Pad U9_UART_ESP32-8(1103mm,482.555mm) on Top Layer And Track (1102.042mm,482.121mm)(1109.281mm,482.121mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.143mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.143mm < 0.15mm) Between Pad U9_UART_ESP32-9(1108.334mm,482.555mm) on Top Layer And Track (1102.042mm,482.121mm)(1109.281mm,482.121mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.143mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_ESP32-9(1108.334mm,482.555mm) on Top Layer And Track (1109.281mm,482.121mm)(1109.281mm,487.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-10(1111.334mm,417.19mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-11(1111.334mm,417.825mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-12(1111.334mm,418.46mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-13(1111.334mm,419.095mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-14(1111.334mm,419.73mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-15(1111.334mm,420.365mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-16(1111.334mm,421mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.143mm < 0.15mm) Between Pad U9_UART_MCU-8(1106mm,416.555mm) on Top Layer And Track (1105.042mm,416.121mm)(1112.281mm,416.121mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.143mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.143mm < 0.15mm) Between Pad U9_UART_MCU-9(1111.334mm,416.555mm) on Top Layer And Track (1105.042mm,416.121mm)(1112.281mm,416.121mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.143mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.149mm < 0.15mm) Between Pad U9_UART_MCU-9(1111.334mm,416.555mm) on Top Layer And Track (1112.281mm,416.121mm)(1112.281mm,421.455mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.149mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad Y1_CAN_0-1(971mm,335.5mm) on Top Layer And Text "C3_CAN_0" (960.66mm,331.365mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.15mm) Between Pad Y1_CAN_1-1(971mm,313mm) on Top Layer And Text "C3_CAN_1" (960.914mm,308.865mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Rule Violations :80
|
||||
|
||||
Processing Rule : Silk to Silk (Clearance=0mm) (All),(All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Net Antennae (Tolerance=0mm) (All)
|
||||
Violation between Net Antennae: Track (1021mm,395mm)(1021mm,402.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1025.5mm,436mm)(1026mm,435.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1025mm,435.5mm)(1025.5mm,435mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1026.5mm,437mm)(1027mm,436.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1026mm,397mm)(1026mm,402.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1026mm,436.5mm)(1026.5mm,436mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1027.5mm,427mm)(1028mm,427.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1027.5mm,438mm)(1028mm,437.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1027mm,437.5mm)(1027.5mm,437mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1028.5mm,397mm)(1028.5mm,402.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1028.5mm,426mm)(1029mm,426.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1028.5mm,439mm)(1029mm,438.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1028mm,426.5mm)(1028.5mm,427mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1028mm,438.5mm)(1028.5mm,438mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1031.5mm,423mm)(1032mm,423.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1031.5mm,442mm)(1032mm,441.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1031mm,423.5mm)(1031.5mm,424mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1031mm,441.5mm)(1031.5mm,441mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1032.5mm,422mm)(1033mm,422.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1032.5mm,443mm)(1033mm,442.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1032mm,422.5mm)(1032.5mm,423mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1032mm,442.5mm)(1032.5mm,442mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1033.5mm,421mm)(1034mm,421.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1033mm,421.5mm)(1033.5mm,422mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1034.5mm,420mm)(1035mm,420.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1035mm,419.5mm)(1035.5mm,420mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1036.5mm,397mm)(1036.5mm,402.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1036.5mm,419mm)(1036.5mm,424.775mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1036mm,419.5mm)(1036mm,424.775mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1038.5mm,419mm)(1039mm,418.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1038mm,418.5mm)(1038.5mm,418mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1039.5mm,420mm)(1040mm,419.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1039mm,419.5mm)(1039.5mm,419mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1040.5mm,421mm)(1041mm,420.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1040.5mm,444mm)(1041mm,444.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1040mm,420.5mm)(1040.5mm,420mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1041.5mm,394mm)(1041.5mm,402.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1041.5mm,422mm)(1042mm,421.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1041.5mm,443mm)(1042mm,443.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1041mm,421.5mm)(1041.5mm,421mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1041mm,443.5mm)(1041.5mm,444mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1042.5mm,423mm)(1043mm,422.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1042.5mm,442mm)(1043mm,442.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1042mm,422.5mm)(1042.5mm,422mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1042mm,442.5mm)(1042.5mm,443mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1043.5mm,441mm)(1044mm,441.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1043mm,441.5mm)(1043.5mm,442mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1045mm,385.5mm)(1045mm,402.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1046.5mm,427mm)(1047mm,426.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1046.5mm,438mm)(1047mm,438.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1046mm,426.5mm)(1046.5mm,426mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1046mm,438.5mm)(1046.5mm,439mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1047.5mm,428mm)(1048mm,427.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1047.5mm,437mm)(1048mm,437.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1047mm,427.5mm)(1047.5mm,427mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1047mm,437.5mm)(1047.5mm,438mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1048.5mm,429mm)(1049mm,428.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1048.5mm,436mm)(1049mm,436.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1048mm,428.5mm)(1048.5mm,428mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1048mm,436.5mm)(1048.5mm,437mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1049.5mm,430mm)(1050mm,429.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1049.5mm,435mm)(1050mm,435.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1049mm,429.5mm)(1049.5mm,429mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1049mm,435.5mm)(1049.5mm,436mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1050mm,430.5mm)(1050.5mm,430mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1050mm,434.5mm)(1050.5mm,435mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1065.5mm,346.5mm)(1065.5mm,348.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1066mm,346.5mm)(1066mm,348.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1074.5mm,396mm)(1074.5mm,398.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1075.5mm,328.5mm)(1075.5mm,344mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1075.5mm,397mm)(1075.5mm,398.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1079mm,484.5mm)(1087mm,484.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1079mm,485mm)(1087mm,485mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1080.5mm,397mm)(1080.5mm,398.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1083.5mm,418.5mm)(1090mm,418.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1083.5mm,419mm)(1090mm,419mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1101.5mm,443.5mm)(1103.5mm,443.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1101.5mm,448.5mm)(1103.5mm,448.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1101.5mm,453.5mm)(1103.5mm,453.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1101.5mm,458.5mm)(1103.5mm,458.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1101.5mm,463.5mm)(1109mm,463.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1103.5mm,322mm)(1134.12mm,322mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1103.5mm,327mm)(1121.53mm,327mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1103.5mm,332mm)(1123.99mm,332mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1103.5mm,337mm)(1126.45mm,337mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1103.5mm,342mm)(1128.91mm,342mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1114mm,381.5mm)(1131mm,381.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1114mm,382mm)(1130.5mm,382mm) on Top Layer
|
||||
Violation between Net Antennae: Track (1139mm,368mm)(1141mm,368mm) on Top Layer
|
||||
Violation between Net Antennae: Track (939.5mm,503mm)(943.5mm,503mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,373mm)(984mm,373mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,379.5mm)(984mm,379.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,386mm)(984mm,386mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,392.5mm)(984mm,392.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,399mm)(984mm,399mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,405.5mm)(984mm,405.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,412mm)(984mm,412mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,418.5mm)(984mm,418.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,425mm)(984mm,425mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,431.5mm)(984mm,431.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,438mm)(984mm,438mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,444.5mm)(984mm,444.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,451mm)(984mm,451mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,457.5mm)(984mm,457.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,464mm)(984mm,464mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,470.5mm)(984mm,470.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,477mm)(984mm,477mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,483.5mm)(984mm,483.5mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,490mm)(984mm,490mm) on Top Layer
|
||||
Violation between Net Antennae: Track (982.5mm,496.5mm)(984mm,496.5mm) on Top Layer
|
||||
Violation between Net Antennae: Via (1002.5mm,427.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1002.5mm,435mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1012.5mm,427.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1020mm,427.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1023mm,387.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1025mm,360mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1031.5mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1031.5mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1031.5mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1031.5mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1031.5mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1031.5mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033.5mm,377mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033.724mm,407.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,392mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,432.25mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1033mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,432.25mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1034.5mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036.319mm,407.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036mm,432.25mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1036mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1038.724mm,457.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,431mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,434mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1039mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,431mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,434mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1040.5mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1041.276mm,457.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,431mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,434mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1042mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,426.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,428mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,429.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,434mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,435.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,437mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1043.5mm,438.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1045mm,360mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1055mm,318mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1066mm,429.1mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1066mm,431.9mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1068.5mm,361mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1069.5mm,310.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1072.5mm,331mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1072mm,448mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1072mm,456mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1072mm,464mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1072mm,472mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1073.5mm,343.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1076.5mm,394.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1076mm,373.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1078mm,363.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1079.5mm,394.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1082.5mm,394.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1083.5mm,363.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1084.5mm,448mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1084.5mm,456mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1084.5mm,464mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1084.5mm,472mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1091mm,480.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1091mm,488.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1093.5mm,414.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1093.5mm,422.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1111.5mm,449mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1114.5mm,316.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1127mm,399mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1129.5mm,467mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1130mm,384mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1132mm,360mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1134.8mm,455.55mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1134.8mm,456.95mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1135.5mm,454.85mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1135.5mm,456.25mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1135.5mm,457.65mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1136.2mm,455.55mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1136.2mm,456.95mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1136.9mm,454.85mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1136.9mm,456.25mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1136.9mm,457.65mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1137.5mm,403mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1137.6mm,455.55mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1137.6mm,456.95mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1139.5mm,317.15mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1140mm,357mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1140mm,403mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1142mm,471.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1151mm,386.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (1151mm,396.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (959.5mm,316.447mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (959.5mm,319mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (959.5mm,339mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (959.5mm,341.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (964.5mm,318mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (964.5mm,340.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (975mm,310.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (975mm,333mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (985.5mm,327mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (985.5mm,349.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (990mm,322.5mm) from Top Layer to Bottom Layer
|
||||
Violation between Net Antennae: Via (990mm,345mm) from Top Layer to Bottom Layer
|
||||
Rule Violations :241
|
||||
|
||||
Processing Rule : Room JTAG_MCU-Button (Bounding Region = (922.5mm, 497mm, 945.5mm, 509.5mm) (InComponentClass('JTAG_MCU-Button'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room Main_GeneralPurposeSwitch (Bounding Region = (1137mm, 362.5mm, 1161mm, 374.5mm) (InComponentClass('Main_GeneralPurposeSwitch'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room GPS_0 (Bounding Region = (1102mm, 307mm, 1182.5mm, 362.5mm) (InComponentClass('GPS_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room CAN_1 (Bounding Region = (913mm, 307mm, 992.5mm, 329.5mm) (InComponentClass('CAN_1'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room SD_0 (Bounding Region = (1020mm, 307mm, 1052mm, 405mm) (InComponentClass('SD_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room MCU_Power_0 (Bounding Region = (1011.5mm, 406.5mm, 1062mm, 458.5mm) (InComponentClass('MCU_Power_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room UART_MCU (Bounding Region = (1071.5mm, 408.5mm, 1161.5mm, 442mm) (InComponentClass('UART_MCU'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room UART_ESP32 (Bounding Region = (1065mm, 476mm, 1163mm, 509.5mm) (InComponentClass('UART_ESP32'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room RTC_0 (Bounding Region = (1052mm, 356mm, 1088mm, 405mm) (InComponentClass('RTC_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room Main (Bounding Region = (1000.5mm, 406.5mm, 1105mm, 478.5mm) (InComponentClass('Main'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room Lighting_0 (Bounding Region = (928mm, 367mm, 1000.5mm, 497mm) (InComponentClass('Lighting_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room ESP32_0 (Bounding Region = (1093mm, 442mm, 1160mm, 476mm) (InComponentClass('ESP32_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room CAN_0 (Bounding Region = (913mm, 329.5mm, 992.5mm, 352mm) (InComponentClass('CAN_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room JTAG_MCU (Bounding Region = (1016.5mm, 480mm, 1059.5mm, 492.5mm) (InComponentClass('JTAG_MCU'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room IMU_0 (Bounding Region = (1052mm, 307mm, 1078mm, 349.5mm) (InComponentClass('IMU_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Room RS-232_0 (Bounding Region = (1111.5mm, 374.5mm, 1163.5mm, 408.5mm) (InComponentClass('RS-232_0'))
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
|
||||
Rule Violations :0
|
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Violations Detected : 497
|
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Waived Violations : 0
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SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=Clearance|NETSCOPE=DifferentNets|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Clearance - Inner Layers|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=BAQKXLSX|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=7.874mil|GENERICCLEARANCE=7.874mil|IGNOREPADTOPADCLEARANCEINFOOTPRINT=FALSE|OBJECTCLEARANCES=ClearanceObj_Arc-ClearanceObj_Arc:50000;ClearanceObj_Arc-ClearanceObj_Track:50000;ClearanceObj_Arc-ClearanceObj_Via:50000;ClearanceObj_Arc-ClearanceObj_Text:100000;ClearanceObj_Track-ClearanceObj_Track:50000;ClearanceObj_Track-ClearanceObj_Via:50000;ClearanceObj_Track-ClearanceObj_Text:100000;ClearanceObj_SMDPad-ClearanceObj_SMDPad:50000;ClearanceObj_SMDPad-ClearanceObj_Via:50000;ClearanceObj_SMDPad-ClearanceObj_Text:100000;ClearanceObj_THPad-ClearanceObj_Via:50000;ClearanceObj_THPad-ClearanceObj_Text:100000;ClearanceObj_Via-ClearanceObj_Via:50000;ClearanceObj_Via-ClearanceObj_Text:100000;ClearanceObj_Fill-ClearanceObj_Text:100000;ClearanceObj_Poly-ClearanceObj_Text:100000;ClearanceObj_Region-ClearanceObj_Text:100000;ClearanceObj_Text-ClearanceObj_Text:100000<30>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=Clearance|NETSCOPE=DifferentNets|LAYERKIND=SameLayer|SCOPE1EXPRESSION=OnLayer('Top Layer')|SCOPE2EXPRESSION=All|NAME=Clearance - Top Layer|ENABLED=TRUE|PRIORITY=2|COMMENT= |UNIQUEID=XPKYGNVB|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=7.874mil|GENERICCLEARANCE=7.874mil|IGNOREPADTOPADCLEARANCEINFOOTPRINT=FALSE|OBJECTCLEARANCES=ClearanceObj_Arc-ClearanceObj_Arc:35433;ClearanceObj_Arc-ClearanceObj_Track:35433;ClearanceObj_Arc-ClearanceObj_Via:50000;ClearanceObj_Arc-ClearanceObj_Text:100000;ClearanceObj_Track-ClearanceObj_Track:35433;ClearanceObj_Track-ClearanceObj_Via:50000;ClearanceObj_Track-ClearanceObj_Text:100000;ClearanceObj_SMDPad-ClearanceObj_SMDPad:50000;ClearanceObj_SMDPad-ClearanceObj_Via:50000;ClearanceObj_SMDPad-ClearanceObj_Text:100000;ClearanceObj_THPad-ClearanceObj_Via:50000;ClearanceObj_THPad-ClearanceObj_Text:100000;ClearanceObj_Via-ClearanceObj_Via:50000;ClearanceObj_Via-ClearanceObj_Text:100000;ClearanceObj_Fill-ClearanceObj_Text:100000;ClearanceObj_Poly-ClearanceObj_Text:100000;ClearanceObj_Region-ClearanceObj_Text:100000;ClearanceObj_Text-ClearanceObj_Text:100000<30>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=Clearance|NETSCOPE=DifferentNets|LAYERKIND=SameLayer|SCOPE1EXPRESSION=OnLayer('Bottom Layer')|SCOPE2EXPRESSION=All|NAME=Clearance - Bottom Layer|ENABLED=TRUE|PRIORITY=3|COMMENT= |UNIQUEID=UBXXAMCC|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=7.874mil|GENERICCLEARANCE=7.874mil|IGNOREPADTOPADCLEARANCEINFOOTPRINT=FALSE|OBJECTCLEARANCES=ClearanceObj_Arc-ClearanceObj_Arc:35433;ClearanceObj_Arc-ClearanceObj_Track:35433;ClearanceObj_Arc-ClearanceObj_Via:50000;ClearanceObj_Arc-ClearanceObj_Text:100000;ClearanceObj_Track-ClearanceObj_Track:35433;ClearanceObj_Track-ClearanceObj_Via:50000;ClearanceObj_Track-ClearanceObj_Text:100000;ClearanceObj_SMDPad-ClearanceObj_SMDPad:50000;ClearanceObj_SMDPad-ClearanceObj_Via:50000;ClearanceObj_SMDPad-ClearanceObj_Text:100000;ClearanceObj_THPad-ClearanceObj_Via:50000;ClearanceObj_THPad-ClearanceObj_Text:100000;ClearanceObj_Via-ClearanceObj_Via:50000;ClearanceObj_Via-ClearanceObj_Text:100000;ClearanceObj_Fill-ClearanceObj_Text:100000;ClearanceObj_Poly-ClearanceObj_Text:100000;ClearanceObj_Region-ClearanceObj_Text:100000;ClearanceObj_Text-ClearanceObj_Text:100000<30>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=Width|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=OnLayer('Top Layer')|SCOPE2EXPRESSION=All|NAME=Width - Top Layer|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=XSNPPCWA|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=100mil|MINLIMIT=3.5433mil|PREFEREDWIDTH=10mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=Width|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=OnLayer('Bottom Layer')|SCOPE2EXPRESSION=All|NAME=Width - Bottom Layer|ENABLED=TRUE|PRIORITY=2|COMMENT= |UNIQUEID=TQXQVLPU|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=100mil|MINLIMIT=3.5433mil|PREFEREDWIDTH=10mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=Width|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Width - Inner Layers|ENABLED=TRUE|PRIORITY=3|COMMENT= |UNIQUEID=YARCMING|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=100mil|MINLIMIT=5mil|PREFEREDWIDTH=10mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=PlaneConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PlaneConnect|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=WIWDBJSB|DEFINEDBYLOGICALDOCUMENT=FALSE|PLANECONNECTSTYLE=Relief|RELIEFEXPANSION=20mil|RELIEFENTRIES=4|RELIEFCONDUCTORWIDTH=10mil|RELIEFAIRGAP=10mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingTopology|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Routing Topology - Top Layer|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=IRANABTR|DEFINEDBYLOGICALDOCUMENT=FALSE|TOPOLOGY=Horizontal<61>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingTopology|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Routing Topology - Bottom Layer|ENABLED=TRUE|PRIORITY=2|COMMENT= |UNIQUEID=LUHUDJKS|DEFINEDBYLOGICALDOCUMENT=FALSE|TOPOLOGY=Vertical<61>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingTopology|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Routing Topology - Other Layers|ENABLED=TRUE|PRIORITY=3|COMMENT= |UNIQUEID=MWWQEBHI|DEFINEDBYLOGICALDOCUMENT=FALSE|TOPOLOGY=Shortest<73>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingPriority|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingPriority|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=QJXQYHXX|DEFINEDBYLOGICALDOCUMENT=FALSE|ROUTINGPRIORITY=0<>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingLayers|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingLayers|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=XWYWRRLL|DEFINEDBYLOGICALDOCUMENT=FALSE|TOP LAYER_V5=TRUE|MID LAYER 1_V5=TRUE|MID LAYER 2_V5=TRUE|MID LAYER 3_V5=TRUE|MID LAYER 4_V5=TRUE|MID LAYER 5_V5=TRUE|MID LAYER 6_V5=TRUE|MID LAYER 7_V5=TRUE|MID LAYER 8_V5=TRUE|MID LAYER 9_V5=TRUE|MID LAYER 10_V5=TRUE|MID LAYER 11_V5=TRUE|MID LAYER 12_V5=TRUE|MID LAYER 13_V5=TRUE|MID LAYER 14_V5=TRUE|MID LAYER 15_V5=TRUE|MID LAYER 16_V5=TRUE|MID LAYER 17_V5=TRUE|MID LAYER 18_V5=TRUE|MID LAYER 19_V5=TRUE|MID LAYER 20_V5=TRUE|MID LAYER 21_V5=TRUE|MID LAYER 22_V5=TRUE|MID LAYER 23_V5=TRUE|MID LAYER 24_V5=TRUE|MID LAYER 25_V5=TRUE|MID LAYER 26_V5=TRUE|MID LAYER 27_V5=TRUE|MID LAYER 28_V5=TRUE|MID LAYER 29_V5=TRUE|MID LAYER 30_V5=TRUE|BOTTOM LAYER_V5=TRUE<55>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingCorners|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingCorners|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=PUDUANCO|DEFINEDBYLOGICALDOCUMENT=FALSE|CORNERSTYLE=45-Degree|MINSETBACK=39.3701mil|MAXSETBACK=100mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=RoutingVias|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=RoutingVias|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=HHGIXLAQ|DEFINEDBYLOGICALDOCUMENT=FALSE|HOLEWIDTH=27.9921mil|WIDTH=50mil|VIASTYLE=Through Hole|MINHOLEWIDTH=7.874mil|MINWIDTH=15.748mil|MAXHOLEWIDTH=250mil|MAXWIDTH=196.8504mil<EFBFBD>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=PlaneClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PlaneClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=UHPVNHEI|DEFINEDBYLOGICALDOCUMENT=FALSE|CLEARANCE=20mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=SolderMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SolderMaskExpansion|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=TSAOMCVO|DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=3.937mil|ISTENTINGTOP=FALSE<53>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=PasteMaskExpansion|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PasteMaskExpansion|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=VOCYESJC|DEFINEDBYLOGICALDOCUMENT=FALSE|EXPANSION=0mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=ShortCircuit|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=ShortCircuit|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=ASBITISL|DEFINEDBYLOGICALDOCUMENT=FALSE|ALLOWED=FALSE<53>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=UnRoutedNet|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=UnRoutedNet|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=NBEEKANG|DEFINEDBYLOGICALDOCUMENT=FALSE<53>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=MinimumAnnularRing|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=MinimumAnnularRing|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=QPUSEKXO|DEFINEDBYLOGICALDOCUMENT=FALSE|MINIMUMRING=5.1181mil<EFBFBD>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=PolygonConnect|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=PolygonConnect_1|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=RGVWXEIW|DEFINEDBYLOGICALDOCUMENT=FALSE|THPAD.CONNECTSTYLE=Relief|THPAD.RELIEFCONDUCTORWIDTH=20mil|THPAD.RELIEFENTRIES=4|THPAD.POLYGONRELIEFANGLE=90 Angle|THPAD.AIRGAPWIDTH=10mil|SMDPAD.CONNECTSTYLE=Relief|SMDPAD.RELIEFCONDUCTORWIDTH=20mil|SMDPAD.RELIEFENTRIES=4|SMDPAD.POLYGONRELIEFANGLE=90 Angle|SMDPAD.AIRGAPWIDTH=10mil|VIA.CONNECTSTYLE=Direct|VIA.RELIEFCONDUCTORWIDTH=20mil|VIA.RELIEFENTRIES=4|VIA.POLYGONRELIEFANGLE=90 Angle|VIA.AIRGAPWIDTH=10mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=HoleSize|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=HoleSize|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=CRCUXGTT|DEFINEDBYLOGICALDOCUMENT=FALSE|ABSOLUTEVALUES=TRUE|MAXLIMIT=248.0315mil|MINLIMIT=7.874mil|MAXPERCENT=80.000|MINPERCENT=20.000<EFBFBD>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FabricationTestpoint|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=FabricationTestpoint|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=VFYOCOON|DEFINEDBYLOGICALDOCUMENT=FALSE|SIDE=3|TESTPOINTUNDERCOMPONENT=TRUE|MINSIZE=40mil|MAXSIZE=100mil|PREFEREDSIZE=60mil|MINHOLESIZE=0mil|MAXHOLESIZE=40mil|PREFEREDHOLESIZE=32mil|TESTPOINTGRID=1mil|ALLOWSIDETOP=TRUE|ALLOWSIDEBOTTOM=TRUE|USEGRID=TRUE|GRIDTOLERANCE=0.01mil<EFBFBD>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FabricationTestPointUsage|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=FabricationTestPointUsage|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=MVCRLTEN|DEFINEDBYLOGICALDOCUMENT=FALSE|VALID=0|ALLOWMULTIPLE=FALSE<53>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=LayerPairs|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=LayerPairs|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=IJPGUTNS|DEFINEDBYLOGICALDOCUMENT=FALSE|ENFORCE=TRUE<55>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsBGA|SCOPE2EXPRESSION=All|NAME=Fanout_BGA|ENABLED=TRUE|PRIORITY=1|COMMENT=Fanout_BGA (Default Rule)|UNIQUEID=EEDNVDSR|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsLCC|SCOPE2EXPRESSION=All|NAME=Fanout_LCC|ENABLED=TRUE|PRIORITY=2|COMMENT=Fanout_LCC (Default Rule)|UNIQUEID=HDJJVIXU|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsSOIC|SCOPE2EXPRESSION=All|NAME=Fanout_SOIC|ENABLED=TRUE|PRIORITY=3|COMMENT=Fanout_SOIC (Default Rule)|UNIQUEID=BXQOUCRG|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=(CompPinCount < 5)|SCOPE2EXPRESSION=All|NAME=Fanout_Small|ENABLED=TRUE|PRIORITY=4|COMMENT=Fanout_Small (Default Rule)|UNIQUEID=PFNHOUHO|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=OutThenIn|VIAGRID=1mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Fanout_Default|ENABLED=TRUE|PRIORITY=5|COMMENT=Fanout_Default (Default Rule)|UNIQUEID=XMJBIIHW|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=DiffPairsRouting|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=DiffPairsRouting|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=XBPCIQRP|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=10mil|MINLIMIT=10mil|MOSTFREQGAP=10mil|TOPLAYER_MINWIDTH=15mil|TOPLAYER_MAXWIDTH=15mil|TOPLAYER_PREFWIDTH=15mil|MIDLAYER1_MINWIDTH=15mil|MIDLAYER1_MAXWIDTH=15mil|MIDLAYER1_PREFWIDTH=15mil|MIDLAYER2_MINWIDTH=15mil|MIDLAYER2_MAXWIDTH=15mil|MIDLAYER2_PREFWIDTH=15mil|MIDLAYER3_MINWIDTH=15mil|MIDLAYER3_MAXWIDTH=15mil|MIDLAYER3_PREFWIDTH=15mil|MIDLAYER4_MINWIDTH=15mil|MIDLAYER4_MAXWIDTH=15mil|MIDLAYER4_PREFWIDTH=15mil|MIDLAYER5_MINWIDTH=15mil|MIDLAYER5_MAXWIDTH=15mil|MIDLAYER5_PREFWIDTH=15mil|MIDLAYER6_MINWIDTH=15mil|MIDLAYER6_MAXWIDTH=15mil|MIDLAYER6_PREFWIDTH=15mil|MIDLAYER7_MINWIDTH=15mil|MIDLAYER7_MAXWIDTH=15mil|MIDLAYER7_PREFWIDTH=15mil|MIDLAYER8_MINWIDTH=15mil|MIDLAYER8_MAXWIDTH=15mil|MIDLAYER8_PREFWIDTH=15mil|MIDLAYER9_MINWIDTH=15mil|MIDLAYER9_MAXWIDTH=15mil|MIDLAYER9_PREFWIDTH=15mil|MIDLAYER10_MINWIDTH=15mil|MIDLAYER10_MAXWIDTH=15mil|MIDLAYER10_PREFWIDTH=15mil|MIDLAYER11_MINWIDTH=15mil|MIDLAYER11_MAXWIDTH=15mil|MIDLAYER11_PREFWIDTH=15mil|MIDLAYER12_MINWIDTH=15mil|MIDLAYER12_MAXWIDTH=15mil|MIDLAYER12_PREFWIDTH=15mil|MIDLAYER13_MINWIDTH=15mil|MIDLAYER13_MAXWIDTH=15mil|MIDLAYER13_PREFWIDTH=15mil|MIDLAYER14_MINWIDTH=15mil|MIDLAYER14_MAXWIDTH=15mil|MIDLAYER14_PREFWIDTH=15mil|MIDLAYER15_MINWIDTH=15mil|MIDLAYER15_MAXWIDTH=15mil|MIDLAYER15_PREFWIDTH=15mil|MIDLAYER16_MINWIDTH=15mil|MIDLAYER16_MAXWIDTH=15mil|MIDLAYER16_PREFWIDTH=15mil|MIDLAYER17_MINWIDTH=15mil|MIDLAYER17_MAXWIDTH=15mil|MIDLAYER17_PREFWIDTH=15mil|MIDLAYER18_MINWIDTH=15mil|MIDLAYER18_MAXWIDTH=15mil|MIDLAYER18_PREFWIDTH=15mil|MIDLAYER19_MINWIDTH=15mil|MIDLAYER19_MAXWIDTH=15mil|MIDLAYER19_PREFWIDTH=15mil|MIDLAYER20_MINWIDTH=15mil|MIDLAYER20_MAXWIDTH=15mil|MIDLAYER20_PREFWIDTH=15mil|MIDLAYER21_MINWIDTH=15mil|MIDLAYER21_MAXWIDTH=15mil|MIDLAYER21_PREFWIDTH=15mil|MIDLAYER22_MINWIDTH=15mil|MIDLAYER22_MAXWIDTH=15mil|MIDLAYER22_PREFWIDTH=15mil|MIDLAYER23_MINWIDTH=15mil|MIDLAYER23_MAXWIDTH=15mil|MIDLAYER23_PREFWIDTH=15mil|MIDLAYER24_MINWIDTH=15mil|MIDLAYER24_MAXWIDTH=15mil|MIDLAYER24_PREFWIDTH=15mil|MIDLAYER25_MINWIDTH=15mil|MIDLAYER25_MAXWIDTH=15mil|MIDLAYER25_PREFWIDTH=15mil|MIDLAYER26_MINWIDTH=15mil|MIDLAYER26_MAXWIDTH=15mil|MIDLAYER26_PREFWIDTH=15mil|MIDLAYER27_MINWIDTH=15mil|MIDLAYER27_MAXWIDTH=15mil|MIDLAYER27_PREFWIDTH=15mil|MIDLAYER28_MINWIDTH=15mil|MIDLAYER28_MAXWIDTH=15mil|MIDLAYER28_PREFWIDTH=15mil|MIDLAYER29_MINWIDTH=15mil|MIDLAYER29_MAXWIDTH=15mil|MIDLAYER29_PREFWIDTH=15mil|MIDLAYER30_MINWIDTH=15mil|MIDLAYER30_MAXWIDTH=15mil|MIDLAYER30_PREFWIDTH=15mil|BOTTOMLAYER_MINWIDTH=15mil|BOTTOMLAYER_MAXWIDTH=15mil|BOTTOMLAYER_PREFWIDTH=15mil|MAXUNCOUPLEDLENGTH=500mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=HoleToHoleClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=HoleToHoleClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=MGLEJLWR|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=10mil|ALLOWSTACKEDMICROVIAS=FALSE<53>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=MinimumSolderMaskSliver|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=MinimumSolderMaskSliver|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=RHEFDXSH|DEFINEDBYLOGICALDOCUMENT=FALSE|MINSOLDERMASKWIDTH=3.937mil<EFBFBD>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=SilkToSolderMaskClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsPad|SCOPE2EXPRESSION=All|NAME=SilkToSolderMaskClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=DUTQWYGM|DEFINEDBYLOGICALDOCUMENT=FALSE|MINSILKSCREENTOMASKGAP=5.9055mil|CLEARANCETOEXPOSEDCOPPER=TRUE<55>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=SilkToSilkClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SilkToSilkClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=ELFNATTU|DEFINEDBYLOGICALDOCUMENT=FALSE|SILKTOSILKCLEARANCE=0mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=NetAntennae|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=NetAntennae|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=RSDOOYBB|DEFINEDBYLOGICALDOCUMENT=FALSE|NETANTENNAETOLERANCE=0mil<69>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=AssemblyTestpoint|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=AssemblyTestpoint|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=PFQFLDYK|DEFINEDBYLOGICALDOCUMENT=FALSE|TESTPOINTUNDERCOMPONENT=TRUE|MINSIZE=40mil|MAXSIZE=100mil|PREFEREDSIZE=60mil|MINHOLESIZE=0mil|MAXHOLESIZE=40mil|PREFEREDHOLESIZE=32mil|TESTPOINTGRID=1mil|USEGRID=TRUE|GRIDTOLERANCE=0.01mil|ALLOWSIDETOP=TRUE|ALLOWSIDEBOTTOM=TRUE<55>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=AssemblyTestPointUsage|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=AssemblyTestPointUsage|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=EIAOHXSU|DEFINEDBYLOGICALDOCUMENT=FALSE<53>
|
||||
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|KEEPOUT=FALSE|UNIONINDEX=0|RULEKIND=UnpouredPolygon|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=UnpouredPolygon|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=KWFRAGHX|DEFINEDBYLOGICALDOCUMENT=FALSE<53>
|
||||
Reference in New Issue
Block a user