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Nearly finished with USCI A2 initialization

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This commit is contained in:
William Miceli
2021-06-06 17:19:32 -04:00
parent 57a3b91606
commit 3630116723
5 changed files with 151 additions and 71 deletions
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2
Telem_Debug/Debug_UART-USB/main.c
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@@ -3,7 +3,7 @@
#include "interrupts.h"
#include "io_init.h"
#include "timers.h"
#include "usci_init.h"
#include "usci.h"
volatile unsigned char status_flag = FALSE;

101
Telem_Debug/Debug_UART-USB/usci.c Normal file
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@@ -0,0 +1,101 @@
#include "usci.h"
void usci_init(void){
usci_A0_init();
usci_A1_init();
usci_A2_init();
usci_A3_init();
usci_B0_init();
usci_B1_init();
usci_B2_init();
usci_B3_init();
}
/*************************************************************************/
/******************************** USCI A0 ********************************/
/*************************************************************************/
void usci_A0_init(void){
}
/*************************************************************************/
/******************************** USCI A1 ********************************/
/*************************************************************************/
void usci_A1_init(void){
}
/*************************************************************************/
/******************************** USCI A2 ********************************/
/*************************************************************************/
void usci_A2_init(void){
UCA2CTL1 |= UCSWRST; // Software Reset Enable - Set high, disabling the USCI module; Register options can only be set when the UCSWRST bit = 1
UCA2CTL1 &= ~0b11000000; // Reset both UCSSELx bits so the USCI Clock Source Select bits are more predictable
UCA2CTL1 |= UCSSEL__SMCLK; // USCI Clock Source Select - SMCLK
UCA2CTL1 &= ~UCRXEIE; // Receive Erroneous-Character Interrupt Enable - Disabled
UCA2CTL1 &= ~UCBRKIE; // Receive Break Character Interrupt Enable - Disabled
UCA2CTL1 &= ~UCDORM; // Dormant - Disabled; USCI module will not be put into sleep mode
UCA2CTL1 &= ~UCTXADDR; // Transmit Address - Next frame transmitted is data
UCA2CTL1 &= ~UCTXBRK; // Transmit Break - Do not transmit a Break/Synch as the next frame
UCA2CTL0 &= ~UCPEN; // Parity Enable - Disabled
UCA2CTL0 &= ~UCMSB; // MSB First Select - Set low; Least Significant Bit will be sent first
UCA2CTL0 &= ~UC7BIT; // Character Length - 8-bit data selected
UCA2CTL0 &= ~UCSPB; // Stop Bit Select - One stop bit selected
UCA2CTL0 &= ~UCMODE1; // USCI Mode [2 Bits Required] - UART mode selected
UCA2CTL0 &= ~UCMODE0; // USCI Mode [2 Bits Required] - UART mode selected
UCA2CTL0 &= ~UCSYNC; // Synchronous Mode Enable - Asynchronous mode selected
}
void usci_A2_enable(void){
UCA2CTL1 &= ~UCSWRST; // Software Reset Enable - Set low, enabling the USCI module
}
void usci_A2_disable(void){
UCA2CTL1 |= UCSWRST; // Software Reset Enable - Set high, disabling the USCI module
}
/*************************************************************************/
/******************************** USCI A3 ********************************/
/*************************************************************************/
void usci_A3_init(void){
}
/*************************************************************************/
/******************************** USCI B0 ********************************/
/*************************************************************************/
void usci_B0_init(void){
}
/*************************************************************************/
/******************************** USCI B1 ********************************/
/*************************************************************************/
void usci_B1_init(void){
}
/*************************************************************************/
/******************************** USCI B2 ********************************/
/*************************************************************************/
void usci_B2_init(void){
}
/*************************************************************************/
/******************************** USCI B3 ********************************/
/*************************************************************************/
void usci_B3_init(void){
}

49
Telem_Debug/Debug_UART-USB/usci.h Normal file
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@@ -0,0 +1,49 @@
/*
* USCI Functions
*/
#ifndef USCI_H_
#define USCI_H_
#include <msp430x54xa.h>
/*
* Initializes all USCI modules using their own respective `usci_xx_init()` functions
*/
void usci_init(void);
/*
* USCI A2 Initialization [UART Mode]
*
* The FTDI FT230XS-R that was selected can handle up to 3 Mbaud, so we'll target 1 Mbaud
* The SMCLK is currently at 10 MHz
*
* Using the "MSP430 USCI/EUSCI UART Baud Rate Calculation" tool at:
* http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
* The following values were found:
* clock Prescalar: 10
* firstModReg: 0
* secondModReg: 0
* overSampling: 0
*/
void usci_A0_init(void);
void usci_A1_init(void);
void usci_A2_init(void);
void usci_A2_enable(void);
void usci_A2_disable(void);
void usci_A3_init(void);
void usci_B0_init(void);
void usci_B1_init(void);
void usci_B2_init(void);
void usci_B3_init(void);
#endif /* USCI_H_ */

58
Telem_Debug/Debug_UART-USB/usci_init.c
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@@ -1,58 +0,0 @@
#include "usci_init.h"
void usci_init(void){
/******************************** USCI A0 ********************************/
/******************************** USCI A1 ********************************/
/******************************** USCI A2 ********************************/
/*
* UART Mode
*
* The FTDI FT230XS-R that was selected can handle up to 3 Mbaud, so we'll target 1 Mbaud
* The SMCLK is currently at 10 MHz
*
* Using the "MSP430 USCI/EUSCI UART Baud Rate Calculation" tool at:
* http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
* The following values were found:
* clock Prescalar: 10
* firstModReg: 0
* secondModReg: 0
* overSampling: 0
*/
// USCI_A_UART_initParam USCI_A_UART_initParam_A2 = {
// .selectClockSource = USCI_A_UART_CLOCKSOURCE_SMCLK,
// .clockPrescalar = 10,
// .firstModReg = 0,
// .secondModReg = 0,
// .parity = USCI_A_UART_NO_PARITY,
// .msborLsbFirst = USCI_A_UART_LSB_FIRST,
// .numberofStopBits = USCI_A_UART_ONE_STOP_BIT,
// .uartMode = USCI_A_UART_MODE,
// .overSampling = USCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION
// };
//USCI_A_UART_init(USCI_A2_BASE, &USCI_A_UART_initParam_A2); // Initialize the UART block
//USCI_A_UART_enable(USCI_A2_BASE); // Enables operation of the UART block
// Initialization
UCA2CTL1 |= UCSWRST; // Sets the Software Reset to high, disabling the USCI module; Register options can only be set when the UCSWRST bit = 1
UCA2CTL1 |= UCSSEL__SMCLK; // USCI module will use the SMCLK as it's clock source
UCA2CTL1 &= UCRXEIE; // Disabling Erroneous Character Reception Interrupt
UCA2CTL1 &= UCBRKIE; // Disabling Break Character Reception Interrupt
UCA2CTL1 &= UCDORM; // Disabling USCI module Dormant Mode
UCA2CTL1 &= UCTXADDR; // Next frame transmitted is an address
UCA2CTL1 &= UCTXBRK; // Do not transmit a Break/Synch as the next frame
/******************************** USCI A3 ********************************/
/******************************** USCI B0 ********************************/
/******************************** USCI B1 ********************************/
/******************************** USCI B2 ********************************/
/******************************** USCI B3 ********************************/
}

12
Telem_Debug/Debug_UART-USB/usci_init.h
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@@ -1,12 +0,0 @@
/*
* USCI Initialization
*/
#ifndef USCI_INIT_H_
#define USCI_INIT_H_
#include <msp430x54xa.h>
void usci_init(void);
#endif /* USCI_INIT_H_ */