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Fixed P3 mem and other

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This commit is contained in:
jose.rodriguezlabra
2019-04-11 21:13:57 -04:00
parent a3064a836b
commit 0b4554a844
10 changed files with 114 additions and 146 deletions
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139
CPU9bits_tb_behav.wcfg
View File

@@ -11,42 +11,15 @@
</db_ref>
</db_ref_list>
<zoom_setting>
<ZoomStartTime time="0fs"></ZoomStartTime>
<ZoomEndTime time="18800001fs"></ZoomEndTime>
<Cursor1Time time="34200000fs"></Cursor1Time>
<ZoomStartTime time="2601900fs"></ZoomStartTime>
<ZoomEndTime time="100801901fs"></ZoomEndTime>
<Cursor1Time time="77402000fs"></Cursor1Time>
</zoom_setting>
<column_width_setting>
<NameColumnWidth column_width="188"></NameColumnWidth>
<ValueColumnWidth column_width="76"></ValueColumnWidth>
<ValueColumnWidth column_width="72"></ValueColumnWidth>
</column_width_setting>
<WVObjectSize size="5" />
<wvobject fp_name="group436" type="group">
<obj_property name="label">Program Counter</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/reset" type="logic">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/En" type="logic">
<obj_property name="ElementShortName">En</obj_property>
<obj_property name="ObjectShortName">En</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/Din" type="array">
<obj_property name="ElementShortName">Din[8:0]</obj_property>
<obj_property name="ObjectShortName">Din[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/Dout" type="array">
<obj_property name="ElementShortName">Dout[8:0]</obj_property>
<obj_property name="ObjectShortName">Dout[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group191" type="group">
<obj_property name="label">Fetch Unit</obj_property>
<obj_property name="DisplayName">label</obj_property>
@@ -66,7 +39,6 @@
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/AddrIn" type="array">
<obj_property name="ElementShortName">AddrIn[8:0]</obj_property>
<obj_property name="ObjectShortName">AddrIn[8:0]</obj_property>
<obj_property name="isExpanded"></obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/AddrOut" type="array">
<obj_property name="ElementShortName">AddrOut[8:0]</obj_property>
@@ -88,10 +60,10 @@
<wvobject fp_name="group182" type="group">
<obj_property name="label">Control Unit</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/instIn" type="array">
<obj_property name="ElementShortName">instIn[3:0]</obj_property>
<obj_property name="ObjectShortName">instIn[3:0]</obj_property>
<obj_property name="isExpanded"></obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/functBit" type="logic">
<obj_property name="ElementShortName">functBit</obj_property>
@@ -158,62 +130,75 @@
<obj_property name="Radix">BINARYRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/memory" type="array">
<obj_property name="ElementShortName">memory[100:0][8:0]</obj_property>
<obj_property name="ObjectShortName">memory[100:0][8:0]</obj_property>
<obj_property name="ElementShortName">memory[8:0][8:0]</obj_property>
<obj_property name="ObjectShortName">memory[8:0][8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/A" type="array">
<obj_property name="ElementShortName">A[8:0]</obj_property>
<obj_property name="ObjectShortName">A[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/B" type="array">
<obj_property name="ElementShortName">B[8:0]</obj_property>
<obj_property name="ObjectShortName">B[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/out" type="array">
<obj_property name="ElementShortName">out[8:0]</obj_property>
<obj_property name="ObjectShortName">out[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/A" type="logic">
<obj_property name="ElementShortName">A</obj_property>
<obj_property name="ObjectShortName">A</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/B" type="logic">
<obj_property name="ElementShortName">B</obj_property>
<obj_property name="ObjectShortName">B</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/out" type="logic">
<obj_property name="ElementShortName">out</obj_property>
<obj_property name="ObjectShortName">out</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/clk" type="logic">
<wvobject fp_name="group595" type="group">
<obj_property name="label">RF</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/reset" type="logic">
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/reset" type="logic">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/En" type="logic">
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/En" type="logic">
<obj_property name="ElementShortName">En</obj_property>
<obj_property name="ObjectShortName">En</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/Din" type="array">
<obj_property name="ElementShortName">Din[50:0]</obj_property>
<obj_property name="ObjectShortName">Din[50:0]</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/write_index" type="array">
<obj_property name="ElementShortName">write_index[1:0]</obj_property>
<obj_property name="ObjectShortName">write_index[1:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/Dout" type="array">
<obj_property name="ElementShortName">Dout[50:0]</obj_property>
<obj_property name="ObjectShortName">Dout[50:0]</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/op0_idx" type="array">
<obj_property name="ElementShortName">op0_idx[1:0]</obj_property>
<obj_property name="ObjectShortName">op0_idx[1:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/op1_idx" type="array">
<obj_property name="ElementShortName">op1_idx[1:0]</obj_property>
<obj_property name="ObjectShortName">op1_idx[1:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/write_data" type="array">
<obj_property name="ElementShortName">write_data[8:0]</obj_property>
<obj_property name="ObjectShortName">write_data[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/op0" type="array">
<obj_property name="ElementShortName">op0[8:0]</obj_property>
<obj_property name="ObjectShortName">op0[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/op1" type="array">
<obj_property name="ElementShortName">op1[8:0]</obj_property>
<obj_property name="ObjectShortName">op1[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r0_out" type="array">
<obj_property name="ElementShortName">r0_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r0_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r1_out" type="array">
<obj_property name="ElementShortName">r1_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r1_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r2_out" type="array">
<obj_property name="ElementShortName">r2_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r2_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r3_out" type="array">
<obj_property name="ElementShortName">r3_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r3_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
</wave_config>

44
lab2CA.cache/wt/webtalk_pa.xml
View File

@@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pa" timeStamp="Thu Apr 11 19:22:54 2019">
<application name="pa" timeStamp="Thu Apr 11 21:13:26 2019">
<section name="Project Information" visible="false">
<property name="ProjectID" value="3e90d71c8f614f9191c5fa413d1d835d" type="ProjectID"/>
<property name="ProjectIteration" value="2" type="ProjectIteration"/>
@@ -17,48 +17,50 @@ This means code written to parse this file will need to be revisited each subseq
<property name="ImplStrategy" value="Vivado Implementation Defaults" type="ImplStrategy"/>
</item>
<item name="Java Command Handlers">
<property name="CloseProject" value="2" type="JavaHandler"/>
<property name="CloseProject" value="3" type="JavaHandler"/>
<property name="OpenProject" value="1" type="JavaHandler"/>
<property name="RunImplementation" value="1" type="JavaHandler"/>
<property name="RunSchematic" value="1" type="JavaHandler"/>
<property name="SimulationRelaunch" value="6" type="JavaHandler"/>
<property name="SimulationRun" value="1" type="JavaHandler"/>
<property name="SimulationRelaunch" value="10" type="JavaHandler"/>
<property name="SimulationRun" value="2" type="JavaHandler"/>
<property name="ViewTaskImplementation" value="1" type="JavaHandler"/>
<property name="ViewTaskRTLAnalysis" value="1" type="JavaHandler"/>
<property name="ZoomIn" value="2" type="JavaHandler"/>
<property name="ZoomOut" value="1" type="JavaHandler"/>
</item>
<item name="Gui Handlers">
<property name="BaseDialog_OK" value="4" type="GuiHandlerData"/>
<property name="BaseDialog_OK" value="5" type="GuiHandlerData"/>
<property name="BaseDialog_YES" value="1" type="GuiHandlerData"/>
<property name="ClosePlanner_YES" value="1" type="GuiHandlerData"/>
<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="13" type="GuiHandlerData"/>
<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="7" type="GuiHandlerData"/>
<property name="CodeView_TOGGLE_COLUMN_SELECTION_MODE" value="2" type="GuiHandlerData"/>
<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="36" type="GuiHandlerData"/>
<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="8" type="GuiHandlerData"/>
<property name="GettingStartedView_OPEN_PROJECT" value="1" type="GuiHandlerData"/>
<property name="GraphicalView_ZOOM_FIT" value="3" type="GuiHandlerData"/>
<property name="GraphicalView_ZOOM_IN" value="1" type="GuiHandlerData"/>
<property name="MainMenuMgr_FILE" value="4" type="GuiHandlerData"/>
<property name="MainMenuMgr_PROJECT" value="2" type="GuiHandlerData"/>
<property name="PACommandNames_CLOSE_PROJECT" value="2" type="GuiHandlerData"/>
<property name="PACommandNames_SIMULATION_RELAUNCH" value="6" type="GuiHandlerData"/>
<property name="PACommandNames_SIMULATION_RUN_BEHAVIORAL" value="1" type="GuiHandlerData"/>
<property name="GraphicalView_ZOOM_FIT" value="5" type="GuiHandlerData"/>
<property name="GraphicalView_ZOOM_IN" value="5" type="GuiHandlerData"/>
<property name="HCodeEditor_SEARCH_TEXT_COMBO_BOX" value="5" type="GuiHandlerData"/>
<property name="MainMenuMgr_FILE" value="6" type="GuiHandlerData"/>
<property name="MainMenuMgr_PROJECT" value="3" type="GuiHandlerData"/>
<property name="PACommandNames_CLOSE_PROJECT" value="3" type="GuiHandlerData"/>
<property name="PACommandNames_SIMULATION_RELAUNCH" value="11" type="GuiHandlerData"/>
<property name="PACommandNames_SIMULATION_RUN_BEHAVIORAL" value="2" type="GuiHandlerData"/>
<property name="PACommandNames_ZOOM_IN" value="2" type="GuiHandlerData"/>
<property name="PACommandNames_ZOOM_OUT" value="1" type="GuiHandlerData"/>
<property name="PAViews_DEVICE" value="2" type="GuiHandlerData"/>
<property name="PAViews_PROJECT_SUMMARY" value="2" type="GuiHandlerData"/>
<property name="PAViews_PROJECT_SUMMARY" value="3" type="GuiHandlerData"/>
<property name="PAViews_SCHEMATIC" value="1" type="GuiHandlerData"/>
<property name="ProgressDialog_BACKGROUND" value="1" type="GuiHandlerData"/>
<property name="RDICommands_SAVE_FILE" value="7" type="GuiHandlerData"/>
<property name="RDIViews_WAVEFORM_VIEWER" value="16" type="GuiHandlerData"/>
<property name="RDIViews_WAVEFORM_VIEWER" value="83" type="GuiHandlerData"/>
<property name="SimulationObjectsPanel_SIMULATION_OBJECTS_TREE_TABLE" value="5" type="GuiHandlerData"/>
<property name="SimulationScopesPanel_SIMULATE_SCOPE_TABLE" value="16" type="GuiHandlerData"/>
<property name="SyntheticaGettingStartedView_RECENT_PROJECTS" value="1" type="GuiHandlerData"/>
<property name="WaveformNameTree_WAVEFORM_NAME_TREE" value="69" type="GuiHandlerData"/>
<property name="SimulationScopesPanel_SIMULATE_SCOPE_TABLE" value="30" type="GuiHandlerData"/>
<property name="SyntheticaGettingStartedView_RECENT_PROJECTS" value="2" type="GuiHandlerData"/>
<property name="WaveformNameTree_WAVEFORM_NAME_TREE" value="123" type="GuiHandlerData"/>
</item>
<item name="Other">
<property name="GuiMode" value="20" type="GuiMode"/>
<property name="GuiMode" value="49" type="GuiMode"/>
<property name="BatchMode" value="0" type="BatchMode"/>
<property name="TclMode" value="18" type="TclMode"/>
<property name="TclMode" value="41" type="TclMode"/>
</item>
</section>
</application>

29
lab2CA.runs/impl_1/gen_run.xml
View File

@@ -1,69 +1,50 @@
<?xml version="1.0" encoding="UTF-8"?>
<GenRun Id="impl_1" LaunchPart="xc7k160tifbg484-2L" LaunchTime="1555022469">
<File Type="BITSTR-BMM" Name="CPU9bits_bd.bmm"/>
<File Type="OPT-METHODOLOGY-DRC" Name="CPU9bits_methodology_drc_opted.rpt"/>
<File Type="INIT-TIMING" Name="CPU9bits_timing_summary_init.rpt"/>
<File Type="ROUTE-PWR" Name="CPU9bits_power_routed.rpt"/>
<File Type="PA-TCL" Name="CPU9bits.tcl"/>
<File Type="OPT-TIMING" Name="CPU9bits_timing_summary_opted.rpt"/>
<File Type="OPT-DCP" Name="CPU9bits_opt.dcp"/>
<File Type="BITSTR-BMM" Name="CPU9bits_bd.bmm"/>
<File Type="ROUTE-PWR-SUM" Name="CPU9bits_power_summary_routed.pb"/>
<File Type="REPORTS-TCL" Name="CPU9bits_reports.tcl"/>
<File Type="OPT-DCP" Name="CPU9bits_opt.dcp"/>
<File Type="OPT-DRC" Name="CPU9bits_drc_opted.rpt"/>
<File Type="OPT-HWDEF" Name="CPU9bits.hwdef"/>
<File Type="PWROPT-DCP" Name="CPU9bits_pwropt.dcp"/>
<File Type="PWROPT-DRC" Name="CPU9bits_drc_pwropted.rpt"/>
<File Type="PWROPT-TIMING" Name="CPU9bits_timing_summary_pwropted.rpt"/>
<File Type="PLACE-DCP" Name="CPU9bits_placed.dcp"/>
<File Type="PLACE-IO" Name="CPU9bits_io_placed.rpt"/>
<File Type="PLACE-CLK" Name="CPU9bits_clock_utilization_placed.rpt"/>
<File Type="PLACE-UTIL" Name="CPU9bits_utilization_placed.rpt"/>
<File Type="PLACE-UTIL-PB" Name="CPU9bits_utilization_placed.pb"/>
<File Type="PLACE-CTRL" Name="CPU9bits_control_sets_placed.rpt"/>
<File Type="PLACE-SIMILARITY" Name="CPU9bits_incremental_reuse_placed.rpt"/>
<File Type="PLACE-PRE-SIMILARITY" Name="CPU9bits_incremental_reuse_pre_placed.rpt"/>
<File Type="BG-BGN" Name="CPU9bits.bgn"/>
<File Type="PLACE-TIMING" Name="CPU9bits_timing_summary_placed.rpt"/>
<File Type="POSTPLACE-PWROPT-DCP" Name="CPU9bits_postplace_pwropt.dcp"/>
<File Type="BG-BIN" Name="CPU9bits.bin"/>
<File Type="POSTPLACE-PWROPT-TIMING" Name="CPU9bits_timing_summary_postplace_pwropted.rpt"/>
<File Type="PHYSOPT-DCP" Name="CPU9bits_physopt.dcp"/>
<File Type="PHYSOPT-DRC" Name="CPU9bits_drc_physopted.rpt"/>
<File Type="BITSTR-MSK" Name="CPU9bits.msk"/>
<File Type="PHYSOPT-TIMING" Name="CPU9bits_timing_summary_physopted.rpt"/>
<File Type="ROUTE-ERROR-DCP" Name="CPU9bits_routed_error.dcp"/>
<File Type="ROUTE-DCP" Name="CPU9bits_routed.dcp"/>
<File Type="ROUTE-BLACKBOX-DCP" Name="CPU9bits_routed_bb.dcp"/>
<File Type="ROUTE-DRC" Name="CPU9bits_drc_routed.rpt"/>
<File Type="ROUTE-DRC-PB" Name="CPU9bits_drc_routed.pb"/>
<File Type="BITSTR-LTX" Name="debug_nets.ltx"/>
<File Type="BITSTR-LTX" Name="CPU9bits.ltx"/>
<File Type="ROUTE-DRC-RPX" Name="CPU9bits_drc_routed.rpx"/>
<File Type="BITSTR-MMI" Name="CPU9bits.mmi"/>
<File Type="BITSTR-LTX" Name="CPU9bits.ltx"/>
<File Type="ROUTE-METHODOLOGY-DRC" Name="CPU9bits_methodology_drc_routed.rpt"/>
<File Type="BITSTR-MMI" Name="CPU9bits.mmi"/>
<File Type="ROUTE-METHODOLOGY-DRC-RPX" Name="CPU9bits_methodology_drc_routed.rpx"/>
<File Type="BITSTR-SYSDEF" Name="CPU9bits.sysdef"/>
<File Type="ROUTE-METHODOLOGY-DRC-PB" Name="CPU9bits_methodology_drc_routed.pb"/>
<File Type="BITSTR-SYSDEF" Name="CPU9bits.sysdef"/>
<File Type="ROUTE-PWR-RPX" Name="CPU9bits_power_routed.rpx"/>
<File Type="ROUTE-STATUS" Name="CPU9bits_route_status.rpt"/>
<File Type="ROUTE-STATUS-PB" Name="CPU9bits_route_status.pb"/>
<File Type="ROUTE-TIMINGSUMMARY" Name="CPU9bits_timing_summary_routed.rpt"/>
<File Type="ROUTE-TIMING-PB" Name="CPU9bits_timing_summary_routed.pb"/>
<File Type="ROUTE-TIMING-RPX" Name="CPU9bits_timing_summary_routed.rpx"/>
<File Type="ROUTE-SIMILARITY" Name="CPU9bits_incremental_reuse_routed.rpt"/>
<File Type="ROUTE-CLK" Name="CPU9bits_clock_utilization_routed.rpt"/>
<File Type="ROUTE-BUS-SKEW" Name="CPU9bits_bus_skew_routed.rpt"/>
<File Type="ROUTE-BUS-SKEW-PB" Name="CPU9bits_bus_skew_routed.pb"/>
<File Type="ROUTE-BUS-SKEW-RPX" Name="CPU9bits_bus_skew_routed.rpx"/>
<File Type="POSTROUTE-PHYSOPT-DCP" Name="CPU9bits_postroute_physopt.dcp"/>
<File Type="POSTROUTE-PHYSOPT-BLACKBOX-DCP" Name="CPU9bits_postroute_physopt_bb.dcp"/>
<File Type="POSTROUTE-PHYSOPT-TIMING" Name="CPU9bits_timing_summary_postroute_physopted.rpt"/>
<File Type="POSTROUTE-PHYSOPT-TIMING-PB" Name="CPU9bits_timing_summary_postroute_physopted.pb"/>
<File Type="POSTROUTE-PHYSOPT-TIMING-RPX" Name="CPU9bits_timing_summary_postroute_physopted.rpx"/>
<File Type="POSTROUTE-PHYSOPT-BUS-SKEW" Name="CPU9bits_bus_skew_postroute_physopted.rpt"/>
<File Type="POSTROUTE-PHYSOPT-BUS-SKEW-PB" Name="CPU9bits_bus_skew_postroute_physopted.pb"/>
<File Type="BG-BIT" Name="CPU9bits.bit"/>
<File Type="POSTROUTE-PHYSOPT-BUS-SKEW-RPX" Name="CPU9bits_bus_skew_postroute_physopted.rpx"/>
<File Type="BITSTR-RBT" Name="CPU9bits.rbt"/>
<File Type="BITSTR-NKY" Name="CPU9bits.nky"/>
<File Type="BG-DRC" Name="CPU9bits.drc"/>

3
lab2CA.runs/synth_1/gen_run.xml
View File

@@ -1,14 +1,11 @@
<?xml version="1.0" encoding="UTF-8"?>
<GenRun Id="synth_1" LaunchPart="xc7k160tifbg484-2L" LaunchTime="1555022469">
<File Type="PA-TCL" Name="CPU9bits.tcl"/>
<File Type="RDS-PROPCONSTRS" Name="CPU9bits_drc_synth.rpt"/>
<File Type="REPORTS-TCL" Name="CPU9bits_reports.tcl"/>
<File Type="RDS-RDS" Name="CPU9bits.vds"/>
<File Type="RDS-UTIL" Name="CPU9bits_utilization_synth.rpt"/>
<File Type="RDS-UTIL-PB" Name="CPU9bits_utilization_synth.pb"/>
<File Type="RDS-DCP" Name="CPU9bits.dcp"/>
<File Type="VDS-TIMINGSUMMARY" Name="CPU9bits_timing_summary_synth.rpt"/>
<File Type="VDS-TIMING-PB" Name="CPU9bits_timing_summary_synth.pb"/>
<FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
<Filter Type="Srcs"/>
<File Path="$PSRCDIR/sources_1/new/ALU.v">

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lab2CA.sim/sim_1/behav/xsim/xelab.pb
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22
lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
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@@ -1,10 +1,10 @@
webtalk_init -webtalk_dir C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/
webtalk_init -webtalk_dir C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/
webtalk_register_client -client project
webtalk_add_data -client project -key date_generated -value "Thu Apr 11 19:22:53 2019" -context "software_version_and_target_device"
webtalk_add_data -client project -key date_generated -value "Thu Apr 11 21:13:26 2019" -context "software_version_and_target_device"
webtalk_add_data -client project -key product_version -value "XSIM v2018.3 (64-bit)" -context "software_version_and_target_device"
webtalk_add_data -client project -key build_version -value "2405991" -context "software_version_and_target_device"
webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device"
webtalk_add_data -client project -key registration_id -value "174150793_174150794_210688225_140" -context "software_version_and_target_device"
webtalk_add_data -client project -key registration_id -value "" -context "software_version_and_target_device"
webtalk_add_data -client project -key tool_flow -value "xsim_vivado" -context "software_version_and_target_device"
webtalk_add_data -client project -key beta -value "FALSE" -context "software_version_and_target_device"
webtalk_add_data -client project -key route_design -value "FALSE" -context "software_version_and_target_device"
@@ -12,21 +12,21 @@ webtalk_add_data -client project -key target_family -value "not_applicable" -con
webtalk_add_data -client project -key target_device -value "not_applicable" -context "software_version_and_target_device"
webtalk_add_data -client project -key target_package -value "not_applicable" -context "software_version_and_target_device"
webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device"
webtalk_add_data -client project -key random_id -value "4e917e26-7591-4435-9135-15bd446b0238" -context "software_version_and_target_device"
webtalk_add_data -client project -key random_id -value "17336daf-0d92-4f07-b4a4-ff1c52043edb" -context "software_version_and_target_device"
webtalk_add_data -client project -key project_id -value "0a5803efda44405bb28bbf43ba22e808" -context "software_version_and_target_device"
webtalk_add_data -client project -key project_iteration -value "160" -context "software_version_and_target_device"
webtalk_add_data -client project -key project_iteration -value "153" -context "software_version_and_target_device"
webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment"
webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment"
webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" -context "user_environment"
webtalk_add_data -client project -key cpu_speed -value "3492 MHz" -context "user_environment"
webtalk_add_data -client project -key cpu_name -value "Intel(R) Core(TM) i5-3230M CPU @ 2.60GHz" -context "user_environment"
webtalk_add_data -client project -key cpu_speed -value "2594 MHz" -context "user_environment"
webtalk_add_data -client project -key total_processors -value "1" -context "user_environment"
webtalk_add_data -client project -key system_ram -value "34.000 GB" -context "user_environment"
webtalk_add_data -client project -key system_ram -value "8.000 GB" -context "user_environment"
webtalk_register_client -client xsim
webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command_line_options"
webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage"
webtalk_add_data -client xsim -key runtime -value "315 ns" -context "xsim\\usage"
webtalk_add_data -client xsim -key iteration -value "0" -context "xsim\\usage"
webtalk_add_data -client xsim -key Simulation_Time -value "0.09_sec" -context "xsim\\usage"
webtalk_add_data -client xsim -key Simulation_Memory -value "6596_KB" -context "xsim\\usage"
webtalk_transmit -clientid 4075045813 -regid "174150793_174150794_210688225_140" -xml C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
webtalk_add_data -client xsim -key Simulation_Time -value "0.06_sec" -context "xsim\\usage"
webtalk_add_data -client xsim -key Simulation_Memory -value "5980_KB" -context "xsim\\usage"
webtalk_transmit -clientid 4273905684 -regid "" -xml C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
webtalk_terminate

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lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem
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lab2CA.sim/sim_1/behav/xsim/xvlog.pb
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17
lab2CA.srcs/sources_1/new/instructionMemory.v
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@@ -5,17 +5,20 @@ module instructionMemory(
output reg [8:0] readData
);
reg [8:0] memory [5:0]; // Maximum of 512 memory locations
reg [8:0] memory [8:0]; // Maximum of 512 memory locations
// Vivado will give warnings of unconnected ports on the "address" bus if they are unused
initial begin
//Equation Solver
memory[0] <= 9'b000000000;
memory[1] <= 9'b000100000; //load
memory[2] <= 9'b000101000; //load
memory[3] <= 9'b010100010; //add
memory[4] <= 9'b111100000; //shift left
memory[5] <= 9'b111100000; //shift left
memory[0] <= 9'b000000000; //Stall
memory[1] <= 9'b000000000; //Stall
memory[2] <= 9'b011000000; //addi
memory[3] <= 9'b011001001; //addi
memory[4] <= 9'b000100000; //load
memory[5] <= 9'b000101010; //load
memory[6] <= 9'b010100010; //add
memory[7] <= 9'b111100000; //shift left
memory[8] <= 9'b111100000; //shift left
// //Testing all instructions
// memory[6] <= 9'b010100011; //sub

4
lab2CA.xpr
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@@ -3,7 +3,7 @@
<!-- -->
<!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. -->
<Project Version="7" Minor="39" Path="C:/Users/ecelab/ECE3570-Lab/lab2CA.xpr">
<Project Version="7" Minor="39" Path="C:/Users/JoseIgnacio/CA Lab/lab2CA.xpr">
<DefaultLaunch Dir="$PRUNDIR"/>
<Configuration>
<Option Name="Id" Val="0a5803efda44405bb28bbf43ba22e808"/>
@@ -31,7 +31,7 @@
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSAVendor" Val="xilinx"/>
<Option Name="DSANumComputeUnits" Val="60"/>
<Option Name="WTXSimLaunchSim" Val="395"/>
<Option Name="WTXSimLaunchSim" Val="404"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>