Added Binary Search Code
This commit is contained in:
jose.rodriguezlabra
@@ -11,13 +11,13 @@
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</db_ref>
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</db_ref_list>
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<zoom_setting>
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<ZoomStartTime time="60476450fs"></ZoomStartTime>
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<ZoomEndTime time="128876451fs"></ZoomEndTime>
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<Cursor1Time time="515000000fs"></Cursor1Time>
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<ZoomStartTime time="0fs"></ZoomStartTime>
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<ZoomEndTime time="124700001fs"></ZoomEndTime>
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<Cursor1Time time="68400000fs"></Cursor1Time>
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</zoom_setting>
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<column_width_setting>
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<NameColumnWidth column_width="175"></NameColumnWidth>
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<ValueColumnWidth column_width="138"></ValueColumnWidth>
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<ValueColumnWidth column_width="134"></ValueColumnWidth>
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</column_width_setting>
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<WVObjectSize size="33" />
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<wvobject fp_name="/CPU9bits_tb/clk" type="logic">
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@@ -1,14 +1,14 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<GenRun Id="impl_1" LaunchPart="xc7k160tifbg484-2L" LaunchTime="1553093609">
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<File Type="BITSTR-BMM" Name="CPU9bits_bd.bmm"/>
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<File Type="ROUTE-PWR" Name="CPU9bits_power_routed.rpt"/>
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<File Type="PA-TCL" Name="CPU9bits.tcl"/>
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<File Type="BITSTR-BMM" Name="CPU9bits_bd.bmm"/>
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<File Type="OPT-DCP" Name="CPU9bits_opt.dcp"/>
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<File Type="ROUTE-PWR-SUM" Name="CPU9bits_power_summary_routed.pb"/>
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<File Type="REPORTS-TCL" Name="CPU9bits_reports.tcl"/>
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<File Type="OPT-DCP" Name="CPU9bits_opt.dcp"/>
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<File Type="OPT-HWDEF" Name="CPU9bits.hwdef"/>
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<File Type="PWROPT-DCP" Name="CPU9bits_pwropt.dcp"/>
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<File Type="BG-BGN" Name="CPU9bits.bgn"/>
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<File Type="PWROPT-DCP" Name="CPU9bits_pwropt.dcp"/>
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<File Type="PLACE-DCP" Name="CPU9bits_placed.dcp"/>
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<File Type="PLACE-PRE-SIMILARITY" Name="CPU9bits_incremental_reuse_pre_placed.rpt"/>
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<File Type="POSTPLACE-PWROPT-DCP" Name="CPU9bits_postplace_pwropt.dcp"/>
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@@ -18,12 +18,12 @@
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<File Type="ROUTE-ERROR-DCP" Name="CPU9bits_routed_error.dcp"/>
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<File Type="ROUTE-DCP" Name="CPU9bits_routed.dcp"/>
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<File Type="ROUTE-BLACKBOX-DCP" Name="CPU9bits_routed_bb.dcp"/>
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<File Type="BITSTR-LTX" Name="CPU9bits.ltx"/>
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<File Type="ROUTE-DRC-RPX" Name="CPU9bits_drc_routed.rpx"/>
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<File Type="BITSTR-MMI" Name="CPU9bits.mmi"/>
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<File Type="BITSTR-LTX" Name="CPU9bits.ltx"/>
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<File Type="ROUTE-METHODOLOGY-DRC" Name="CPU9bits_methodology_drc_routed.rpt"/>
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<File Type="BITSTR-SYSDEF" Name="CPU9bits.sysdef"/>
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<File Type="BITSTR-MMI" Name="CPU9bits.mmi"/>
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<File Type="ROUTE-METHODOLOGY-DRC-PB" Name="CPU9bits_methodology_drc_routed.pb"/>
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<File Type="BITSTR-SYSDEF" Name="CPU9bits.sysdef"/>
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<File Type="ROUTE-TIMING-PB" Name="CPU9bits_timing_summary_routed.pb"/>
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<File Type="POSTROUTE-PHYSOPT-DCP" Name="CPU9bits_postroute_physopt.dcp"/>
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<File Type="POSTROUTE-PHYSOPT-BLACKBOX-DCP" Name="CPU9bits_postroute_physopt_bb.dcp"/>
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@@ -31,8 +31,8 @@
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<File Type="BITSTR-RBT" Name="CPU9bits.rbt"/>
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<File Type="BITSTR-NKY" Name="CPU9bits.nky"/>
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<File Type="BG-DRC" Name="CPU9bits.drc"/>
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<File Type="RDI-RDI" Name="CPU9bits.vdi"/>
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<File Type="ROUTE-CLK" Name="CPU9bits_clock_utilization_routed.rpt"/>
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<File Type="RDI-RDI" Name="CPU9bits.vdi"/>
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<File Type="WBT-USG" Name="usage_statistics_webtalk.html"/>
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<File Type="OPT-DRC" Name="CPU9bits_drc_opted.rpt"/>
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<File Type="PLACE-UTIL" Name="CPU9bits_utilization_placed.rpt"/>
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Binary file not shown.
@@ -1,10 +1,10 @@
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webtalk_init -webtalk_dir C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/
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webtalk_init -webtalk_dir C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/
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webtalk_register_client -client project
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webtalk_add_data -client project -key date_generated -value "Sun Mar 24 16:09:25 2019" -context "software_version_and_target_device"
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webtalk_add_data -client project -key date_generated -value "Sun Mar 24 16:34:26 2019" -context "software_version_and_target_device"
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webtalk_add_data -client project -key product_version -value "XSIM v2018.3 (64-bit)" -context "software_version_and_target_device"
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webtalk_add_data -client project -key build_version -value "2405991" -context "software_version_and_target_device"
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webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device"
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webtalk_add_data -client project -key registration_id -value "174150793_174150794_210688225_140" -context "software_version_and_target_device"
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webtalk_add_data -client project -key registration_id -value "" -context "software_version_and_target_device"
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webtalk_add_data -client project -key tool_flow -value "xsim_vivado" -context "software_version_and_target_device"
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webtalk_add_data -client project -key beta -value "FALSE" -context "software_version_and_target_device"
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webtalk_add_data -client project -key route_design -value "FALSE" -context "software_version_and_target_device"
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@@ -12,21 +12,31 @@ webtalk_add_data -client project -key target_family -value "not_applicable" -con
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webtalk_add_data -client project -key target_device -value "not_applicable" -context "software_version_and_target_device"
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webtalk_add_data -client project -key target_package -value "not_applicable" -context "software_version_and_target_device"
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webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device"
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webtalk_add_data -client project -key random_id -value "4e917e26-7591-4435-9135-15bd446b0238" -context "software_version_and_target_device"
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webtalk_add_data -client project -key random_id -value "17336daf-0d92-4f07-b4a4-ff1c52043edb" -context "software_version_and_target_device"
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webtalk_add_data -client project -key project_id -value "0a5803efda44405bb28bbf43ba22e808" -context "software_version_and_target_device"
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webtalk_add_data -client project -key project_iteration -value "97" -context "software_version_and_target_device"
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webtalk_add_data -client project -key project_iteration -value "82" -context "software_version_and_target_device"
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webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment"
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webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment"
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webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" -context "user_environment"
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webtalk_add_data -client project -key cpu_speed -value "3492 MHz" -context "user_environment"
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webtalk_add_data -client project -key cpu_name -value "Intel(R) Core(TM) i5-3230M CPU @ 2.60GHz" -context "user_environment"
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webtalk_add_data -client project -key cpu_speed -value "2594 MHz" -context "user_environment"
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webtalk_add_data -client project -key total_processors -value "1" -context "user_environment"
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webtalk_add_data -client project -key system_ram -value "34.000 GB" -context "user_environment"
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webtalk_add_data -client project -key system_ram -value "8.000 GB" -context "user_environment"
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webtalk_register_client -client xsim
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webtalk_add_data -client xsim -key Command -value "xsim" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key trace_waveform -value "true" -context "xsim\\usage"
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webtalk_add_data -client xsim -key runtime -value "520 ns" -context "xsim\\usage"
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webtalk_add_data -client xsim -key iteration -value "0" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Simulation_Time -value "0.03_sec" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Simulation_Memory -value "6444_KB" -context "xsim\\usage"
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webtalk_transmit -clientid 1317412355 -regid "174150793_174150794_210688225_140" -xml C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
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webtalk_add_data -client xsim -key File_Counter -value "9" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key Command -value "xelab" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key Vhdl2008 -value "false" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key GenDLL -value "false" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key SDFModeling -value "false" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key HWCosim -value "false" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key DPI_Used -value "false" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key Debug -value "typical" -context "xsim\\command_line_options"
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webtalk_add_data -client xsim -key Simulation_Image_Code -value "109 KB" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Simulation_Image_Data -value "19 KB" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Total_Nets -value "0" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Total_Processes -value "281" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Total_Instances -value "144" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Xilinx_HDL_Libraries_Used -value "secureip unimacro_ver unisims_ver " -context "xsim\\usage"
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webtalk_add_data -client xsim -key Compiler_Time -value "1.19_sec" -context "xsim\\usage"
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webtalk_add_data -client xsim -key Compiler_Memory -value "49056_KB" -context "xsim\\usage"
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webtalk_transmit -clientid 4125363012 -regid "" -xml C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/JoseIgnacio/CA Lab/lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
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webtalk_terminate
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Binary file not shown.
Binary file not shown.
@@ -9,23 +9,46 @@ module dataMemory(
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reg [8:0] memory [15:0];
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initial begin
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// String Compare Memory
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memory[0] <= 9'b000000100;
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memory[1] <= 9'b000001000;
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memory[2] <= 9'b000001100;
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memory[3] <= 9'b010101010;
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memory[4] <= 9'b000001111;
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// // String Compare Memory
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// memory[0] <= 9'b000000100;
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// memory[1] <= 9'b000001000;
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// memory[2] <= 9'b000001100;
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// memory[3] <= 9'b010101010;
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// memory[4] <= 9'b000001111;
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// memory[5] <= 9'b000000100;
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// memory[6] <= 9'b000000011;
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// memory[7] <= 9'b000000000;
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// memory[8] <= 9'b000001111;
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// memory[9] <= 9'b000000100;
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// memory[10] <= 9'b000000010;
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// memory[11] <= 9'b000000000;
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// memory[12] <= 9'b000000000;
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// memory[13] <= 9'b000000000;
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// memory[14] <= 9'b000000000;
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// memory[15] <= 9'b000000000;
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// Binary Search Memory
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memory[0] <= 9'b000000000;
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memory[1] <= 9'b000000111;
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memory[2] <= 9'b000000001;
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memory[3] <= 9'b000000010;
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memory[4] <= 9'b000000011;
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memory[5] <= 9'b000000100;
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memory[6] <= 9'b000000011;
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memory[7] <= 9'b000000000;
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memory[8] <= 9'b000001111;
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memory[9] <= 9'b000000100;
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memory[10] <= 9'b000000010;
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memory[11] <= 9'b000000000;
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memory[12] <= 9'b000000000;
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memory[13] <= 9'b000000000;
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memory[14] <= 9'b000000000;
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memory[15] <= 9'b000000000;
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memory[6] <= 9'b000000101;
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memory[7] <= 9'b000000110;
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memory[8] <= 9'b000000111;
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memory[9] <= 9'b000001000;
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memory[10] <= 9'b000001001;
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memory[11] <= 9'b000001010;
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memory[12] <= 9'b000001011;
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memory[13] <= 9'b000001100;
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memory[14] <= 9'b000001101;
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memory[15] <= 9'b000001110;
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memory[16] <= 9'b000001111;
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memory[17] <= 9'b000010000;
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memory[18] <= 9'b000010001;
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memory[19] <= 9'b000010010;
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end
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always@(address, clk, memory)begin
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@@ -34,51 +34,117 @@ module instructionMemory(
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//String Compare
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// memory[0] <= 9'b000000000;
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// memory[1] <= 9'b010000000;
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// memory[2] <= 9'b010001000;
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// memory[3] <= 9'b010010000;
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// memory[4] <= 9'b010011000;
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// memory[5] <= 9'b000100000;
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// memory[6] <= 9'b011001001;
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// memory[7] <= 9'b000101010;
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// memory[8] <= 9'b011010010;
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// memory[9] <= 9'b000110100;
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// memory[10] <= 9'b011011011;
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// memory[11] <= 9'b000111110;
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// memory[12] <= 9'b101010000;
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// memory[13] <= 9'b101000010;
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// memory[14] <= 9'b101001100;
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// memory[15] <= 9'b101011110; //ends initialization
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// memory[16] <= 9'b101000011;
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// memory[17] <= 9'b101001101;
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// memory[18] <= 9'b000110000;
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// memory[19] <= 9'b000111010;
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// memory[20] <= 9'b110010001;
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// memory[21] <= 9'b100100001;
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// memory[22] <= 9'b100110000;
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// memory[23] <= 9'b110011001;
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// memory[24] <= 9'b100100001;
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// memory[25] <= 9'b100101101;
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// memory[26] <= 9'b011000001;
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// memory[27] <= 9'b011001001;
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// memory[28] <= 9'b101000010;
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// memory[29] <= 9'b101001100;
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// memory[30] <= 9'b010110111;
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// memory[31] <= 9'b110010001;
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// memory[32] <= 9'b101110010;
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// memory[33] <= 9'b101000000;
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// memory[34] <= 9'b101001110;
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// memory[35] <= 9'b001001000;
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// memory[36] <= 9'b011000001;
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// memory[37] <= 9'b101000000;
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// memory[38] <= 9'b101111000;
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// memory[39] <= 9'b000000000;
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// Binary Search
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memory[0] <= 9'b000000000;
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memory[1] <= 9'b010000000;
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memory[2] <= 9'b010001000;
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memory[3] <= 9'b010010000;
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memory[4] <= 9'b010011000;
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memory[5] <= 9'b000100000;
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memory[6] <= 9'b011001001;
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memory[7] <= 9'b000101010;
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memory[8] <= 9'b011010010;
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memory[9] <= 9'b000110100;
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memory[10] <= 9'b011011011;
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memory[11] <= 9'b000111110;
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memory[12] <= 9'b101010000;
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memory[13] <= 9'b101000010;
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memory[14] <= 9'b101001100;
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memory[15] <= 9'b101011110; //ends initialization
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memory[16] <= 9'b101000011;
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memory[17] <= 9'b101001101;
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memory[18] <= 9'b000110000;
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memory[19] <= 9'b000111010;
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memory[20] <= 9'b110010001;
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memory[21] <= 9'b100100001;
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memory[22] <= 9'b100110000;
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memory[23] <= 9'b110011001;
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memory[24] <= 9'b100100001;
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memory[25] <= 9'b100101101;
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memory[26] <= 9'b011000001;
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memory[27] <= 9'b011001001;
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memory[28] <= 9'b101000010;
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memory[29] <= 9'b101001100;
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memory[30] <= 9'b010110111;
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memory[31] <= 9'b110010001;
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memory[32] <= 9'b101110010;
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memory[33] <= 9'b101000000;
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memory[34] <= 9'b101001110;
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memory[35] <= 9'b001001000;
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memory[36] <= 9'b011000001;
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memory[37] <= 9'b101000000;
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memory[38] <= 9'b101111000;
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memory[39] <= 9'b000000000;
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memory[1] <= 9'b000000000;
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memory[2] <= 9'b000000000;
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memory[3] <= 9'b000000000;
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memory[4] <= 9'b000000000;
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memory[5] <= 9'b000000000;
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memory[6] <= 9'b011001011; //addi R1, 3 (N = 3)
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memory[7] <= 9'b011001011; //addi R1, 3 (N = 3)
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memory[8] <= 9'b011001011; //addi R1, 3 (N = 3)
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memory[9] <= 9'b011001011; //addi R1, 3 (N = 3)
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memory[10] <= 9'b011001011; //addi R1, 3 (N = 3)
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memory[11] <= 9'b011010010; //addi R2, 2 (inputAddr = 2)
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memory[12] <= 9'b000111110; //lb R3, R3
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memory[13] <= 9'b101011010; //banks R3, 1
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memory[14] <= 9'b011001011; //addi R1, 3 (N = 3)
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memory[15] <= 9'b101000000; //loop: banks R0, 0
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memory[16] <= 9'b011100010; //slt R0, R1
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memory[17] <= 9'b110000001; //beq R0, Exit
|
||||
memory[18] <= 9'b100100001; //j Skip0
|
||||
memory[19] <= 9'b100101110; //Exit: j Loose
|
||||
memory[20] <= 9'b010101000; //Skip0: add R2, R0
|
||||
memory[21] <= 9'b010101010; //add R2, R1
|
||||
memory[22] <= 9'b111110000; //sll R2
|
||||
memory[23] <= 9'b101011011; //bankl R3,1
|
||||
memory[24] <= 9'b010111100; //add R3, R2
|
||||
memory[25] <= 9'b101001100; //banks R1, 2
|
||||
memory[26] <= 9'b000100110; //lb R0, R3
|
||||
memory[27] <= 9'b010001000; //zero R1
|
||||
memory[28] <= 9'b011001010; //addi R1, 1 (numAddr = 1)
|
||||
memory[29] <= 9'b000101010; //lb R1, R1
|
||||
memory[30] <= 9'b100100001; //j SkipU
|
||||
memory[31] <= 9'b101110001; //j TransLoop
|
||||
memory[32] <= 9'b101010110; //SkipU: banks R2, 3
|
||||
memory[33] <= 9'b100100001; //j SkipD
|
||||
memory[34] <= 9'b100110111; //j TransLoose
|
||||
memory[35] <= 9'b010010000; //SkipD: zero R2
|
||||
memory[36] <= 9'b010110010; //add R2, R1
|
||||
memory[37] <= 9'b010101001; //sub R1, R0
|
||||
memory[38] <= 9'b110001001; //beq R1, Go1
|
||||
memory[39] <= 9'b100100001; //j Skip1
|
||||
memory[40] <= 9'b100101001; //Go1: j Win
|
||||
memory[41] <= 9'b010001000; //Skip1: zero R1
|
||||
memory[42] <= 9'b010101100; //add R1, R2
|
||||
memory[43] <= 9'b011100010; //slt R0, R1
|
||||
memory[44] <= 9'b110001001; //beq R1, Go2
|
||||
memory[45] <= 9'b100100110; //j Skip2
|
||||
memory[46] <= 9'b010000000; //Go2: zero R0
|
||||
memory[47] <= 9'b011000010; //addi R0, 1
|
||||
memory[48] <= 9'b101001111; //bankl R1,3
|
||||
memory[49] <= 9'b010100010; //add R0, R1
|
||||
memory[50] <= 9'b101001101; //bankl R1,2
|
||||
memory[51] <= 9'b101110101; //j loop
|
||||
memory[52] <= 9'b010001000; //Skip2: zero R1
|
||||
memory[53] <= 9'b011001111; //addi R1, -1
|
||||
memory[54] <= 9'b101000111; //bankl R0, 3
|
||||
memory[55] <= 9'b010101000; //add R1, R0
|
||||
memory[56] <= 9'b101000001; //bankl R0,0
|
||||
memory[57] <= 9'b101111011; //j loop
|
||||
memory[58] <= 9'b010000000; //Loose: zero R0
|
||||
memory[59] <= 9'b011000111; //addi R0, -1
|
||||
memory[60] <= 9'b101000110; //banks R0, 3
|
||||
memory[61] <= 9'b100100000; //j Win
|
||||
memory[62] <= 9'b000000000; //Win: halt
|
||||
|
||||
|
||||
end
|
||||
|
||||
|
||||
always@(address)begin
|
||||
readData <= memory[address];
|
||||
end
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
<!-- -->
|
||||
<!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. -->
|
||||
|
||||
<Project Version="7" Minor="39" Path="C:/Users/ecelab/ECE3570-Lab/lab2CA.xpr">
|
||||
<Project Version="7" Minor="39" Path="C:/Users/JoseIgnacio/CA Lab/lab2CA.xpr">
|
||||
<DefaultLaunch Dir="$PRUNDIR"/>
|
||||
<Configuration>
|
||||
<Option Name="Id" Val="0a5803efda44405bb28bbf43ba22e808"/>
|
||||
@@ -31,7 +31,7 @@
|
||||
<Option Name="EnableBDX" Val="FALSE"/>
|
||||
<Option Name="DSAVendor" Val="xilinx"/>
|
||||
<Option Name="DSANumComputeUnits" Val="60"/>
|
||||
<Option Name="WTXSimLaunchSim" Val="295"/>
|
||||
<Option Name="WTXSimLaunchSim" Val="296"/>
|
||||
<Option Name="WTModelSimLaunchSim" Val="0"/>
|
||||
<Option Name="WTQuestaLaunchSim" Val="0"/>
|
||||
<Option Name="WTIesLaunchSim" Val="0"/>
|
||||
|
||||
Reference in New Issue
Block a user