# Conflicts:
#	lab2CA.cache/wt/webtalk_pa.xml
#	lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/webtalk/xsim_webtalk.tcl
#	lab2CA.sim/sim_1/behav/xsim/xsim.dir/CPU9bits_tb_behav/xsim.mem
#	lab2CA.srcs/sources_1/new/CPU9bits.v
#	lab2CA.srcs/sources_1/new/dataMemory.v
This commit is contained in:
WilliamMiceli
2019-03-24 19:31:28 -04:00
9 changed files with 22 additions and 295 deletions

View File

@@ -9,6 +9,10 @@ module dataMemory(
reg [8:0] memory [23:0];
initial begin
//Equation Solver Memory
memory[0] <= 9'b000000001;
memory[1] <= 9'b000000010;
// String Compare Memory
// memory[0] <= 9'b000000100;
// memory[1] <= 9'b000001000;
@@ -16,10 +20,10 @@ module dataMemory(
// memory[3] <= 9'b010101010;
// memory[4] <= 9'b000001111;
// memory[5] <= 9'b000000100;
// memory[6] <= 9'b000000011;
// memory[6] <= 9'b000000000;
// memory[7] <= 9'b000000111;
// memory[8] <= 9'b000001111;
// memory[9] <= 9'b000000100;
// memory[9] <= 9'b000000110;
// memory[10] <= 9'b000000010;
// memory[11] <= 9'b000000000;
// memory[12] <= 9'b000000000;