Lots
Lots
This commit is contained in:
goochey
@@ -0,0 +1 @@
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||||
-wto "0a5803efda44405bb28bbf43ba22e808" --incr --debug "typical" --relax --mt "2" --maxdelay -L "xil_defaultlib" -L "simprims_ver" -L "secureip" --snapshot "alu_tb_time_impl" -transport_int_delays -pulse_r "0" -pulse_int_r "0" -pulse_e "0" -pulse_int_e "0" "xil_defaultlib.alu_tb" "xil_defaultlib.glbl" -log "elaborate.log"
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@@ -0,0 +1 @@
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Breakpoint File Version 1.0
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||||
@@ -0,0 +1,119 @@
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||||
/**********************************************************************/
|
||||
/* ____ ____ */
|
||||
/* / /\/ / */
|
||||
/* /___/ \ / */
|
||||
/* \ \ \/ */
|
||||
/* \ \ Copyright (c) 2003-2013 Xilinx, Inc. */
|
||||
/* / / All Right Reserved. */
|
||||
/* /---/ /\ */
|
||||
/* \ \ / \ */
|
||||
/* \___\/\___\ */
|
||||
/**********************************************************************/
|
||||
|
||||
|
||||
#include "iki.h"
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#include <string.h>
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||||
#include <math.h>
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||||
#ifdef __GNUC__
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#include <stdlib.h>
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||||
#else
|
||||
#include <malloc.h>
|
||||
#define alloca _alloca
|
||||
#endif
|
||||
/**********************************************************************/
|
||||
/* ____ ____ */
|
||||
/* / /\/ / */
|
||||
/* /___/ \ / */
|
||||
/* \ \ \/ */
|
||||
/* \ \ Copyright (c) 2003-2013 Xilinx, Inc. */
|
||||
/* / / All Right Reserved. */
|
||||
/* /---/ /\ */
|
||||
/* \ \ / \ */
|
||||
/* \___\/\___\ */
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||||
/**********************************************************************/
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||||
|
||||
|
||||
#include "iki.h"
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#include <string.h>
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#include <math.h>
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#ifdef __GNUC__
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#include <stdlib.h>
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#else
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#include <malloc.h>
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||||
#define alloca _alloca
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||||
#endif
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||||
typedef void (*funcp)(char *, char *);
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extern int main(int, char**);
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extern void execute_79(char*, char *);
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extern void execute_181(char*, char *);
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extern void execute_182(char*, char *);
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extern void execute_183(char*, char *);
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extern void vlog_const_rhs_process_execute_0_fast_no_reg_no_agg(char*, char*, char*);
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extern void execute_180(char*, char *);
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extern void execute_84(char*, char *);
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extern void execute_85(char*, char *);
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extern void execute_129(char*, char *);
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extern void execute_102(char*, char *);
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extern void execute_150(char*, char *);
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extern void execute_159(char*, char *);
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extern void execute_168(char*, char *);
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extern void execute_177(char*, char *);
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extern void execute_178(char*, char *);
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extern void execute_78(char*, char *);
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extern void execute_81(char*, char *);
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extern void execute_82(char*, char *);
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extern void execute_83(char*, char *);
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extern void execute_184(char*, char *);
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extern void execute_185(char*, char *);
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extern void execute_186(char*, char *);
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extern void execute_187(char*, char *);
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extern void execute_188(char*, char *);
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extern void vlog_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
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funcp funcTab[25] = {(funcp)execute_79, (funcp)execute_181, (funcp)execute_182, (funcp)execute_183, (funcp)vlog_const_rhs_process_execute_0_fast_no_reg_no_agg, (funcp)execute_180, (funcp)execute_84, (funcp)execute_85, (funcp)execute_129, (funcp)execute_102, (funcp)execute_150, (funcp)execute_159, (funcp)execute_168, (funcp)execute_177, (funcp)execute_178, (funcp)execute_78, (funcp)execute_81, (funcp)execute_82, (funcp)execute_83, (funcp)execute_184, (funcp)execute_185, (funcp)execute_186, (funcp)execute_187, (funcp)execute_188, (funcp)vlog_transfunc_eventcallback};
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const int NumRelocateId= 25;
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void relocate(char *dp)
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{
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iki_relocate(dp, "xsim.dir/alu_tb_time_impl/xsim.reloc", (void **)funcTab, 25);
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/*Populate the transaction function pointer field in the whole net structure */
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||||
}
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void sensitize(char *dp)
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{
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iki_sensitize(dp, "xsim.dir/alu_tb_time_impl/xsim.reloc");
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}
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void simulate(char *dp)
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{
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iki_schedule_processes_at_time_zero(dp, "xsim.dir/alu_tb_time_impl/xsim.reloc");
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||||
// Initialize Verilog nets in mixed simulation, for the cases when the value at time 0 should be propagated from the mixed language Vhdl net
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iki_execute_processes();
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||||
// Schedule resolution functions for the multiply driven Verilog nets that have strength
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||||
// Schedule transaction functions for the singly driven Verilog nets that have strength
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||||
|
||||
}
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||||
#include "iki_bridge.h"
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void relocate(char *);
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||||
|
||||
void sensitize(char *);
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||||
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||||
void simulate(char *);
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||||
|
||||
extern SYSTEMCLIB_IMP_DLLSPEC void local_register_implicit_channel(int, char*);
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||||
extern void implicit_HDL_SCinstatiate();
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||||
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||||
extern SYSTEMCLIB_IMP_DLLSPEC int xsim_argc_copy ;
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||||
extern SYSTEMCLIB_IMP_DLLSPEC char** xsim_argv_copy ;
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int main(int argc, char **argv)
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||||
{
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iki_heap_initialize("ms", "isimmm", 0, 2147483648) ;
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iki_set_sv_type_file_path_name("xsim.dir/alu_tb_time_impl/xsim.svtype");
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iki_set_crvs_dump_file_path_name("xsim.dir/alu_tb_time_impl/xsim.crvsdump");
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void* design_handle = iki_create_design("xsim.dir/alu_tb_time_impl/xsim.mem", (void *)relocate, (void *)sensitize, (void *)simulate, 0, isimBridge_getWdbWriter(), 0, argc, argv);
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iki_set_rc_trial_count(100);
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(void) design_handle;
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return iki_simulate_design();
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||||
}
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@@ -0,0 +1,44 @@
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<?xml version="1.0" encoding="UTF-8" ?>
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||||
<webTalkData fileName='usage_statistics_ext_xsim.xml' majorVersion='1' minorVersion='0' timeStamp='Sat Feb 16 16:46:35 2019'>
|
||||
<section name="__ROOT__" level="0" order="1" description="">
|
||||
<section name="software_version_and_target_device" level="1" order="1" description="">
|
||||
<keyValuePair key="beta" value="FALSE" description="" />
|
||||
<keyValuePair key="build_version" value="2405991" description="" />
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||||
<keyValuePair key="date_generated" value="Sat Feb 16 16:46:34 2019" description="" />
|
||||
<keyValuePair key="os_platform" value="WIN64" description="" />
|
||||
<keyValuePair key="product_version" value="XSIM v2018.3 (64-bit)" description="" />
|
||||
<keyValuePair key="project_id" value="0a5803efda44405bb28bbf43ba22e808" description="" />
|
||||
<keyValuePair key="project_iteration" value="2" description="" />
|
||||
<keyValuePair key="random_id" value="4e917e26-7591-4435-9135-15bd446b0238" description="" />
|
||||
<keyValuePair key="registration_id" value="174150793_174150794_210688225_140" description="" />
|
||||
<keyValuePair key="route_design" value="FALSE" description="" />
|
||||
<keyValuePair key="target_device" value="not_applicable" description="" />
|
||||
<keyValuePair key="target_family" value="not_applicable" description="" />
|
||||
<keyValuePair key="target_package" value="not_applicable" description="" />
|
||||
<keyValuePair key="target_speed" value="not_applicable" description="" />
|
||||
<keyValuePair key="tool_flow" value="xsim_vivado" description="" />
|
||||
</section>
|
||||
<section name="user_environment" level="1" order="2" description="">
|
||||
<keyValuePair key="cpu_name" value="Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" description="" />
|
||||
<keyValuePair key="cpu_speed" value="3492 MHz" description="" />
|
||||
<keyValuePair key="os_name" value="Microsoft Windows 8 or later , 64-bit" description="" />
|
||||
<keyValuePair key="os_release" value="major release (build 9200)" description="" />
|
||||
<keyValuePair key="system_ram" value="34.000 GB" description="" />
|
||||
<keyValuePair key="total_processors" value="1" description="" />
|
||||
</section>
|
||||
<section name="vivado_usage" level="1" order="3" description="">
|
||||
</section>
|
||||
<section name="xsim" level="1" order="4" description="">
|
||||
<section name="command_line_options" level="2" order="1" description="">
|
||||
<keyValuePair key="command" value="xsim" description="" />
|
||||
</section>
|
||||
<section name="usage" level="2" order="2" description="">
|
||||
<keyValuePair key="iteration" value="0" description="" />
|
||||
<keyValuePair key="runtime" value="40 ns" description="" />
|
||||
<keyValuePair key="simulation_memory" value="6708_KB" description="" />
|
||||
<keyValuePair key="simulation_time" value="0.03_sec" description="" />
|
||||
<keyValuePair key="trace_waveform" value="true" description="" />
|
||||
</section>
|
||||
</section>
|
||||
</section>
|
||||
</webTalkData>
|
||||
@@ -0,0 +1,42 @@
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webtalk_init -webtalk_dir C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/impl/timing/xsim/xsim.dir/alu_tb_time_impl/webtalk/
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webtalk_register_client -client project
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||||
webtalk_add_data -client project -key date_generated -value "Sat Feb 16 16:46:45 2019" -context "software_version_and_target_device"
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||||
webtalk_add_data -client project -key product_version -value "XSIM v2018.3 (64-bit)" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key build_version -value "2405991" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key os_platform -value "WIN64" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key registration_id -value "174150793_174150794_210688225_140" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key tool_flow -value "xsim_vivado" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key beta -value "FALSE" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key route_design -value "FALSE" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key target_family -value "not_applicable" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key target_device -value "not_applicable" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key target_package -value "not_applicable" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key target_speed -value "not_applicable" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key random_id -value "4e917e26-7591-4435-9135-15bd446b0238" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key project_id -value "0a5803efda44405bb28bbf43ba22e808" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key project_iteration -value "3" -context "software_version_and_target_device"
|
||||
webtalk_add_data -client project -key os_name -value "Microsoft Windows 8 or later , 64-bit" -context "user_environment"
|
||||
webtalk_add_data -client project -key os_release -value "major release (build 9200)" -context "user_environment"
|
||||
webtalk_add_data -client project -key cpu_name -value "Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" -context "user_environment"
|
||||
webtalk_add_data -client project -key cpu_speed -value "3492 MHz" -context "user_environment"
|
||||
webtalk_add_data -client project -key total_processors -value "1" -context "user_environment"
|
||||
webtalk_add_data -client project -key system_ram -value "34.000 GB" -context "user_environment"
|
||||
webtalk_register_client -client xsim
|
||||
webtalk_add_data -client xsim -key File_Counter -value "3" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key Command -value "xelab" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key Vhdl2008 -value "false" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key GenDLL -value "false" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key SDFModeling -value "false" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key HWCosim -value "false" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key DPI_Used -value "false" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key Debug -value "typical" -context "xsim\\command_line_options"
|
||||
webtalk_add_data -client xsim -key Simulation_Image_Code -value "71 KB" -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Simulation_Image_Data -value "8 KB" -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Total_Nets -value "0" -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Total_Processes -value "113" -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Total_Instances -value "78" -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Xilinx_HDL_Libraries_Used -value "secureip simprims_ver " -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Compiler_Time -value "0.69_sec" -context "xsim\\usage"
|
||||
webtalk_add_data -client xsim -key Compiler_Memory -value "38776_KB" -context "xsim\\usage"
|
||||
webtalk_transmit -clientid 1649025917 -regid "174150793_174150794_210688225_140" -xml C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/impl/timing/xsim/xsim.dir/alu_tb_time_impl/webtalk/usage_statistics_ext_xsim.xml -html C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/impl/timing/xsim/xsim.dir/alu_tb_time_impl/webtalk/usage_statistics_ext_xsim.html -wdm C:/Users/ecelab/ECE3570-Lab/lab2CA.sim/sim_1/impl/timing/xsim/xsim.dir/alu_tb_time_impl/webtalk/usage_statistics_ext_xsim.wdm -intro "<H3>XSIM Usage Report</H3><BR>"
|
||||
webtalk_terminate
|
||||
Binary file not shown.
@@ -0,0 +1 @@
|
||||
-wto "0a5803efda44405bb28bbf43ba22e808" --incr --debug "typical" --relax --mt "2" --maxdelay -L "xil_defaultlib" -L "simprims_ver" -L "secureip" --snapshot "regFile_tb_time_impl" -transport_int_delays -pulse_r "0" -pulse_int_r "0" -pulse_e "0" -pulse_int_e "0" "xil_defaultlib.regFile_tb" "xil_defaultlib.glbl" -log "elaborate.log"
|
||||
@@ -0,0 +1 @@
|
||||
Breakpoint File Version 1.0
|
||||
@@ -0,0 +1,124 @@
|
||||
/**********************************************************************/
|
||||
/* ____ ____ */
|
||||
/* / /\/ / */
|
||||
/* /___/ \ / */
|
||||
/* \ \ \/ */
|
||||
/* \ \ Copyright (c) 2003-2013 Xilinx, Inc. */
|
||||
/* / / All Right Reserved. */
|
||||
/* /---/ /\ */
|
||||
/* \ \ / \ */
|
||||
/* \___\/\___\ */
|
||||
/**********************************************************************/
|
||||
|
||||
|
||||
#include "iki.h"
|
||||
#include <string.h>
|
||||
#include <math.h>
|
||||
#ifdef __GNUC__
|
||||
#include <stdlib.h>
|
||||
#else
|
||||
#include <malloc.h>
|
||||
#define alloca _alloca
|
||||
#endif
|
||||
/**********************************************************************/
|
||||
/* ____ ____ */
|
||||
/* / /\/ / */
|
||||
/* /___/ \ / */
|
||||
/* \ \ \/ */
|
||||
/* \ \ Copyright (c) 2003-2013 Xilinx, Inc. */
|
||||
/* / / All Right Reserved. */
|
||||
/* /---/ /\ */
|
||||
/* \ \ / \ */
|
||||
/* \___\/\___\ */
|
||||
/**********************************************************************/
|
||||
|
||||
|
||||
#include "iki.h"
|
||||
#include <string.h>
|
||||
#include <math.h>
|
||||
#ifdef __GNUC__
|
||||
#include <stdlib.h>
|
||||
#else
|
||||
#include <malloc.h>
|
||||
#define alloca _alloca
|
||||
#endif
|
||||
typedef void (*funcp)(char *, char *);
|
||||
extern int main(int, char**);
|
||||
extern void execute_2(char*, char *);
|
||||
extern void execute_3(char*, char *);
|
||||
extern void execute_17(char*, char *);
|
||||
extern void execute_31(char*, char *);
|
||||
extern void execute_32(char*, char *);
|
||||
extern void execute_33(char*, char *);
|
||||
extern void execute_34(char*, char *);
|
||||
extern void execute_35(char*, char *);
|
||||
extern void execute_36(char*, char *);
|
||||
extern void execute_22(char*, char *);
|
||||
extern void execute_23(char*, char *);
|
||||
extern void execute_24(char*, char *);
|
||||
extern void execute_25(char*, char *);
|
||||
extern void execute_26(char*, char *);
|
||||
extern void execute_27(char*, char *);
|
||||
extern void execute_28(char*, char *);
|
||||
extern void execute_29(char*, char *);
|
||||
extern void execute_30(char*, char *);
|
||||
extern void execute_6(char*, char *);
|
||||
extern void execute_14(char*, char *);
|
||||
extern void execute_19(char*, char *);
|
||||
extern void execute_20(char*, char *);
|
||||
extern void execute_21(char*, char *);
|
||||
extern void execute_37(char*, char *);
|
||||
extern void execute_38(char*, char *);
|
||||
extern void execute_39(char*, char *);
|
||||
extern void execute_40(char*, char *);
|
||||
extern void execute_41(char*, char *);
|
||||
extern void vlog_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
|
||||
extern void transaction_10(char*, char*, unsigned, unsigned, unsigned);
|
||||
funcp funcTab[30] = {(funcp)execute_2, (funcp)execute_3, (funcp)execute_17, (funcp)execute_31, (funcp)execute_32, (funcp)execute_33, (funcp)execute_34, (funcp)execute_35, (funcp)execute_36, (funcp)execute_22, (funcp)execute_23, (funcp)execute_24, (funcp)execute_25, (funcp)execute_26, (funcp)execute_27, (funcp)execute_28, (funcp)execute_29, (funcp)execute_30, (funcp)execute_6, (funcp)execute_14, (funcp)execute_19, (funcp)execute_20, (funcp)execute_21, (funcp)execute_37, (funcp)execute_38, (funcp)execute_39, (funcp)execute_40, (funcp)execute_41, (funcp)vlog_transfunc_eventcallback, (funcp)transaction_10};
|
||||
const int NumRelocateId= 30;
|
||||
|
||||
void relocate(char *dp)
|
||||
{
|
||||
iki_relocate(dp, "xsim.dir/regFile_tb_time_impl/xsim.reloc", (void **)funcTab, 30);
|
||||
|
||||
/*Populate the transaction function pointer field in the whole net structure */
|
||||
}
|
||||
|
||||
void sensitize(char *dp)
|
||||
{
|
||||
iki_sensitize(dp, "xsim.dir/regFile_tb_time_impl/xsim.reloc");
|
||||
}
|
||||
|
||||
void simulate(char *dp)
|
||||
{
|
||||
iki_schedule_processes_at_time_zero(dp, "xsim.dir/regFile_tb_time_impl/xsim.reloc");
|
||||
// Initialize Verilog nets in mixed simulation, for the cases when the value at time 0 should be propagated from the mixed language Vhdl net
|
||||
iki_execute_processes();
|
||||
|
||||
// Schedule resolution functions for the multiply driven Verilog nets that have strength
|
||||
// Schedule transaction functions for the singly driven Verilog nets that have strength
|
||||
|
||||
}
|
||||
#include "iki_bridge.h"
|
||||
void relocate(char *);
|
||||
|
||||
void sensitize(char *);
|
||||
|
||||
void simulate(char *);
|
||||
|
||||
extern SYSTEMCLIB_IMP_DLLSPEC void local_register_implicit_channel(int, char*);
|
||||
extern void implicit_HDL_SCinstatiate();
|
||||
|
||||
extern SYSTEMCLIB_IMP_DLLSPEC int xsim_argc_copy ;
|
||||
extern SYSTEMCLIB_IMP_DLLSPEC char** xsim_argv_copy ;
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
iki_heap_initialize("ms", "isimmm", 0, 2147483648) ;
|
||||
iki_set_sv_type_file_path_name("xsim.dir/regFile_tb_time_impl/xsim.svtype");
|
||||
iki_set_crvs_dump_file_path_name("xsim.dir/regFile_tb_time_impl/xsim.crvsdump");
|
||||
void* design_handle = iki_create_design("xsim.dir/regFile_tb_time_impl/xsim.mem", (void *)relocate, (void *)sensitize, (void *)simulate, 0, isimBridge_getWdbWriter(), 0, argc, argv);
|
||||
iki_set_rc_trial_count(100);
|
||||
(void) design_handle;
|
||||
return iki_simulate_design();
|
||||
}
|
||||
@@ -0,0 +1,54 @@
|
||||
<?xml version="1.0" encoding="UTF-8" ?>
|
||||
<webTalkData fileName='usage_statistics_ext_xsim.xml' majorVersion='1' minorVersion='0' timeStamp='Sat Feb 16 17:29:42 2019'>
|
||||
<section name="__ROOT__" level="0" order="1" description="">
|
||||
<section name="software_version_and_target_device" level="1" order="1" description="">
|
||||
<keyValuePair key="beta" value="FALSE" description="" />
|
||||
<keyValuePair key="build_version" value="2405991" description="" />
|
||||
<keyValuePair key="date_generated" value="Sat Feb 16 17:29:41 2019" description="" />
|
||||
<keyValuePair key="os_platform" value="WIN64" description="" />
|
||||
<keyValuePair key="product_version" value="XSIM v2018.3 (64-bit)" description="" />
|
||||
<keyValuePair key="project_id" value="0a5803efda44405bb28bbf43ba22e808" description="" />
|
||||
<keyValuePair key="project_iteration" value="1" description="" />
|
||||
<keyValuePair key="random_id" value="4e917e26-7591-4435-9135-15bd446b0238" description="" />
|
||||
<keyValuePair key="registration_id" value="174150793_174150794_210688225_140" description="" />
|
||||
<keyValuePair key="route_design" value="FALSE" description="" />
|
||||
<keyValuePair key="target_device" value="not_applicable" description="" />
|
||||
<keyValuePair key="target_family" value="not_applicable" description="" />
|
||||
<keyValuePair key="target_package" value="not_applicable" description="" />
|
||||
<keyValuePair key="target_speed" value="not_applicable" description="" />
|
||||
<keyValuePair key="tool_flow" value="xsim_vivado" description="" />
|
||||
</section>
|
||||
<section name="user_environment" level="1" order="2" description="">
|
||||
<keyValuePair key="cpu_name" value="Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz" description="" />
|
||||
<keyValuePair key="cpu_speed" value="3492 MHz" description="" />
|
||||
<keyValuePair key="os_name" value="Microsoft Windows 8 or later , 64-bit" description="" />
|
||||
<keyValuePair key="os_release" value="major release (build 9200)" description="" />
|
||||
<keyValuePair key="system_ram" value="34.000 GB" description="" />
|
||||
<keyValuePair key="total_processors" value="1" description="" />
|
||||
</section>
|
||||
<section name="vivado_usage" level="1" order="3" description="">
|
||||
</section>
|
||||
<section name="xsim" level="1" order="4" description="">
|
||||
<section name="command_line_options" level="2" order="1" description="">
|
||||
<keyValuePair key="command" value="xelab" description="" />
|
||||
<keyValuePair key="debug" value="typical" description="" />
|
||||
<keyValuePair key="dpi_used" value="false" description="" />
|
||||
<keyValuePair key="file_counter" value="3" description="" />
|
||||
<keyValuePair key="gendll" value="false" description="" />
|
||||
<keyValuePair key="hwcosim" value="false" description="" />
|
||||
<keyValuePair key="sdfmodeling" value="false" description="" />
|
||||
<keyValuePair key="vhdl2008" value="false" description="" />
|
||||
</section>
|
||||
<section name="usage" level="2" order="2" description="">
|
||||
<keyValuePair key="compiler_memory" value="38640_KB" description="" />
|
||||
<keyValuePair key="compiler_time" value="0.70_sec" description="" />
|
||||
<keyValuePair key="simulation_image_code" value="72 KB" description="" />
|
||||
<keyValuePair key="simulation_image_data" value="4 KB" description="" />
|
||||
<keyValuePair key="total_instances" value="9" description="" />
|
||||
<keyValuePair key="total_nets" value="0" description="" />
|
||||
<keyValuePair key="total_processes" value="37" description="" />
|
||||
<keyValuePair key="xilinx_hdl_libraries_used" value="secureip simprims_ver " description="" />
|
||||
</section>
|
||||
</section>
|
||||
</section>
|
||||
</webTalkData>
|
||||
Binary file not shown.
Reference in New Issue
Block a user