William/WMU-ECE-3570-Lab
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Added Bubble Sort instructions and initial data memory

Browse Source
This commit is contained in:
WilliamMiceli
2019-03-24 16:54:06 -04:00
parent 335280ccd5
commit 8e72409386
2 changed files with 160 additions and 84 deletions
Download Patch File Download Diff File Expand all files Collapse all files

67
lab2CA.srcs/sources_1/new/dataMemory.v
View File

@@ -27,27 +27,54 @@ module dataMemory(
// memory[14] <= 9'b000000000; // memory[14] <= 9'b000000000;
// memory[15] <= 9'b000000000; // memory[15] <= 9'b000000000;
// Bubble Sort Initial Memory
memory[0] <= 9'b000011000;
memory[1] <= 9'b000000000;
memory[2] <= 9'b000100000;
memory[3] <= 9'b010001000;
memory[4] <= 9'b010010000;
memory[5] <= 9'b010011000;
memory[6] <= 9'b101001000;
memory[7] <= 9'b101001010;
memory[8] <= 9'b000100011;
memory[9] <= 9'b101001001;
memory[10] <= 9'b011001001;
memory[11] <= 9'b001001000;
memory[12] <= 9'b101001001;
memory[13] <= 9'b011101000;
memory[14] <= 9'b110001010;
memory[15] <= 9'b000100001;
memory[16] <= 9'b100110100;
memory[17] <= 9'b000001001;
memory[18] <= 9'b011001001;
memory[19] <= 9'b000110010;
memory[20] <= 9'b000000001;
memory[21] <= 9'b000111010;
memory[22] <= 9'b101011110;
memory[23] <= 9'b011111100;
// Binary Search Memory // Binary Search Memory
memory[0] <= 9'b000000000; // memory[0] <= 9'b000000000;
memory[1] <= 9'b000000111; // memory[1] <= 9'b000000111;
memory[2] <= 9'b000000001; // memory[2] <= 9'b000000001;
memory[3] <= 9'b000000010; // memory[3] <= 9'b000000010;
memory[4] <= 9'b000000011; // memory[4] <= 9'b000000011;
memory[5] <= 9'b000000100; // memory[5] <= 9'b000000100;
memory[6] <= 9'b000000101; // memory[6] <= 9'b000000101;
memory[7] <= 9'b000000110; // memory[7] <= 9'b000000110;
memory[8] <= 9'b000000111; // memory[8] <= 9'b000000111;
memory[9] <= 9'b000001000; // memory[9] <= 9'b000001000;
memory[10] <= 9'b000001001; // memory[10] <= 9'b000001001;
memory[11] <= 9'b000001010; // memory[11] <= 9'b000001010;
memory[12] <= 9'b000001011; // memory[12] <= 9'b000001011;
memory[13] <= 9'b000001100; // memory[13] <= 9'b000001100;
memory[14] <= 9'b000001101; // memory[14] <= 9'b000001101;
memory[15] <= 9'b000001110; // memory[15] <= 9'b000001110;
memory[16] <= 9'b000001111; // memory[16] <= 9'b000001111;
memory[17] <= 9'b000010000; // memory[17] <= 9'b000010000;
memory[18] <= 9'b000010001; // memory[18] <= 9'b000010001;
memory[19] <= 9'b000010010; // memory[19] <= 9'b000010010;
end end

177
lab2CA.srcs/sources_1/new/instructionMemory.v
View File

@@ -75,72 +75,121 @@ module instructionMemory(
// memory[38] <= 9'b101111000; // memory[38] <= 9'b101111000;
// memory[39] <= 9'b000000000; // memory[39] <= 9'b000000000;
// Bubble Sort
memory[0] <= 9'b000000001;
memory[1] <= 9'b010000000;
memory[2] <= 9'b000100000;
memory[3] <= 9'b010001000;
memory[4] <= 9'b010010000;
memory[5] <= 9'b010011000;
memory[6] <= 9'b101001000;
memory[7] <= 9'b101001010;
memory[8] <= 9'b100100011;
memory[9] <= 9'b101001001;
memory[10] <= 9'b011001001;
memory[11] <= 9'b101001000;
memory[12] <= 9'b101001001;
memory[13] <= 9'b011101000;
memory[14] <= 9'b110001010;
memory[15] <= 9'b100100001;
memory[16] <= 9'b100110100;
memory[17] <= 9'b101001001;
memory[18] <= 9'b011001001;
memory[19] <= 9'b000110010;
memory[20] <= 9'b011001001;
memory[21] <= 9'b000111010;
memory[22] <= 9'b101011110;
memory[23] <= 9'b011111100;
memory[24] <= 9'b110011010;
memory[25] <= 9'b100100001;
memory[26] <= 9'b101110010;
memory[27] <= 9'b101001001;
memory[28] <= 9'b011001001;
memory[29] <= 9'b101011111;
memory[30] <= 9'b001011010;
memory[31] <= 9'b011001001;
memory[32] <= 9'b001010010;
memory[33] <= 9'b010001000;
memory[34] <= 9'b011001001;
memory[35] <= 9'b101001010;
memory[36] <= 9'b101111100;
memory[37] <= 9'b101001011;
memory[38] <= 9'b110001001;
memory[39] <= 9'b100100001;
memory[40] <= 9'b100100011;
memory[41] <= 9'b010001000;
memory[42] <= 9'b101001000;
memory[43] <= 9'b101111011;
memory[44] <= 9'b000000000;
// Binary Search // Binary Search
memory[0] <= 9'b000000000; // memory[0] <= 9'b000000000;
memory[1] <= 9'b000000000; // memory[1] <= 9'b000000000;
memory[2] <= 9'b000000000; // memory[2] <= 9'b000000000;
memory[3] <= 9'b000000000; // memory[3] <= 9'b000000000;
memory[4] <= 9'b000000000; // memory[4] <= 9'b000000000;
memory[5] <= 9'b000000000; // memory[5] <= 9'b000000000;
memory[6] <= 9'b011001011; //addi R1, 3 (N = 3) // memory[6] <= 9'b011001011; //addi R1, 3 (N = 3)
memory[7] <= 9'b011001011; //addi R1, 3 (N = 3) // memory[7] <= 9'b011001011; //addi R1, 3 (N = 3)
memory[8] <= 9'b011001011; //addi R1, 3 (N = 3) // memory[8] <= 9'b011001011; //addi R1, 3 (N = 3)
memory[9] <= 9'b011001011; //addi R1, 3 (N = 3) // memory[9] <= 9'b011001011; //addi R1, 3 (N = 3)
memory[10] <= 9'b011001011; //addi R1, 3 (N = 3) // memory[10] <= 9'b011001011; //addi R1, 3 (N = 3)
memory[11] <= 9'b011010010; //addi R2, 2 (inputAddr = 2) // memory[11] <= 9'b011010010; //addi R2, 2 (inputAddr = 2)
memory[12] <= 9'b000111110; //lb R3, R3 // memory[12] <= 9'b000111110; //lb R3, R3
memory[13] <= 9'b101011010; //banks R3, 1 // memory[13] <= 9'b101011010; //banks R3, 1
memory[14] <= 9'b011001011; //addi R1, 3 (N = 3) // memory[14] <= 9'b011001011; //addi R1, 3 (N = 3)
memory[15] <= 9'b101000000; //loop: banks R0, 0 // memory[15] <= 9'b101000000; //loop: banks R0, 0
memory[16] <= 9'b011100010; //slt R0, R1 // memory[16] <= 9'b011100010; //slt R0, R1
memory[17] <= 9'b110000001; //beq R0, Exit // memory[17] <= 9'b110000001; //beq R0, Exit
memory[18] <= 9'b100100001; //j Skip0 // memory[18] <= 9'b100100001; //j Skip0
memory[19] <= 9'b100101110; //Exit: j Loose // memory[19] <= 9'b100101110; //Exit: j Loose
memory[20] <= 9'b010101000; //Skip0: add R2, R0 // memory[20] <= 9'b010101000; //Skip0: add R2, R0
memory[21] <= 9'b010101010; //add R2, R1 // memory[21] <= 9'b010101010; //add R2, R1
memory[22] <= 9'b111110000; //sll R2 // memory[22] <= 9'b111110000; //sll R2
memory[23] <= 9'b101011011; //bankl R3,1 // memory[23] <= 9'b101011011; //bankl R3,1
memory[24] <= 9'b010111100; //add R3, R2 // memory[24] <= 9'b010111100; //add R3, R2
memory[25] <= 9'b101001100; //banks R1, 2 // memory[25] <= 9'b101001100; //banks R1, 2
memory[26] <= 9'b000100110; //lb R0, R3 // memory[26] <= 9'b000100110; //lb R0, R3
memory[27] <= 9'b010001000; //zero R1 // memory[27] <= 9'b010001000; //zero R1
memory[28] <= 9'b011001010; //addi R1, 1 (numAddr = 1) // memory[28] <= 9'b011001010; //addi R1, 1 (numAddr = 1)
memory[29] <= 9'b000101010; //lb R1, R1 // memory[29] <= 9'b000101010; //lb R1, R1
memory[30] <= 9'b100100001; //j SkipU // memory[30] <= 9'b100100001; //j SkipU
memory[31] <= 9'b101110001; //j TransLoop // memory[31] <= 9'b101110001; //j TransLoop
memory[32] <= 9'b101010110; //SkipU: banks R2, 3 // memory[32] <= 9'b101010110; //SkipU: banks R2, 3
memory[33] <= 9'b100100001; //j SkipD // memory[33] <= 9'b100100001; //j SkipD
memory[34] <= 9'b100110111; //j TransLoose // memory[34] <= 9'b100110111; //j TransLoose
memory[35] <= 9'b010010000; //SkipD: zero R2 // memory[35] <= 9'b010010000; //SkipD: zero R2
memory[36] <= 9'b010110010; //add R2, R1 // memory[36] <= 9'b010110010; //add R2, R1
memory[37] <= 9'b010101001; //sub R1, R0 // memory[37] <= 9'b010101001; //sub R1, R0
memory[38] <= 9'b110001001; //beq R1, Go1 // memory[38] <= 9'b110001001; //beq R1, Go1
memory[39] <= 9'b100100001; //j Skip1 // memory[39] <= 9'b100100001; //j Skip1
memory[40] <= 9'b100101001; //Go1: j Win // memory[40] <= 9'b100101001; //Go1: j Win
memory[41] <= 9'b010001000; //Skip1: zero R1 // memory[41] <= 9'b010001000; //Skip1: zero R1
memory[42] <= 9'b010101100; //add R1, R2 // memory[42] <= 9'b010101100; //add R1, R2
memory[43] <= 9'b011100010; //slt R0, R1 // memory[43] <= 9'b011100010; //slt R0, R1
memory[44] <= 9'b110001001; //beq R1, Go2 // memory[44] <= 9'b110001001; //beq R1, Go2
memory[45] <= 9'b100100110; //j Skip2 // memory[45] <= 9'b100100110; //j Skip2
memory[46] <= 9'b010000000; //Go2: zero R0 // memory[46] <= 9'b010000000; //Go2: zero R0
memory[47] <= 9'b011000010; //addi R0, 1 // memory[47] <= 9'b011000010; //addi R0, 1
memory[48] <= 9'b101001111; //bankl R1,3 // memory[48] <= 9'b101001111; //bankl R1,3
memory[49] <= 9'b010100010; //add R0, R1 // memory[49] <= 9'b010100010; //add R0, R1
memory[50] <= 9'b101001101; //bankl R1,2 // memory[50] <= 9'b101001101; //bankl R1,2
memory[51] <= 9'b101110101; //j loop // memory[51] <= 9'b101110101; //j loop
memory[52] <= 9'b010001000; //Skip2: zero R1 // memory[52] <= 9'b010001000; //Skip2: zero R1
memory[53] <= 9'b011001111; //addi R1, -1 // memory[53] <= 9'b011001111; //addi R1, -1
memory[54] <= 9'b101000111; //bankl R0, 3 // memory[54] <= 9'b101000111; //bankl R0, 3
memory[55] <= 9'b010101000; //add R1, R0 // memory[55] <= 9'b010101000; //add R1, R0
memory[56] <= 9'b101000001; //bankl R0,0 // memory[56] <= 9'b101000001; //bankl R0,0
memory[57] <= 9'b101111011; //j loop // memory[57] <= 9'b101111011; //j loop
memory[58] <= 9'b010000000; //Loose: zero R0 // memory[58] <= 9'b010000000; //Loose: zero R0
memory[59] <= 9'b011000111; //addi R0, -1 // memory[59] <= 9'b011000111; //addi R0, -1
memory[60] <= 9'b101000110; //banks R0, 3 // memory[60] <= 9'b101000110; //banks R0, 3
memory[61] <= 9'b100100000; //j Win // memory[61] <= 9'b100100000; //j Win
memory[62] <= 9'b000000000; //Win: halt // memory[62] <= 9'b000000000; //Win: halt
end end