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Nonsense

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Johannes
2019-04-11 19:23:15 -04:00
parent bc9c02322c
commit a3064a836b
52 changed files with 3466 additions and 405 deletions
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32
lab2CA.runs/synth_1/CPU9bits_utilization_synth.rpt
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@@ -1,8 +1,8 @@
Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
-----------------------------------------------------------------------------------------------------------
| Tool Version : Vivado v.2018.3 (win64) Build 2405991 Thu Dec 6 23:38:27 MST 2018
| Date : Wed Apr 10 12:50:00 2019
| Host : WM-G75VW running 64-bit major release (build 9200)
| Date : Thu Apr 11 18:41:41 2019
| Host : DESKTOP-8QFGS52 running 64-bit major release (build 9200)
| Command : report_utilization -file CPU9bits_utilization_synth.rpt -pb CPU9bits_utilization_synth.pb
| Design : CPU9bits
| Device : 7k160tifbg484-2L
@@ -30,13 +30,13 @@ Table of Contents
+-------------------------+------+-------+-----------+-------+
| Site Type | Used | Fixed | Available | Util% |
+-------------------------+------+-------+-----------+-------+
| Slice LUTs* | 168 | 0 | 101400 | 0.17 |
| LUT as Logic | 168 | 0 | 101400 | 0.17 |
| Slice LUTs* | 198 | 0 | 101400 | 0.20 |
| LUT as Logic | 198 | 0 | 101400 | 0.20 |
| LUT as Memory | 0 | 0 | 35000 | 0.00 |
| Slice Registers | 181 | 0 | 202800 | 0.09 |
| Register as Flip Flop | 181 | 0 | 202800 | 0.09 |
| Slice Registers | 163 | 0 | 202800 | 0.08 |
| Register as Flip Flop | 163 | 0 | 202800 | 0.08 |
| Register as Latch | 0 | 0 | 202800 | 0.00 |
| F7 Muxes | 1 | 0 | 50700 | <0.01 |
| F7 Muxes | 3 | 0 | 50700 | <0.01 |
| F8 Muxes | 0 | 0 | 25350 | 0.00 |
+-------------------------+------+-------+-----------+-------+
* Warning! The Final LUT count, after physical optimizations and full implementation, is typically lower. Run opt_design after synthesis, if not already completed, for a more realistic count.
@@ -57,7 +57,7 @@ Table of Contents
| 0 | Yes | - | Set |
| 0 | Yes | - | Reset |
| 0 | Yes | Set | - |
| 181 | Yes | Reset | - |
| 163 | Yes | Reset | - |
+-------+--------------+-------------+--------------+
@@ -152,17 +152,17 @@ Table of Contents
+----------+------+---------------------+
| Ref Name | Used | Functional Category |
+----------+------+---------------------+
| FDRE | 181 | Flop & Latch |
| LUT6 | 101 | LUT |
| LUT5 | 42 | LUT |
| LUT4 | 25 | LUT |
| LUT3 | 22 | LUT |
| FDRE | 163 | Flop & Latch |
| LUT6 | 93 | LUT |
| LUT5 | 52 | LUT |
| LUT3 | 36 | LUT |
| LUT4 | 34 | LUT |
| LUT1 | 14 | LUT |
| OBUF | 10 | IO |
| LUT2 | 9 | LUT |
| LUT1 | 2 | LUT |
| LUT2 | 8 | LUT |
| MUXF7 | 3 | MuxFx |
| IBUF | 2 | IO |
| RAMB18E1 | 1 | Block Memory |
| MUXF7 | 1 | MuxFx |
| BUFG | 1 | Clock |
+----------+------+---------------------+