Added stuff to waveform configuration

lab2CA.srcs/sources_1/new/ControlUnit.v

@@ -7,7 +7,7 @@ module ControlUnit(
     output reg [2:0] FU,
     output reg [1:0] bank,
     output reg addi, mem, dataMemEn, RegEn, halt, link, js, compare0, compare1
-    );
+        );
     
     always @(instIn, functBit)
     begin