William/WMU-ECE-3570-Lab
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Reverting removing the enable signals to test if that is the issue

Browse Source
This commit is contained in:
WilliamMiceli
2019-04-06 14:15:51 -04:00
parent 443d01eba1
commit b4f855c65b
2 changed files with 26 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

31
lab2CA.srcs/sources_1/new/BasicModules.v
View File

@@ -259,32 +259,43 @@ module comparator_tb();
endmodule
module decoder (
input wire en,
input wire [1:0] index,
output reg [3:0] regOut);
always @ (index)
case(index)
2'b00: regOut <= 4'b1110;
2'b01: regOut <= 4'b1101;
2'b10: regOut <= 4'b1011;
2'b11: regOut <= 4'b0111;
default: regOut <= 4'b1111;
endcase
always @(en, index)begin
if(en == 0)begin
case(index)
2'b00: regOut <= 4'b1110;
2'b01: regOut <= 4'b1101;
2'b10: regOut <= 4'b1011;
2'b11: regOut <= 4'b0111;
default: regOut <= 4'b1111;
endcase
end
else begin
regOut <= 4'b1111;
end
end
endmodule
//testbench
module decoder_tb();
reg enable;
reg [1:0] indexIn;
wire [3:0] regOut;
decoder dec0(
.en(enable),
.index(indexIn),
.regOut(regOut)
);
.regOut(regOut));
initial begin
enable = 0;
indexIn = 2'b00;
#5
enable = 1;
#5
indexIn = 2'b01;
#5
indexIn = 2'b10;