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Tested the instructions using the instruction memory

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All of the instructions seem to be working other than beq. I might just be calling it wrong
This commit is contained in:
Johannes
2019-03-20 12:08:24 -04:00
parent 0f55e62a2e
commit c85ad153dc
57 changed files with 3322 additions and 128 deletions
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43
lab2CA.srcs/sources_1/new/CPU9bits.v
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@@ -139,7 +139,6 @@ module CPU9bits(
endmodule
module CPU9bits_tb();
reg [8:0] instruction;
reg clk, reset;
wire done;
@@ -151,31 +150,37 @@ module CPU9bits_tb();
end
CPU9bits CPU9bits0(
.instr(instruction),
.reset(reset),
.clk(clk),
.done(done));
initial begin
instruction = 9'b000100000;
reset = 1'b1;
#10
#15
reset = 1'b0;
#10
instruction = 9'b000101000;
#10
instruction = 9'b010100010;
#10
instruction = 9'b111100000;
#10
instruction = 9'b111100000;
#10
instruction = 9'b001101000;
#10
instruction = 9'b010001000;
#10
instruction = 9'b000000000;
#10
#500
// instruction = 9'b000100000;
// reset = 1'b1;
// #10
// reset = 1'b0;
// #10
// instruction = 9'b000101000;
// #10
// instruction = 9'b010100010;
// #10
// instruction = 9'b111100000;
// #10
// instruction = 9'b111100000;
// #10
// instruction = 9'b001101000;
// #10
// instruction = 9'b010001000;
// #10
// instruction = 9'b000000000;
// #10
$finish;
end