William/WMU-ECE-3570-Lab
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Now just need to get our programs working

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WilliamMiceli
2019-03-29 16:18:19 -04:00
parent 93469aa23f
commit db8ceeefb5
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README.md
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@@ -2,9 +2,4 @@
## Things to fix
* Make RAM write edge-triggered only
* RTL_RAM is what it needs to be showing as, since VIvado will recognize it as such
* Make ROM asyncronous (can be read at any time)
* RTL_ROM is what it needs to be showing as, since VIvado will recognize it as such
* Get rid of if statememnts in RAM and ROM
* Get programs working properly