WilliamMiceli
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de8740a231
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Vivado runs/sim
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2019-04-06 14:16:26 -04:00 |
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WilliamMiceli
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443d01eba1
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Modified sensitivities for result; Vivado metadata
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2019-03-30 15:59:43 -04:00 |
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WilliamMiceli
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78f481f724
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Vivado stuff
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2019-03-29 17:29:24 -04:00 |
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WilliamMiceli
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7490815502
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Making fixes to Bubble Sort
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2019-03-24 19:27:59 -04:00 |
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WilliamMiceli
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681c506eec
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Renamed signals on simulation waveforms
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2019-03-24 17:42:38 -04:00 |
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jose.rodriguezlabra
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94f0267a13
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stuff
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2019-03-24 14:16:03 -04:00 |
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jose.rodriguezlabra
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bab680ea27
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Added bank to CPU9bits
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2019-03-24 12:11:12 -04:00 |
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Johannes
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c85ad153dc
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Tested the instructions using the instruction memory
All of the instructions seem to be working other than beq. I might just be calling it wrong
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2019-03-20 12:08:24 -04:00 |
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jose.rodriguezlabra
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11a1d99e92
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Computer works (kinda)
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2019-03-13 12:51:44 -04:00 |
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jose.rodriguezlabra
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026eb65861
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Fixed bugs, finished BEQ, Added Halt
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2019-03-13 11:14:52 -04:00 |
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jose.rodriguezlabra
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4c19de70bc
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Metadatapush
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2019-03-10 12:59:09 -04:00 |
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goochey
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9ba63880bd
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Fetch-Top
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2019-02-20 11:40:43 -05:00 |
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goochey
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54cccd419f
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Lots
Lots
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2019-02-16 17:40:18 -05:00 |
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goochey
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faf9f883dd
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Collaborative - Fixes and Testbenches for Basic Modules so far
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2019-02-16 16:29:12 -05:00 |
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jose.rodriguezlabra
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84e3725fdb
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new thing
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2019-02-16 13:04:06 -05:00 |
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jose.rodriguezlabra
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0d9cc2b890
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Erased weird numbers
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2019-02-16 12:50:02 -05:00 |
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jose.rodriguezlabra
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bb578e7264
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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2
# Conflicts:
# lab2CA.cache/wt/webtalk_pa.xml
# lab2CA.runs/.jobs/vrs_config_1.xml
# lab2CA.runs/.jobs/vrs_config_2.xml
# lab2CA.srcs/sources_1/new/BasicModules.v
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2019-02-16 12:33:12 -05:00 |
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WilliamMiceli
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d1aa8e4ffb
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Added outputs to the MUXes for the registers
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2019-02-15 17:01:43 -05:00 |
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jose.rodriguezlabra
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0b358a6c41
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Set some comments
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2019-02-15 12:38:07 -05:00 |
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