Johannes 3f01492398 Added SLT ...

There is a testbench but when I try to run it on my computer it brings up some regFile simulation even though SLT is set to top. Not sure if its my pc or the code

2019-03-12 19:49:46 -04:00

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design_1

Added SLT

2019-03-12 19:49:46 -04:00