WilliamMiceli 9519460187 AND is bitwise, so simplified, removing 1-bit modules

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..

ALU.v

CPU

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BasicModules.v

AND is bitwise, so simplified, removing 1-bit modules

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ControlUnit.v

CPU

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CPU9bits.v

CPU

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FetchUnit.v

CPU

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RegFile.v

Created CPU9bits file

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