# Conflicts:
#	CPU9bits_tb_behav.wcfg
#	lab2CA.xpr
This commit is contained in:
jose.rodriguezlabra
2019-04-11 21:14:55 -04:00
3 changed files with 302 additions and 56 deletions

View File

@@ -7,7 +7,7 @@ module ControlUnit(
output reg [2:0] FU,
output reg [1:0] bank,
output reg addi, mem, dataMemEn, RegEn, halt, link, js, compare0, compare1
);
);
always @(instIn, functBit)
begin