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Merge branch 'master' of https://git.williammiceli.systems/williammiceli-wmu/ece3570-lab2

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# Conflicts:
#	CPU9bits_tb_behav.wcfg
#	lab2CA.xpr
This commit is contained in:
jose.rodriguezlabra
2019-04-11 21:14:55 -04:00
parent 0b4554a844 aa25f8fd0d
commit 0118debfb9
3 changed files with 302 additions and 56 deletions
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352
CPU9bits_tb_behav.wcfg
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@@ -11,27 +11,45 @@
</db_ref> </db_ref>
</db_ref_list> </db_ref_list>
<zoom_setting> <zoom_setting>
<ZoomStartTime time="2601900fs"></ZoomStartTime> <ZoomStartTime time="65000000fs"></ZoomStartTime>
<ZoomEndTime time="100801901fs"></ZoomEndTime> <ZoomEndTime time="263400001fs"></ZoomEndTime>
<Cursor1Time time="77402000fs"></Cursor1Time> <Cursor1Time time="107600000fs"></Cursor1Time>
</zoom_setting> </zoom_setting>
<column_width_setting> <column_width_setting>
<NameColumnWidth column_width="188"></NameColumnWidth> <NameColumnWidth column_width="174"></NameColumnWidth>
<ValueColumnWidth column_width="72"></ValueColumnWidth> <ValueColumnWidth column_width="68"></ValueColumnWidth>
</column_width_setting> </column_width_setting>
<WVObjectSize size="5" /> <WVObjectSize size="13" />
<wvobject fp_name="group436" type="group">
<obj_property name="label">Program Counter</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/reset" type="logic">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/En" type="logic">
<obj_property name="ElementShortName">En</obj_property>
<obj_property name="ObjectShortName">En</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/Din" type="array">
<obj_property name="ElementShortName">Din[8:0]</obj_property>
<obj_property name="ObjectShortName">Din[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/PC/Dout" type="array">
<obj_property name="ElementShortName">Dout[8:0]</obj_property>
<obj_property name="ObjectShortName">Dout[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group191" type="group"> <wvobject fp_name="group191" type="group">
<obj_property name="label">Fetch Unit</obj_property> <obj_property name="label">Fetch Unit</obj_property>
<obj_property name="DisplayName">label</obj_property> <obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property> <obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/reset" type="logic">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/op_idx" type="logic"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/op_idx" type="logic">
<obj_property name="ElementShortName">op_idx</obj_property> <obj_property name="ElementShortName">op_idx</obj_property>
<obj_property name="ObjectShortName">op_idx</obj_property> <obj_property name="ObjectShortName">op_idx</obj_property>
@@ -39,10 +57,12 @@
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/AddrIn" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/AddrIn" type="array">
<obj_property name="ElementShortName">AddrIn[8:0]</obj_property> <obj_property name="ElementShortName">AddrIn[8:0]</obj_property>
<obj_property name="ObjectShortName">AddrIn[8:0]</obj_property> <obj_property name="ObjectShortName">AddrIn[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/AddrOut" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/AddrOut" type="array">
<obj_property name="ElementShortName">AddrOut[8:0]</obj_property> <obj_property name="ElementShortName">AddrOut[8:0]</obj_property>
<obj_property name="ObjectShortName">AddrOut[8:0]</obj_property> <obj_property name="ObjectShortName">AddrOut[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/progC_out" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/FetchU/progC_out" type="array">
<obj_property name="ElementShortName">progC_out[8:0]</obj_property> <obj_property name="ElementShortName">progC_out[8:0]</obj_property>
@@ -63,7 +83,6 @@
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/instIn" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/instIn" type="array">
<obj_property name="ElementShortName">instIn[3:0]</obj_property> <obj_property name="ElementShortName">instIn[3:0]</obj_property>
<obj_property name="ObjectShortName">instIn[3:0]</obj_property> <obj_property name="ObjectShortName">instIn[3:0]</obj_property>
<obj_property name="isExpanded"></obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/functBit" type="logic"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/functBit" type="logic">
<obj_property name="ElementShortName">functBit</obj_property> <obj_property name="ElementShortName">functBit</obj_property>
@@ -76,7 +95,6 @@
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/FU" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/FU" type="array">
<obj_property name="ElementShortName">FU[2:0]</obj_property> <obj_property name="ElementShortName">FU[2:0]</obj_property>
<obj_property name="ObjectShortName">FU[2:0]</obj_property> <obj_property name="ObjectShortName">FU[2:0]</obj_property>
<obj_property name="isExpanded"></obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/bank" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/CU/bank" type="array">
<obj_property name="ElementShortName">bank[1:0]</obj_property> <obj_property name="ElementShortName">bank[1:0]</obj_property>
@@ -111,41 +129,9 @@
<obj_property name="ObjectShortName">js</obj_property> <obj_property name="ObjectShortName">js</obj_property>
</wvobject> </wvobject>
</wvobject> </wvobject>
<wvobject type="divider" fp_name="divider431"> <wvobject fp_name="group613" type="group">
<obj_property name="label">Divider</obj_property> <obj_property name="label">Registers</obj_property>
<obj_property name="DisplayName">label</obj_property> <obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject fp_name="group162" type="group">
<obj_property name="label">Instruction Memory</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/address" type="array">
<obj_property name="ElementShortName">address[8:0]</obj_property>
<obj_property name="ObjectShortName">address[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/readData" type="array">
<obj_property name="ElementShortName">readData[8:0]</obj_property>
<obj_property name="ObjectShortName">readData[8:0]</obj_property>
<obj_property name="Radix">BINARYRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/memory" type="array">
<obj_property name="ElementShortName">memory[8:0][8:0]</obj_property>
<obj_property name="ObjectShortName">memory[8:0][8:0]</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group595" type="group">
<obj_property name="label">RF</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/reset" type="logic">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/En" type="logic"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/En" type="logic">
<obj_property name="ElementShortName">En</obj_property> <obj_property name="ElementShortName">En</obj_property>
<obj_property name="ObjectShortName">En</obj_property> <obj_property name="ObjectShortName">En</obj_property>
@@ -180,25 +166,285 @@
<obj_property name="ObjectShortName">op1[8:0]</obj_property> <obj_property name="ObjectShortName">op1[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property> <obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/decOut" type="array">
<obj_property name="ElementShortName">decOut[3:0]</obj_property>
<obj_property name="ObjectShortName">decOut[3:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r0_out" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r0_out" type="array">
<obj_property name="ElementShortName">r0_out[8:0]</obj_property> <obj_property name="ElementShortName">r0_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r0_out[8:0]</obj_property> <obj_property name="ObjectShortName">r0_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property> <obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r1_out" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r1_out" type="array">
<obj_property name="ElementShortName">r1_out[8:0]</obj_property> <obj_property name="ElementShortName">r1_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r1_out[8:0]</obj_property> <obj_property name="ObjectShortName">r1_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property> <obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r2_out" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r2_out" type="array">
<obj_property name="ElementShortName">r2_out[8:0]</obj_property> <obj_property name="ElementShortName">r2_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r2_out[8:0]</obj_property> <obj_property name="ObjectShortName">r2_out[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property> <obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r3_out" type="array"> <wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/RF/r3_out" type="array">
<obj_property name="ElementShortName">r3_out[8:0]</obj_property> <obj_property name="ElementShortName">r3_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r3_out[8:0]</obj_property> <obj_property name="ObjectShortName">r3_out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group628" type="group">
<obj_property name="label">Banks</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/En" type="logic">
<obj_property name="ElementShortName">En</obj_property>
<obj_property name="ObjectShortName">En</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/write_index" type="array">
<obj_property name="ElementShortName">write_index[1:0]</obj_property>
<obj_property name="ObjectShortName">write_index[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/op0_idx" type="array">
<obj_property name="ElementShortName">op0_idx[1:0]</obj_property>
<obj_property name="ObjectShortName">op0_idx[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/op1_idx" type="array">
<obj_property name="ElementShortName">op1_idx[1:0]</obj_property>
<obj_property name="ObjectShortName">op1_idx[1:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/write_data" type="array">
<obj_property name="ElementShortName">write_data[8:0]</obj_property>
<obj_property name="ObjectShortName">write_data[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/op0" type="array">
<obj_property name="ElementShortName">op0[8:0]</obj_property>
<obj_property name="ObjectShortName">op0[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/op1" type="array">
<obj_property name="ElementShortName">op1[8:0]</obj_property>
<obj_property name="ObjectShortName">op1[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/decOut" type="array">
<obj_property name="ElementShortName">decOut[3:0]</obj_property>
<obj_property name="ObjectShortName">decOut[3:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/r0_out" type="array">
<obj_property name="ElementShortName">r0_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r0_out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/r1_out" type="array">
<obj_property name="ElementShortName">r1_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r1_out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/r2_out" type="array">
<obj_property name="ElementShortName">r2_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r2_out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/Bank/r3_out" type="array">
<obj_property name="ElementShortName">r3_out[8:0]</obj_property>
<obj_property name="ObjectShortName">r3_out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject type="divider" fp_name="divider431">
<obj_property name="label">Divider</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject fp_name="group162" type="group">
<obj_property name="label">Instruction Memory</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/address" type="array">
<obj_property name="ElementShortName">address[8:0]</obj_property>
<obj_property name="ObjectShortName">address[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property> <obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject> </wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/readData" type="array">
<obj_property name="ElementShortName">readData[8:0]</obj_property>
<obj_property name="ObjectShortName">readData[8:0]</obj_property>
<obj_property name="Radix">BINARYRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/FD/iM/memory" type="array">
<obj_property name="ElementShortName">memory[100:0][8:0]</obj_property>
<obj_property name="ObjectShortName">memory[100:0][8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/A" type="array">
<obj_property name="ElementShortName">A[8:0]</obj_property>
<obj_property name="ObjectShortName">A[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/B" type="array">
<obj_property name="ElementShortName">B[8:0]</obj_property>
<obj_property name="ObjectShortName">B[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/mux0/out" type="array">
<obj_property name="ElementShortName">out[8:0]</obj_property>
<obj_property name="ObjectShortName">out[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/A" type="logic">
<obj_property name="ElementShortName">A</obj_property>
<obj_property name="ObjectShortName">A</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/B" type="logic">
<obj_property name="ElementShortName">B</obj_property>
<obj_property name="ObjectShortName">B</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/BranMux/out" type="logic">
<obj_property name="ElementShortName">out</obj_property>
<obj_property name="ObjectShortName">out</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/reset" type="logic">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/En" type="logic">
<obj_property name="ElementShortName">En</obj_property>
<obj_property name="ObjectShortName">En</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/Din" type="array">
<obj_property name="ElementShortName">Din[50:0]</obj_property>
<obj_property name="ObjectShortName">Din[50:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/pipe1/Dout" type="array">
<obj_property name="ElementShortName">Dout[50:0]</obj_property>
<obj_property name="ObjectShortName">Dout[50:0]</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group598" type="group">
<obj_property name="label">Data Memory</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/dM/clk" type="logic">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/dM/writeEnable" type="logic">
<obj_property name="ElementShortName">writeEnable</obj_property>
<obj_property name="ObjectShortName">writeEnable</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/dM/address" type="array">
<obj_property name="ElementShortName">address[8:0]</obj_property>
<obj_property name="ObjectShortName">address[8:0]</obj_property>
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/dM/writeData" type="array">
<obj_property name="ElementShortName">writeData[8:0]</obj_property>
<obj_property name="ObjectShortName">writeData[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/dM/readData" type="array">
<obj_property name="ElementShortName">readData[8:0]</obj_property>
<obj_property name="ObjectShortName">readData[8:0]</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/EM/dM/memory" type="array">
<obj_property name="ElementShortName">memory[100:0][8:0]</obj_property>
<obj_property name="ObjectShortName">memory[100:0][8:0]</obj_property>
</wvobject>
</wvobject>
<wvobject type="divider" fp_name="divider136">
<obj_property name="label">Divider</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject fp_name="group120" type="group">
<obj_property name="label">Mux 3</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux3/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux3/A" type="array">
<obj_property name="ElementShortName">A[8:0]</obj_property>
<obj_property name="ObjectShortName">A[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux3/B" type="array">
<obj_property name="ElementShortName">B[8:0]</obj_property>
<obj_property name="ObjectShortName">B[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux3/out" type="array">
<obj_property name="ElementShortName">out[8:0]</obj_property>
<obj_property name="ObjectShortName">out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group125" type="group">
<obj_property name="label">Mux 4</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux4/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux4/A" type="array">
<obj_property name="ElementShortName">A[8:0]</obj_property>
<obj_property name="ObjectShortName">A[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux4/B" type="array">
<obj_property name="ElementShortName">B[8:0]</obj_property>
<obj_property name="ObjectShortName">B[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux4/out" type="array">
<obj_property name="ElementShortName">out[8:0]</obj_property>
<obj_property name="ObjectShortName">out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group130" type="group">
<obj_property name="label">Mux 5</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux5/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux5/A" type="array">
<obj_property name="ElementShortName">A[8:0]</obj_property>
<obj_property name="ObjectShortName">A[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux5/B" type="array">
<obj_property name="ElementShortName">B[8:0]</obj_property>
<obj_property name="ObjectShortName">B[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux5/out" type="array">
<obj_property name="ElementShortName">out[8:0]</obj_property>
<obj_property name="ObjectShortName">out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject>
<wvobject fp_name="group135" type="group">
<obj_property name="label">Mux 6</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux6/switch" type="logic">
<obj_property name="ElementShortName">switch</obj_property>
<obj_property name="ObjectShortName">switch</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux6/A" type="array">
<obj_property name="ElementShortName">A[8:0]</obj_property>
<obj_property name="ObjectShortName">A[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux6/B" type="array">
<obj_property name="ElementShortName">B[8:0]</obj_property>
<obj_property name="ObjectShortName">B[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
<wvobject fp_name="/CPU9bits_tb/CPU9bits0/W/mux6/out" type="array">
<obj_property name="ElementShortName">out[8:0]</obj_property>
<obj_property name="ObjectShortName">out[8:0]</obj_property>
<obj_property name="Radix">SIGNEDDECRADIX</obj_property>
</wvobject>
</wvobject> </wvobject>
</wave_config> </wave_config>

2
lab2CA.srcs/sources_1/new/ControlUnit.v
View File

@@ -7,7 +7,7 @@ module ControlUnit(
output reg [2:0] FU, output reg [2:0] FU,
output reg [1:0] bank, output reg [1:0] bank,
output reg addi, mem, dataMemEn, RegEn, halt, link, js, compare0, compare1 output reg addi, mem, dataMemEn, RegEn, halt, link, js, compare0, compare1
); );
always @(instIn, functBit) always @(instIn, functBit)
begin begin

4
lab2CA.xpr
View File

@@ -3,7 +3,7 @@
<!-- --> <!-- -->
<!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. --> <!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved. -->
<Project Version="7" Minor="39" Path="C:/Users/JoseIgnacio/CA Lab/lab2CA.xpr"> <Project Version="7" Minor="39" Path="C:/REPOSITORIES/Educational/Western Michigan University/ECE3570-Lab/lab2CA.xpr">
<DefaultLaunch Dir="$PRUNDIR"/> <DefaultLaunch Dir="$PRUNDIR"/>
<Configuration> <Configuration>
<Option Name="Id" Val="0a5803efda44405bb28bbf43ba22e808"/> <Option Name="Id" Val="0a5803efda44405bb28bbf43ba22e808"/>
@@ -31,7 +31,7 @@
<Option Name="EnableBDX" Val="FALSE"/> <Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSAVendor" Val="xilinx"/> <Option Name="DSAVendor" Val="xilinx"/>
<Option Name="DSANumComputeUnits" Val="60"/> <Option Name="DSANumComputeUnits" Val="60"/>
<Option Name="WTXSimLaunchSim" Val="404"/> <Option Name="WTXSimLaunchSim" Val="386"/>
<Option Name="WTModelSimLaunchSim" Val="0"/> <Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/> <Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/> <Option Name="WTIesLaunchSim" Val="0"/>