Fixed bugs, finished BEQ, Added Halt

lab2CA.srcs/sources_1/new/ALU.v

@@ -9,13 +9,14 @@ module ALU(
     
     // Wires for connecting the modules to the mux
     wire [8:0] result_A,result_B,result_C,result_D,result_E,result_F,result_G,result_H,result_I,result_J,result_K,result_L,result_M,result_N,result_O,result_P;
-    
+    wire cout;
     // A (0000) - Add
     add_9bit add0(
         .A(operand0),
         .B(operand1),
         .Cin(1'b0),
-        .Sum(result_A));
+        .Sum(result_A),
+        .Cout(cout));
     // B (0001) - Subtract
     sub_9bit sub0(
         .A(operand0),
@@ -58,7 +59,7 @@ module ALU(
         .B(operand1),
         .C(result_J));
     // K (1010) - Zero
-    zero zero0(
+    BEQ zero0(
         .A(operand0),
         .B(result_K));
     // L (1011)
@@ -88,6 +89,8 @@ module ALU(
         .P(result_P),
         .out(result));
 
+
+
 endmodule
 
 //testbench