Added pipeline registers

2019-04-06 13:13:47 -04:00
parent 5353c8c22e
commit 2746d6d49c
9 changed files with 90 additions and 54 deletions
--- a/lab2CA.srcs/sources_1/new/dataMemory.v
+++ b/lab2CA.srcs/sources_1/new/dataMemory.v
@@ -10,8 +10,8 @@ module dataMemory(
    
    initial begin
        //Equation Solver Memory
-        memory[0] <= 9'b000000001;
-        memory[1] <= 9'b000000010;
+//        memory[0] <= 9'b000000001;
+//        memory[1] <= 9'b000000010;
        
        // String Compare Memory
 //        memory[0] <= 9'b000000100;