CPU

LOTS

lab2CA.cache/wt/webtalk_pa.xml

@@ -3,7 +3,7 @@
 <!--The data in this file is primarily intended for consumption by Xilinx tools.
 The structure and the elements are likely to change over the next few releases.
 This means code written to parse this file will need to be revisited each subsequent release.-->
-<application name="pa" timeStamp="Thu Feb 21 15:07:11 2019">
+<application name="pa" timeStamp="Sun Mar 10 14:09:05 2019">
 <section name="Project Information" visible="false">
 <property name="ProjectID" value="88e779ed22f94d2db93b335d17c75f15" type="ProjectID"/>
 <property name="ProjectIteration" value="7" type="ProjectIteration"/>
@@ -17,17 +17,18 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="ImplStrategy" value="Vivado Implementation Defaults" type="ImplStrategy"/>
 </item>
 <item name="Java Command Handlers">
+<property name="CloseProject" value="1" type="JavaHandler"/>
 <property name="OpenDesign" value="1" type="JavaHandler"/>
-<property name="OpenProject" value="1" type="JavaHandler"/>
+<property name="OpenProject" value="2" type="JavaHandler"/>
 <property name="ReloadDesign" value="1" type="JavaHandler"/>
 <property name="RunImplementation" value="7" type="JavaHandler"/>
 <property name="RunSchematic" value="9" type="JavaHandler"/>
 <property name="RunSynthesis" value="16" type="JavaHandler"/>
 <property name="SetSourceEnabled" value="2" type="JavaHandler"/>
-<property name="SetTopNode" value="23" type="JavaHandler"/>
+<property name="SetTopNode" value="25" type="JavaHandler"/>
 <property name="ShowView" value="9" type="JavaHandler"/>
-<property name="SimulationClose" value="4" type="JavaHandler"/>
+<property name="SimulationClose" value="5" type="JavaHandler"/>
-<property name="SimulationRun" value="63" type="JavaHandler"/>
+<property name="SimulationRun" value="73" type="JavaHandler"/>
 <property name="ToggleSelectAreaMode" value="2" type="JavaHandler"/>
 <property name="ToolsSettings" value="1" type="JavaHandler"/>
 <property name="ViewTaskImplementation" value="1" type="JavaHandler"/>
@@ -36,67 +37,74 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="ZoomFit" value="6" type="JavaHandler"/>
 </item>
 <item name="Gui Handlers">
+<property name="AbstractSearchablePanel_SHOW_SEARCH" value="1" type="GuiHandlerData"/>
 <property name="BaseDialog_CANCEL" value="13" type="GuiHandlerData"/>
 <property name="BaseDialog_OK" value="65" type="GuiHandlerData"/>
-<property name="BaseDialog_YES" value="4" type="GuiHandlerData"/>
+<property name="BaseDialog_YES" value="5" type="GuiHandlerData"/>
-<property name="CmdMsgDialog_OK" value="4" type="GuiHandlerData"/>
+<property name="CmdMsgDialog_OK" value="7" type="GuiHandlerData"/>
 <property name="CmdMsgDialog_OPEN_MESSAGES_VIEW" value="1" type="GuiHandlerData"/>
-<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="142" type="GuiHandlerData"/>
+<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="177" type="GuiHandlerData"/>
 <property name="FloatingTopDialog_SELECT_TOP_MODULE_OF_YOUR_DESIGN" value="12" type="GuiHandlerData"/>
 <property name="FloatingTopDialog_SPECIFY_NEW_TOP_MODULE" value="10" type="GuiHandlerData"/>
-<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="121" type="GuiHandlerData"/>
+<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="132" type="GuiHandlerData"/>
-<property name="GettingStartedView_OPEN_PROJECT" value="1" type="GuiHandlerData"/>
+<property name="GettingStartedView_OPEN_PROJECT" value="2" type="GuiHandlerData"/>
 <property name="GraphicalView_ZOOM_FIT" value="27" type="GuiHandlerData"/>
 <property name="GraphicalView_ZOOM_IN" value="40" type="GuiHandlerData"/>
 <property name="GraphicalView_ZOOM_OUT" value="28" type="GuiHandlerData"/>
 <property name="HCodeEditor_BLANK_OPERATIONS" value="5" type="GuiHandlerData"/>
-<property name="HCodeEditor_CLOSE" value="3" type="GuiHandlerData"/>
+<property name="HCodeEditor_CLOSE" value="4" type="GuiHandlerData"/>
 <property name="HCodeEditor_COMMANDS_TO_FOLD_TEXT" value="3" type="GuiHandlerData"/>
 <property name="HCodeEditor_DIFF_WITH" value="3" type="GuiHandlerData"/>
-<property name="HCodeEditor_SEARCH_TEXT_COMBO_BOX" value="7" type="GuiHandlerData"/>
+<property name="HCodeEditor_SEARCH_TEXT_COMBO_BOX" value="8" type="GuiHandlerData"/>
 <property name="HInputHandler_TOGGLE_LINE_COMMENTS" value="13" type="GuiHandlerData"/>
 <property name="LaunchPanel_DONT_SHOW_THIS_DIALOG_AGAIN" value="1" type="GuiHandlerData"/>
+<property name="MainMenuMgr_EDIT" value="2" type="GuiHandlerData"/>
+<property name="MainMenuMgr_FILE" value="4" type="GuiHandlerData"/>
+<property name="MainMenuMgr_FLOW" value="2" type="GuiHandlerData"/>
+<property name="MainMenuMgr_PROJECT" value="3" type="GuiHandlerData"/>
 <property name="MessageWithOptionDialog_DONT_SHOW_THIS_DIALOG_AGAIN" value="2" type="GuiHandlerData"/>
-<property name="MsgTreePanel_MESSAGE_VIEW_TREE" value="22" type="GuiHandlerData"/>
+<property name="MsgTreePanel_MESSAGE_VIEW_TREE" value="29" type="GuiHandlerData"/>
 <property name="OpenFileAction_OK" value="1" type="GuiHandlerData"/>
-<property name="PACommandNames_AUTO_UPDATE_HIER" value="26" type="GuiHandlerData"/>
+<property name="PACommandNames_AUTO_UPDATE_HIER" value="28" type="GuiHandlerData"/>
+<property name="PACommandNames_CLOSE_PROJECT" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_OPEN_RTL_DESIGN" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_RELOAD_RTL_DESIGN" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_SELECT_AREA" value="2" type="GuiHandlerData"/>
-<property name="PACommandNames_SET_AS_TOP" value="24" type="GuiHandlerData"/>
+<property name="PACommandNames_SET_AS_TOP" value="26" type="GuiHandlerData"/>
-<property name="PACommandNames_SIMULATION_RUN_BEHAVIORAL" value="61" type="GuiHandlerData"/>
+<property name="PACommandNames_SIMULATION_RUN_BEHAVIORAL" value="71" type="GuiHandlerData"/>
 <property name="PACommandNames_SIMULATION_RUN_POST_IMPLEMENTATION_FUNCTIONAL" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_SIMULATION_RUN_POST_IMPLEMENTATION_TIMING" value="4" type="GuiHandlerData"/>
 <property name="PACommandNames_SIMULATION_SETTINGS" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_SRC_ENABLE" value="1" type="GuiHandlerData"/>
 <property name="PACommandNames_ZOOM_FIT" value="6" type="GuiHandlerData"/>
-<property name="PAViews_CODE" value="6" type="GuiHandlerData"/>
+<property name="PAViews_CODE" value="8" type="GuiHandlerData"/>
-<property name="PAViews_PROJECT_SUMMARY" value="41" type="GuiHandlerData"/>
+<property name="PAViews_PROJECT_SUMMARY" value="42" type="GuiHandlerData"/>
 <property name="PAViews_SCHEMATIC" value="9" type="GuiHandlerData"/>
 <property name="ProgressDialog_BACKGROUND" value="3" type="GuiHandlerData"/>
 <property name="ProgressDialog_CANCEL" value="4" type="GuiHandlerData"/>
 <property name="ProjectTab_RELOAD" value="8" type="GuiHandlerData"/>
 <property name="RDICommands_COPY" value="2" type="GuiHandlerData"/>
 <property name="RDICommands_REDO" value="1" type="GuiHandlerData"/>
-<property name="RDICommands_SAVE_FILE" value="48" type="GuiHandlerData"/>
+<property name="RDICommands_SAVE_FILE" value="65" type="GuiHandlerData"/>
-<property name="RDIViews_WAVEFORM_VIEWER" value="338" type="GuiHandlerData"/>
+<property name="RDIViews_WAVEFORM_VIEWER" value="378" type="GuiHandlerData"/>
 <property name="RunGadget_SHOW_ERROR" value="1" type="GuiHandlerData"/>
 <property name="SaveProjectUtils_CANCEL" value="1" type="GuiHandlerData"/>
 <property name="SaveProjectUtils_SAVE" value="5" type="GuiHandlerData"/>
 <property name="SelectTopModuleDialog_SELECT_TOP_MODULE" value="12" type="GuiHandlerData"/>
-<property name="SimulationScopesPanel_SIMULATE_SCOPE_TABLE" value="3" type="GuiHandlerData"/>
+<property name="SimulationObjectsPanel_SIMULATION_OBJECTS_TREE_TABLE" value="12" type="GuiHandlerData"/>
-<property name="SrcMenu_IP_HIERARCHY" value="27" type="GuiHandlerData"/>
+<property name="SimulationScopesPanel_SIMULATE_SCOPE_TABLE" value="10" type="GuiHandlerData"/>
+<property name="SrcMenu_IP_HIERARCHY" value="29" type="GuiHandlerData"/>
 <property name="StaleMoreAction_OUT_OF_DATE_DETAILS" value="1" type="GuiHandlerData"/>
-<property name="SyntheticaGettingStartedView_RECENT_PROJECTS" value="3" type="GuiHandlerData"/>
+<property name="SyntheticaGettingStartedView_RECENT_PROJECTS" value="6" type="GuiHandlerData"/>
 <property name="SyntheticaStateMonitor_CANCEL" value="1" type="GuiHandlerData"/>
-<property name="TaskBanner_CLOSE" value="17" type="GuiHandlerData"/>
+<property name="TaskBanner_CLOSE" value="20" type="GuiHandlerData"/>
 <property name="TclConsoleView_TCL_CONSOLE_CODE_EDITOR" value="1" type="GuiHandlerData"/>
-<property name="WaveformNameTree_WAVEFORM_NAME_TREE" value="148" type="GuiHandlerData"/>
+<property name="WaveformNameTree_WAVEFORM_NAME_TREE" value="187" type="GuiHandlerData"/>
 </item>
 <item name="Other">
-<property name="GuiMode" value="61" type="GuiMode"/>
+<property name="GuiMode" value="11" type="GuiMode"/>
 <property name="BatchMode" value="0" type="BatchMode"/>
-<property name="TclMode" value="60" type="TclMode"/>
+<property name="TclMode" value="10" type="TclMode"/>
 </item>
 </section>
 </application>

lab2CA.srcs/sources_1/new/ALU.v

@@ -44,7 +44,7 @@ module ALU(
     shift_logical_right slr(
         .A(operand0),
         .B(result_G));
-    // H (111)
+    // H (111) //slt
     
     
     // MUX chooses which result to show based on the ALU's opcode

lab2CA.srcs/sources_1/new/CPU9bits.v

@@ -5,43 +5,87 @@ module CPU9bits(input wire [8:0] instr,
         output reg done
     );
     
-    wire [8:0] op1, op2;
+    wire [8:0] op1, op0, FUAddr,FUJB,PCout,JBRes,FUJ,FUB,AddiOut,AluOut,RFIn, loadMux, dataMemOut;
+    wire [2:0] FU, aluOp;
+    wire addiS, RegEn, loadS;
     
     RegFile RF(
         .clk(clk),
         .reset(reset),
-        .enable(),
+        .enable(RegEn),
-        .write_index(),
+        .write_index(instr[4:3]),
-        .op0_idx(),
+        .op0_idx(instr[4:3]),
-        .op1_idx(),
+        .op1_idx(instr[2:1]),
-        .write_data(),
+        .write_data(RFIn),
         .op0(op0),
         .op1(op1)
     );
     
-    FetchUnit FU(
+    FetchUnit FetchU(
         .clk(clk),
         .reset(reset),
-        .op_idx(),
+        .op_idx(FU[0]),
-        .AddrIn(),
+        .AddrIn(FUAddr),
-        .AddrOut()
+        .AddrOut(PCout)
      );
      
      ALU alu(
-        .opcode(),
+        .opcode(aluOp),
         .operand0(op0),
         .operand1(op1),
-        .result()     
+        .result(AluOut)     
      );
      
-     //Make control unit here
+     ControlUnit CU(
+        .instIn(instr[8:5]),
+        .functBit(instr[0]),
+        .aluOut(aluOp),
+        .FU(FU),
+        .addi(addiS),
+        .mem(loadS),
+        .load(loadMux)
+     );
      
-     always @(instr) begin
-        case (instr)
-            9'b000000000: //something
-        endcase
-     end
      
-     //------------------------------
+     //-----------------------Fetch Unit Stuff
+     
+     add_9bit JBAdder(
+        .A(PCout),
+        .B(JBRes),
+        .Cin(9'b000000000),
+        .Sum(FUJB));
+        
+    mux_2_1 mux1(
+        .A(op1),
+        .B(FUJB),
+        .out(FUAddr),
+        .switch(FU[1]));
+        
+    mux_2_1 mux2(
+        .A({4'b0000,instr[4:0]}),
+        .B({6'b000000,instr[2:0]}),
+        .out(JBRes),
+        .switch(FU[2]));
+        
+    ///--------------------------Addi Stuff
+        
+    add_9bit Addier(
+        .A({6'b000000,instr[2:0]}),
+        .B(op1),
+        .Cin(9'b000000000),
+        .Sum(AddiOut));
+        
+    mux_2_1 mux3(
+        .A(AluOut),
+        .B(AddiOut),
+        .out(loadMux),
+        .switch(addiS));
+        
+    mux_2_1 mux4(
+        .A(loadMux),
+        .B(dataMemOut),
+        .out(RFIn),
+        .switch(loadS));
+     
          
-endmodule
+endmodule

lab2CA.srcs/sources_1/new/ControlUnit.v

@@ -0,0 +1,74 @@
+`timescale 1ns / 1ps
+
+module ControlUnit(
+    input wire [3:0] instIn,
+    input wire functBit,
+    output reg [2:0] aluOut,
+    output reg [2:0] FU,
+    output reg addi,
+    output reg mem,
+    output reg load,
+    output reg RegEn
+    );
+    
+        always @(instIn)begin
+            case(instIn)
+            4'b0101:
+                if(functBit == 1) begin
+                    aluOut <= 3'b001; //sub
+                    RegEn <= 1'b0;
+                end
+                else begin
+                    aluOut <= 3'b000; //Add
+                    RegEn <= 1'b0;
+                end
+            4'b0111: begin 
+                     aluOut <= 3'b111; //nor
+                     RegEn <= 1'b0;
+                     end
+            4'b1110: 
+                if(functBit == 1) begin
+                    aluOut <= 3'b100; //and
+                    RegEn <= 1'b0;
+                end
+                else begin
+                    aluOut <= 3'b010; //or
+                    RegEn <= 1'b0;
+                end           
+            4'b1111:
+                if(functBit == 1) begin
+                    aluOut <= 3'b110; //srl
+                    RegEn <= 1'b0;
+                end
+                else begin
+                    aluOut <= 3'b101; //sll
+                    RegEn <= 1'b0;
+                end
+            4'b0110: begin
+                     addi <= 1'b1; // addi
+                     RegEn <= 1'b0;
+                     end
+            4'b1001: begin
+                     FU <= 3'b010; // jump
+                     RegEn <= 1'b1;
+                     end
+            4'b1100: begin
+                     FU <= 3'b011; // branch
+                     RegEn <= 1'b1;
+                     end
+            4'b1000: begin 
+                     FU <= 3'b001; // jumpreg
+                     RegEn <= 1'b1;
+                     end
+            4'b0001: begin
+                     mem <= 1'b0; // load
+                     RegEn <= 1'b0;
+                     end
+            4'b0010: begin
+                     mem <= 1'b1; // store
+                     RegEn <= 1'b1;
+                     end
+            default: aluOut <= 3'bxxxx; 
+        endcase
+        end
+        endmodule

lab2CA.srcs/sources_1/new/FetchUnit.v

@@ -1,7 +1,7 @@
 `timescale 1ns / 1ps
 
 module FetchUnit(input wire clk, reset, 
-                 input wire [1:0] op_idx,
+                 input wire op_idx,
                  input wire [8:0] AddrIn,
                  output wire [8:0] AddrOut);
   

lab2CA.xpr

@@ -3,7 +3,7 @@
 <!--                                                         -->
 <!-- Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.   -->
 
-<Project Version="7" Minor="39" Path="C:/Users/JoseIgnacio/CA Lab/lab2CA.xpr">
+<Project Version="7" Minor="39" Path="C:/Users/ecelab/ECE3570-Lab/lab2CA.xpr">
   <DefaultLaunch Dir="$PRUNDIR"/>
   <Configuration>
     <Option Name="Id" Val="0a5803efda44405bb28bbf43ba22e808"/>
@@ -59,6 +59,13 @@
   <FileSets Version="1" Minor="31">
     <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
       <Filter Type="Srcs"/>
+      <File Path="$PSRCDIR/sources_1/new/ALU.v">
+        <FileInfo>
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="implementation"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PSRCDIR/sources_1/new/BasicModules.v">
         <FileInfo>
           <Attr Name="UsedIn" Val="synthesis"/>
@@ -66,6 +73,13 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
+      <File Path="$PSRCDIR/sources_1/new/ControlUnit.v">
+        <FileInfo>
+          <Attr Name="UsedIn" Val="synthesis"/>
+          <Attr Name="UsedIn" Val="implementation"/>
+          <Attr Name="UsedIn" Val="simulation"/>
+        </FileInfo>
+      </File>
       <File Path="$PSRCDIR/sources_1/new/FetchUnit.v">
         <FileInfo>
           <Attr Name="UsedIn" Val="synthesis"/>
@@ -73,17 +87,8 @@
           <Attr Name="UsedIn" Val="simulation"/>
         </FileInfo>
       </File>
-      <File Path="$PSRCDIR/sources_1/new/ALU.v">
-        <FileInfo>
-          <Attr Name="AutoDisabled" Val="1"/>
-          <Attr Name="UsedIn" Val="synthesis"/>
-          <Attr Name="UsedIn" Val="implementation"/>
-          <Attr Name="UsedIn" Val="simulation"/>
-        </FileInfo>
-      </File>
       <File Path="$PSRCDIR/sources_1/new/RegFile.v">
         <FileInfo>
-          <Attr Name="AutoDisabled" Val="1"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
           <Attr Name="UsedIn" Val="simulation"/>
@@ -91,7 +96,6 @@
       </File>
       <File Path="$PSRCDIR/sources_1/new/CPU9bits.v">
         <FileInfo>
-          <Attr Name="AutoDisabled" Val="1"/>
           <Attr Name="UsedIn" Val="synthesis"/>
           <Attr Name="UsedIn" Val="implementation"/>
           <Attr Name="UsedIn" Val="simulation"/>
@@ -99,7 +103,7 @@
       </File>
       <Config>
         <Option Name="DesignMode" Val="RTL"/>
-        <Option Name="TopModule" Val="FetchUnit"/>
+        <Option Name="TopModule" Val="CPU9bits"/>
       </Config>
     </FileSet>
     <FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">